[all-commits] [llvm/llvm-project] 2a9f93: [RISCV] Use RNE rounding mode for fcvt.s.bf16. Don...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2a9f93bf13c717af3fe06bc226047f96b3f9c21a
      https://github.com/llvm/llvm-project/commit/2a9f93bf13c717af3fe06bc226047f96b3f9c21a
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-03 (Tue, 03 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoZfbfmin.td
    M llvm/test/CodeGen/RISCV/bfloat-convert.ll
    M llvm/test/MC/RISCV/fp-default-rounding-mode.s
    M llvm/test/MC/RISCV/rv32zfbfmin-valid.s

  Log Message:
  -----------
  [RISCV] Use RNE rounding mode for fcvt.s.bf16. Don't print the rounding mode if RNE. (#106948)

The rounding mode has no effect on the instruction behavior. Using RNE
matches what we do for fcvt.s.h, fcvt.d.f, fcvt.d.h which are similarily
not affected by the rounding mode.

This appears to match the behavior of binutils. According to compiler
explore, objdump is unable to disassembler fcvt.s.bf16 with a non-zero
rounding mode.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications