[all-commits] [llvm/llvm-project] c3d812: [Utils][SPIR-V] Adding spirv-sim to LLVM (#104020)
Nathan Gauër via All-commits
all-commits at lists.llvm.org
Tue Sep 3 02:46:52 PDT 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: c3d8124617a0f7916123174001547eb3b4968644
https://github.com/llvm/llvm-project/commit/c3d8124617a0f7916123174001547eb3b4968644
Author: Nathan Gauër <brioche at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
A llvm/test/Other/spirv-sim/branch.spv
A llvm/test/Other/spirv-sim/call.spv
A llvm/test/Other/spirv-sim/constant.spv
A llvm/test/Other/spirv-sim/lit.local.cfg
A llvm/test/Other/spirv-sim/loop.spv
A llvm/test/Other/spirv-sim/simple-bad-result.spv
A llvm/test/Other/spirv-sim/simple.spv
A llvm/test/Other/spirv-sim/simulator-args.spv
A llvm/test/Other/spirv-sim/switch.spv
A llvm/test/Other/spirv-sim/wave-get-lane-index.spv
A llvm/test/Other/spirv-sim/wave-read-lane-first.spv
M llvm/test/lit.cfg.py
A llvm/utils/spirv-sim/instructions.py
A llvm/utils/spirv-sim/spirv-sim.py
Log Message:
-----------
[Utils][SPIR-V] Adding spirv-sim to LLVM (#104020)
Currently, the testing infrastructure for SPIR-V is based on FileCheck.
Those tests are great to check some level of codegen, but when the test
needs check both the CFG layout and the content of each basic-block,
things becomes messy.
- Because the CHECK/CHECK-DAG/CHECK-NEXT state is limited, it is
sometimes hard to catch the good block: if 2 basic blocks have similar
instructions, FileCheck can match the wrong one.
- Cross-lane interaction can be a bit difficult to understand, and
writting a FileCheck test that is strong enough to catch bad CFG
transforms while not being broken everytime some unrelated codegen part
changes is hard.
And lastly, the spirv-val tooling we have checks that the generated
SPIR-V respects the spec, not that it is correct in regards to the
source IR.
For those reasons, I believe the best way to test the structurizer is
to:
- run spirv-val to make sure the CFG respects the spec.
- simulate the function to validate result for each lane, making sure
the generated code is correct.
This simulator has no other dependencies than core python. It also only
supports a very limited set of instructions as we can test most features
through control-flow and some basic cross-lane interactions.
As-is, the added tests are just a harness for the simulator itself. If
this gets merged, the structurizer PR will benefit from this as I'll be
able to add extensive testing using this.
---------
Signed-off-by: Nathan Gauër <brioche at google.com>
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