[all-commits] [llvm/llvm-project] 9a1ede: [RISCV] Custom legalize f16/bf16 FCOPYSIGN with Zf...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9a1eded9b9afa3eab1e0b5cad5dbff3117d22391
      https://github.com/llvm/llvm-project/commit/9a1eded9b9afa3eab1e0b5cad5dbff3117d22391
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-02 (Mon, 02 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/bfloat-arith.ll
    M llvm/test/CodeGen/RISCV/copysign-casts.ll
    M llvm/test/CodeGen/RISCV/half-arith.ll
    M llvm/test/CodeGen/RISCV/half-bitmanip-dagcombines.ll
    M llvm/test/CodeGen/RISCV/half-intrinsics.ll

  Log Message:
  -----------
  [RISCV] Custom legalize f16/bf16 FCOPYSIGN with Zfhmin/Zbfmin. (#107039)

The LegalizeDAG expansion will go through memory since i16 isn't a legal
type. Avoid this by using FMV nodes.

Similar to what we did for #106886 for FNEG and FABS. Special care is
needed to handle the Sign operand being a different type.



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