[all-commits] [llvm/llvm-project] 898d52: [compiler-rt][rtsan] Fix failing file permissions ...

Alexey Bataev via All-commits all-commits at lists.llvm.org
Fri Aug 30 11:50:45 PDT 2024


  Branch: refs/heads/users/alexey-bataev/spr/slpinitial-support-for-non-power-of-2-but-still-whole-register-number-of-elements-in-operands
  Home:   https://github.com/llvm/llvm-project
  Commit: 898d52b819496ba70d0ca29cc7b60237108ae2b4
      https://github.com/llvm/llvm-project/commit/898d52b819496ba70d0ca29cc7b60237108ae2b4
  Author: Chris Apple <cja-private at pm.me>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors.cpp

  Log Message:
  -----------
  [compiler-rt][rtsan] Fix failing file permissions test by checking umask (#106095)

This reverts:

d8d8d659685b114f31d1c42d6d18c3bc6d98b171


  Commit: e99aa4a500b0f271b327432d404a9c1f72c6850a
      https://github.com/llvm/llvm-project/commit/e99aa4a500b0f271b327432d404a9c1f72c6850a
  Author: Amr Hesham <amr96 at programmer.net>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
    M clang/test/CodeGenHLSL/builtins/all.hlsl
    M clang/test/CodeGenHLSL/builtins/any.hlsl
    M clang/test/CodeGenHLSL/builtins/frac.hlsl
    M clang/test/CodeGenHLSL/builtins/lerp.hlsl
    M clang/test/CodeGenHLSL/builtins/normalize.hlsl
    M clang/test/CodeGenHLSL/builtins/rsqrt.hlsl
    M clang/test/CodeGenHLSL/semantics/DispatchThreadID.hlsl

  Log Message:
  -----------
  [clang][HLSL] Update DXIL/SPIRV hybird CodeGen tests to use temp var (#105930)

Update all hybird DXIL/SPIRV codegen tests to use temp variable
representing interchange target

Fixes: #105710


  Commit: 17b7a9da46cef85b1a00b574c18c5f8cd5a761e1
      https://github.com/llvm/llvm-project/commit/17b7a9da46cef85b1a00b574c18c5f8cd5a761e1
  Author: Angel Zhang <angel.zhang at amd.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    A mlir/test/mlir-vulkan-runner/argmax.mlir
    M mlir/tools/mlir-vulkan-runner/CMakeLists.txt
    M mlir/tools/mlir-vulkan-runner/mlir-vulkan-runner.cpp
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  [mlir][spirv] Add an argmax integration test with `mlir-vulkan-runner` (#106426)

This PR adds an integration test for an argmax kernel with
`mlir-vulkan-runner`. This test exercises the `convert-to-spirv` pass
(landed in #95942) and demonstrates that we can use SPIR-V ops as
"intrinsics" among higher-level dialects.

The support for `index` dialect in `mlir-vulkan-runner` is also added.


  Commit: 38b252aa45abad53d7c07c666569b174a215d94d
      https://github.com/llvm/llvm-project/commit/38b252aa45abad53d7c07c666569b174a215d94d
  Author: jeffreytan81 <jeffreytan at meta.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M lldb/include/lldb/Target/ThreadPlan.h
    M lldb/include/lldb/Target/ThreadPlanStepOverBreakpoint.h
    M lldb/source/Target/ThreadPlanSingleThreadTimeout.cpp
    M lldb/source/Target/ThreadPlanStepOverBreakpoint.cpp

  Log Message:
  -----------
  Disable ThreadPlanSingleThreadTimeout during step over breakpoint  (#104532)

This PR fixes another race condition in
https://github.com/llvm/llvm-project/pull/90930. The failure was found
by @labath with this log: https://paste.debian.net/hidden/30235a5c/:
```
dotest_wrapper.  <  15> send packet: $z0,224505,1#65
...
b-remote.async>  <  22> send packet: $vCont;s:p1dcf.1dcf#4c
intern-state     GDBRemoteClientBase::Lock::Lock sent packet: \x03
b-remote.async>  < 818> read packet: $T13thread:p1dcf.1dcf;name:a.out;threads:1dcf,1dd2;jstopinfo:5b7b226e616d65223a22612e6f7574222c22726561736f6e223a227369676e616c222c227369676e616c223a31392c22746964223a373633317d2c7b226e616d65223a22612e6f7574222c22746964223a373633347d5d;thread-pcs:0000000000224505,00007f4e4302119a;00:0000000000000000;01:0000000000000000;02:0100000000000000;03:0000000000000000;04:9084997dfc7f0000;05:a8742a0000000000;06:b084997dfc7f0000;07:6084997dfc7f0000;08:0000000000000000;09:00d7e5424e7f0000;0a:d0d9e5424e7f0000;0b:0202000000000000;0c:80cc290000000000;0d:d8cc1c434e7f0000;0e:2886997dfc7f0000;0f:0100000000000000;10:0545220000000000;11:0602000000000000;12:3300000000000000;13:0000000000000000;14:0000000000000000;15:2b00000000000000;16:80fbe5424e7f0000;17:0000000000000000;18:0000000000000000;19:0000000000000000;reason:signal;#b9
```
It shows an async interrupt "\x03" was sent immediately after `vCont;s`
single step over breakpoint at address `0x224505` (which was disabled
before vCont). And the later stop was still at the original PC
(0x224505) not moving forward.

The investigation shows the failure happens when timeout is short and
async interrupt is sent to lldb-server immediately after vCont so
ptrace() resumes and then async interrupts debuggee immediately so
debuggee does not get a chance to execute and move PC. So it enters stop
mode immediately at original PC. `ThreadPlanStepOverBreakpoint` does not
expect PC not moving and reports stop at the original place.

To fix this, the PR prevents `ThreadPlanSingleThreadTimeout` from being
created during `ThreadPlanStepOverBreakpoint` by introduces a new
`SupportsResumeOthers()` method and `ThreadPlanStepOverBreakpoint`
returns false for it. This makes sense because we should never resume
threads during step over breakpoint anyway otherwise it might cause
other threads to miss breakpoint.

---------

Co-authored-by: jeffreytan81 <jeffreytan at fb.com>


  Commit: 0281339159e6ef0c30acbf146e9c3b06482191c1
      https://github.com/llvm/llvm-project/commit/0281339159e6ef0c30acbf146e9c3b06482191c1
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/MachineConvergenceVerifier.cpp
    M llvm/lib/CodeGen/MachineInstr.cpp
    M llvm/lib/CodeGen/RegAllocFast.cpp

  Log Message:
  -----------
  Revert "[CodeGen] Use MachineInstr::{all_uses,all_defs} (NFC)" (#106451)

Reverts llvm/llvm-project#106404

Breaks:
https://lab.llvm.org/buildbot/#/builders/169/builds/2590
https://lab.llvm.org/buildbot/#/builders/164/builds/2454


  Commit: 53d95f3056199b4a9668104c63080d4c94926162
      https://github.com/llvm/llvm-project/commit/53d95f3056199b4a9668104c63080d4c94926162
  Author: Changpeng Fang <changpeng.fang at amd.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    R llvm/test/CodeGen/AMDGPU/fail.llvm.fptrunc.round.ll
    A llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.err.ll

  Log Message:
  -----------
  AMDGPU: Rename fail.llvm.fptrunc.round.ll to llvm.fptrunc.round.err.ll (#106452)

Also correct the suffix of the intrinsic


  Commit: eb9c49c900f43aa79811f80847c97c6596197430
      https://github.com/llvm/llvm-project/commit/eb9c49c900f43aa79811f80847c97c6596197430
  Author: Kazu Hirata <kazu at google.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M llvm/include/llvm/Transforms/IPO/FunctionImport.h
    M llvm/lib/Transforms/IPO/FunctionImport.cpp

  Log Message:
  -----------
  [LTO] Make getImportType a proper function (NFC) (#106450)

I'm planning to reduce the memory footprint of ThinLTO indexing by
changing ImportMapTy.  A look-up of the import type will involve data
private to ImportMapTy, so it must be done by a member function of
ImportMapTy.  This patch turns getImportType into a member function so
that a subsequent "real" change will just have to update the
implementation of the function in place.


  Commit: 26c582bb452eadc3870c56e8eae24feb354a2edf
      https://github.com/llvm/llvm-project/commit/26c582bb452eadc3870c56e8eae24feb354a2edf
  Author: Greg Roth <grroth at microsoft.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M clang/lib/Basic/Targets/DirectX.h
    A clang/test/CodeGenHLSL/static-local-ctor.hlsl

  Log Message:
  -----------
  [DXIL] Don't generate per-variable guards for DirectX (#106096)

Thread init guards are generated for local static variables when using
the Microsoft CXX ABI. This ABI is also used for HLSL generation, but
DXIL doesn't need the corresponding _Init_thread_header/footer calls and
doesn't really have a way to handle them in its output targets.

This modifies the language ops when the target is DXIL to exclude this
so that they won't be generated and an alternate guardvar method is used
that is compatible with the usage.

Done to facilitate testing for #89806, but isn't really related


  Commit: 18c79ca3607bfe9cc6fd083186f3b462f5abff7e
      https://github.com/llvm/llvm-project/commit/18c79ca3607bfe9cc6fd083186f3b462f5abff7e
  Author: Michael Maitland <michaeltmaitland at gmail.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

  Log Message:
  -----------
  [LV][NFC] Remove unnecessary space in comment


  Commit: 1bc7057a8eb7400dfbb1fc8335efa41abab9884e
      https://github.com/llvm/llvm-project/commit/1bc7057a8eb7400dfbb1fc8335efa41abab9884e
  Author: Jakub Kuderski <jakub at nod-labs.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    R mlir/test/mlir-vulkan-runner/argmax.mlir
    M mlir/tools/mlir-vulkan-runner/CMakeLists.txt
    M mlir/tools/mlir-vulkan-runner/mlir-vulkan-runner.cpp
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  Revert "[mlir][spirv] Add an argmax integration test with `mlir-vulkan-runner`" (#106457)

Reverts llvm/llvm-project#106426.

This caused failures on nvidia:
https://lab.llvm.org/buildbot/#/builders/138/builds/2853


  Commit: ee0d70633872a30175cf29f81de7b2dbf771d708
      https://github.com/llvm/llvm-project/commit/ee0d70633872a30175cf29f81de7b2dbf771d708
  Author: yronglin <yronglin777 at gmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/lib/AST/ByteCode/Compiler.cpp
    M clang/lib/AST/ByteCode/Compiler.h
    A clang/test/AST/ByteCode/constexpr-vectors.cpp

  Log Message:
  -----------
  [clang][bytecode] Implement constexpr vector unary operators +, -, ~, ! (#105996)

Implement constexpr vector unary operators +, -, ~ and ! .

- Follow the current constant interpreter. All of our boolean operations
on vector types should be '-1' for the 'truth' type.
- Move the following functions from `Sema` to `ASTContext`, because we
used it in new interpreter.
```C++
QualType GetSignedVectorType(QualType V);
QualType GetSignedSizelessVectorType(QualType V);
```

---------

Signed-off-by: yronglin <yronglin777 at gmail.com>


  Commit: 13fa78c86d6b7ffcd9b7e21bbe9529f57efc3278
      https://github.com/llvm/llvm-project/commit/13fa78c86d6b7ffcd9b7e21bbe9529f57efc3278
  Author: Mike Rice <michael.p.rice at intel.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M clang/lib/Parse/ParseOpenMP.cpp

  Log Message:
  -----------
  [OpenMP][NFC] Remove executable cases from declaration switch (#106438)

The executable directives are handled earlier.


  Commit: 431db183e86b5adc72d0d2aad3ced239b4c94a60
      https://github.com/llvm/llvm-project/commit/431db183e86b5adc72d0d2aad3ced239b4c94a60
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll

  Log Message:
  -----------
  [RISCV] Remove effectively duplicate RUN lines form fixed-vectors-fp.ll. NFC

We had RUN lines with +v,+f and +v,+f,+d. +v implies +f and +d so
these are equivalent.


  Commit: a7ba73bf614f6d147bd1cdaddee156bd85e31703
      https://github.com/llvm/llvm-project/commit/a7ba73bf614f6d147bd1cdaddee156bd85e31703
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll

  Log Message:
  -----------
  [RISCV] Fix conflicting CHECK prefixes in fixed-vectors-fp.ll. NFC


  Commit: 75e9d191f52b047ea839f75ab2a7a7d9f8c6becd
      https://github.com/llvm/llvm-project/commit/75e9d191f52b047ea839f75ab2a7a7d9f8c6becd
  Author: William Junda Huang <williamjhuang at google.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M llvm/docs/CommandGuide/llvm-profdata.rst
    M llvm/include/llvm/ProfileData/SampleProfReader.h
    M llvm/include/llvm/ProfileData/SampleProfWriter.h
    M llvm/lib/ProfileData/SampleProfReader.cpp
    M llvm/lib/ProfileData/SampleProfWriter.cpp
    A llvm/test/tools/llvm-profdata/Inputs/split-layout.profdata
    A llvm/test/tools/llvm-profdata/sample-split-layout.test
    M llvm/tools/llvm-profdata/llvm-profdata.cpp

  Log Message:
  -----------
  [llvm-profdata] Enabled functionality to write split-layout profile (#101795)

Using the flag `-split_layout` in llvm-profdata merge, the output
profile can write profiles with and without inlined function into two
different extbinary sections (and their FuncOffsetTable too). The
section without inlined functions are marked with `SecFlagFlat` and is
skipped by ThinLTO because it provides no useful info.

The split layout feature was already implemented in SampleProfWriter but
previously there is no way to use it from llvm-profdata.


  Commit: b75fe11fd6fe751157012a8881ece2f247bd3887
      https://github.com/llvm/llvm-project/commit/b75fe11fd6fe751157012a8881ece2f247bd3887
  Author: Rahul Joshi <rjoshi at nvidia.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M clang/lib/StaticAnalyzer/Checkers/CheckPlacementNew.cpp
    M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
    M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
    M llvm/tools/llvm-pdbutil/ExplainOutputStyle.cpp
    M llvm/utils/TableGen/IntrinsicEmitter.cpp
    M mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-yaml-gen.cpp
    M mlir/tools/mlir-tblgen/LLVMIRConversionGen.cpp
    M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
    M mlir/tools/mlir-tblgen/OpFormatGen.cpp
    M mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp

  Log Message:
  -----------
  [NFC] Fix formatv() usage in preparation of validation (#106454)

Fix several uses of formatv() that would be flagged as invalid by an
upcoming change that will add additional validation to formatv().


  Commit: 3a5c5789662d50814e1867ac7c196dd7e7ac782c
      https://github.com/llvm/llvm-project/commit/3a5c5789662d50814e1867ac7c196dd7e7ac782c
  Author: Freddy Ye <freddy.ye at intel.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/CodeGenPrepare.cpp
    M llvm/lib/CodeGen/MachineLoopInfo.cpp
    M llvm/test/CodeGen/X86/code-align-loops.ll

  Log Message:
  -----------
  [MachineLoopInfo] Fix getLoopID to handle multi latches. (#106195)

This patch also fixed `CodegenPrepare` to preserve loop metadata when
merging blocks.

This fixes issue #102632


  Commit: 8927576b8f6442bb6129bda597efee46176f8aec
      https://github.com/llvm/llvm-project/commit/8927576b8f6442bb6129bda597efee46176f8aec
  Author: Tom Stellard <tstellar at redhat.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M .github/workflows/release-binaries.yml
    M clang/cmake/caches/Release.cmake

  Log Message:
  -----------
  workflows/release-binaries: Enable flang builds on Windows (#101344)

Flang for Windows depends on compiler-rt, so we need to enable it for
the stage1 builds. This also fixes failures building the flang tests on
macOS.

Fixes #100202.


  Commit: 438ad9f2bf25575c474313de4ad85a5da6f69e4c
      https://github.com/llvm/llvm-project/commit/438ad9f2bf25575c474313de4ad85a5da6f69e4c
  Author: Owen Pan <owenpiano at gmail.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M clang/lib/Format/ContinuationIndenter.cpp
    M clang/lib/Format/FormatToken.h
    M clang/lib/Format/TokenAnnotator.cpp
    M clang/lib/Format/UnwrappedLineParser.cpp
    M clang/unittests/Format/TokenAnnotatorTest.cpp

  Log Message:
  -----------
  [clang-format] Revert "[clang-format][NFC] Delete TT_LambdaArrow (#70… (#105923)

…519)"

This reverts commit e00d32afb9d33a1eca48e2b041c9688436706c5b and adds a
test for lambda arrow SplitPenalty.

Fixes #105480.


  Commit: 87c86aa6b93aea3d1603c1759a17fb6b5ba6e814
      https://github.com/llvm/llvm-project/commit/87c86aa6b93aea3d1603c1759a17fb6b5ba6e814
  Author: Shengchen Kan <shengchen.kan at intel.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/include/llvm/Transforms/Utils/SimplifyCFGOptions.h
    M llvm/lib/Passes/PassBuilder.cpp
    M llvm/lib/Passes/PassBuilderPipelines.cpp
    M llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp
    M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
    M llvm/test/Other/new-pm-print-pipeline.ll
    A llvm/test/Transforms/PhaseOrdering/X86/masked-memory-ops-with-cf.ll
    A llvm/test/Transforms/SimplifyCFG/X86/hoist-loads-stores-with-cf.ll

  Log Message:
  -----------
  [X86,SimplifyCFG] Support hoisting load/store with conditional faulting (Part I) (#96878)

This is simplifycfg part of
https://github.com/llvm/llvm-project/pull/95515

In this PR, we support hoisting load/store with conditional faulting in
`SimplifyCFGOpt::speculativelyExecuteBB` to eliminate conditional
branches.
This is for cases like
```
void test (int a, int *b) {
  if (a)
   *b = a;
}
``` 

In the following patches, we will support the hoist in
`SimplifyCFGOpt::hoistCommonCodeFromSuccessors`.
That is for cases like
```
void test (int a, int *c, int *d) {
  if (a)
   *c = a;
  else 
   *d = a;
}
```


  Commit: 121fb2c2ccc9db33278160b485ff0e9d09be9827
      https://github.com/llvm/llvm-project/commit/121fb2c2ccc9db33278160b485ff0e9d09be9827
  Author: tcwzxx <tcwzxx at gmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/insertelement-across-zero.ll

  Log Message:
  -----------
  [SLP] Fix the Vec lane overridden by the shuffle mask (#106341)

Currently, SLP uses shuffle for the external user of `InsertElementInst`
and iterates through the `InsertElementInst` chain to fill the mask with
constant indices. However, it may override the original Vec lane. Using
the original Vec lane is sufficient.


  Commit: ee6961dbf13167bf09b602b136d72f72d7c8ff0c
      https://github.com/llvm/llvm-project/commit/ee6961dbf13167bf09b602b136d72f72d7c8ff0c
  Author: Nathan Ridge <zeratul976 at hotmail.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M clang-tools-extra/clangd/CollectMacros.cpp
    M clang-tools-extra/clangd/CollectMacros.h
    M clang-tools-extra/clangd/ParsedAST.cpp
    M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp

  Log Message:
  -----------
  [clangd] Do not collect macros when clang-tidy checks call into the preprocessor (#106329)

Fixes https://github.com/llvm/llvm-project/issues/99617


  Commit: 82ebd333a889d2372c8445dc3d5d527ec48537db
      https://github.com/llvm/llvm-project/commit/82ebd333a889d2372c8445dc3d5d527ec48537db
  Author: Jacob Lalonde <jalalonde at fb.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
    M lldb/test/API/functionalities/process_save_core_minidump/TestProcessSaveCoreMinidump.py

  Log Message:
  -----------
  [LLDB][Minidumps] Read x64 registers as 64b and handle truncation in the file builder (#106473)

This patch addresses a bug where `cs`/`fs` and other segmentation flags
were being identified as having a type of `32b` and `64b` for `rflags`.
In that case the register value was returning the fail value `0xF...`
and this was corrupting some minidumps. Here we just read it as a 64b
value and truncate it.

In addition to that fix, I added comparing the registers from the live
process to the loaded core for the generic minidump test. Prior only
being ARM register tests. This explains why this was not detected
before.


  Commit: 8bf69ceb00bb56dd5c7357f192846518a6893f3c
      https://github.com/llvm/llvm-project/commit/8bf69ceb00bb56dd5c7357f192846518a6893f3c
  Author: Christopher Bate <cbate at nvidia.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M mlir/lib/Conversion/AffineToStandard/CMakeLists.txt
    M mlir/lib/Conversion/ComplexToLLVM/CMakeLists.txt
    M mlir/lib/Conversion/ControlFlowToSCF/CMakeLists.txt
    M mlir/lib/Conversion/SCFToControlFlow/CMakeLists.txt
    M mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
    M mlir/lib/Conversion/VectorToSCF/CMakeLists.txt
    M mlir/lib/Dialect/Affine/Transforms/CMakeLists.txt
    M mlir/lib/Dialect/Complex/IR/CMakeLists.txt
    M mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
    M mlir/lib/Dialect/MemRef/IR/CMakeLists.txt
    M mlir/lib/Dialect/MemRef/TransformOps/CMakeLists.txt
    M mlir/lib/Dialect/MemRef/Transforms/CMakeLists.txt
    M mlir/lib/Dialect/SparseTensor/Transforms/CMakeLists.txt
    M mlir/lib/Dialect/Tensor/IR/CMakeLists.txt

  Log Message:
  -----------
  Reapply "[mlir] NFC: fix dependence of (Tensor|Linalg|MemRef|Complex) dialects on LLVM Dialect and LLVM Core in CMake build (#104832)" (#105703)

Reapply the commit 43b508566799751aa180f1eaaafc5be693f2f1ae with
additional fixes for building with
BUILD_SHARED_LIBS=ON.


  Commit: 55cdb3c785ad688054493bb82c0cf3b9d7ccea07
      https://github.com/llvm/llvm-project/commit/55cdb3c785ad688054493bb82c0cf3b9d7ccea07
  Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/include/clang/AST/Decl.h
    M clang/include/clang/AST/Type.h
    M clang/include/clang/Sema/ExternalSemaSource.h
    M clang/include/clang/Sema/MultiplexExternalSemaSource.h
    M clang/include/clang/Serialization/ASTReader.h
    M clang/lib/Sema/MultiplexExternalSemaSource.cpp
    M clang/lib/Serialization/ASTReader.cpp
    A clang/test/Modules/pr102721.cppm

  Log Message:
  -----------
  [C++20] [Modules] Merge lambdas in source to imported lambdas (#106483)

Close https://github.com/llvm/llvm-project/issues/102721

Generally, the type of merged decls will be reused in ASTContext. But
for lambda, in the import and then include case, we can't decide its
previous decl in the imported modules so that we can't assign the
previous decl before creating the type for it. Since we can't decide its
numbering before creating it. So we have to assign the previous decl and
the canonical type for it after creating it, which is unusual and
slightly hack.


  Commit: 619efd75da77415e016c79c37a0fabe573ce1845
      https://github.com/llvm/llvm-project/commit/619efd75da77415e016c79c37a0fabe573ce1845
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
    A llvm/test/CodeGen/RISCV/rvv/pr106109.ll
    M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll

  Log Message:
  -----------
  [RISCV] Fix v[f]slide1down.vx having VL changed (#106110)

v[f]slide1down.vx uses VL to determine where the element is inserted
into, so changing the VL changes the result.

This fixes this by setting ActiveElementsAffectsResult, but it's overly
conservative. We should relax this later by modelling that it's ok to
change the mask, just not VL.

Fixes #106109


  Commit: 051054e6f74303bc880221e88671745f363964cc
      https://github.com/llvm/llvm-project/commit/051054e6f74303bc880221e88671745f363964cc
  Author: Brandon Wu <brandon.wu at sifive.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/include/clang/Basic/riscv_vector.td
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdm.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesef.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesem.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaeskf1.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaeskf2.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vandn.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vbrev.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vbrev8.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vclmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vclmulh.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vclz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcpopv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vctz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vghsh.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vgmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrev8.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrol.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vror.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsha2ch.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsha2cl.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsha2ms.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm3c.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm3me.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm4k.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm4r.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwsll.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesdf.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesdm.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesef.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesem.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaeskf1.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaeskf2.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vandn.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vbrev.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vbrev8.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vclmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vclmulh.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vclz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vcpopv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vctz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vghsh.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vgmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vrev8.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vrol.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vror.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsha2ch.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsha2cl.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsha2ms.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsm3c.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsm3me.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsm4k.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsm4r.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vwsll.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesdf.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesdm.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesef.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesem.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaeskf1.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaeskf2.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vandn.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vbrev.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vbrev8.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vclmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vclmulh.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vclz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vcpopv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vctz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vghsh.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vgmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrev8.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrol.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vror.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsha2ch.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsha2cl.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsha2ms.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsm3c.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsm3me.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsm4k.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsm4r.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwsll.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesdf.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesdm.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesef.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesem.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaeskf1.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaeskf2.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vandn.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vbrev.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vbrev8.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vclmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vclmulh.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vclz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vcpopv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vctz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vghsh.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vgmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vrev8.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vrol.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vror.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsha2ch.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsha2cl.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsha2ms.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsm3c.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsm3me.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsm4k.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsm4r.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vwsll.c

  Log Message:
  -----------
  [clang][RISCV] Remove `experimental` for vector crypto intrinsics (#106359)

The C intrinsic spec is ratified:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/234.


  Commit: 572d2fd327b3a55fe57f712813321a3c40c895cd
      https://github.com/llvm/llvm-project/commit/572d2fd327b3a55fe57f712813321a3c40c895cd
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/include/llvm/Transforms/IPO/Attributor.h
    A llvm/test/CodeGen/AMDGPU/amdgpu-attributor-accesslist-offsetbins-out-of-sync.ll

  Log Message:
  -----------
  [Attributor] Fix an issue that could potentially cause `AccessList` and `OffsetBins` out of  sync (#106187)

The implementation of `AAPointerInfo::RangeList::set_difference` doesn't
consider the case where two ranges have the same offset but different
sizes.
This could cause `AccessList` and `OffsetBins` out of sync because a
range has
been already updated in `AccessList` but missing in `ToRemove`.

I do have a reproducer but the reproducer itself is 248kb. `llvm-reduce`
can't
further reduce it. Not sure how I can make a smaller reproducer.

Fixes: SWDEV-479757.


  Commit: 9d81e7e36e33aecdee05fef551c0652abafaa052
      https://github.com/llvm/llvm-project/commit/9d81e7e36e33aecdee05fef551c0652abafaa052
  Author: Tom Stellard <tstellar at redhat.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M .github/workflows/release-doxygen.yml
    M .github/workflows/release-lit.yml
    M .github/workflows/release-sources.yml
    M .github/workflows/release-tasks.yml

  Log Message:
  -----------
  workflows/release-tasks: Pass required secrets to all called workflows (#106286)

Called workflows don't have access to secrets by default, so we need to
explicitly pass secrets that we use.


  Commit: 95361cf3306760378c4798963405ed4cd6410f15
      https://github.com/llvm/llvm-project/commit/95361cf3306760378c4798963405ed4cd6410f15
  Author: Christopher Bate <cbate at nvidia.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M mlir/lib/Conversion/SCFToControlFlow/CMakeLists.txt

  Log Message:
  -----------
  [mlir] fix missing LLVMDialect dependency for MLIRSCFToControlFlow

This is a fix-forward for 8bf69ceb00bb56dd5c7357f192846518a6893f3c.
The SCF-to-ControlFlow pass has an explicit LLVMDialect dependency.


  Commit: 62c5de36e8a523cc81950a782a4b6182393681c4
      https://github.com/llvm/llvm-project/commit/62c5de36e8a523cc81950a782a4b6182393681c4
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-28 (Wed, 28 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp

  Log Message:
  -----------
  [RISCV] Fix a place that convert an immediate to MCRegister and back to immediate.

This dropped the upper 32 bits of the immediate, but I'm not sure
it is ever non-zero.


  Commit: 2adc94cd6c3dd1fc713a6ba8301fc04f21908700
      https://github.com/llvm/llvm-project/commit/2adc94cd6c3dd1fc713a6ba8301fc04f21908700
  Author: Akshat Oke <76596238+Akshat-Oke at users.noreply.github.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
    A llvm/lib/Target/AMDGPU/SIFoldOperands.h
    M llvm/test/CodeGen/AMDGPU/si-fold-scalar-clamp.mir
    M llvm/test/CodeGen/AMDGPU/skip-fold-regsequence.mir

  Log Message:
  -----------
  AMDGPU/NewPM: Port SIFoldOperands to new pass manager (#105801)


  Commit: 3b64ede096ce0a0230c4d3f77782e6fa18f2943a
      https://github.com/llvm/llvm-project/commit/3b64ede096ce0a0230c4d3f77782e6fa18f2943a
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-reverse.ll
    M llvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll
    M llvm/test/CodeGen/RISCV/rvv/vp-reverse-int.ll
    M llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask.ll

  Log Message:
  -----------
  [RISCV] Decompose LMUL > 1 reverses into LMUL * M1 vrgather.vv (#104574)

As far as I'm aware, vrgather.vv is quadratic in LMUL on most
microarchitectures today due to each output register needing to read
from each input register in the group.

For example, the reciprocal throughput for vrgather.vv on the
spacemit-x60 is listed on
https://camel-cdr.github.io/rvv-bench-results/bpi_f3 as:

    LMUL1   LMUL2   LMUL4   LMUL8
    4.0	16.0	64.0	256.1

Vector reverses are commonly emitted by the loop vectorizer and are
lowered as vrgather.vvs, but since the loop vectorizer uses LMUL 2 by
default they end up being quadratic.

The output registers in a reverse only need to read from one input
register though, so we can decompose this into LMUL * M1 vrgather.vvs to
get linear performance.

This gives a 0.43% runtime improvement on 526.blender_r at rva22u64_v O3
on the Banana Pi F3.


  Commit: 8f96be921c1a97594ee94c2789cee9b131525f63
      https://github.com/llvm/llvm-project/commit/8f96be921c1a97594ee94c2789cee9b131525f63
  Author: Lang Hames <lhames at gmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/tools/bugpoint/CMakeLists.txt

  Log Message:
  -----------
  [bugpoint] Fix bugpoint for LLVM_ENABLE_EXPORTED_SYMBOLS_IN_EXECUTABLES=Off.

Building with -DLLVM_ENABLE_EXPORTED_SYMBOLS_IN_EXECUTABLES=Off should not
prevent use of bugpoint plugins.

This fix uses the approach implemented in
https://github.com/llvm/llvm-project/pull/101741.


  Commit: c7a4efa4294789b1116f0c4a320c16fcb27cb62c
      https://github.com/llvm/llvm-project/commit/c7a4efa4294789b1116f0c4a320c16fcb27cb62c
  Author: Patryk Wychowaniec <pwychowaniec at pm.me>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
    A llvm/test/CodeGen/AVR/ldd-immediate-overflow.ll
    A llvm/test/CodeGen/AVR/std-immediate-overflow.ll

  Log Message:
  -----------
  [AVR] Fix 16-bit LDDs with immediate overflows (#104923)

16-bit loads are expanded into a pair of 8-bit loads, so the maximum
offset of such 16-bit loads must be 62, not 63.


  Commit: 7f59264d469d690fcd1cead0a2dfc02739d17db4
      https://github.com/llvm/llvm-project/commit/7f59264d469d690fcd1cead0a2dfc02739d17db4
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Utils/SCCPSolver.cpp
    M llvm/test/Transforms/SCCP/pointer-nonnull.ll
    M llvm/test/Transforms/SCCP/range-attribute.ll

  Log Message:
  -----------
  [IPSCCP] Intersect attribute info for interprocedural args (#106397)

IPSCCP can currently return worse results than SCCP for arguments that
are tracked interprocedurally, because information from attributes is
not used for them.

Fix this by intersecting in the attribute information when propagating
lattice values from calls.


  Commit: c954306ef763eb25f06432324889bde98735963d
      https://github.com/llvm/llvm-project/commit/c954306ef763eb25f06432324889bde98735963d
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_logpoints.py
    M lldb/test/API/tools/lldb-dap/console/TestDAP_console.py

  Log Message:
  -----------
  [lldb][lldb-dap][test] Enable more tests on Windows

These tests "just work" on our Windows On Arm machine.


  Commit: 47615ff2347a8be429404285de3b1c03b411e7af
      https://github.com/llvm/llvm-project/commit/47615ff2347a8be429404285de3b1c03b411e7af
  Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/include/clang/Serialization/ASTWriter.h
    M clang/lib/Serialization/ASTWriter.cpp
    A clang/test/Modules/pr106483.cppm

  Log Message:
  -----------
  [C++20] [Modules] Don't insert class not in named modules to PendingEmittingVTables (#106501)

Close https://github.com/llvm/llvm-project/issues/102933

The root cause of the issue is an oversight in
https://github.com/llvm/llvm-project/pull/102287 that I didn't notice
that PendingEmittingVTables should only accept classes in named modules.


  Commit: e5b55e606796bac0e28e2f0fdc6fb39a419f6b15
      https://github.com/llvm/llvm-project/commit/e5b55e606796bac0e28e2f0fdc6fb39a419f6b15
  Author: Lang Hames <lhames at gmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/tools/clang-repl/CMakeLists.txt

  Log Message:
  -----------
  [clang-repl] Fix clang-repl for LLVM_ENABLE_EXPORTED_SYMBOLS_IN_EXECUTABLES=Off.

clang-repl should stil work when LLVM is built with
-DLLVM_ENABLE_EXPORTED_SYMBOLS_IN_EXECUTABLES=Off.

This fix uses the approach implemented in
https://github.com/llvm/llvm-project/pull/101741.

rdar://134910110


  Commit: 2eeeff842f993a694159183a2834b4d305549cad
      https://github.com/llvm/llvm-project/commit/2eeeff842f993a694159183a2834b4d305549cad
  Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/include/clang/CodeGen/CodeGenAction.h
    M clang/include/clang/Frontend/FrontendActions.h
    M clang/include/clang/Serialization/ModuleFile.h
    M clang/lib/CodeGen/CodeGenAction.cpp
    M clang/lib/Frontend/FrontendActions.cpp
    M clang/test/Modules/no-local-decl-in-reduced-bmi.cppm
    M clang/test/Modules/reduced-bmi-empty-module-purview-std.cppm
    M clang/test/Modules/reduced-bmi-empty-module-purview.cppm
    M clang/test/Modules/unreached-static-entities.cppm

  Log Message:
  -----------
  [C++20] [Modules] Embed all source files for C++20 Modules (#102444)

Close https://github.com/llvm/llvm-project/issues/72383

The implementation rationale is, I don't want to pass
`-fmodules-embed-all-files` all the time since we can't test it in lit
tests (we're using `clang_cc1`). So I tried to set it in FrontendActions
for modules.


  Commit: b822b69ff54bcd2f08445bd02b8dad0584422874
      https://github.com/llvm/llvm-project/commit/b822b69ff54bcd2f08445bd02b8dad0584422874
  Author: Lucas Duarte Prates <lucas.prates at arm.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/lib/Driver/ToolChain.cpp
    M clang/test/Driver/print-multi-selection-flags.c

  Log Message:
  -----------
  [Driver] Add -mbranch-protection to ARM and AArch64 multilib flags (#106391)

This adds the `-mbranch-protection` command line option to the set of
flags used by the multilib selection for ARM and AArch64 targets.


  Commit: b7981a78f0aaea1500d79a519c0be03c69d9b1ac
      https://github.com/llvm/llvm-project/commit/b7981a78f0aaea1500d79a519c0be03c69d9b1ac
  Author: Adrian Kuegel <akuegel at google.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M mlir/lib/Dialect/Linalg/Transforms/MeshShardingInterfaceImpl.cpp

  Log Message:
  -----------
  [mlir] Apply ClangTidyPerformance finding (NFC).

Use const reference for loop variable.


  Commit: efad561890ad3584c38adae913f9939384eb804c
      https://github.com/llvm/llvm-project/commit/efad561890ad3584c38adae913f9939384eb804c
  Author: Jacek Caban <jacek at codeweavers.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M lld/COFF/Chunks.cpp
    M lld/COFF/Chunks.h
    M lld/COFF/Writer.cpp
    A lld/test/COFF/arm64ec-range-thunks.s

  Log Message:
  -----------
  [LLD][COFF] Add support for range extension thunks for ARM64EC targets. (#106289)

Thunks themselves are the same as regular ARM64 thunks; they just need
to report the correct machine type. When processing the code, we also
need to use the current chunk's machine type instead of the global one:
we don't want to treat x86_64 thunks as ARM64EC, and we need to report
the correct machine type in hybrid binaries.


  Commit: f9ee9f5b39b3840e5fd6bb54ebb7830a98f8f0af
      https://github.com/llvm/llvm-project/commit/f9ee9f5b39b3840e5fd6bb54ebb7830a98f8f0af
  Author: VisdaVokhshoori <31481804+VisdaVokhshoori at users.noreply.github.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/docs/TestSuiteGuide.md

  Log Message:
  -----------
  [llvm][Docs] Update TestSuiteGuide.md (#79613)

Update svn to git & virtualenv to venv


  Commit: ae34257e9015a366ea63cd461535b35bc9837c57
      https://github.com/llvm/llvm-project/commit/ae34257e9015a366ea63cd461535b35bc9837c57
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_logpoints.py

  Log Message:
  -----------
  [lldb][lldb-dap][test] Skip logpoint test on Windows again

This one snuck into the previous patch. The test program needs
updating if it's ever going to work on Windows.


  Commit: c9b6e01b2e4fc930dac91dd44c0592ad7e36d967
      https://github.com/llvm/llvm-project/commit/c9b6e01b2e4fc930dac91dd44c0592ad7e36d967
  Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
    M llvm/test/tools/llvm-split/AMDGPU/address-taken-externalize-with-call.ll
    M llvm/test/tools/llvm-split/AMDGPU/address-taken-externalize.ll
    R llvm/test/tools/llvm-split/AMDGPU/debug-name-hiding.ll
    R llvm/test/tools/llvm-split/AMDGPU/debug-non-kernel-root.ll
    M llvm/test/tools/llvm-split/AMDGPU/declarations.ll
    M llvm/test/tools/llvm-split/AMDGPU/kernels-alias-dependencies.ll
    M llvm/test/tools/llvm-split/AMDGPU/kernels-cost-ranking.ll
    M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-external.ll
    M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-indirect.ll
    M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-overridable.ll
    M llvm/test/tools/llvm-split/AMDGPU/kernels-global-variables-noexternal.ll
    M llvm/test/tools/llvm-split/AMDGPU/kernels-global-variables.ll
    M llvm/test/tools/llvm-split/AMDGPU/large-kernels-merging.ll
    M llvm/test/tools/llvm-split/AMDGPU/non-kernels-dependency-indirect.ll
    A llvm/test/tools/llvm-split/AMDGPU/recursive-search-2.ll
    A llvm/test/tools/llvm-split/AMDGPU/recursive-search-8.ll

  Log Message:
  -----------
  [AMDGPU] Graph-based Module Splitting Rewrite (#104763)

Major rewrite of the AMDGPUSplitModule pass in order to better support
it long-term.

Highlights:
- Removal of the "SML" logging system in favor of just using CL options
and LLVM_DEBUG, like any other pass in LLVM.
- The SML system started from good intentions, but it was too flawed and
messy to be of any real use. It was also a real pain to use and made the
code more annoying to maintain.
 - Graph-based module representation with DOTGraph printing support
- The graph represents the module accurately, with bidirectional, typed
edges between nodes (a node usually represents one function).
- Nodes are assigned IDs starting from 0, which allows us to represent a
set of nodes as a BitVector. This makes comparing 2 sets of nodes to
find common dependencies a trivial task. Merging two clusters of nodes
together is also really trivial.
 - No more defaulting to "P0" for external calls
- Roots that can reach non-copyable dependencies (such as external
calls) are now grouped together in a single "cluster" that can go into
any partition.
 - No more defaulting to "P0" for indirect calls
- New representation for module splitting proposals that can be graded
and compared.
- Graph-search algorithm that can explore multiple branches/assignments
for a cluster of functions, up to a maximum depth.
- With the default max depth of 8, we can create up to 256 propositions
to try and find the best one.
- We can still fall back to a greedy approach upon reaching max depth.
That greedy approach uses almost identical heuristics to the previous
version of the pass.

All of this gives us a lot of room to experiment with new heuristics or
even entirely different splitting strategies if we need to. For
instance, the graph representation has room for abstract nodes, e.g. if
we need to represent some global variables or external constraints. We
could also introduce more edge types to model other type of relations
between nodes, etc.

I also designed the graph representation & the splitting strategies to
be as fast as possible, and it seems to have paid off. Some quick tests
showed that we spend pretty much all of our time in the CloneModule
function, with the actual splitting logic being >1% of the runtime.


  Commit: e37d6d2a74d76fdc95f5c5d625e282ce600aad55
      https://github.com/llvm/llvm-project/commit/e37d6d2a74d76fdc95f5c5d625e282ce600aad55
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
    M mlir/test/Conversion/ArmSMEToLLVM/tile-spills-and-fills.mlir
    M mlir/test/Dialect/ArmSME/tile-zero-masks.mlir

  Log Message:
  -----------
  [mlir][ArmSME] Merge consecutive `arm_sme.intr.zero` ops (#106215)

This merges consecutive SME zero intrinsics within a basic block, which
avoids the backend eventually emitting multiple zero instructions when
it could just use one.

Note: This kind of peephole optimization could be implemented in the
backend too.


  Commit: 31684c676a9983277666df2ac845a563f4d68e19
      https://github.com/llvm/llvm-project/commit/31684c676a9983277666df2ac845a563f4d68e19
  Author: pvanhout <pierre.vanhoutryve at amd.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    R llvm/test/tools/llvm-split/AMDGPU/declarations-debug.ll

  Log Message:
  -----------
  [AMDGPU][llvm-split] Remove declarations-debug

Test didn't have a FileCheck line and is obsolete after #104763


  Commit: b9f4afa1674fe6f101b298d4893cde2ab2d16877
      https://github.com/llvm/llvm-project/commit/b9f4afa1674fe6f101b298d4893cde2ab2d16877
  Author: Daniel Grumberg <dgrumberg at apple.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/include/clang/ExtractAPI/API.h
    M clang/lib/ExtractAPI/API.cpp

  Log Message:
  -----------
  [clang][ExtractAPI] Fix iteration order of TopLevelRecords (#106411)

Fixes #106355


  Commit: 575be3efb056b298bd4cbf9a04c324893e208488
      https://github.com/llvm/llvm-project/commit/575be3efb056b298bd4cbf9a04c324893e208488
  Author: pvanhout <pierre.vanhoutryve at amd.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/test/tools/llvm-split/AMDGPU/declarations.ll

  Log Message:
  -----------
  [AMDGPU][llvm-split] Make declarations test more stable

Delete the previous files if present, to ensure it won't fail if the output directory of the tests wasn't cleared.


  Commit: fdca2c33a1f33f4886d969ea0f0219764c7b6b59
      https://github.com/llvm/llvm-project/commit/fdca2c33a1f33f4886d969ea0f0219764c7b6b59
  Author: Akshat Oke <76596238+Akshat-Oke at users.noreply.github.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
    A llvm/lib/Target/AMDGPU/GCNDPPCombine.h
    M llvm/test/CodeGen/AMDGPU/dpp_combine.mir
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.mir

  Log Message:
  -----------
  AMDGPU/NewPM Port GCNDPPCombine to NPM (#105816)

Co-authored-by: Akshat Oke <Akshat.Oke at amd.com>


  Commit: 60e9fb9dae0e041cb468210f5795e9d59e70cccf
      https://github.com/llvm/llvm-project/commit/60e9fb9dae0e041cb468210f5795e9d59e70cccf
  Author: Sergio Afonso <safonsof at amd.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M flang/lib/Lower/OpenMP/DataSharingProcessor.h
    M flang/lib/Lower/OpenMP/OpenMP.cpp

  Log Message:
  -----------
  [Flang][OpenMP] Don't expect block arguments using early privatization (#105842)

There are some spots where all symbols to privatize collected by a
`DataSharingProcessor` instance are expected to have corresponding entry
block arguments associated regardless of whether delayed privatization
was enabled.

This can result in compiler crashes if a `DataSharingProcessor` instance
created with `useDelayedPrivatization=false` is queried in this way. The
solution proposed by this patch is to provide another public method to
query specifically delayed privatization symbols, which will either be
empty or point to the complete set of symbols to privatize accordingly.


  Commit: c28b84e30b7bb5816c71c72546a8e4167d1e1b5d
      https://github.com/llvm/llvm-project/commit/c28b84e30b7bb5816c71c72546a8e4167d1e1b5d
  Author: JoelWee <32009741+JoelWee at users.noreply.github.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  Update BUILD.bazel after e37d6d2a74d7


  Commit: 2505546aee8b35d03d7755b0f8e6cd960295928e
      https://github.com/llvm/llvm-project/commit/2505546aee8b35d03d7755b0f8e6cd960295928e
  Author: Piyou Chen <piyou.chen at sifive.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M compiler-rt/lib/builtins/cpu_model/riscv.c

  Log Message:
  -----------
  [compiler-rt][RISCV][NFC] Update code_model with latest spec (#106498)

The spec could be found here
https://github.com/riscv-non-isa/riscv-c-api-doc/pull/74

This patch updates the following symbol:

```
mVendorID -> mvendorid
mArchID -> marchid
mImplID -> mimpid
```


  Commit: 911b96058a94a10a3897a56af703992c4509965b
      https://github.com/llvm/llvm-project/commit/911b96058a94a10a3897a56af703992c4509965b
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp

  Log Message:
  -----------
  PPC: Custom lower ppcf128 is_fpclass if is_fpclass is custom (#105540)

Unfortunately expandIS_FPCLASS is called directly in SelectionDAGBuilder
depending on whether IS_FPCLASS is custom or not. This helps avoid ppc test
regressions in a future patch where the custom lowering would be bypassed.


  Commit: 7b7b0b95b2bb8e72fb60438409b12d8eabf484a2
      https://github.com/llvm/llvm-project/commit/7b7b0b95b2bb8e72fb60438409b12d8eabf484a2
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/fract-match.ll
    M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
    M llvm/test/CodeGen/PowerPC/is_fpclass.ll

  Log Message:
  -----------
  DAG: Check if is_fpclass is custom, instead of isLegalOrCustom (#105577)

For some reason, isOperationLegalOrCustom is not the same as
isOperationLegal || isOperationCustom. Unfortunately, it checks
if the type is legal which makes it uesless for custom lowering
on non-legal types (which is always ppcf128).

Really the DAG builder shouldn't be going to expand this in the
builder, it makes it difficult to work with. It's only here to work
around the DAG requiring legal integer types the same size as
the FP type after type legalization.


  Commit: fcb3a0485857c749d04ea234a8c3d629c62ab211
      https://github.com/llvm/llvm-project/commit/fcb3a0485857c749d04ea234a8c3d629c62ab211
  Author: Luke Shingles <luke.shingles at gmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Support/Z3Solver.cpp

  Log Message:
  -----------
  [analyzer] Add missing include <unordered_map> to llvm/lib/Support/Z3Solver.cpp (#106410)

Resolves #106361. Adding #include <unordered_map> to
llvm/lib/Support/Z3Solver.cpp fixes compilation errors for homebrew
build on macOS with Xcode 14.
https://github.com/Homebrew/homebrew-core/actions/runs/10604291631/job/29390993615?pr=181351
shows that this is resolved when the include is patched in (Linux CI
failure is due to unrelated timeout).


  Commit: 36b7c30b292f853c09b80f8bc2c5f233f68c9e7b
      https://github.com/llvm/llvm-project/commit/36b7c30b292f853c09b80f8bc2c5f233f68c9e7b
  Author: Freddy Ye <freddy.ye at intel.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    A llvm/test/MC/Disassembler/X86/apx/evex-w-opsize.txt
    M llvm/utils/TableGen/X86DisassemblerTables.cpp

  Log Message:
  -----------
  [X86, MC] Recognize OSIZE=64b when EVEX.W = 1, EVEX.pp = 01 (#103816)

In the legacy space, if both the 66 prefix and REX.W=1 are present, the
REX.W=1 takes precedence and makes OSIZE=64b. EVEX map 4 inherits this
convention, with EVEX.pp=01 and EVEX.W playing the roles of the 66
prefix and REX.W. So if EVEX.pp=00, the OSIZE can only be 64b or 32b,
depending on whether EVEX.W=1 or not. But if EVEX.pp=01, then OSIZE is
either 64b or 16b depending on whether EVEX.W=1 or not.


  Commit: ddbc8f331a708dacfbf0a41e8ae6b8f6d9605407
      https://github.com/llvm/llvm-project/commit/ddbc8f331a708dacfbf0a41e8ae6b8f6d9605407
  Author: Elvina Yakubova <eyakubova at nvidia.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    R llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred-parent.ll
    R llvm/test/Transforms/SLPVectorizer/X86/alternate-opcode-sindle-bv.ll
    R llvm/test/Transforms/SLPVectorizer/X86/arith-div-undef.ll
    R llvm/test/Transforms/SLPVectorizer/X86/bool-logical-op-reduction-with-poison.ll
    R llvm/test/Transforms/SLPVectorizer/X86/buildvector-insert-mask-size.ll
    R llvm/test/Transforms/SLPVectorizer/X86/buildvector-nodes-dependency.ll
    R llvm/test/Transforms/SLPVectorizer/X86/call-arg-reduced-by-minbitwidth.ll
    R llvm/test/Transforms/SLPVectorizer/X86/catchswitch.ll
    R llvm/test/Transforms/SLPVectorizer/X86/crash_exceed_scheduling.ll
    R llvm/test/Transforms/SLPVectorizer/X86/diamond_broadcast.ll
    A llvm/test/Transforms/SLPVectorizer/alternate-cmp-swapped-pred-parent.ll
    A llvm/test/Transforms/SLPVectorizer/alternate-opcode-sindle-bv.ll
    A llvm/test/Transforms/SLPVectorizer/arith-div-undef.ll
    A llvm/test/Transforms/SLPVectorizer/bool-logical-op-reduction-with-poison.ll
    A llvm/test/Transforms/SLPVectorizer/buildvector-insert-mask-size.ll
    A llvm/test/Transforms/SLPVectorizer/buildvector-nodes-dependency.ll
    A llvm/test/Transforms/SLPVectorizer/call-arg-reduced-by-minbitwidth.ll
    A llvm/test/Transforms/SLPVectorizer/catchswitch.ll
    A llvm/test/Transforms/SLPVectorizer/crash_exceed_scheduling.ll
    A llvm/test/Transforms/SLPVectorizer/diamond_broadcast.ll

  Log Message:
  -----------
  [SLP] Move some of X86 tests to common directory (#106401)

Some of the tests from X86 directory can be generalized for AArch64 to
improve its coverage.


  Commit: 3ef37e2f8f672393ee409fde8309198df0981735
      https://github.com/llvm/llvm-project/commit/3ef37e2f8f672393ee409fde8309198df0981735
  Author: Stephen Tozer <stephen.tozer at sony.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
    M llvm/test/CodeGen/Thumb2/pr52817.ll
    M llvm/test/CodeGen/X86/fsafdo_test1.ll
    M llvm/test/CodeGen/X86/fsafdo_test4.ll
    A llvm/test/DebugInfo/Generic/is_stmt-at-block-start.ll
    M llvm/test/DebugInfo/MIR/X86/empty-inline.mir
    M llvm/test/DebugInfo/X86/discriminator.ll

  Log Message:
  -----------
  [DebugInfo][DWARF] Set is_stmt on first non-line-0 instruction in BB (#105524)

Fixes: https://github.com/llvm/llvm-project/issues/104695

This patch adds the is_stmt flag to line table entries for the first
instruction with a non-0 line location in each basic block, to ensure
that it will be used for stepping even if the last instruction in the
previous basic block had the same line number; this is important for
cases where the new BB is reachable from BBs other than the preceding
block.


  Commit: 2784060c167d86a05f20a0ab1892f96e69a2da20
      https://github.com/llvm/llvm-project/commit/2784060c167d86a05f20a0ab1892f96e69a2da20
  Author: Sergio Afonso <safonsof at amd.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
    M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
    M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
    M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
    M mlir/test/Dialect/OpenMP/invalid.mlir
    M mlir/test/Dialect/OpenMP/ops.mlir

  Log Message:
  -----------
  [MLIR][Flang][OpenMP] Remove omp.parallel from loop wrapper ops (#105833)

This patch updates the `omp.parallel` operation according to the results
of the discussion in [this
RFC](https://discourse.llvm.org/t/rfc-disambiguation-between-loop-and-block-associated-omp-parallelop/79972).
It is removed from the set of loop wrapper operations, changing the
expected MLIR representation for composite `distribute parallel do/for`
into the following:

```mlir
omp.parallel {
  ...
  omp.distribute {
    omp.wsloop {
      omp.loop_nest ... { ... }
      omp.terminator
    }
    omp.terminator
  }
  ...
  omp.terminator
}
```

MLIR verifiers for operations impacted by this representation change are
updated, as well as related tests. The `LoopWrapperInterface` is also
updated, since it's no longer representing an optional "role" of an
operation but a mandatory set of restrictions instead.


  Commit: 0f206b19c3303aeb8e527b4977da2bd301464a9b
      https://github.com/llvm/llvm-project/commit/0f206b19c3303aeb8e527b4977da2bd301464a9b
  Author: Sergio Afonso <safonsof at amd.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M flang/lib/Lower/OpenMP/OpenMP.cpp
    M flang/test/Lower/OpenMP/parallel-reduction3.f90
    M flang/test/Lower/OpenMP/wsloop-reduction-array-assumed-shape.f90
    M flang/test/Lower/OpenMP/wsloop-reduction-array.f90
    M flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
    M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90

  Log Message:
  -----------
  [Flang][OpenMP] Move loop privatization out of dispatch (#106066)

This patch moves the creation of `DataSharingProcessor` instances for
loop constructs out of `genOMPDispatch()` and into their corresponding
codegen functions. This is a necessary first step to enable a proper
handling of privatization on composite constructs.

Some tests are updated due to a change of order between clause
processing and privatization.


  Commit: 113806d187901ec3ca202ffa22ef94c80770a760
      https://github.com/llvm/llvm-project/commit/113806d187901ec3ca202ffa22ef94c80770a760
  Author: Lukacma <Marian.Lukac at arm.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-all-active-lanes-cvt.ll
    A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-no-active-lanes-cvt.ll

  Log Message:
  -----------
  [AArch64] optimise SVE cvt intrinsics with no active lanes (#104809)

This patch extends https://github.com/llvm/llvm-project/pull/73964 and
optimises SVE cvt intrinsics away when predicate is zero.


  Commit: 9c8ce5fac8a05e27cca832fb3913ec986b120211
      https://github.com/llvm/llvm-project/commit/9c8ce5fac8a05e27cca832fb3913ec986b120211
  Author: Sergio Afonso <safonsof at amd.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M flang/lib/Lower/OpenMP/OpenMP.cpp
    A flang/test/Lower/OpenMP/distribute-parallel-do.f90
    M flang/test/Lower/OpenMP/if-clause.f90
    M flang/test/Lower/OpenMP/loop-compound.f90

  Log Message:
  -----------
  [Flang][OpenMP] DISTRIBUTE PARALLEL DO lowering (#106207)

This patch adds PFT to MLIR lowering support for `distribute parallel
do` composite constructs.


  Commit: 57726c440c30b3f0b5ebfaf345b0237df4430259
      https://github.com/llvm/llvm-project/commit/57726c440c30b3f0b5ebfaf345b0237df4430259
  Author: Sergio Afonso <safonsof at amd.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M flang/lib/Lower/OpenMP/OpenMP.cpp
    A flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
    M flang/test/Lower/OpenMP/if-clause.f90
    M flang/test/Lower/OpenMP/loop-compound.f90

  Log Message:
  -----------
  [Flang][OpenMP] DISTRIBUTE PARALLEL DO SIMD lowering (#106211)

This patch adds PFT to MLIR lowering support for `distribute parallel do
simd` composite constructs.


  Commit: fdf72c992b2781de3f6c78698164e55a031a268e
      https://github.com/llvm/llvm-project/commit/fdf72c992b2781de3f6c78698164e55a031a268e
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    A llvm/test/Transforms/SLPVectorizer/X86/cmp-in-bv-node-type-cost.ll

  Log Message:
  -----------
  [SLP]Fix a crash when requestin the cost for buildvector cmp nodes types.

Need to use original cmp type i1 when estimating the cost for the
buildvector node, not its operand types to prevent compiler crash upon
TTI cost estimation.


  Commit: c3cb27370af40e491446164840766478d3258429
      https://github.com/llvm/llvm-project/commit/c3cb27370af40e491446164840766478d3258429
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp

  Log Message:
  -----------
  Fix MSVC "not all control paths return a value" warning. NFC.


  Commit: 616f7d3d4f6d9bea6f776e357c938847e522a681
      https://github.com/llvm/llvm-project/commit/616f7d3d4f6d9bea6f776e357c938847e522a681
  Author: Stephen Tozer <stephen.tozer at sony.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    R llvm/test/DebugInfo/Generic/is_stmt-at-block-start.ll
    A llvm/test/DebugInfo/X86/is_stmt-at-block-start.ll

  Log Message:
  -----------
  [DebugInfo][NFC] Make is_stmt-at-block-start test X86-specific

Fixes failure on the llvm-clang-aarch64-darwin buildbot:
https://lab.llvm.org/buildbot/#/builders/190/builds/4660/

The test mentioned does not rely on any unique property of X86, but does
rely on the layout of the basic blocks produced by llc, which varies
between targets. Although the test could be duplicated for other targets,
it seems unnecessary since the behaviour being tested is not
target-specific.


  Commit: 0a272d3a1703415abca42dc2e2cc2b57cb30734e
      https://github.com/llvm/llvm-project/commit/0a272d3a1703415abca42dc2e2cc2b57cb30734e
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    A llvm/test/Transforms/LoopVectorize/X86/cost-constant-known-via-scev.ll

  Log Message:
  -----------
  [LV] Use SCEV to analyze second operand for cost query.

Improve operand analysis using SCEV for cost purposes. This fixes a
divergence between legacy and VPlan-based cost-modeling after
533e6bbd0d34.

Fixes https://github.com/llvm/llvm-project/issues/106248.


  Commit: 926f0979af4f6172d4ed3dea5603aa97c800bef1
      https://github.com/llvm/llvm-project/commit/926f0979af4f6172d4ed3dea5603aa97c800bef1
  Author: Stephen Tozer <stephen.tozer at sony.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
    M llvm/test/CodeGen/Thumb2/pr52817.ll
    M llvm/test/CodeGen/X86/fsafdo_test1.ll
    M llvm/test/CodeGen/X86/fsafdo_test4.ll
    M llvm/test/DebugInfo/MIR/X86/empty-inline.mir
    M llvm/test/DebugInfo/X86/discriminator.ll
    R llvm/test/DebugInfo/X86/is_stmt-at-block-start.ll

  Log Message:
  -----------
  Revert "[DebugInfo][DWARF] Set is_stmt on first non-line-0 instruction in BB (#105524)"

Reverted (along with the NFC followup fix) due to buildbot failure:
https://lab.llvm.org/buildbot/#/builders/160/builds/4142

This reverts commit 3ef37e2f8f672393ee409fde8309198df0981735, and commit
616f7d3d4f6d9bea6f776e357c938847e522a681.


  Commit: 606a9342f1083eef1475c2a97eabb04db9338bdd
      https://github.com/llvm/llvm-project/commit/606a9342f1083eef1475c2a97eabb04db9338bdd
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    A llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll

  Log Message:
  -----------
  [LAA] Add test cases where evaluating AddRecs at symbolic max BTC wraps.

The underlying issue was discovered by an assert added in
a80053322b765eec939 by a test case provided by @mstorsjo.


  Commit: 50515db57f1a8b3d7fd61c1df946a29971f65428
      https://github.com/llvm/llvm-project/commit/50515db57f1a8b3d7fd61c1df946a29971f65428
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

  Log Message:
  -----------
  [SLP][NFC]Format canVectorizeLoads after previous NFC patches.


  Commit: 9167667b5c3cd1b166452c984f0c6448688c22a0
      https://github.com/llvm/llvm-project/commit/9167667b5c3cd1b166452c984f0c6448688c22a0
  Author: Elvina Yakubova <eyakubova at nvidia.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/SLPVectorizer/alternate-cmp-swapped-pred-parent.ll
    M llvm/test/Transforms/SLPVectorizer/alternate-opcode-sindle-bv.ll
    M llvm/test/Transforms/SLPVectorizer/arith-div-undef.ll
    M llvm/test/Transforms/SLPVectorizer/bool-logical-op-reduction-with-poison.ll
    M llvm/test/Transforms/SLPVectorizer/buildvector-insert-mask-size.ll
    M llvm/test/Transforms/SLPVectorizer/buildvector-nodes-dependency.ll
    M llvm/test/Transforms/SLPVectorizer/call-arg-reduced-by-minbitwidth.ll
    M llvm/test/Transforms/SLPVectorizer/catchswitch.ll
    M llvm/test/Transforms/SLPVectorizer/crash_exceed_scheduling.ll
    M llvm/test/Transforms/SLPVectorizer/diamond_broadcast.ll

  Log Message:
  -----------
  [SLP] Fix REQUIRES line for failing tests (#106531)


  Commit: cb608cc5f62baa01fe106a14ef41971337c2c030
      https://github.com/llvm/llvm-project/commit/cb608cc5f62baa01fe106a14ef41971337c2c030
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/lib/AST/ByteCode/Interp.cpp
    A clang/test/AST/ByteCode/cxx11-pedantic.cpp

  Log Message:
  -----------
  [clang][bytecode] Properly diagnose non-const reads (#106514)

If the global variable is constant (but not constexpr), we need to
diagnose, but keep evaluating.


  Commit: 25c9410fed7da0bc83bb0390f6e8d83470536fa0
      https://github.com/llvm/llvm-project/commit/25c9410fed7da0bc83bb0390f6e8d83470536fa0
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/InstCombine/X86/x86-vpermil-inseltpoison.ll
    M llvm/test/Transforms/InstCombine/X86/x86-vpermil.ll

  Log Message:
  -----------
  [InstCombine][X86] Add vpermilpd/vpermilps test coverage for #106413


  Commit: d57c04647e6f0a6f0cd79e280c257f570e8f30f4
      https://github.com/llvm/llvm-project/commit/d57c04647e6f0a6f0cd79e280c257f570e8f30f4
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
    M llvm/test/Transforms/InstCombine/X86/x86-vpermil-inseltpoison.ll
    M llvm/test/Transforms/InstCombine/X86/x86-vpermil.ll

  Log Message:
  -----------
  [InstCombine][X86] Only demand used bits for VPERMILPD/VPERMILPS mask values

VPERMILPS lower bits0-3 (to index per-lane i32/f32 0-3)
VPERMILPD uses bit1  (to index per-lane i64/f64 0-1)

Use SimplifyDemandedBits to ignore anything touching the remaining bits.

Part of #106413


  Commit: 2a28df66dc3f7ff5b6233241837854acefb68d77
      https://github.com/llvm/llvm-project/commit/2a28df66dc3f7ff5b6233241837854acefb68d77
  Author: Hans <hans at hanshq.net>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/utils/release/build_llvm_release.bat

  Log Message:
  -----------
  Restrict LLVM_TARGETS_TO_BUILD in Windows release packaging (#106059)

When including all targets, some files become too large for the NSIS
installer to handle.

Fixes #101994


  Commit: b2a820faea960e99123f309d6a7bccb3cd1bcc12
      https://github.com/llvm/llvm-project/commit/b2a820faea960e99123f309d6a7bccb3cd1bcc12
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
    M lldb/test/API/tools/lldb-dap/launch/main.c

  Log Message:
  -----------
  [lldb][lldb-dap][test] Enable Launch tests

Add Windows include equivalents for includes and shell command.


  Commit: 0a484820e1d34b051831624cbe237bba578ac2d8
      https://github.com/llvm/llvm-project/commit/0a484820e1d34b051831624cbe237bba578ac2d8
  Author: cor3ntin <corentinjabot at gmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/docs/CodeOfConduct.rst

  Log Message:
  -----------
  Restore missing link in CodeOfConduct.rst (#106385)

Link restored from the original policy outlined here
https://discourse.llvm.org/t/code-of-conduct-changes-related-to-llvm-project-policy-changes/64197


  Commit: 73ef397fcba35b7b4239c00bf3e0b4e689ca0add
      https://github.com/llvm/llvm-project/commit/73ef397fcba35b7b4239c00bf3e0b4e689ca0add
  Author: Guillaume Chatelet <gchatelet at google.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M libc/src/string/memory_utils/x86_64/inline_memcpy.h

  Log Message:
  -----------
  [libc][x86] Use prefetch for write for memcpy (#90450)

Currently when `LIBC_COPT_MEMCPY_X86_USE_SOFTWARE_PREFETCHING` is set we
prefetch memory for read on the source buffer. This patch adds prefetch
for write on the destination buffer.


  Commit: acff429191a27a164a0941346ce0c73e953d4638
      https://github.com/llvm/llvm-project/commit/acff429191a27a164a0941346ce0c73e953d4638
  Author: kadir çetinkaya <kadircet at google.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
    M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp

  Log Message:
  -----------
  [include-cleaner] Mark RecordDecls referenced in UsingDecls as explicit (#106430)

We were reporting ambigious references from using declarations as user
can be depending on different overloads of a function just because they
are visible in the TU.
This doesn't apply to records, or primary templates as declaration being
referenced in such cases is unambigious, the ambiguity applies to
specializations though.

Hence this patch returns an explicit reference to record decls and
primary templates of those.


  Commit: 7955760bc82c792b84a4d97913f5b8e0f4902108
      https://github.com/llvm/llvm-project/commit/7955760bc82c792b84a4d97913f5b8e0f4902108
  Author: Koakuma <koachan at protonmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/Sparc/SparcInstrAliases.td
    M llvm/test/MC/Sparc/sparc-misc-instructions.s

  Log Message:
  -----------
  [SPARC][IAS] Add `illtrap` alias for `unimp` (#105928)

This follows Solaris behavior of allowing both mnemonics all the time.

Fixes https://github.com/llvm/llvm-project/issues/105639.


  Commit: ba52a09abe3f3a2323dd7df3fe1739630e054077
      https://github.com/llvm/llvm-project/commit/ba52a09abe3f3a2323dd7df3fe1739630e054077
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/SCCP/pointer-nonnull.ll

  Log Message:
  -----------
  [IPSCCP] Add test for returning nonnull pointer (NFC)


  Commit: 43661a1214353ea1773a711f403f8d1118e9ca0f
      https://github.com/llvm/llvm-project/commit/43661a1214353ea1773a711f403f8d1118e9ca0f
  Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/IR/BasicBlock.cpp
    M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp

  Log Message:
  -----------
  [RemoveDIs] Fix spliceDebugInfo splice-to-end edge case (#105671)

Fix #105571 which demonstrates an end() iterator dereference when
performing a non-empty splice to end() from a region that ends at
Src::end().

Rather than calling Instruction::adoptDbgRecords from Dest, create a marker
(which takes an iterator) and absorbDebugValues onto that. The "absorb" variant
doesn't clean up the source marker, which in this case we know is a trailing
marker, so we have to do that manually.


  Commit: 1f8f2ed66ab742a1fbb4a84411e656cb8324e107
      https://github.com/llvm/llvm-project/commit/1f8f2ed66ab742a1fbb4a84411e656cb8324e107
  Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
    M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll

  Log Message:
  -----------
  [NFC][AMDGPU] Autogenerate tests for uniform i32 promo in ISel (#106382)

Many tests were easy to update, but these are quite big and I think it's
better to autogenerate them to see the difference well.


  Commit: df11ee213e43ae373d1357939cf14ea37d547110
      https://github.com/llvm/llvm-project/commit/df11ee213e43ae373d1357939cf14ea37d547110
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/lib/AST/ByteCode/Interp.cpp
    M clang/lib/AST/ByteCode/Interp.h
    M clang/lib/AST/ByteCode/InterpBlock.cpp
    M clang/lib/AST/ByteCode/Pointer.h
    M clang/test/AST/ByteCode/new-delete.cpp
    M clang/test/AST/ByteCode/unions.cpp

  Log Message:
  -----------
  [clang][bytecode] Diagnose member calls on deleted blocks (#106529)

This requires a bit of restructuring of ctor calls when checking for a
potential constant expression.


  Commit: c57abc66e223393cda27760e3f2409f4a1aa895e
      https://github.com/llvm/llvm-project/commit/c57abc66e223393cda27760e3f2409f4a1aa895e
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll

  Log Message:
  -----------
  [LoopVectorize][X86] amdlibm-calls.ll - cleanup test checks for 2/4/8/16 vector widths

This cleans up the existing tests and shows the gaps in the test checks (for instance we're often testing VF4 + VF16 but not VF8 even though amdlibm supports it).


  Commit: 2f95298727bc9b682ad2d058119862ee8b0d8ec2
      https://github.com/llvm/llvm-project/commit/2f95298727bc9b682ad2d058119862ee8b0d8ec2
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll

  Log Message:
  -----------
  [LoopVectorize][X86] amdlibm-calls.ll - add additional 2/4/8/16 vector widths test checks

This should cover most amdlibm functions, but still not added every VF combo (e.g. 2f32/16f64 often vectorises to the llvm intrinsic for that vector type)


  Commit: f7d6dfa005ac3d136e38658f25b8c54daa1ef08c
      https://github.com/llvm/llvm-project/commit/f7d6dfa005ac3d136e38658f25b8c54daa1ef08c
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M lldb/test/API/tools/lldb-dap/console/TestDAP_redirection_to_console.py
    M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py

  Log Message:
  -----------
  [lldb][lldb-dap] Enable more tests on Windows

These few worked without changes.


  Commit: 56152fa377302fd8124e8be2a02dcb927a041f0a
      https://github.com/llvm/llvm-project/commit/56152fa377302fd8124e8be2a02dcb927a041f0a
  Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Analysis/CMakeLists.txt

  Log Message:
  -----------
  [Analysis] Guard logf128 cst folding (#106543)

LLVM has a CMake variable to control whether to consider logf128
constant folding which libAnalysis ignores. This patch changes the
logf128 check to rely on the global LLVM_HAS_LOGF128 setting made in
config-ix.cmake.


  Commit: 5fef40c2c477e92187bd4e5c18091eca6b8465cc
      https://github.com/llvm/llvm-project/commit/5fef40c2c477e92187bd4e5c18091eca6b8465cc
  Author: Stephen Tozer <stephen.tozer at sony.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
    M llvm/test/CodeGen/Thumb2/pr52817.ll
    M llvm/test/CodeGen/X86/fsafdo_test1.ll
    M llvm/test/CodeGen/X86/fsafdo_test4.ll
    M llvm/test/DebugInfo/MIR/X86/empty-inline.mir
    M llvm/test/DebugInfo/X86/discriminator.ll
    A llvm/test/DebugInfo/X86/is_stmt-at-block-start.ll

  Log Message:
  -----------
  Reapply "[DebugInfo][DWARF] Set is_stmt on first non-line-0 instruction in BB (#105524)"

Fixes the previous buildbot error by adding an explicit triple to the test,
ensuring that llc can produce a valid object file.

This reverts commit 926f0979af4f6172d4ed3dea5603aa97c800bef1.


  Commit: 8ae877a089d9c2ca5315d3b2e0144c4d9f82cf5c
      https://github.com/llvm/llvm-project/commit/8ae877a089d9c2ca5315d3b2e0144c4d9f82cf5c
  Author: Tom Eccles <tom.eccles at arm.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M flang/include/flang/Tools/TargetSetup.h
    M flang/module/ieee_arithmetic.f90
    M flang/test/CMakeLists.txt
    M flang/test/Evaluate/fold-out_of_range.f90
    M flang/test/Evaluate/folding07.f90
    M flang/test/Lower/Intrinsics/ieee_class_queries.f90
    M flang/test/Lower/Intrinsics/ieee_unordered.f90
    M flang/test/Lower/common-block.f90
    M flang/test/Semantics/kinds03.f90
    M flang/test/Semantics/modfile26.f90
    M flang/test/Semantics/realkinds-aarch64-01.f90
    M flang/test/lit.cfg.py
    M flang/test/lit.site.cfg.py.in
    M flang/tools/f18/CMakeLists.txt

  Log Message:
  -----------
  Revert "[flang] Warn when F128 is unsupported" (#106561)

Reverts llvm/llvm-project#102147

It seems some systems which should support F128 are wrongly detected as
not supporting.

This might be due to checking `LDBL_MANT_DIG` instead of
`__LDBL_MANT_DIG__`. I will investigate.


  Commit: 9edd998e10fabfff067b9e6e5b044f85a24d0dd5
      https://github.com/llvm/llvm-project/commit/9edd998e10fabfff067b9e6e5b044f85a24d0dd5
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    A llvm/test/Transforms/LoopUnroll/X86/runtime-unroll-addrec-cost.ll

  Log Message:
  -----------
  [LoopUnroll] Add test for #53205 (NFC)


  Commit: fc110202dffa06950716e0cc4535b07aaa2c439c
      https://github.com/llvm/llvm-project/commit/fc110202dffa06950716e0cc4535b07aaa2c439c
  Author: Rahul Joshi <rjoshi at nvidia.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
    M llvm/benchmarks/CMakeLists.txt
    A llvm/benchmarks/FormatVariadicBM.cpp
    M llvm/include/llvm/Support/FormatVariadic.h
    M llvm/lib/Support/FormatVariadic.cpp
    M llvm/unittests/Support/FormatVariadicTest.cpp
    M mlir/tools/mlir-tblgen/OpFormatGen.cpp

  Log Message:
  -----------
  [Support] Validate number of arguments passed to formatv() (#105745)

Change formatv() to validate that the number of arguments passed matches
number of replacement fields in the format string, and that the replacement
indices do not contain holes.

To support cases where this cannot be guaranteed, introduce a formatv()
overload that allows disabling validation with a bool flag as its first argument.


  Commit: 025f03f01e8584140b7ac27422cea0c0ef7ef6c1
      https://github.com/llvm/llvm-project/commit/025f03f01e8584140b7ac27422cea0c0ef7ef6c1
  Author: Nikolas Klauser <nikolasklauser at berlin.de>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M libcxx/include/string

  Log Message:
  -----------
  [libc++][NFC] Remove unused struct in <string> (#106527)


  Commit: a705e8cb5b071b3bf6d1d55629f18f6b7b9699ac
      https://github.com/llvm/llvm-project/commit/a705e8cb5b071b3bf6d1d55629f18f6b7b9699ac
  Author: Nikolas Klauser <nikolasklauser at berlin.de>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M libcxx/include/cmath
    M libcxx/include/complex
    M libcxx/test/libcxx/numerics/c.math/constexpr-fns.pass.cpp

  Log Message:
  -----------
  [libc++][NFC] Remove __constexpr_is{nan,finite} (#106205)

They're never used in `constexpr` functions, so we can simply use
`std::isnan` and `std::isfinite` instead.


  Commit: 032c3283ab419377a1230a32d98693b528f63134
      https://github.com/llvm/llvm-project/commit/032c3283ab419377a1230a32d98693b528f63134
  Author: Rahul Joshi <rjoshi at nvidia.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/test/TableGen/intrinsic-attrs.td
    M llvm/utils/TableGen/IntrinsicEmitter.cpp

  Log Message:
  -----------
  [NFC][TableGen] Refactor IntrinsicEmitter code (#106479)

- Use formatv() and raw string literals to simplify emission code.
- Use range based for loops and structured bindings to simplify loops.
- Use const Pointers to Records.
- Rename `ComputeFixedEncoding` to `ComputeTypeSignature` to reflect
  what the function actually does, cnd change it to return a vector.
- Use reverse() and range based for loop to pack 8 nibbles into 32-bits.
- Rename some variables to follow LLVM coding standards.
- For function memory effects, print human readable effects in comment.


  Commit: 4ee2ad259812159c4f51bf2d8edcf0376302b2c3
      https://github.com/llvm/llvm-project/commit/4ee2ad259812159c4f51bf2d8edcf0376302b2c3
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    R llvm/test/CodeGen/AArch64/atomicrmw-fadd-fp-vector.ll
    A llvm/test/CodeGen/AArch64/atomicrmw-fadd.ll
    A llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll
    A llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll
    A llvm/test/CodeGen/AArch64/atomicrmw-fsub.ll

  Log Message:
  -----------
  AArch64: Add tests for atomicrmw fp operations (#103701)

There were only codegen tests for the fadd vector case,
so round out the test coverage for the scalar cases
and all the other operations.


  Commit: 5048fabb0579f1417f69cde49221b5b9e9c15414
      https://github.com/llvm/llvm-project/commit/5048fabb0579f1417f69cde49221b5b9e9c15414
  Author: Rahul Joshi <rjoshi at nvidia.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/unittests/Support/FormatVariadicTest.cpp

  Log Message:
  -----------
  [Support] Delete FormatVariadicTest Validate sub-test (#106570)

- The subtest, if enabled correctly, will fail with assert in Debug
  builds and validation is disabled in Release builds.
- Hence deleting the test to fix test failures in CI.


  Commit: 26c3a8404f1b3327a0982faeeaee94b08d1ee481
      https://github.com/llvm/llvm-project/commit/26c3a8404f1b3327a0982faeeaee94b08d1ee481
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/atomicrmw-fadd.ll
    M llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll
    M llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll
    M llvm/test/CodeGen/AArch64/atomicrmw-fsub.ll

  Log Message:
  -----------
  AArch64: Use consistent atomicrmw expansion for FP operations (#103702)

Use LLSC or cmpxchg in the same cases as for the unsupported
integer operations. This required some fixups to the LLSC
implementatation to deal with the fp128 case.

The comment about floating-point exceptions was wrong,
because floating-point exceptions are not really exceptions at all.


  Commit: b5a1b45fe321cdf57d1b6155ecbbc18b6f95502f
      https://github.com/llvm/llvm-project/commit/b5a1b45fe321cdf57d1b6155ecbbc18b6f95502f
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

  Log Message:
  -----------
  [SLP] Early return in getReorderingData [nfc]


  Commit: a9ffb719bc323588b6b60fbf227db8104a81310e
      https://github.com/llvm/llvm-project/commit/a9ffb719bc323588b6b60fbf227db8104a81310e
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/bfloat-arith.ll
    M llvm/test/CodeGen/RISCV/half-arith-strict.ll
    M llvm/test/CodeGen/RISCV/half-arith.ll
    M llvm/test/CodeGen/RISCV/half-bitmanip-dagcombines.ll
    M llvm/test/CodeGen/RISCV/half-intrinsics.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll

  Log Message:
  -----------
  [RISCV] Don't promote f16 FNEG/FABS with Zfhmin/Zhinxmin. (#106474)

fneg/fabs are not supposed to canonicalize nans. Promoting to f32 will
go through an fp_extend which will canonicalize. The generic Promote
handler needs to be removed from LegalizeDAG.

We need to use integer bit manip to clear the bit instead.

Unfortunately, this is going through the stack due to i16 not being a
legal type. Fixing that will require custom legalization or some other
generic SelectionDAG change.


  Commit: e05c22484efb5c767115525adfa4273e48b1ae26
      https://github.com/llvm/llvm-project/commit/e05c22484efb5c767115525adfa4273e48b1ae26
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll
    M llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll

  Log Message:
  -----------
  AArch64: Delete tests of fp128 atomicrmw fmin/fmax

These are getting different output on some build hosts for some reason.
The stack offsets of temporaries are different.


  Commit: c08c6a71cfc536e22fb7ad733fb8181a9e84e62a
      https://github.com/llvm/llvm-project/commit/c08c6a71cfc536e22fb7ad733fb8181a9e84e62a
  Author: Hongtao Yu <hoy at meta.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M mlir/lib/Dialect/SCF/Utils/Utils.cpp
    M mlir/test/Dialect/SCF/loop-unroll.mlir

  Log Message:
  -----------
  [mlir][scf] Allow unrolling loops with integer-typed IV. (#106164)

SCF loops now can operate on integer-typed IV, thus I'm changing the
loop unroller correspondingly.


  Commit: 115b87636b9f84cf145c0c96859f8e9f5e76c7a1
      https://github.com/llvm/llvm-project/commit/115b87636b9f84cf145c0c96859f8e9f5e76c7a1
  Author: Rahul Joshi <rjoshi at nvidia.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Support/ModRef.cpp
    M llvm/unittests/Support/CMakeLists.txt
    A llvm/unittests/Support/ModRefTest.cpp

  Log Message:
  -----------
  [NFC][Support] Eliminate ',' at end of MemoryEffects print (#106545)

- Eliminate comma at end of a MemoryEffects print.
- Added basic unit test to validate that.


  Commit: 81acc84997d6d5d5c7f8e3b3e6d8d01d567d0e1c
      https://github.com/llvm/llvm-project/commit/81acc84997d6d5d5c7f8e3b3e6d8d01d567d0e1c
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll

  Log Message:
  -----------
  [LoopVectorize][X86] amdlibm-calls.ll - add 2/4/8/16 vector widths test checks for fallback to llvm intrinsics

Check for cases where there isn't a amdlib call but it still vectorises the math call


  Commit: a777a93118a0ca71e19ac764a57a94f1be227dbb
      https://github.com/llvm/llvm-project/commit/a777a93118a0ca71e19ac764a57a94f1be227dbb
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/utils/TableGen/IntrinsicEmitter.cpp

  Log Message:
  -----------
  Fix MSVC "not all control paths return a value" warning. NFC.


  Commit: bd6531b9508624df83f84d9bc687a7339df452e9
      https://github.com/llvm/llvm-project/commit/bd6531b9508624df83f84d9bc687a7339df452e9
  Author: Kazu Hirata <kazu at google.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/include/llvm/Transforms/IPO/FunctionImport.h
    M llvm/unittests/Transforms/IPO/CMakeLists.txt
    A llvm/unittests/Transforms/IPO/ImportIDTableTests.cpp

  Log Message:
  -----------
  [LTO] Introduce a new class ImportIDTable (#106503)

The new class implements a deduplication table to convert import list
elements:

  {SourceModule, GUID, Definition/Declaration}

into 32-bit integers, and vice versa.  This patch adds a unit test but
does not add a use yet.

To be precise, the deduplication table holds {SourceModule, GUID}
pairs.  We use the bottom one bit of the 32-bit integers to indicate
whether we have a definition or declaration.

A subsequent patch will collapse the import list hierarchy --
FunctionsToImportTy holding many instances of FunctionsToImportTy --
down to DenseSet<uint32_t> with each element indexing into the
deduplication table above.  This will address multiple sources of
space inefficiency.


  Commit: 59f05b683def5ef728baf8c4ae8f846e957ad67f
      https://github.com/llvm/llvm-project/commit/59f05b683def5ef728baf8c4ae8f846e957ad67f
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/RISCV/fixed-vector-gather.ll
    M llvm/test/Analysis/CostModel/RISCV/fixed-vector-scatter.ll
    M llvm/test/Analysis/CostModel/RISCV/rvv-extractelement.ll
    M llvm/test/Analysis/CostModel/RISCV/rvv-insertelement.ll

  Log Message:
  -----------
  [RISCV][TTI] Model cost for insert/extract into illegal types (#106440)

We'd previously just deferred to the base implementation, but that more
or less always returns 1. This underestimates the cost of the
insert/extract, biases the SLP vectorizer towards forming illegally
typed vectors, and underestimates the cost of scalarized operations
(like unaligned scatter/gather).


  Commit: e5e38ddf1b8043324175868831da21e941c00aff
      https://github.com/llvm/llvm-project/commit/e5e38ddf1b8043324175868831da21e941c00aff
  Author: Ahmed Bougacha <ahmed at bougacha.org>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/test/CodeGen/aarch64-targetattr.c
    M llvm/lib/Target/AArch64/AArch64Processors.td
    M llvm/unittests/TargetParser/TargetParserTest.cpp

  Log Message:
  -----------
  [AArch64] Make apple-m4 armv8.7-a again (from armv9.2-a).  (#106312)

This is a partial revert of c66e1d6f3429.  Even though that
allowed us to declare v9.2-a support without picking up SVE2
in both the backend and the driver, the frontend itself still
enabled SVE via the arch version's default extensions.

Avoid that by reverting back to v8.7-a while we look into
longer-term solutions.


  Commit: 3d08ade7bd32f0296e0ca3a13640cc95fa89229a
      https://github.com/llvm/llvm-project/commit/3d08ade7bd32f0296e0ca3a13640cc95fa89229a
  Author: Stephen Tozer <stephen.tozer at sony.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/docs/LangRef.rst
    M llvm/include/llvm/Analysis/PtrUseVisitor.h
    M llvm/include/llvm/CodeGen/ISDOpcodes.h
    M llvm/include/llvm/CodeGen/MachineInstr.h
    M llvm/include/llvm/CodeGen/Passes.h
    M llvm/include/llvm/CodeGen/SelectionDAGISel.h
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/include/llvm/InitializePasses.h
    M llvm/include/llvm/Passes/MachinePassRegistry.def
    M llvm/include/llvm/Support/TargetOpcodes.def
    M llvm/include/llvm/Target/Target.td
    M llvm/lib/CodeGen/Analysis.cpp
    M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
    M llvm/lib/CodeGen/CMakeLists.txt
    M llvm/lib/CodeGen/CodeGen.cpp
    M llvm/lib/CodeGen/CodeGenPrepare.cpp
    M llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/GlobalISel/Utils.cpp
    M llvm/lib/CodeGen/MachineCSE.cpp
    M llvm/lib/CodeGen/MachineScheduler.cpp
    M llvm/lib/CodeGen/MachineSink.cpp
    A llvm/lib/CodeGen/RemoveLoadsIntoFakeUses.cpp
    M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    M llvm/lib/CodeGen/TargetPassConfig.cpp
    M llvm/lib/IR/Instruction.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
    M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
    M llvm/lib/Target/X86/X86FloatingPoint.cpp
    M llvm/lib/Transforms/Scalar/SROA.cpp
    M llvm/lib/Transforms/Utils/CloneFunction.cpp
    M llvm/lib/Transforms/Utils/Local.cpp
    M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
    M llvm/test/Analysis/ScalarEvolution/flags-from-poison-dbg.ll
    M llvm/test/CodeGen/AArch64/O0-pipeline.ll
    M llvm/test/CodeGen/AArch64/O3-pipeline.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
    M llvm/test/CodeGen/ARM/O3-pipeline.ll
    M llvm/test/CodeGen/LoongArch/O0-pipeline.ll
    M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
    A llvm/test/CodeGen/MIR/X86/fake-use-tailcall.mir
    M llvm/test/CodeGen/PowerPC/O0-pipeline.ll
    M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
    M llvm/test/CodeGen/RISCV/O0-pipeline.ll
    M llvm/test/CodeGen/RISCV/O3-pipeline.ll
    M llvm/test/CodeGen/X86/O0-pipeline.ll
    A llvm/test/CodeGen/X86/fake-use-hpfloat.ll
    A llvm/test/CodeGen/X86/fake-use-ld.ll
    A llvm/test/CodeGen/X86/fake-use-scheduler.mir
    A llvm/test/CodeGen/X86/fake-use-simple-tail-call.ll
    A llvm/test/CodeGen/X86/fake-use-suppress-load.ll
    A llvm/test/CodeGen/X86/fake-use-tailcall.ll
    A llvm/test/CodeGen/X86/fake-use-vector.ll
    A llvm/test/CodeGen/X86/fake-use-vector2.ll
    A llvm/test/CodeGen/X86/fake-use-zero-length.ll
    M llvm/test/CodeGen/X86/opt-pipeline.ll
    A llvm/test/DebugInfo/AArch64/fake-use-global-isel.ll
    A llvm/test/DebugInfo/Inputs/check-fake-use.py
    A llvm/test/DebugInfo/X86/fake-use.ll
    M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
    A llvm/test/Transforms/CodeGenPrepare/X86/fake-use-phi.ll
    A llvm/test/Transforms/CodeGenPrepare/X86/fake-use-split-ret.ll
    A llvm/test/Transforms/GVN/fake-use-constprop.ll
    A llvm/test/Transforms/SROA/fake-use-escape.ll
    A llvm/test/Transforms/SROA/fake-use-sroa.ll
    M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn

  Log Message:
  -----------
  [ExtendLifetimes] Implement llvm.fake.use to extend variable lifetimes (#86149)

This patch is part of a set of patches that add an `-fextend-lifetimes`
flag to clang, which extends the lifetimes of local variables and
parameters for improved debuggability. In addition to that flag, the
patch series adds a pragma to selectively disable `-fextend-lifetimes`,
and an `-fextend-this-ptr` flag which functions as `-fextend-lifetimes`
for this pointers only. All changes and tests in these patches were
written by Wolfgang Pieb (@wolfy1961), while Stephen Tozer (@SLTozer)
has handled review and merging. The extend lifetimes flag is intended to
eventually be set on by `-Og`, as discussed in the RFC
here:

https://discourse.llvm.org/t/rfc-redefine-og-o1-and-add-a-new-level-of-og/72850

This patch implements a new intrinsic instruction in LLVM,
`llvm.fake.use` in IR and `FAKE_USE` in MIR, that takes a single operand
and has no effect other than "using" its operand, to ensure that its
operand remains live until after the fake use. This patch does not emit
fake uses anywhere; the next patch in this sequence causes them to be
emitted from the clang frontend, such that for each variable (or this) a
fake.use operand is inserted at the end of that variable's scope, using
that variable's value. This patch covers everything post-frontend, which
is largely just the basic plumbing for a new intrinsic/instruction,
along with a few steps to preserve the fake uses through optimizations
(such as moving them ahead of a tail call or translating them through
SROA).

Co-authored-by: Stephen Tozer <stephen.tozer at sony.com>


  Commit: 74b4ec17e24a256b4aae5e53b855ba429af685bf
      https://github.com/llvm/llvm-project/commit/74b4ec17e24a256b4aae5e53b855ba429af685bf
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/include/llvm/IR/VPIntrinsics.def
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/IR/IntrinsicInst.cpp

  Log Message:
  -----------
  [VP] Remove VP_PROPERTY_REDUCTION and VP_PROPERTY_CMP [nfc] (#105551)

These lists are quite static and several of the parameters are actually
constant across all users. Heavy use of macros is undesirable, and not
idiomatic in LLVM, so let's just use the naive switch cases.

I'll probably continue with removing the other property macros. These
two just happened to be the two I actually had to figure out for an
unrelated change.


  Commit: eed135fea72b544426349e6461a0ca142c27967e
      https://github.com/llvm/llvm-project/commit/eed135fea72b544426349e6461a0ca142c27967e
  Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Analysis/CMakeLists.txt

  Log Message:
  -----------
  Revert "[Analysis] Guard logf128 cst folding"

This reverts commit 42d3cccffd203ff6dc967d4243588ca466c0faf7 which
caused a test failure.


  Commit: 178392454e076624674b4a7ddf3fc8bda2e94f0e
      https://github.com/llvm/llvm-project/commit/178392454e076624674b4a7ddf3fc8bda2e94f0e
  Author: Harini0924 <harinidonthula at google.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/utils/lit/lit/TestRunner.py
    A llvm/utils/lit/tests/Inputs/shtest-env-negative/env-calls-cd.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-negative/env-calls-colon.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-negative/env-calls-echo.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-negative/env-calls-export.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-negative/env-calls-mkdir.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-negative/env-calls-not-builtin.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-negative/env-calls-rm.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-negative/lit.cfg
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-args-last-is-assign.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-args-last-is-u-arg.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-args-last-is-u.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-args-nested-none.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-calls-env.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-no-subcommand.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-u.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/env.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/lit.cfg
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/mixed.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-args-last-is-assign.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-args-last-is-u-arg.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-args-last-is-u.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-args-nested-none.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-args-none.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-calls-cd.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-calls-colon.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-calls-echo.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-calls-env.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-calls-export.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-calls-mkdir.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-calls-not-builtin.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-calls-rm.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-u.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/lit.cfg
    R llvm/utils/lit/tests/Inputs/shtest-env/mixed.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/print_environment.py
    A llvm/utils/lit/tests/shtest-env-negative.py
    A llvm/utils/lit/tests/shtest-env-positive.py
    R llvm/utils/lit/tests/shtest-env.py

  Log Message:
  -----------
  [llvm-lit] Print environment variables when using env without subcommand (#98414)

This patch addresses an issue with lit's internal shell when env is
without any arguments, it fails with exit code 127 because `env`
requires a subcommand. This patch addresses the issue by encoding the
command to properly return environment variables even when no arguments
are provided.

The error occurred when running the command 
` LIT_USE_INTERNAL_SHELL=1 ninja check-llvm`.

fixes: #102383
This is part of the test cleanups proposed in the RFC: [[RFC] Enabling
the Lit Internal Shell by
Default](https://discourse.llvm.org/t/rfc-enabling-the-lit-internal-shell-by-default/80179)


  Commit: 2dc3b509879518340b991733bfde5c7a4becd559
      https://github.com/llvm/llvm-project/commit/2dc3b509879518340b991733bfde5c7a4becd559
  Author: Greg Roth <grroth at microsoft.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/lib/CodeGen/CodeGenFunction.cpp
    A clang/test/CodeGenHLSL/implicit-norecurse-attrib.hlsl
    M clang/test/CodeGenHLSL/this-assignment-overload.hlsl
    M clang/test/CodeGenHLSL/this-assignment.hlsl

  Log Message:
  -----------
  [HLSL] Apply NoRecurse attrib to all HLSL functions (#105907)

Previously, functions named "main" got the NoRecurse attribute
consistent with the behavior of C++, which HLSL largely follows.
However, standard recursion is not allowed in HLSL, so all functions
should really have this attribute. This doesn't prevent recursion, but
rather signals that these functions aren't expected to recurse.

Practically, this was done so that entry point functions named "main"
would have all have the same attributes as otherwise identical entry
points with other names.

This required small changes to the this assignment tests because they no
longer generate so many attribute sets since more of them match.

related to #105244
but done to simplify testing for #89806


  Commit: ecd65e64e885b0fd2786ca99ea0c42d692275d91
      https://github.com/llvm/llvm-project/commit/ecd65e64e885b0fd2786ca99ea0c42d692275d91
  Author: Justin Bogner <mail at justinbogner.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/test/tools/dxil-dis/BasicIR.ll
    M llvm/test/tools/dxil-dis/debug-info.ll
    M llvm/test/tools/dxil-dis/opaque-gep.ll
    M llvm/test/tools/dxil-dis/opaque-pointers.ll

  Log Message:
  -----------
  [DXIL][test] Fix a few tests now that HLSL functions are internalized (#106437)

These tests have been failing since db279c72f2fe "[HLSL] Change default
linkage of HLSL functions to internal (#95331)". This presumably went
unnoticed because they're not run by default since they rely on an
external tool (dxil-dis).


  Commit: 2ad782f49ff20d199f31cabc9baa46dba6047d8b
      https://github.com/llvm/llvm-project/commit/2ad782f49ff20d199f31cabc9baa46dba6047d8b
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/include/llvm/IR/VPIntrinsics.def
    M llvm/lib/IR/IntrinsicInst.cpp
    M llvm/unittests/IR/VPIntrinsicTest.cpp

  Log Message:
  -----------
  [VP] Kill VP_PROPERTY_(MEMOP,CASTOP) and simplify _CONSTRAINEDFP [nfc] (#105574)

These lists are quite static. Heavy use of macros is undesirable, and
not idiomatic in LLVM, so let's just use the naive switch cases.

Note that the first two fields in the CONSTRAINEDFP property were
utterly unused (aside from a C++ test).

In the same vien as https://github.com/llvm/llvm-project/pull/105551.

Once both changes have landed, we'll be left with _BINARYOP which needs
a bit of additional untangling, and the actual opcode mappings.


  Commit: 0a00d32c5f88fce89006dcde6e235bc77d7b495e
      https://github.com/llvm/llvm-project/commit/0a00d32c5f88fce89006dcde6e235bc77d7b495e
  Author: Jordan R AW <ajordanr at google.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M lldb/include/lldb/Utility/ArchSpec.h
    M lldb/source/Utility/ArchSpec.cpp

  Log Message:
  -----------
  [lldb] Add armv7a and armv8a ArchSpecs (#106433)

armv7a and armv8a are common names for the application subarch for arm.

These names in particular are used in ChromeOS, Android, and a few other
known applications. In ChromeOS, we encountered a bug where armv7a arch
was not recognised and segfaulted when starting an executable on an
arm32 device.

Google Issue Tracker:
https://issuetracker.google.com/361414339


  Commit: ed37b5f6c341a2c72d1f5f0c016f0f8a41a9bf83
      https://github.com/llvm/llvm-project/commit/ed37b5f6c341a2c72d1f5f0c016f0f8a41a9bf83
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
    M llvm/benchmarks/CMakeLists.txt
    R llvm/benchmarks/FormatVariadicBM.cpp
    M llvm/include/llvm/Support/FormatVariadic.h
    M llvm/lib/Support/FormatVariadic.cpp
    M llvm/unittests/Support/FormatVariadicTest.cpp
    M mlir/tools/mlir-tblgen/OpFormatGen.cpp

  Log Message:
  -----------
  Revert "[Support] Validate number of arguments passed to formatv()" (#106589)

Reverts llvm/llvm-project#105745

Some bots are broken apparently.


  Commit: 67ffd1438379ee43f678f3e7752f4ec5f777cee4
      https://github.com/llvm/llvm-project/commit/67ffd1438379ee43f678f3e7752f4ec5f777cee4
  Author: Matheus Izvekov <mizvekov at gmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M libcxx/test/libcxx/type_traits/is_specialization.verify.cpp

  Log Message:
  -----------
  libcxx: [NFC] relax error expectation for clang diagnostics (#106591)

This is a split-off from #96023, where this change has already been
reviewed by libcxx maintainers.

This will prevent that PR from triggering libcxx-ci from now on.


  Commit: 9ce4af5cadc24060f3c3674e01902d374afea983
      https://github.com/llvm/llvm-project/commit/9ce4af5cadc24060f3c3674e01902d374afea983
  Author: Rahul Joshi <rjoshi at nvidia.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
    M llvm/benchmarks/CMakeLists.txt
    A llvm/benchmarks/FormatVariadicBM.cpp
    M llvm/include/llvm/Support/FormatVariadic.h
    M llvm/lib/Support/FormatVariadic.cpp
    M llvm/unittests/Support/FormatVariadicTest.cpp
    M mlir/tools/mlir-tblgen/OpFormatGen.cpp

  Log Message:
  -----------
  Revert "Revert "[Support] Validate number of arguments passed to formatv()"" (#106592)

Reverts llvm/llvm-project#106589
The fix for bot failures caused by the reverted commit was committed
already, so this revert is not needed.


  Commit: 9a58b12fe7bf54c9433ec89bae2a2d6cfe489e75
      https://github.com/llvm/llvm-project/commit/9a58b12fe7bf54c9433ec89bae2a2d6cfe489e75
  Author: Stephen Tozer <stephen.tozer at sony.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/test/CodeGen/MIR/X86/fake-use-tailcall.mir
    M llvm/test/CodeGen/X86/fake-use-scheduler.mir
    M llvm/test/CodeGen/X86/fake-use-tailcall.ll
    M llvm/test/CodeGen/X86/fake-use-vector2.ll
    M llvm/test/CodeGen/X86/fake-use-zero-length.ll

  Log Message:
  -----------
  [ExtendLifetimes][NFC] Add explicit triple to new fake-use tests

Several tests for the new fake use intrinsic are failing on NVPTX
buildbots due to relying on behaviour for their expected triple;
this commit adds that triple to each of them to prevent failures.

Fixes commit 3d08ade (#86149).

Example buildbot failures:
https://lab.llvm.org/buildbot/#/builders/160/builds/4175
https://lab.llvm.org/buildbot/#/builders/180/builds/4173


  Commit: 4bc7c74240b6f13bf421c1fef0155370b23d9fc8
      https://github.com/llvm/llvm-project/commit/4bc7c74240b6f13bf421c1fef0155370b23d9fc8
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

  Log Message:
  -----------
  [SLP] Extract isIdentityOrder to common routine [probably NFC] (#106582)

This isn't quite just code motion as the four different versions we had
of this routine differed in whether they ignored the "size" marker used
to represent undef. I doubt this matters in practice, but it is a
functional change.

---------

Co-authored-by: Alexey Bataev <a.bataev at gmx.com>


  Commit: fd0dbc7f4d8a5900535aa87569fbc385b7c50ba6
      https://github.com/llvm/llvm-project/commit/fd0dbc7f4d8a5900535aa87569fbc385b7c50ba6
  Author: Xiang Li <python3kgae at outlook.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/include/llvm/BinaryFormat/DXContainer.h
    M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
    M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
    M llvm/lib/BinaryFormat/DXContainer.cpp
    M llvm/lib/ObjectYAML/DXContainerYAML.cpp
    M llvm/test/ObjectYAML/DXContainer/DomainMaskVectors.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv0-amplification.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv0-compute.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv0-domain.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv0-geometry.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv0-hull.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv0-mesh.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv0-pixel.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv0-vertex.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv1-amplification.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv1-compute.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv1-domain.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv1-geometry.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv1-hull.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv1-mesh.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv1-pixel.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv1-vertex.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-amplification.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-compute.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-domain.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-geometry.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-hull.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-mesh.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-pixel.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-vertex.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-amplification.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-compute.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-domain.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-geometry.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-hull.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-mesh.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-pixel.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-vertex.yaml
    M llvm/test/ObjectYAML/DXContainer/SigElements.yaml
    M llvm/unittests/Object/DXContainerTest.cpp

  Log Message:
  -----------
  [DirectX] add enum for PSV resource type/kind/flag. (#106227)

Add ResourceType, ResourceKind and ResourceFlag enum class for PSV
resource.

This is for #103275


  Commit: 1ace91f925ad87c3e5eb836ad58fdffe60c4aea6
      https://github.com/llvm/llvm-project/commit/1ace91f925ad87c3e5eb836ad58fdffe60c4aea6
  Author: Job Henandez Lara <hj93 at protonmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M libc/test/src/math/performance_testing/BinaryOpSingleOutputPerf.h
    M libc/test/src/math/performance_testing/CMakeLists.txt
    M libc/test/src/math/performance_testing/fmod_perf.cpp
    M libc/test/src/math/performance_testing/fmodf16_perf.cpp
    M libc/test/src/math/performance_testing/fmodf_perf.cpp
    A libc/test/src/math/performance_testing/fmul_perf.cpp
    A libc/test/src/math/performance_testing/fmull_perf.cpp
    M libc/test/src/math/performance_testing/hypot_perf.cpp
    M libc/test/src/math/performance_testing/hypotf_perf.cpp
    M libc/test/src/math/performance_testing/max_min_funcs_perf.cpp
    M libc/test/src/math/performance_testing/misc_basic_ops_perf.cpp

  Log Message:
  -----------
  [libc][math] Add performance tests for fmul and fmull. (#106262)


  Commit: 0a41c8e7a050c837c609cbcbc8342024701cd14b
      https://github.com/llvm/llvm-project/commit/0a41c8e7a050c837c609cbcbc8342024701cd14b
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M flang/lib/Lower/Bridge.cpp
    M flang/test/Lower/CUDA/cuda-data-transfer.cuf

  Log Message:
  -----------
  [flang][cuda] Avoid generating cuf.data_transfer in OpenACC region (#106435)

`cuf.data_transfer` will be converted to runtime calls to cuda runtime
api and these are not supported in device code. assignment in OpenACC
region will be handled by the OpenACC code gen so we avoid to generate
data transfer on them.


  Commit: 6421dcc0a978900091cc7aa8fa443746602cb442
      https://github.com/llvm/llvm-project/commit/6421dcc0a978900091cc7aa8fa443746602cb442
  Author: Haopeng Liu <153236845+haopliu at users.noreply.github.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp

  Log Message:
  -----------
  [NFC] [DSE] Refactor DSE (#100956)

Refactor DSE with MemoryDefWrapper and MemoryLocationWrapper.

Normally, one MemoryDef accesses one MemoryLocation. With "initializes"
attribute, one MemoryDef (like call instruction) could initialize
multiple MemoryLocations.

Refactor DSE as a preparation to apply "initializes" attribute in DSE in
a follow-up PR
(https://github.com/llvm/llvm-project/commit/58dd8a440343055b1a4929d72317218e912c16fd).


  Commit: 22ba3511087c85e3b1d4cad686f8d9c3aa6f8088
      https://github.com/llvm/llvm-project/commit/22ba3511087c85e3b1d4cad686f8d9c3aa6f8088
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll

  Log Message:
  -----------
  [RISCV][SLP] Test for <3 x Ty> reductions which require reordering

These tests show a vectorizable reduction where the order of the
reduction has been adjusted so that profitable vectorization requires
a reordering of the computation.   We currently have no reordering
in SLP for non-power-of-two vectors, so this doesn't work.

Note that due to reassociation performed in the standard pipeline,
this is actually the canonical form for a reduction reaching SLP.


  Commit: 26b0bef192be1a3adc250af460c2e728a1ca5a64
      https://github.com/llvm/llvm-project/commit/26b0bef192be1a3adc250af460c2e728a1ca5a64
  Author: Changpeng Fang <changpeng.fang at amd.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
    M llvm/include/llvm/Target/TargetSelectionDAG.td
    M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.err.ll
    M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll

  Log Message:
  -----------
  AMDGPU: Use pattern to select instruction for intrinsic llvm.fptrunc.round (#105761)

Use GCNPat instead of Custom Lowering to select instructions for
intrinsic llvm.fptrunc.round. "SupportedRoundMode : TImmLeaf" is used as
a predicate to select only when the rounding mode is supported.
"as_hw_round_mode : SDNodeXForm" is developed to translate the round
modes to the corresponding ones that hardware recognizes.


  Commit: c1248c9d64e9210554571283980156b1d85cfe09
      https://github.com/llvm/llvm-project/commit/c1248c9d64e9210554571283980156b1d85cfe09
  Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Sema/SemaExpr.cpp
    M clang/test/SemaCXX/vector.cpp

  Log Message:
  -----------
  [Clang] prevent assertion failure when converting vectors to int/float with invalid expressions (#105727)

Fixes #105486


  Commit: e9eaf19eb605c14bed7a0f76d206c13a8eaf842f
      https://github.com/llvm/llvm-project/commit/e9eaf19eb605c14bed7a0f76d206c13a8eaf842f
  Author: Dávid Ferenc Szabó <30732159+dfszabo at users.noreply.github.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    A llvm/test/CodeGen/X86/inline-asm-int-to-fp.ll

  Log Message:
  -----------
  [CodeGen] Allow mixed scalar type constraints for inline asm (#65465)

GCC supports code like "asm volatile ("" : "=r" (i) : "0" (f))" where i
is integer type and f is floating point type. Currently this code
produces an error with Clang. The change allows mixed scalar types
between input and output constraints.

Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>


  Commit: ff04c5b2e69481fc3b828bfcf32e05ff7a2c4b05
      https://github.com/llvm/llvm-project/commit/ff04c5b2e69481fc3b828bfcf32e05ff7a2c4b05
  Author: Dan Liew <dan at su-root.co.uk>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/include/clang/Sema/Sema.h
    M clang/lib/Sema/SemaARM.cpp
    M clang/lib/Sema/SemaCast.cpp
    M clang/lib/Sema/SemaChecking.cpp
    M clang/lib/Sema/SemaDeclCXX.cpp
    M clang/lib/Sema/SemaExpr.cpp
    M clang/lib/Sema/SemaExprCXX.cpp
    M clang/lib/Sema/SemaInit.cpp
    M clang/lib/Sema/SemaOpenMP.cpp
    M clang/lib/Sema/SemaOverload.cpp
    M clang/lib/Sema/SemaPseudoObject.cpp
    M clang/lib/Sema/SemaStmt.cpp

  Log Message:
  -----------
  [NFC][Sema] Move `Sema::AssignmentAction` into its own scoped enum (#106453)

The primary motivation behind this is to allow the enum type to be
referred to earlier in the Sema.h file which is needed for #106321.

It was requested in #106321 that a scoped enum be used (rather than
moving the enum declaration earlier in the Sema class declaration).
Unfortunately doing this creates a lot of churn as all use sites of the
enum constants had to be changed. Appologies to all downstream forks in
advanced.

Note the AA_ prefix has been dropped from the enum value names as they
are now redundant.


  Commit: a0441ced7a770036e00610989e2fabba5caeb31b
      https://github.com/llvm/llvm-project/commit/a0441ced7a770036e00610989e2fabba5caeb31b
  Author: Matheus Izvekov <mizvekov at gmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/test/SemaTemplate/temp_arg_nontype.cpp

  Log Message:
  -----------
  [NFC] whitespace cleanup on clang/test/SemaTemplate/temp_arg_nontype.cpp


  Commit: a87105121dd300752c19024ebaf93319c2781a8b
      https://github.com/llvm/llvm-project/commit/a87105121dd300752c19024ebaf93319c2781a8b
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M libc/config/gpu/entrypoints.txt
    M libc/config/linux/x86_64/entrypoints.txt
    M libc/include/llvm-libc-macros/stdlib-macros.h
    M libc/include/stdlib.h.def
    M libc/newhdrgen/yaml/stdlib.yaml
    M libc/spec/stdc.td
    M libc/src/stdlib/CMakeLists.txt
    A libc/src/stdlib/strtod_l.cpp
    A libc/src/stdlib/strtod_l.h
    A libc/src/stdlib/strtof_l.cpp
    A libc/src/stdlib/strtof_l.h
    A libc/src/stdlib/strtol_l.cpp
    A libc/src/stdlib/strtol_l.h
    A libc/src/stdlib/strtold_l.cpp
    A libc/src/stdlib/strtold_l.h
    A libc/src/stdlib/strtoll_l.cpp
    A libc/src/stdlib/strtoll_l.h
    A libc/src/stdlib/strtoul_l.cpp
    A libc/src/stdlib/strtoul_l.h
    A libc/src/stdlib/strtoull_l.cpp
    A libc/src/stdlib/strtoull_l.h

  Log Message:
  -----------
  [libc] Implement locale variants for 'stdlib.h' functions (#105718)

Summary:
This provides the `_l` variants for the `stdlib.h` functions. These are
just copies of the same entrypoint and don't do anything with the locale
information.


  Commit: 5c019bdb7a008cf6465972d4affd8b2802465722
      https://github.com/llvm/llvm-project/commit/5c019bdb7a008cf6465972d4affd8b2802465722
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M libc/config/gpu/entrypoints.txt
    M libc/config/linux/x86_64/entrypoints.txt
    M libc/include/string.h.def
    M libc/newhdrgen/yaml/string.yaml
    M libc/spec/stdc.td
    M libc/src/string/CMakeLists.txt
    A libc/src/string/strcoll_l.cpp
    A libc/src/string/strcoll_l.h
    A libc/src/string/strxfrm_l.cpp
    A libc/src/string/strxfrm_l.h

  Log Message:
  -----------
  [libc] Add support for 'string.h' locale variants (#105719)

Summary:
This adds the locale variants of the string functions. As previously,
these do not use the locale information at all and simply copy the
non-locale version which expects the "C" locale.


  Commit: ba5e8fcecea20da0a796b85e20d6292eb1447b6c
      https://github.com/llvm/llvm-project/commit/ba5e8fcecea20da0a796b85e20d6292eb1447b6c
  Author: Kelvin Li <kkwli at users.noreply.github.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M flang/unittests/Runtime/CommandTest.cpp

  Log Message:
  -----------
  [flang] Adjust execute_command_line intrinsic return values for AIX (NFC) (#106472)


  Commit: 74938ab84dbfdedc6af7a276ebd67201b5eb78e5
      https://github.com/llvm/llvm-project/commit/74938ab84dbfdedc6af7a276ebd67201b5eb78e5
  Author: Brox Chen <guochen2 at amd.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp8.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp8.txt

  Log Message:
  -----------
  [AMDGPU][True16][MC] add true16/fake16 flag to gfx12 dasm tests (#106469)

add true16/fake16 flag to gfx12 dasm tests including vop1, vop1_dpp,
vop3_from_vop1 and vop3_from_vop1_dpp. This is a test only change.


  Commit: 59762a0ecf64cbf6ac20c41ae75666cd87519f26
      https://github.com/llvm/llvm-project/commit/59762a0ecf64cbf6ac20c41ae75666cd87519f26
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll

  Log Message:
  -----------
  [RISCV] Add coverage for <3 x float> reduction with neutral start

We can do slightly better on the neutral value when we have nsz.


  Commit: d5c292d8ef590f64d26c16d12afebb6ad7f50373
      https://github.com/llvm/llvm-project/commit/d5c292d8ef590f64d26c16d12afebb6ad7f50373
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/MachineVerifier.cpp
    M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/shufflevector.ll
    M llvm/test/MachineVerifier/test_g_splat_vector.mir

  Log Message:
  -----------
  [GISel][RISCV] Correctly handle scalable vector shuffles of pointer vectors in IRTranslator. (#106580)


  Commit: aeedab77b596f858b0c53923657fc8c190d48ea8
      https://github.com/llvm/llvm-project/commit/aeedab77b596f858b0c53923657fc8c190d48ea8
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/X86/odd_store.ll

  Log Message:
  -----------
  [SLP]Correctly decide if the non-power-of-2 number of stores can be vectorized.

Need to consider the maximum type size in the graph before doing attempt
for the vectorization of non-power-of-2 number of elements, which may be
  less than MinVF.


  Commit: f08f9cd9713332c939889ab34f5355b77f12f82b
      https://github.com/llvm/llvm-project/commit/f08f9cd9713332c939889ab34f5355b77f12f82b
  Author: Florian Mayer <fmayer at google.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
    M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/basic.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
    A llvm/test/Instrumentation/HWAddressSanitizer/attrinfer.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/fixed-shadow.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/hwasan-pass-second-run.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/mem-attr.ll

  Log Message:
  -----------
  [HWASan] remove incorrectly inferred attributes (#106565)

assume all functions used in a HWASan module potentially touch shadow
memory (and short granules).


  Commit: 0141a3cde4d8f2c8ff9e957f981f37e65a69a325
      https://github.com/llvm/llvm-project/commit/0141a3cde4d8f2c8ff9e957f981f37e65a69a325
  Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/lib/StaticAnalyzer/Checkers/StackAddrEscapeChecker.cpp
    M clang/test/Analysis/stack-addr-ps.c

  Log Message:
  -----------
  [analyzer] Fix nullptr dereference for symbols from pointer invalidation (#106568)

As reported in
https://github.com/llvm/llvm-project/pull/105648#issuecomment-2317144635
commit 08ad8dc7154bf3ab79f750e6d5fb7df597c7601a
introduced a nullptr dereference in the case when store contains a
binding to a symbol that has no origin region associated with it, such
as the symbol generated when a pointer is passed to an opaque function.


  Commit: 66927fb95abef9327b453d7213c5df7d641269be
      https://github.com/llvm/llvm-project/commit/66927fb95abef9327b453d7213c5df7d641269be
  Author: Florian Mayer <fmayer at google.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
    M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/basic.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
    R llvm/test/Instrumentation/HWAddressSanitizer/attrinfer.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/fixed-shadow.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/hwasan-pass-second-run.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/mem-attr.ll

  Log Message:
  -----------
  Revert "[HWASan] remove incorrectly inferred attributes" (#106622)

Reverts llvm/llvm-project#106565

Broke clang tests


  Commit: c4906588ce47de33d59bcd95f3e82ce2c3e61c23
      https://github.com/llvm/llvm-project/commit/c4906588ce47de33d59bcd95f3e82ce2c3e61c23
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    A llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll

  Log Message:
  -----------
  [VPlan] Use skipCostComputation when pre-computing induction costs.

This ensures we skip any instructions identified to be ignored by the
legacy cost model as well. Fixes a divergence between legacy and
VPlan-based cost model.

Fixes https://github.com/llvm/llvm-project/issues/106417.


  Commit: 1f0d545ec38ceaafa7ca94aa659be125bdcd721f
      https://github.com/llvm/llvm-project/commit/1f0d545ec38ceaafa7ca94aa659be125bdcd721f
  Author: Louis Dionne <ldionne.2 at gmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M libcxx/include/__type_traits/make_unsigned.h
    M libcxx/include/istream

  Log Message:
  -----------
  [libc++] Fix wraparound issue with -fsanitize=integer in string operator>> (#106263)

Fixes #106261
rdar://133991190


  Commit: 049b60c5bb7e774b74772c6b89c72593f73a89b0
      https://github.com/llvm/llvm-project/commit/049b60c5bb7e774b74772c6b89c72593f73a89b0
  Author: Tom Honermann <tom.honermann at intel.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/lib/Sema/SemaDecl.cpp

  Log Message:
  -----------
  [NFC][Clang] Avoid potential null pointer dereferences in Sema::AddInitializerToDecl(). (#106235)

Control flow analysis performed by a static analysis tool revealed the
potential for null pointer dereferences to occur in conjunction with the
`Init` parameter in `Sema::AddInitializerToDecl()`. On entry to the
function, `Init` is required to be non-null as there are multiple
potential branches that unconditionally dereference it. However, there
were two places where `Init` is compared to null thus implying that
`Init` is expected to be null in some cases. These checks appear to be
purely defensive checks and thus unnecessary. Further, there were
several cases where code checked `Result`, a variable of type
`ExprResult`, for an invalid value, but did not check for a valid but
null value and then proceeded to unconditionally dereference the
potential null result. This change elides the unnecessary defensive
checks and changes some checks for an invalid result to instead branch
on an unusable result (either an invalid result or a valid but null
result).


  Commit: 593526f3fb138069fc93b14d08320d0e3f67c707
      https://github.com/llvm/llvm-project/commit/593526f3fb138069fc93b14d08320d0e3f67c707
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
    M llvm/lib/Target/X86/MCTargetDesc/X86MCExpr.h

  Log Message:
  -----------
  [X86] Use MCRegister instead of int64_t in X86MCExpr. NFC (#106569)


  Commit: 4ca817d0511b2c36b2f5d242e0c8f90a7a9c4f14
      https://github.com/llvm/llvm-project/commit/4ca817d0511b2c36b2f5d242e0c8f90a7a9c4f14
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    A llvm/test/CodeGen/RISCV/GlobalISel/scalablevec-combiner-crash.ll

  Log Message:
  -----------
  [GlobalISel] Add bail outs for scalable vectors to some combines. (#106496)

These combines call getNumElements() which isn't valid for scalable
vectors.


  Commit: 182708680bbe34b579a09b2dbc3215b519b2473f
      https://github.com/llvm/llvm-project/commit/182708680bbe34b579a09b2dbc3215b519b2473f
  Author: Jorge Gorbe Moya <jgorbe at google.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/include/llvm/SandboxIR/SandboxIR.h
    M llvm/include/llvm/SandboxIR/SandboxIRValues.def
    M llvm/lib/SandboxIR/SandboxIR.cpp
    M llvm/unittests/SandboxIR/SandboxIRTest.cpp

  Log Message:
  -----------
  [SandboxIR] Add ExtractValueInst. (#106613)


  Commit: 412e3e394dbd1b7d8655639e161ed4dbd5505c96
      https://github.com/llvm/llvm-project/commit/412e3e394dbd1b7d8655639e161ed4dbd5505c96
  Author: Stephen Tozer <stephen.tozer at sony.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/test/CodeGen/X86/fake-use-hpfloat.ll
    M llvm/test/CodeGen/X86/fake-use-vector.ll
    M llvm/test/DebugInfo/X86/fake-use.ll

  Log Message:
  -----------
  [ExtendLifetimes][NFC] Add explicit triple to remaining fake-use tests

One of the tests for the new fake use intrinsic are failing on darwin
buildbots due to relying on behaviour for their expected triple; this
commit adds explicit triples to the few remaining fake-use tests that
didn't have them.

Fixes commit 3d08ade (#86149).

Buildbot failures:
https://lab.llvm.org/buildbot/#/builders/23/builds/2505


  Commit: 7284e0f3a4f8924a0f69f654db8c4b4d00d232cb
      https://github.com/llvm/llvm-project/commit/7284e0f3a4f8924a0f69f654db8c4b4d00d232cb
  Author: Matheus Izvekov <mizvekov at gmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/AST/ItaniumMangle.cpp
    A clang/test/CodeGenCXX/GH106182.cpp
    A clang/test/SemaCXX/GH106182.cpp

  Log Message:
  -----------
  [clang] mangle placeholder for deduced type as a template-prefix (#106335)

As agreed on https://github.com/itanium-cxx-abi/cxx-abi/issues/109 these
placeholders should be mangled as a `template-prefix` production.

```
    <template-prefix> ::= <template unqualified-name>           # global template
                      ::= <prefix> <template unqualified-name>  # nested template
                      ::= <template-param>                      # template template parameter
                      ::= <substitution>
```

Previous to this patch, the template template parameter case was not
handled, and template template parameters were incorrectly being handled
as unqualified-names.

Before #95202, DeducedTemplateType was not canonicalized correctly, so
that template template parameter declarations were retained
uncanonicalized.

After #95202, they are correctly canonicalized, but this now leads to
these TTPs being anonymous entities, where the mangling implementation
correctly doesn't expect an anonymous declaration of this kind, leading
to a crash.

Fixes #106182.


  Commit: 4caf0196c042601b1c442a5726a157fead00ecc7
      https://github.com/llvm/llvm-project/commit/4caf0196c042601b1c442a5726a157fead00ecc7
  Author: Connie Zhu <60797237+connieyzhu at users.noreply.github.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    A clang/test/Modules/compare-file-size.py
    M clang/test/Modules/reduced-bmi-size.cppm

  Log Message:
  -----------
  [clang][test] Rewrote test using command substitution to work with lit internal shell syntax (#105902)

This patch rewrites a test that uses command substitution `$()` and the
`stat` command, which are not supported by lit's internal shell. Instead
of using this syntax to perform the file size comparison done in this
test, a Python script is used instead to perform the same operation.

Fixes https://github.com/llvm/llvm-project/issues/102384.


  Commit: aa91d90cb07d72b32176a966fe798ab71ecb0a76
      https://github.com/llvm/llvm-project/commit/aa91d90cb07d72b32176a966fe798ab71ecb0a76
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
    M llvm/test/CodeGen/PowerPC/fma-negate.ll
    M llvm/test/CodeGen/PowerPC/fp-strict.ll
    M llvm/test/CodeGen/PowerPC/vec_abs.ll
    M llvm/test/CodeGen/PowerPC/vec_fneg.ll

  Log Message:
  -----------
  [LegalizeVectorOps][PowerPC] Use xor to expand fneg. (#106595)

This preserves the semantis of fneg and matches what we do in
LegalizeDAG.

I kept the legal FSUB check to force unrolling for some targets that
don't have FSUB but have XOR. On Aarch64, using xor broke some tests that
expected to see a (v1f64 (fma (insertvector_elt (f64 (fneg
(extractvectorelt X)))))) pattern.


  Commit: e51fc36c385d756ccbc2be8c47c52af207c3aead
      https://github.com/llvm/llvm-project/commit/e51fc36c385d756ccbc2be8c47c52af207c3aead
  Author: rjmansfield <rjmansfield at users.noreply.github.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M compiler-rt/test/lsan/TestCases/create_thread_leak.cpp

  Log Message:
  -----------
  [lsan][test] Allow testcase to execute on remote targets without not utility (#87350)


  Commit: cc943a67d114e28c28f561c3b1a48ff2003264ce
      https://github.com/llvm/llvm-project/commit/cc943a67d114e28c28f561c3b1a48ff2003264ce
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    A llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll

  Log Message:
  -----------
  [SLP]Fix PR106626: trye several attempts for lookup values, if not found.

If the value is used in Scalar several times, the first attempt to find
its position in the node (if ReuseShuffleIndices and ReorderIndices not
empty) may fail. In this case need to find another copy of the same
value and try again.
Fixes https://github.com/llvm/llvm-project/issues/106626


  Commit: a1441ca74708a557606bf68d42fca40bb03dbd74
      https://github.com/llvm/llvm-project/commit/a1441ca74708a557606bf68d42fca40bb03dbd74
  Author: Tarun Prabhu <tarun at lanl.gov>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/lib/CodeGen/BackendUtil.cpp
    M flang/lib/Frontend/FrontendActions.cpp
    A flang/test/Driver/print-pipeline-passes.f90

  Log Message:
  -----------
  [flang][Driver] Add support for -mllvm -print-pipeline-passes

The behavior deliberately mimics that of clang. Ideally, -print-pipeline-passes
should be a first-class driver option. Notes to this effect have been added in 
the appropriate places in both flang and clang.

---------

Co-authored-by: Tarun Prabhu <tarun.prabhu at gmail.com>


  Commit: dac1f7ba8eefb6931abb68a6aebb273de5a60f74
      https://github.com/llvm/llvm-project/commit/dac1f7ba8eefb6931abb68a6aebb273de5a60f74
  Author: Alex MacLean <amaclean at nvidia.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
    M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll

  Log Message:
  -----------
  [NVPTX] fixup incorrect rounding mode for int to float conversion (#106600)

`uitofp` and `sitofp` instructions use the default rounding mode which
is defined as round-to-nearest.


  Commit: ec68dc1ca4d967b599f1202855917d5ec9cae52f
      https://github.com/llvm/llvm-project/commit/ec68dc1ca4d967b599f1202855917d5ec9cae52f
  Author: Alexander Richardson <alexrichardson at google.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M compiler-rt/lib/interception/interception.h
    M compiler-rt/lib/interception/interception_type_test.cpp
    M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h

  Log Message:
  -----------
  [compiler-rt] Work around incompatible Windows definitions of (S)SIZE_T

The interceptor types are supposed to match size_t (and the non-Windows
ssize_t) exactly, but on 32-bit Windows `size_t` uses `unsigned int`
whereas `SIZE_T` is `unsigned long`. The current definition results in
`uptr` not matching `uintptr_t` since we otherwise get typedef
redefinition errors. Work around this by using a #define instead of
a typedef when defining SIZE_T.

It would probably be cleaner to stop using these uppercase types, but
that is a rather invasive change and this one is the minimal change to
allow uptr to match uintptr_t on Windows.

To ensure this compiles on Windows, we also remove the interceptor.h
defines of uptr (that do not always match __sanitizer::uptr) and rely
on __sanitizer::uptr instead. The interceptor types most likely predate
those other types so clean up the unnecessary definition while here.

This also reverts commit 18e06e3e2f3d47433e1ed323b8725c76035fc1ac and
commit bb27dd853a713866c025a94ead8f03a1e25d1b6e.

Reviewed By: mstorsjo, vitalybuka

Pull Request: https://github.com/llvm/llvm-project/pull/106311


  Commit: 9df92cbd1addb03c7169f05cf3b628f88c610224
      https://github.com/llvm/llvm-project/commit/9df92cbd1addb03c7169f05cf3b628f88c610224
  Author: Alexander Richardson <alexrichardson at google.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M compiler-rt/lib/interception/interception_win.cpp

  Log Message:
  -----------
  [compiler-rt] Remove duplicates of sanitizer_common functions

These functions in interception_win.cpp already exist in
sanitizer_common. Use those instead.

Reviewed By: mstorsjo

Pull Request: https://github.com/llvm/llvm-project/pull/106488


  Commit: dbbfc952f0d4703b89fa238e2aba98f1229fb972
      https://github.com/llvm/llvm-project/commit/dbbfc952f0d4703b89fa238e2aba98f1229fb972
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVInstrFormats.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
    M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
    M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll

  Log Message:
  -----------
  [RISCV] Separate ActiveElementsAffectResult into VL and Mask flags (#106517)

In #106110 we had to mark v[f]slide1down.vx as
ActiveElementsAffectResult since the elements in the body depend on VL.
However it doesn't depend on the mask, so this was overly conservative
and broke the vmerge peephole.

We can recover this by splitting up ActiveElementsAffectResult into VL
and Mask bits, so we can more accurately model v[f]slide1down.vx and
re-enable the peephole.


  Commit: 034f2b380bd2d84e8cfbcb647b50602711d170c7
      https://github.com/llvm/llvm-project/commit/034f2b380bd2d84e8cfbcb647b50602711d170c7
  Author: vporpo <vporpodas at google.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/include/llvm/SandboxIR/SandboxIR.h
    A llvm/include/llvm/SandboxIR/Type.h
    M llvm/lib/SandboxIR/CMakeLists.txt
    M llvm/lib/SandboxIR/SandboxIR.cpp
    A llvm/lib/SandboxIR/Type.cpp
    M llvm/unittests/SandboxIR/CMakeLists.txt
    M llvm/unittests/SandboxIR/SandboxIRTest.cpp
    M llvm/unittests/SandboxIR/TrackerTest.cpp
    A llvm/unittests/SandboxIR/TypesTest.cpp

  Log Message:
  -----------
  [SandboxIR] Implement SandboxIR Type (#106294)

This patch implements sandboxir::Type, a thin wrapper of llvm::Type.
This is designed very similarly to sandbox::Value. Context owns all
sandboxir::Type objects and maintains a map between llvm::Type and
sandboxir::Type.

There are a couple of reasons for migrating from llvm::Type to
sandboxir::Type:
- Creating an llvm::Type from within SandboxIR-only code doesn't work
well because it requires you to pass llvm::Context to functions like
llvm::Type::getInt32Ty(C), but you wouldn't normally have access to
llvm::Context C. In unit tests this is not such a big deal because you
have access to both, but it will become an issue in SandboxIR-only code.
- Not being able to get the sandboxir::Context from llvm::Type results
in awkward sandboir APIs with additional sandboxir::Context arguments.
- llvm::Type::getContext() can basically give you access to the whole
LLVM IR, which we should try to avoid.


  Commit: 46fe36a4295f05d5d3731762e31fc4e6e99863e9
      https://github.com/llvm/llvm-project/commit/46fe36a4295f05d5d3731762e31fc4e6e99863e9
  Author: Alex Richardson <alexrichardson at google.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M compiler-rt/lib/interception/interception_win.cpp

  Log Message:
  -----------
  Revert "[compiler-rt] Remove duplicates of sanitizer_common functions"

This works for MinGW, but the MSVC linker apparently doens't pull in
those symbols. Reverting for now since I won't be able to reproduce it today.

https://lab.llvm.org/buildbot/#/builders/107/builds/2337

This reverts commit 9df92cbd1addb03c7169f05cf3b628f88c610224.


  Commit: cdaebf6f0e2be65f55011ccb2f1bc3b9199b6285
      https://github.com/llvm/llvm-project/commit/cdaebf6f0e2be65f55011ccb2f1bc3b9199b6285
  Author: Justin Fargnoli <jfargnoli at nvidia.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
    A llvm/test/CodeGen/NVPTX/compute-ptx-value-vts.ll
    A llvm/test/CodeGen/NVPTX/vector-returns.ll

  Log Message:
  -----------
  [NVPTX] Fix crash caused by ComputePTXValueVTs (#104524)

When [lowering return
values](https://github.com/llvm/llvm-project/blob/99a10f1fe8a7e4b0fdb4c6dd5e7f24f87e0d3695/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp#L3422)
from LLVM IR to SelectionDAG, we check that [the number of values
`SelectionDAG` tells us to return is equal to the number of values that
`ComputePTXValueVTs()` tells us to
return](https://github.com/llvm/llvm-project/blob/99a10f1fe8a7e4b0fdb4c6dd5e7f24f87e0d3695/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp#L3441).
However, this check can fail on valid IR. For example:

```
define <6 x half> @foo() {
  ret <6 x half> zeroinitializer
}
```

`ComputePTXValueVTs()` tells us to return ***3*** `v2f16` values, while
`SelectionDAG` tells us to return ***6*** `f16` values. Thus, the
compiler will crash.

`ComputePTXValueVTs()` [supports all `half` element vectors with an even
number of
elements](https://github.com/llvm/llvm-project/blob/99a10f1fe8a7e4b0fdb4c6dd5e7f24f87e0d3695/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp#L213).
Whereas `SelectionDAG` [only supports power-of-2 sized
vectors](https://github.com/llvm/llvm-project/blob/4e078e3797098daa40d254447c499bcf61415308/llvm/lib/CodeGen/TargetLoweringBase.cpp#L1580).
This is the root of the discrepancy.

Assuming that the developers who added the code to
`ComputePTXValueVTs()` overlooked this, I've restricted
`ComputePTXValueVTs()` to compute the same number of return values as
`SelectionDAG`, instead of extending `SelectionDAG` to support
non-power-of-2 sized vectors.


  Commit: 1991aa6b48845f31ff4e69a960b04086ff68ce3e
      https://github.com/llvm/llvm-project/commit/1991aa6b48845f31ff4e69a960b04086ff68ce3e
  Author: Mircea Trofin <mtrofin at google.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/include/llvm/Analysis/FunctionPropertiesAnalysis.h
    M llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp
    M llvm/lib/Analysis/MLInlineAdvisor.cpp
    M llvm/unittests/Analysis/FunctionPropertiesAnalysisTest.cpp

  Log Message:
  -----------
  Reapply "[nfc][mlgo] Incrementally update DominatorTreeAnalysis in FunctionPropertiesAnalysis (#104867) (#106309)

Reverts c992690179eb5de6efe47d5c8f3a23f2302723f2.

The problem is that if there is a sequence "{delete A->B} {delete A->B}
{insert A->B}" the net result is "{delete A->B}", which is not what we
want.

Duplicate successors may happen in cases like switch statements (as
shown in the unit test).

The second problem was that in `invoke` cases, some edges we speculate may get deleted don't, but are also not reachable from the inlined call site's basic block. We just need to check which edges are actually not present anymore.

The fix is to sanitize the list of deletes, just like we do for inserts.


  Commit: 7579787e05966f21684dd4b4a15b9deac13d09e1
      https://github.com/llvm/llvm-project/commit/7579787e05966f21684dd4b4a15b9deac13d09e1
  Author: Owen Pan <owenpiano at gmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/lib/Format/UnwrappedLineParser.cpp
    M clang/unittests/Format/TokenAnnotatorTest.cpp

  Log Message:
  -----------
  [clang-format] Correctly identify token-pasted record names (#106484)

See
https://github.com/llvm/llvm-project/pull/89706#issuecomment-2315549955.


  Commit: e29c5f387f4a4aff039c01bde9eedeb6bd97951f
      https://github.com/llvm/llvm-project/commit/e29c5f387f4a4aff039c01bde9eedeb6bd97951f
  Author: Elvis Wang <110374989+ElvisWang123 at users.noreply.github.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
    M llvm/test/Analysis/CostModel/RISCV/scalable-gather.ll
    M llvm/test/Analysis/CostModel/RISCV/scalable-scatter.ll

  Log Message:
  -----------
  [RISCV][TTI] Add legality check of vector of address for gather/scatter. (#106481)

This patch add a legality check that checks if target machine support
vector of address in `isLegalMaskedGatherScatter()`.


  Commit: 12b0257f5aa2966ebbd3c7e2a6c8a73f00dab3d3
      https://github.com/llvm/llvm-project/commit/12b0257f5aa2966ebbd3c7e2a6c8a73f00dab3d3
  Author: Florian Mayer <fmayer at google.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/test/CodeGen/address-safety-attr-flavors.cpp
    M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
    M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/basic.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
    A llvm/test/Instrumentation/HWAddressSanitizer/attrinfer.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/fixed-shadow.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/hwasan-pass-second-run.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/mem-attr.ll

  Log Message:
  -----------
  Reapply "[HWASan] remove incorrectly inferred attributes" (#106622) (#106624)

This reverts commit 66927fb95abef9327b453d7213c5df7d641269be.

Fixed clang tests


  Commit: ca2351dd142bac574021f48f135a9f9383c41128
      https://github.com/llvm/llvm-project/commit/ca2351dd142bac574021f48f135a9f9383c41128
  Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M clang/lib/Serialization/ASTReaderDecl.cpp
    A clang/test/Modules/skip-func-def-odr-with-pch.cppm

  Log Message:
  -----------
  [C++20] [Modules] Skip checking ODR for merged context in GMF

Solve https://github.com/clangd/clangd/issues/2094

Due clangd will enable PCH automatically, the previous mechanism to skip
ODR check in GMF may be invalid. This patch fixes this for a case.


  Commit: ddaf2e2d2946b4938512794f26cab3a3fe53b227
      https://github.com/llvm/llvm-project/commit/ddaf2e2d2946b4938512794f26cab3a3fe53b227
  Author: Florian Mayer <fmayer at google.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
    M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
    M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
    M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
    M llvm/test/CodeGen/AArch64/O0-pipeline.ll
    M llvm/test/CodeGen/AArch64/O3-pipeline.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/stack-safety-analysis.ll

  Log Message:
  -----------
  [HWASan] add OptimizationRemark for alloca safety (#105872)


  Commit: e004566547bb13386ee30c78176dd7988c42860a
      https://github.com/llvm/llvm-project/commit/e004566547bb13386ee30c78176dd7988c42860a
  Author: Alex MacLean <amaclean at nvidia.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXAliasAnalysis.cpp
    M llvm/test/CodeGen/NVPTX/nvptx-aa.ll

  Log Message:
  -----------
  [NVPTX][AA] Traverse use-def chain to find non-generic addrspace (#106477)

Address space information may be encoded anywhere along the use-def
chain. Take advantage of this by traversing the chain until we find a
non-generic addrspace.


  Commit: e00e9a3f8294c9b96cb0328bf136fab72aeec749
      https://github.com/llvm/llvm-project/commit/e00e9a3f8294c9b96cb0328bf136fab72aeec749
  Author: Helena Kotas <hekotas at microsoft.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M clang/include/clang-c/Index.h
    M clang/include/clang/AST/ASTContext.h
    M clang/include/clang/AST/ASTNodeTraverser.h
    M clang/include/clang/AST/RecursiveASTVisitor.h
    M clang/include/clang/AST/Type.h
    M clang/include/clang/AST/TypeLoc.h
    M clang/include/clang/AST/TypeProperties.td
    M clang/include/clang/Basic/TypeNodes.td
    M clang/include/clang/Sema/SemaHLSL.h
    M clang/include/clang/Serialization/TypeBitCodes.def
    M clang/lib/AST/ASTContext.cpp
    M clang/lib/AST/ASTImporter.cpp
    M clang/lib/AST/ASTStructuralEquivalence.cpp
    M clang/lib/AST/ItaniumMangle.cpp
    M clang/lib/AST/TypeLoc.cpp
    M clang/lib/AST/TypePrinter.cpp
    M clang/lib/CodeGen/CGDebugInfo.cpp
    M clang/lib/CodeGen/CodeGenFunction.cpp
    M clang/lib/Sema/SemaExpr.cpp
    M clang/lib/Sema/SemaHLSL.cpp
    M clang/lib/Sema/SemaType.cpp
    M clang/lib/Sema/TreeTransform.h
    M clang/lib/Serialization/ASTReader.cpp
    M clang/lib/Serialization/ASTWriter.cpp
    M clang/tools/libclang/CIndex.cpp
    M clang/tools/libclang/CXType.cpp

  Log Message:
  -----------
  [HLSL] Add HLSLAttributedResourceType (#106181)

Introducing `HLSLAttributedResourceType` - a new type that is similar to
`AttributedType` but with additional data specific to HLSL resources.
`AttributeType` currently only stores an attribute kind and no
additional data from the type attribute parameters. This does not really
work for HLSL resources since its type attributes contain non-boolean
values that need to be retained as well.

For example:

```
template <typename T> class RWBuffer {
  __hlsl_resource_t  [[hlsl::resource_class(uav)]] [[hlsl::is_rov]] handle;
};
```

The data `HLSLAttributedResourceType` needs to eventually store are:
- resource class (SRV, UAV, CBuffer, Sampler)
- texture dimension(1-3)
- flags is_rov, is_array, is_feedback and is_multisample
- contained type

All of these values except contained type will be stored in
`HLSLAttributedResourceType::Attributes` struct and accessed
individually via the fields. There is also `Data` alias that covers all
of these values as a `unsigned` which is used for hashing and the AST
type serialization.

During type attribute processing all HLSL type attributes will be
validated and collected by SemaHLSL (by
`SemaHLSL::handleResourceTypeAttr`) and in the end combined into a
single `HLSLAttributedResourceType` instance (in
`SemaHLSL::ProcessResourceTypeAttributes`). `SemaHLSL` will also need to
short-term store the `TypeLoc` information for the new type that will be
grabbed by `TypeSpecLocFiller` soon after the type is created.

Part 1/2 of #104861


  Commit: d4c519e7b2ac21350ec08b23eda44bf4a2d3c974
      https://github.com/llvm/llvm-project/commit/d4c519e7b2ac21350ec08b23eda44bf4a2d3c974
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    A flang/include/flang/Lower/Cuda.h
    M flang/lib/Lower/Allocatable.cpp
    M flang/lib/Lower/Bridge.cpp
    M flang/test/Lower/CUDA/cuda-allocatable.cuf

  Log Message:
  -----------
  [flang][cuda] Do inline allocation/deallocation in device code (#106628)

ALLOCATE and DEALLOCATE statements can be inlined in device function.
This patch updates the condition that determined to inline these actions
in lowering.

This avoid runtime calls in device function code and can speed up the
execution.

Also move `isCudaDeviceContext` from `Bridge.cpp` so it can be used
elsewhere.


  Commit: 24e791b4164986a1ca7776e3ae0292ef20d20c47
      https://github.com/llvm/llvm-project/commit/24e791b4164986a1ca7776e3ae0292ef20d20c47
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-29 (Thu, 29 Aug 2024)

  Changed paths:
    M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

  Log Message:
  -----------
  [ARM] Use MCRegister instead of unsigned for RegisterReqs in ARMAsmParser.


  Commit: b65fc7e91a20904a08e28a51fbf98137e94ae262
      https://github.com/llvm/llvm-project/commit/b65fc7e91a20904a08e28a51fbf98137e94ae262
  Author: jeanPerier <jperier at nvidia.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M flang/include/flang/Optimizer/Dialect/FIROps.td
    M flang/lib/Optimizer/Dialect/FIROps.cpp
    M flang/test/Fir/convert.fir

  Log Message:
  -----------
  [flang][fir] allow fir.convert from and to !llvm.ptr type (#106590)

Allow some interaction between LLVM and FIR dialect by allowing
conversion between FIR memory types and llvm.ptr type.
This is meant to help experimentation where FIR and LLVM dialect
coexists, and is useful to deal with cases where LLVM type makes it
early into the MLIR produced by flang, like when inserting LLVM stack
intrinsic here:
https://github.com/llvm/llvm-project/blob/0a00d32c5f88fce89006dcde6e235bc77d7b495e/flang/lib/Optimizer/Transforms/StackReclaim.cpp#L57


  Commit: a527248a3c2d638b0c92a06992f3f1c1f80842ad
      https://github.com/llvm/llvm-project/commit/a527248a3c2d638b0c92a06992f3f1c1f80842ad
  Author: jeanPerier <jperier at nvidia.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M flang/lib/Lower/OpenACC.cpp
    M flang/lib/Semantics/canonicalize-acc.cpp
    M flang/lib/Semantics/canonicalize-directives.cpp
    A flang/test/Lower/OpenACC/acc-loop-and-cpu-dir.f90
    M flang/test/Semantics/loop-directives.f90

  Log Message:
  -----------
  [flang][acc] allow and ignore DIR between ACC and loops (#106522)

The current pattern was failing OpenACC semantics in acc parse tree
canonicalization:

```
!acc loop
!dir vector aligned
do i=1,n
...
```

Fix it by moving the directive before the OpenACC construct node.

Note that I think it could make sense to propagate the $dir info to the
acc.loop, at least with classic flang, the $dir seems to make a
difference. This is not done here since few directives are supported
anyway.


  Commit: 448d8fa880be5cae0f63c3b248f07f647013a5a4
      https://github.com/llvm/llvm-project/commit/448d8fa880be5cae0f63c3b248f07f647013a5a4
  Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M clang-tools-extra/clangd/ModulesBuilder.cpp

  Log Message:
  -----------
  [NFC] [clangd] [Modules] Extract ModuleFile class and IsModuleFileUpToDate function

This patch extracts ModuleFile class from StandalonePrerequisiteModules
so that we can reuse it further. And also we implement
IsModuleFileUpToDate function to implement
StandalonePrerequisiteModules::CanReuse. Both of them aims to ease the
future improvements to the support of modules in clangd. And both of
them should be NFC.


  Commit: cd634f57c10dedbe4f908889dece2c4460b702c9
      https://github.com/llvm/llvm-project/commit/cd634f57c10dedbe4f908889dece2c4460b702c9
  Author: Daniel Kiss <daniel.kiss at arm.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M compiler-rt/lib/builtins/aarch64/sme-abi-init.c

  Log Message:
  -----------
  [compiler-rt][AArch64][Android] Use getauxval on Android. (#102979)

__getauxval is a libgcc function that doesn't exist on Android.
Also on Linux let's use getauxval as it is anyway used other places in compiler-rt.


  Commit: d68059bcfd1cc27e378c43b1f16019c5baccb06d
      https://github.com/llvm/llvm-project/commit/d68059bcfd1cc27e378c43b1f16019c5baccb06d
  Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M clang-tools-extra/clangd/ModulesBuilder.cpp

  Log Message:
  -----------
  [NFC] [clangd] [Modules] Change the argument type of IsModuleFileUpToDate to reference

It is better to use references instead of pointers as the argument type
of IsModuleFileUpToDate. Since the PrerequisiteModules is always
expected to exist.


  Commit: 8ca6401fdd36c17a8d68a8fb06b7d43c2540a027
      https://github.com/llvm/llvm-project/commit/8ca6401fdd36c17a8d68a8fb06b7d43c2540a027
  Author: jeanPerier <jperier at nvidia.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M flang/lib/Semantics/check-acc-structure.cpp
    M flang/lib/Semantics/check-directive-structure.h
    A flang/test/Lower/OpenACC/acc-shortloop-ignore.f90
    M flang/test/Semantics/OpenACC/acc-routine-validity.f90
    M llvm/include/llvm/Frontend/OpenACC/ACC.td

  Log Message:
  -----------
  [flang][openacc] parse and ignore non-standard shortloop clause (#106564)

shortloop is a non standard OpenACC extension
(https://docs.nvidia.com/hpc-sdk/pgi-compilers/2015/pgirn157.pdf) that
can be found on loop directives.

f18 parser was choking when seeing it. Since it can be found in existing
apps and is mainly an optimization hint, parse it on loop directives and
ignore it with a warning.

For the records, here is shortloop meaning according to the manual linked above:

"If the shortloop clause appears on a loop directive with the vector clause, it tells the compiler that the
loop trip count is less than or equal to the number of vector lanes created for that loop. This means the
value of the vector() clause on the loop directive in a kernels region, or the value of the
vector_length() clause on the parallel directive in a parallel region will be greater than or
equal to the loop trip count. This allows the compiler to generate more efficient code for the loop"


  Commit: 89e6a288674c9fae33aeb5448c7b1fe782b2bf53
      https://github.com/llvm/llvm-project/commit/89e6a288674c9fae33aeb5448c7b1fe782b2bf53
  Author: Daniil Fukalov <dfukalov at gmail.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/include/llvm/ADT/ConcurrentHashtable.h
    M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/ExecutorSharedMemoryMapperService.h
    M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
    M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
    M llvm/lib/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp
    M llvm/lib/ExecutionEngine/Orc/TargetProcess/ExecutorSharedMemoryMapperService.cpp
    M llvm/lib/ExecutionEngine/Orc/TaskDispatch.cpp
    M llvm/lib/Support/BalancedPartitioning.cpp
    M llvm/lib/Support/ErrorHandling.cpp
    M llvm/lib/Support/LockFileManager.cpp
    M llvm/lib/Support/RWMutex.cpp
    M llvm/lib/Support/Unix/Process.inc
    M llvm/tools/lli/ChildTarget/ChildTarget.cpp
    M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
    M llvm/tools/llvm-exegesis/lib/Error.cpp
    M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
    M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
    M llvm/tools/llvm-mt/llvm-mt.cpp
    M llvm/tools/llvm-reduce/deltas/Delta.cpp
    M llvm/unittests/Analysis/MLModelRunnerTest.cpp
    M llvm/unittests/ExecutionEngine/Orc/SharedMemoryMapperTest.cpp
    M llvm/unittests/ExecutionEngine/Orc/TaskDispatchTest.cpp
    M llvm/unittests/Support/CrashRecoveryTest.cpp
    M llvm/unittests/Support/ManagedStatic.cpp
    M llvm/unittests/Support/MemoryBufferTest.cpp
    M llvm/unittests/Support/ParallelTest.cpp
    M llvm/unittests/Support/Path.cpp
    M llvm/unittests/Support/ThreadPool.cpp
    M llvm/unittests/Support/Threading.cpp
    M llvm/unittests/Support/WithColorTest.cpp
    M llvm/unittests/Support/raw_ostream_test.cpp

  Log Message:
  -----------
  [NFC] Add explicit #include llvm-config.h where its macros are used. (#106621)

Without these explicit includes, removing other headers, who implicitly
include llvm-config.h, may have non-trivial side effects.


  Commit: d6ad55167094b7b23e71ec6eabfe942e7a485b41
      https://github.com/llvm/llvm-project/commit/d6ad55167094b7b23e71ec6eabfe942e7a485b41
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/IPO/SCCP.cpp
    M llvm/test/Transforms/PGOProfile/memprof.ll
    M llvm/test/Transforms/SCCP/pointer-nonnull.ll

  Log Message:
  -----------
  [IPSCCP] Infer nonnull return attribute (#106553)

Similarly to the existing range attribute inference, also infer the
nonnull attribute on function return values.

I think in practice FunctionAttrs will handle nearly all cases, the main
one I think it doesn't is cases involving branch conditions. But as we
already have the information here, we may as well materialize it.


  Commit: e0fa2f1c2957d9783d21460febf103cecac9e19a
      https://github.com/llvm/llvm-project/commit/e0fa2f1c2957d9783d21460febf103cecac9e19a
  Author: ofAlpaca <frank70199 at gmail.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/Basic/Builtins.td
    M clang/lib/AST/ExprConstant.cpp
    M clang/test/SemaCXX/builtins.cpp

  Log Message:
  -----------
  `__noop` not marked as constexpr #102064 (#105983)

Fixes #102064


  Commit: 1693d8eb9aa94b0e8e2395234e6c63b57a2017b7
      https://github.com/llvm/llvm-project/commit/1693d8eb9aa94b0e8e2395234e6c63b57a2017b7
  Author: Max Beck-Jones <max.beck-jones at arm.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/sve2-histcnt.ll

  Log Message:
  -----------
  [AArch64][SelectionDAG] Vector splitting and promotion for histogram intrinsic (#103037)

Adds support for wider-than-legal vector types for the histogram
intrinsic (llvm.experimental.vector.histogram.add) by splitting the
vector. Also adds integer promotion for the Inc operand.


  Commit: d2b8969b7593fd01991a2089828e6256945874cf
      https://github.com/llvm/llvm-project/commit/d2b8969b7593fd01991a2089828e6256945874cf
  Author: Kai Luo <gluokai at gmail.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/EdgeBundles.cpp

  Log Message:
  -----------
  [EdgeBundles] Correct MBB label name in output graph when `-view-edge-bundles`. NFC. (#106661)

With `-view-edge-bundles`, before the change, the dot file output is
kinda like
```dot
digraph {
        "%bb.0" [ shape=box ]
        0 -> "%bb.0"
        "%bb.0" -> 1
        "%bb.0" -> "%bb.1" [ color=lightgray ]
        "%bb.0" -> "%bb.6" [ color=lightgray ]
        "%bb.1" [ shape=box ]
        1 -> "%bb.1"
        "%bb.1" -> 1
        "%bb.1" -> "%bb.2" [ color=lightgray ]
        "%bb.1" -> "%bb.6" [ color=lightgray ]
        "%bb.2" [ shape=box ]
        1 -> "%bb.2"
        "%bb.2" -> 1
        "%bb.2" -> "%bb.3" [ color=lightgray ]
        "%bb.3" [ shape=box ]
        1 -> "%bb.3"
        "%bb.3" -> 2
        "%bb.3" -> "%bb.4" [ color=lightgray ]
        "%bb.4" [ shape=box ]
        2 -> "%bb.4"
        "%bb.4" -> 2
        "%bb.4" -> "%bb.4" [ color=lightgray ]
        "%bb.4" -> "%bb.5" [ color=lightgray ]
        "%bb.5" [ shape=box ]
        2 -> "%bb.5"
        "%bb.5" -> 1
        "%bb.5" -> "%bb.6" [ color=lightgray ]
        "%bb.5" -> "%bb.3" [ color=lightgray ]
        "%bb.6" [ shape=box ]
        1 -> "%bb.6"
        "%bb.6" -> 3
}
```
However, the graph output by graphviz is

![t](https://github.com/user-attachments/assets/24056c0a-3ba9-49c3-a5da-269f3140e619)
The node name corresponding to the MBB is incorrect.
After the change, the node name is consistent with MBB's name.

![s](https://github.com/user-attachments/assets/38c649d1-7222-4de1-971c-56f7721ab64c)


  Commit: ce7c828e085563f29451ec5fac9626c76ebf70ee
      https://github.com/llvm/llvm-project/commit/ce7c828e085563f29451ec5fac9626c76ebf70ee
  Author: Igor Kudrin <ikudrin at accesssoftek.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
    A lldb/test/Shell/Process/elf-core/aarch64-no-NT_ARM_TLS.yaml
    A lldb/test/Shell/Process/elf-core/lit.local.cfg

  Log Message:
  -----------
  [lldb][AArch64] Do not crash if NT_ARM_TLS is missing (#106478)

[D156118](https://reviews.llvm.org/D156118) states that this note is
always present, but it is better to check it explicitly, as otherwise
`lldb` may crash when trying to read registers.


  Commit: 54916e5784d0fd928ef5b28b2eb99726a395cb3f
      https://github.com/llvm/llvm-project/commit/54916e5784d0fd928ef5b28b2eb99726a395cb3f
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M .github/workflows/pr-code-format.yml

  Log Message:
  -----------
  [Github] Set code formatting job timeout to 30 minutes (#106674)

This patch sets the timeout of the code formatting job to 30 minutes.
The job is currently failing in specific circumstances and needs to be
reworked, but as a temp hack, change the timeout to 30 minutes so that
we can catch these jobs before they hit the Github Actions timeout limit
of six hours.

Somewhat (hackily) alleviates #79661 slightly.


  Commit: d6dc7cf71bf52f866c092e92ce374f0266ebee1a
      https://github.com/llvm/llvm-project/commit/d6dc7cf71bf52f866c092e92ce374f0266ebee1a
  Author: Danial Klimkin <dklimkin at google.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel

  Log Message:
  -----------
  Fix bazel build past 89e6a288674c (#106685)


  Commit: 0722b8ab8168d9e1aa3413a62c65878f407225ae
      https://github.com/llvm/llvm-project/commit/0722b8ab8168d9e1aa3413a62c65878f407225ae
  Author: Younan Zhang <zyn7109 at gmail.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M clang/test/SemaTemplate/default-arguments.cpp
    R clang/test/SemaTemplate/default-parm-init.cpp

  Log Message:
  -----------
  [Clang][NFC] Consolidate tests for default argument substitution (#105617)

Follow-up on 8ac140f39.

The test `SemaTemplate/default-parm-init.cpp` was introduced since the
fix #80288 and mainly did the following things:

- Ensure the default arguments are properly substituted inside either
the primary template & their explicit / out-of-line specializations.
- Ensure the strategy doesn't mess up the substitution of a lambda
expression as a default argument.

The 1st is for the bug of #68490, yet it does some redundant work: each
of the member functions is duplicated twice for the `sizeof` and
`alignof` operators, respectively, and the principle under the hood are
essentially the same. So this patch removes the duplication and reduces
the 8 functions to 4 functions that reveal the same thing.

The 2nd is presumably testing that the fix in #80288 doesn't impact a
complicated substitution. However, that seems unnecessary & unrelated to
the original issue. And more importantly, we don't have any problems
with that ever. Hence, I'll remove that test from this patch.

The test for default arguments is merged into
`SemaTemplate/default-arguments.cpp` with a new namespace, and hopefully
this could reduce the entropy of our testing cases.


  Commit: 5b77e254e814eb9a56d31c30a5c8289c07d8a6ff
      https://github.com/llvm/llvm-project/commit/5b77e254e814eb9a56d31c30a5c8289c07d8a6ff
  Author: wanglei <wanglei at loongson.cn>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/test/CodeGen/LoongArch/imm.ll

  Log Message:
  -----------
  [LoongArch] Pre-commit test for immediate value materialization using BSTRINS_D

Reviewed By: SixWeining

Pull Request: https://github.com/llvm/llvm-project/pull/106331


  Commit: eaf87d32754beb5bec10bab517bf56e25575b48e
      https://github.com/llvm/llvm-project/commit/eaf87d32754beb5bec10bab517bf56e25575b48e
  Author: wanglei <wanglei at loongson.cn>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
    M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
    M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
    M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMatInt.cpp
    M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMatInt.h
    M llvm/test/CodeGen/LoongArch/ctlz-cttz-ctpop.ll
    M llvm/test/CodeGen/LoongArch/imm.ll
    M llvm/test/CodeGen/LoongArch/ir-instruction/load-store.ll
    M llvm/test/CodeGen/LoongArch/merge-base-offset.ll
    M llvm/test/CodeGen/LoongArch/sextw-removal.ll
    M llvm/test/MC/LoongArch/Macros/macros-li.s

  Log Message:
  -----------
  [LoongArch] Optimize for immediate value materialization using BSTRINS_D instruction

Reviewed By: heiher, SixWeining

Pull Request: https://github.com/llvm/llvm-project/pull/106332


  Commit: 8f4aafb58ceb2c60f8f13d475d0623c696cd5716
      https://github.com/llvm/llvm-project/commit/8f4aafb58ceb2c60f8f13d475d0623c696cd5716
  Author: Shih-Po Hung <shihpo.hung at sifive.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    A llvm/test/Analysis/CostModel/RISCV/cast-half.ll
    M llvm/test/Analysis/CostModel/RISCV/cast.ll

  Log Message:
  -----------
  [RISCV][NFC] Splits f16 cast tests into a separate file (#106692)

precommit f16 test for #87506 fp-int conversion


  Commit: b294951e3967730ffad14d51297694b1411d7af6
      https://github.com/llvm/llvm-project/commit/b294951e3967730ffad14d51297694b1411d7af6
  Author: yronglin <yronglin777 at gmail.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M clang/lib/AST/ByteCode/Compiler.cpp
    M clang/test/CodeGen/compound-literal.c

  Log Message:
  -----------
  [clang][bytecode] Fix the handling of address of a vector (#106558)

The PR https://github.com/llvm/llvm-project/pull/105996 broke taking the
address of a vector:

**compound-literal.c**
```C
typedef int v4i32 __attribute((vector_size(16)));
v4i32 *y = &(v4i32){1,2,3,4};
```
That because the current interpreter handle vector unary operator as a
fallback when the generic code path fail. but the new interpreter was
not. we need to handle `UO_AddrOf` in
`Compiler<Emitter>::VisitVectorUnaryOperator`.

Signed-off-by: yronglin <yronglin777 at gmail.com>


  Commit: 1b32c3e2985f89900030289eaa44e3d92cab85af
      https://github.com/llvm/llvm-project/commit/1b32c3e2985f89900030289eaa44e3d92cab85af
  Author: Danial Klimkin <dklimkin at google.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp

  Log Message:
  -----------
  Add no-op handing for HLSLAttributedResource switch cases (#106698)

New value added in e00e9a3f8294c9b96cb0328bf136fab72aeec749


  Commit: a2a93f02930e20930d5ef38464ca9c99eb00ff23
      https://github.com/llvm/llvm-project/commit/a2a93f02930e20930d5ef38464ca9c99eb00ff23
  Author: kadir çetinkaya <kadircet at google.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M clang/lib/Basic/SourceManager.cpp
    M clang/unittests/Basic/SourceManagerTest.cpp

  Log Message:
  -----------
  [clang] Cleanup IncludeLocMap (#106241)

CompilerInstance can re-use same SourceManager across multiple
frontendactions. During this process it calls
`SourceManager::clearIDTables` to reset any caches based on FileIDs.

It didn't reset IncludeLocMap, resulting in wrong include locations for
workflows that triggered multiple frontend-actions through same
CompilerInstance.


  Commit: c4b5cb0f31227074d423b2db378dfbc486a5550e
      https://github.com/llvm/llvm-project/commit/c4b5cb0f31227074d423b2db378dfbc486a5550e
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions.ll

  Log Message:
  -----------
  [AArch64] Add accelerate test coverage for acos/asin/atan and cosh/sinh/tanh intrinsics to support #106584


  Commit: 833ce5d27b4e5452db73bf1b4eace7b1891f8650
      https://github.com/llvm/llvm-project/commit/833ce5d27b4e5452db73bf1b4eace7b1891f8650
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir

  Log Message:
  -----------
  [mlir][ArmSME] Fix test after #98043 (NFC)


  Commit: c8568f09577e9332d15edf98beb5376dc8d0672e
      https://github.com/llvm/llvm-project/commit/c8568f09577e9332d15edf98beb5376dc8d0672e
  Author: Longsheng Mou <moulongsheng at huawei.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
    M mlir/test/Dialect/Tosa/invalid.mlir

  Log Message:
  -----------
  [mlir][tosa] Add missing check for mutiples of `tosa.tile` (#106337)

This patch adds check for mutiples of `tosa.tile`. The `multiples` in
`tosa.tile` indicates how many times the tensor should be replicated
along each dimension. Zero and negative values are invalid, except for
-1, which represents a dynamic value. Therefore, each element of
`mutiples` should be positive integer or -1. Fix #106167.


  Commit: f0e34f381866b82a26241f7e9aa5964f0dd11ebd
      https://github.com/llvm/llvm-project/commit/f0e34f381866b82a26241f7e9aa5964f0dd11ebd
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll

  Log Message:
  -----------
  [VPlan] Don't skip optimizable truncs in planContainsAdditionalSimps.

A optimizable cast can also be removed by VPlan simplifications. Remove
the restriction from planContainsAdditionalSimplifications, as this
causes it to miss relevant simplifications, triggering false positives
for the cost decision verification.

Also adds debug output for printing additional cost-precomputations.

Fixes https://github.com/llvm/llvm-project/issues/106641.


  Commit: fab925651685505906416dca48469fd9f69ba39a
      https://github.com/llvm/llvm-project/commit/fab925651685505906416dca48469fd9f69ba39a
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

  Log Message:
  -----------
  [LLVM][AArch64] Fix invalid use of AArch64ISD::UZP2 in performConcatVectorsCombine. (#104774)

UZP2 requires both operands to match the result type but the combine tries to replace a truncate by passing the pre-truncated operands directly to an UZP2 with the truncated result type. This patch nop-casts the operands to keep the DAG consistent.  There should be no changes to the generated code, which is fine as it.

This patch also enables more target specific getNode() validation for fixed length vector types.


  Commit: 68d8b3846ab1e6550910f2a9a685690eee558af2
      https://github.com/llvm/llvm-project/commit/68d8b3846ab1e6550910f2a9a685690eee558af2
  Author: OverMighty <its.overmighty at gmail.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M compiler-rt/lib/builtins/CMakeLists.txt

  Log Message:
  -----------
  [builtins] Fix missing main() function in float16/bfloat16 support checks (#104478)

The CMake docs state that `check_c_source_compiles()` checks whether the
supplied code "can be compiled as a C source file and linked as an
executable (so it must contain at least a `main()` function)."

https://cmake.org/cmake/help/v3.30/module/CheckCSourceCompiles.html

In practice, this command is a wrapper around `try_compile()`:

- https://gitlab.kitware.com/cmake/cmake/blob/2904ce00d2ed6ad5dac6d3459af62d8223e06ce0/Modules/CheckCSourceCompiles.cmake#L54
- https://gitlab.kitware.com/cmake/cmake/blob/2904ce00d2ed6ad5dac6d3459af62d8223e06ce0/Modules/Internal/CheckSourceCompiles.cmake#L101

When `CMAKE_SOURCE_DIR` is compiler-rt/lib/builtins/,
`CMAKE_TRY_COMPILE_TARGET_TYPE` is set to `STATIC_LIBRARY`, so the
checks for `float16` and `bfloat16` support work as intended in a
Clang + compiler-rt runtime build for example, as it runs CMake
recursively from that directory.

However, when using llvm/ or compiler-rt/ as CMake source directory, as
`CMAKE_TRY_COMPILE_TARGET_TYPE` defaults to `EXECUTABLE`, these checks
will indeed fail if the code doesn't have a `main()` function. This
results in LLVM using x86 SIMD registers when generating calls to
builtins that, with Arch Linux's compiler-rt package for example,
actually use a GPR for their argument or return value as they use
`uint16_t` instead of `_Float16`.

This had been caught in post-commit review:
https://reviews.llvm.org/D145237#4521152. Use of the internal
`CMAKE_C_COMPILER_WORKS` variable is not what hides the issue, however.

PR #69842 tried to fix this by unconditionally setting
`CMAKE_TRY_COMPILE_TARGET_TYPE` to `STATIC_LIBRARY`, but it apparently
caused other issues, so it was reverted. This PR just adds a `main()`
function in the checks, as per the CMake docs.


  Commit: b065ec0af54988559334314ebbd51dd515d5bdd6
      https://github.com/llvm/llvm-project/commit/b065ec0af54988559334314ebbd51dd515d5bdd6
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/Inline/X86/inline-target-cpu-i686.ll
    M llvm/test/Transforms/Inline/X86/inline-target-cpu-x86_64.ll

  Log Message:
  -----------
  [Inline][X86] Regenerate inline-target-cpu-* tests


  Commit: fda7649b3c3797ddbb35a46746ae7876ab147612
      https://github.com/llvm/llvm-project/commit/fda7649b3c3797ddbb35a46746ae7876ab147612
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll
    M llvm/test/Transforms/InstCombine/X86/x86-avx512.ll
    A llvm/test/Transforms/InstCombine/X86/x86-vperm.ll

  Log Message:
  -----------
  [InstCombine][X86] Split off vperm shuffle tests from other avx512 tests


  Commit: 6345604ae51df1251de5b5fd442910f4d8f5023e
      https://github.com/llvm/llvm-project/commit/6345604ae51df1251de5b5fd442910f4d8f5023e
  Author: Danial Klimkin <dklimkin at google.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
    M llvm/test/tools/llvm-split/AMDGPU/address-taken-externalize-with-call.ll
    M llvm/test/tools/llvm-split/AMDGPU/address-taken-externalize.ll
    A llvm/test/tools/llvm-split/AMDGPU/debug-name-hiding.ll
    A llvm/test/tools/llvm-split/AMDGPU/debug-non-kernel-root.ll
    M llvm/test/tools/llvm-split/AMDGPU/declarations.ll
    M llvm/test/tools/llvm-split/AMDGPU/kernels-alias-dependencies.ll
    M llvm/test/tools/llvm-split/AMDGPU/kernels-cost-ranking.ll
    M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-external.ll
    M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-indirect.ll
    M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-overridable.ll
    M llvm/test/tools/llvm-split/AMDGPU/kernels-global-variables-noexternal.ll
    M llvm/test/tools/llvm-split/AMDGPU/kernels-global-variables.ll
    M llvm/test/tools/llvm-split/AMDGPU/large-kernels-merging.ll
    M llvm/test/tools/llvm-split/AMDGPU/non-kernels-dependency-indirect.ll
    R llvm/test/tools/llvm-split/AMDGPU/recursive-search-2.ll
    R llvm/test/tools/llvm-split/AMDGPU/recursive-search-8.ll

  Log Message:
  -----------
  Revert: [AMDGPU] Graph-based Module Splitting Rewrite (llvm#104763) (#106707)

* Revert "Fix MSVC "not all control paths return a value" warning. NFC."
Dep to revert c9b6e01b2e4fc930dac91dd44c0592ad7e36d967

* Revert "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)"
Breaks tests.


  Commit: 2d5613afec0f4afeeb03cfd4edac556a65ad0eaf
      https://github.com/llvm/llvm-project/commit/2d5613afec0f4afeeb03cfd4edac556a65ad0eaf
  Author: Richard Howell <rmaz at users.noreply.github.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/tools/dsymutil/dsymutil.cpp

  Log Message:
  -----------
  [dsymutil] return EXIT_FAILURE when Crashed (#106619)

Make dsymutil return a non-zero exit code when crashing during linking.


  Commit: 87a988e881ac92e3d87aae01dc632f33c1fb36aa
      https://github.com/llvm/llvm-project/commit/87a988e881ac92e3d87aae01dc632f33c1fb36aa
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    A llvm/test/Transforms/SLPVectorizer/resized-alt-shuffle-after-minbw.ll

  Log Message:
  -----------
  [SLP]Fix PR106655: Use FinalShuffle for alternate cast nodes.

Need to use FinalShuffle function for all vectorized results to
correctly produce vectorized value.

Fixes https://github.com/llvm/llvm-project/issues/106655


  Commit: ce5620ba9a5bf48bce4e49933aec531c70c54aeb
      https://github.com/llvm/llvm-project/commit/ce5620ba9a5bf48bce4e49933aec531c70c54aeb
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
    M llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll
    M llvm/test/Transforms/LoopVectorize/if-reduction.ll
    M llvm/test/Transforms/LoopVectorize/phi-cost.ll
    M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
    M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll

  Log Message:
  -----------
  [LLVM][VPlan] Pick more optimal initial value for VPBlend. (#104019)

By choosing an initial value whose mask is only used by the blend we can
remove the need for the mask entirely.


  Commit: 64f19951718075fdd2d2b6d072e8e5ca15a1c6c4
      https://github.com/llvm/llvm-project/commit/64f19951718075fdd2d2b6d072e8e5ca15a1c6c4
  Author: Danial Klimkin <dklimkin at google.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/IPO/FunctionAttrs.cpp

  Log Message:
  -----------
  Fix stack overflow in allPathsGoThroughCold past 6b11573b8c5e (#106384)

Recursion here causes stack overflow on large inputs. Fixing by
unrolling via a stack.


  Commit: ceb613a8bed218e2c98cd4fad3fd2a4a3217bd77
      https://github.com/llvm/llvm-project/commit/ceb613a8bed218e2c98cd4fad3fd2a4a3217bd77
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/SLPVectorizer/RISCV/math-function.ll

  Log Message:
  -----------
  [RISCV] Add full test coverage for acos/asin/atan and cosh/sinh/tanh intrinsics to support #106584


  Commit: 8586d0330e36b22496f9ba5ed116bc1aac5a1f28
      https://github.com/llvm/llvm-project/commit/8586d0330e36b22496f9ba5ed116bc1aac5a1f28
  Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M flang/lib/Lower/Bridge.cpp
    M flang/test/HLFIR/assumed_shape_with_value_keyword.f90
    M flang/test/Lower/HLFIR/select-rank.f90
    M flang/test/Lower/Intrinsics/system_clock.f90
    M flang/test/Lower/OpenMP/master.f90
    M flang/test/Lower/OpenMP/unstructured.f90
    M flang/test/Lower/OpenMP/wsloop-reduction-max-byref.f90
    M flang/test/Lower/OpenMP/wsloop-reduction-max.f90
    M flang/test/Lower/OpenMP/wsloop-reduction-min-byref.f90
    M flang/test/Lower/OpenMP/wsloop-reduction-min.f90
    M flang/test/Lower/OpenMP/wsloop-variable.f90

  Log Message:
  -----------
  [flang] Don't generate empty else blocks (#106618)

Code lowering always generates fir.if else blocks for source level if
statements, whether needed or not. Change this to only generate else
blocks that are needed.


  Commit: 2a8fda443e71707e73607feda2af0dbc871c972f
      https://github.com/llvm/llvm-project/commit/2a8fda443e71707e73607feda2af0dbc871c972f
  Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Scalar/LICM.cpp
    M llvm/test/Transforms/LICM/hoist-add-sub.ll

  Log Message:
  -----------
  LICM: extend hoistAddSub to unsigned case (#106373)

Trivially extend dd0cf23 ([LICM] Reassociate & hoist sub expressions) to
handle unsigned predicates as well.

Alive2 proofs: https://alive2.llvm.org/ce/z/GdDBtT.


  Commit: 86a60e7f1e8f361f84ccb6e656e848dd4fbaa713
      https://github.com/llvm/llvm-project/commit/86a60e7f1e8f361f84ccb6e656e848dd4fbaa713
  Author: Patryk Wychowaniec <pwychowaniec at pm.me>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
    M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
    A llvm/test/CodeGen/AVR/jmp.ll
    M llvm/test/MC/AVR/inst-brbc.s
    M llvm/test/MC/AVR/inst-brbs.s
    A llvm/test/MC/AVR/inst-brcc.s
    A llvm/test/MC/AVR/inst-brcs.s
    A llvm/test/MC/AVR/inst-breq.s
    A llvm/test/MC/AVR/inst-brge.s
    A llvm/test/MC/AVR/inst-brhc.s
    A llvm/test/MC/AVR/inst-brhs.s
    A llvm/test/MC/AVR/inst-brid.s
    A llvm/test/MC/AVR/inst-brie.s
    A llvm/test/MC/AVR/inst-brlo.s
    A llvm/test/MC/AVR/inst-brlt.s
    A llvm/test/MC/AVR/inst-brmi.s
    A llvm/test/MC/AVR/inst-brne.s
    A llvm/test/MC/AVR/inst-brpl.s
    A llvm/test/MC/AVR/inst-brsh.s
    A llvm/test/MC/AVR/inst-brtc.s
    A llvm/test/MC/AVR/inst-brts.s
    A llvm/test/MC/AVR/inst-brvc.s
    A llvm/test/MC/AVR/inst-brvs.s
    R llvm/test/MC/AVR/inst-family-cond-branch.s
    M llvm/test/MC/AVR/inst-rcall.s
    M llvm/test/MC/AVR/inst-rjmp.s

  Log Message:
  -----------
  [AVR] Fix parsing & emitting relative jumps (#106722)

Ever since 6859685a87ad093d60c8bed60b116143c0a684c7 (or, precisely,
84428dafc0941e3a31303fa1b286835ab2b8e234) relative jumps emitted by the
AVR codegen are off by two bytes - this pull request fixes it.

## Abstract

As compared to absolute jumps, relative jumps - such as rjmp, rcall or
brsh - have an implied `pc+2` behavior; that is, `jmp 100` is `pc =
100`, but `rjmp 100` gets understood as `pc = pc + 100 + 2`.

This is not reflected in the AVR codegen:


https://github.com/llvm/llvm-project/blob/f95026dbf66e353128a3a3d7b55f3e52d5985535/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp#L89

... which always emits relative jumps that are two bytes too far - or
rather it _would_ emit such jumps if not for this check:


https://github.com/llvm/llvm-project/blob/f95026dbf66e353128a3a3d7b55f3e52d5985535/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp#L517

... which causes most of the relative jumps to be actually resolved
late, by the linker, which applies the offsetting logic on its own,
hiding the issue within LLVM.

[Some time
ago](https://github.com/llvm/llvm-project/commit/697a162fa63df328ec9ca334636c5e85390b2bf0)
we've had a similar "jumps are off" problem that got solved by touching
`shouldForceRelocation()`, but I think that has worked only by accident.
It's exploited the fact that absolute vs relative jumps in the parsed
assembly can be distinguished through a "side channel" check relying on
the existence of labels (i.e. absolute jumps happen to named labels, but
relative jumps are anonymous, so to say). This was an alright idea back
then, but it got broken by 6859685a87ad093d60c8bed60b116143c0a684c7.

I propose a different approach:
- when emitting relative jumps, offset them by `-2` (well, `-1`,
strictly speaking, because those instructions rely on right-shifted
offset),
- when parsing relative jumps, treat `.` as `+2` and read `rjmp .+1234`
as `rjmp (1234 + 2)`.

This approach seems to be sound and now we generate the same assembly as
avr-gcc, which can be confirmed with:

```cpp
// avr-gcc test.c -O3 && avr-objdump -d a.out

int main() {
    asm(
"      foo:\n\t"
"        rjmp  .+2\n\t"
"        rjmp  .-2\n\t"
"        rjmp  foo\n\t"
"        rjmp  .+8\n\t"
"        rjmp  end\n\t"
"        rjmp  .+0\n\t"
"      end:\n\t"
"        rjmp .-4\n\t"
"        rjmp .-6\n\t"
"      x:\n\t"
"        rjmp x\n\t"
"        .short 0xc00f\n\t"
);
}
```

avr-gcc is also how I got the opcodes for all new tests like `inst-brbc.s`, so we should be good.


  Commit: a919588df4f108cef5829363a9ec6a1968dbb03a
      https://github.com/llvm/llvm-project/commit/a919588df4f108cef5829363a9ec6a1968dbb03a
  Author: Chris Apple <cja-private at pm.me>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M compiler-rt/lib/rtsan/rtsan.cpp
    M compiler-rt/lib/rtsan/rtsan.h
    M compiler-rt/lib/rtsan/tests/rtsan_test_functional.cpp

  Log Message:
  -----------
  [compiler-rt][rtsan] NFC: Rename rtsan_on->rtsan_enable rtsan_off->rtsan_disable (#106727)

This better matches lsan_enable and disable, which we are trying to
emulate.


  Commit: 7ffe67c17c524c2d3056c0721a33c7012dce3061
      https://github.com/llvm/llvm-project/commit/7ffe67c17c524c2d3056c0721a33c7012dce3061
  Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp

  Log Message:
  -----------
  [RemoveDIs] Fix asan-identified leak in unittest (#106723)

Fixes issue found here
https://github.com/llvm/llvm-project/pull/106691#issuecomment-2320960847

The issue wasn't in the code change itself, just the unittest; the
trailing marker wasn't properly cleaned up.


  Commit: 4a10b4c0bd241f3a2d7162fe29f520af7da6840c
      https://github.com/llvm/llvm-project/commit/4a10b4c0bd241f3a2d7162fe29f520af7da6840c
  Author: jeanPerier <jperier at nvidia.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M flang/lib/Evaluate/intrinsics-library.cpp

  Log Message:
  -----------
  [flang] fix flang builds with clang 20 after #100692 (#106718)

#100692 changes clang template deduction, and an error was now emitted
when building flang with top of the tree clang when mapping std::pow in
intrinsics-library.cpp for constant folding `error: address of
overloaded function 'pow' is ambiguous`

See https://lab.llvm.org/buildbot/#/builders/4/builds/1670

I I am not expert enough to understand if the new error is justified or
not here, but it is easy to help the compiler here with explicit
wrappers to fix the builds.


  Commit: 96ad495289d241fc8f445ebdf4a9c1a6f6ff408e
      https://github.com/llvm/llvm-project/commit/96ad495289d241fc8f445ebdf4a9c1a6f6ff408e
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

  Log Message:
  -----------
  [SLP] vectorizeChainsInBlock - remove superfluous continue at the end of for loop. NFC.


  Commit: b719c9255126aeba7a9455fd026471c45c988e2d
      https://github.com/llvm/llvm-project/commit/b719c9255126aeba7a9455fd026471c45c988e2d
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

  Log Message:
  -----------
  [SLP] findBestRootPair - fix incorrect argument name comment. NFC.


  Commit: 362d37aeab7e8ba5dc4125480de3d45cc6bb23dc
      https://github.com/llvm/llvm-project/commit/362d37aeab7e8ba5dc4125480de3d45cc6bb23dc
  Author: MichelleCDjunaidi <michellechrisalyn at gmail.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M clang-tools-extra/docs/clang-tidy/Contributing.rst

  Log Message:
  -----------
  Update clang tidy Contributing guide (#106672)

Update the documentation to direct new users to the Github instead of
the discontinued Phabricator archive. Also details more ways and
information regarding clang-query usage. Partially resolves/disclaims
#106656 and #106663 as per discussion in
https://discourse.llvm.org/t/inconsistency-between-hasdescendant-in-clang-query-and-clang-libtooling-matchers/80799/.

Also updates the out-of-tree guide.

For context, I recently went through the Contributing guide while
writing https://github.com/llvm/llvm-project/pull/102299, and many of
these updates were from my experience trying to follow the guide. e.g. I
was trying to link the shared library of an out-of-tree check as SHARED
in CMake and encountered duplicate symbols like
_ZTIN5clang4tidy14ClangTidyCheckE. It wasn't until I saw
https://github.com/llvm/llvm-project/commit/84f137a590e7de25c4105303e5938c40566c2dfb
that I found out I had to use MODULE. I also encountered the clang-query
difference which was a surprise as the documentation said the two
matchers were "virtually identical". Also, the -header-filter thing
tripped me out until I found
https://github.com/llvm/llvm-project/issues/25590 and
https://github.com/llvm/llvm-project/pull/91400. Usually, when people
say restrict and filter, they mean filter out (since -header-filter
instead includes/filters in said headers).


  Commit: 24977395592fb3a47d0356b6e9e6d25358a521c5
      https://github.com/llvm/llvm-project/commit/24977395592fb3a47d0356b6e9e6d25358a521c5
  Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    A llvm/test/MC/AArch64/SVE/directive-arch-negative.s
    M llvm/test/MC/AArch64/SVE/directive-arch_extension-negative.s
    M llvm/test/MC/AArch64/SVE/directive-cpu-negative.s
    M llvm/test/MC/AArch64/directive-arch-negative.s
    M llvm/test/MC/AArch64/directive-arch_extension-negative.s

  Log Message:
  -----------
  [AArch64][AsmParser] Directives should clear transitively implied features (#106625)

The commit ff3f3a54e2d1 made it possible to enable transitively implied
features when parsing assembler directives. For example enabling sve2
also enables sve.

This patch allows disabling features which depend on each other. For
example disabling sve also disables sve2.


  Commit: c792de28dfaf3a13703e83e4eb09dd44574b3a3e
      https://github.com/llvm/llvm-project/commit/c792de28dfaf3a13703e83e4eb09dd44574b3a3e
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M libcxx/test/std/language.support/cmp/cmp.alg/strong_order_long_double.verify.cpp
    M libcxx/test/std/numerics/bit/bit.cast/bit_cast.pass.cpp
    M libcxx/test/support/test_macros.h

  Log Message:
  -----------
  [libcxx][test] Add macro for when long double is just double (#106708)

This removes the need for the long list of platforms in
strong_order_long_double_verify.


  Commit: f4ea19b47e1e5af6682d94ad05ac2e7bca64cf73
      https://github.com/llvm/llvm-project/commit/f4ea19b47e1e5af6682d94ad05ac2e7bca64cf73
  Author: Mark de Wever <koraq at xs4all.nl>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M libcxx/docs/Status/Cxx20Issues.csv
    M libcxx/include/syncstream
    M libcxx/test/std/input.output/syncstream/syncbuf/syncstream.syncbuf.cons/cons.default.pass.cpp

  Log Message:
  -----------
  [libc++][syncbuf] Implement LWG3253 (#99778)

Closes #100264


  Commit: ab40ae8ff9f87b6e3d68cab2c47d692016ede958
      https://github.com/llvm/llvm-project/commit/ab40ae8ff9f87b6e3d68cab2c47d692016ede958
  Author: Jonas Devlieghere <jonas at devlieghere.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M lldb/include/lldb/Core/SourceManager.h
    M lldb/source/Commands/CommandObjectSource.cpp
    M lldb/source/Core/IOHandlerCursesGUI.cpp
    M lldb/source/Core/SourceManager.cpp
    M lldb/unittests/Core/SourceManagerTest.cpp

  Log Message:
  -----------
  [lldb] Store SupportFiles in SourceManager::File (NFC) (#106639)

To support detecting MD5 checksum mismatches, store a SupportFile rather
than a plain FileSpec in SourceManager::File.


  Commit: b0eefb4c4e5136fd606cf4cff566df9dbc0fa051
      https://github.com/llvm/llvm-project/commit/b0eefb4c4e5136fd606cf4cff566df9dbc0fa051
  Author: Jonas Devlieghere <jonas at devlieghere.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M lldb/include/lldb/Utility/SupportFile.h

  Log Message:
  -----------
  [lldb] Update SupportFile documentation (NFC)


  Commit: 0c4cf79defe30d43279bf4526cdf32b6c7f8a197
      https://github.com/llvm/llvm-project/commit/0c4cf79defe30d43279bf4526cdf32b6c7f8a197
  Author: Michał Górny <mgorny at gentoo.org>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M clang/tools/scan-build-py/CMakeLists.txt

  Log Message:
  -----------
  [clang] Install scan-build-py into plain "lib" directory (#106612)

Install scan-build-py modules into the plain `lib` directory,
without LLVM_LIBDIR_SUFFIX appended, to match the path expected
by `intercept-build` executable.  This fixes the program being unable
to find its modules.  Using unsuffixed path makes sense here, since
Python modules are not subject to multilib.

This change effectively reverts 1334e129a39cb427e7b855e9a711a3e7604e50e5.
The commit in question changed the path without a clear justification
("does not respect the given prefix") and the Python code was never
modified to actually work with the change.

Fixes #106608


  Commit: 369d8148e09c2b91174ec01e845bc504cf622c45
      https://github.com/llvm/llvm-project/commit/369d8148e09c2b91174ec01e845bc504cf622c45
  Author: Alex MacLean <amaclean at nvidia.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M clang/test/Headers/__clang_hip_math.hip
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/test/Transforms/Attributor/nofpclass.ll

  Log Message:
  -----------
  [ValueTracking] use KnownBits to compute fpclass from bitcast (#97762)

When we encounter a bitcast from an integer type we can use the
information from `KnownBits` to glean some information about the
fpclass:
- If the sign bit is known, we can transfer this information over. 
- If the float is IEEE format and enough of the bits are known, we may
  be able to prove or rule out some fpclasses such as NaN, Zero, or Inf.


  Commit: c4a53811c18b02490cbdc65be494e49018e23900
      https://github.com/llvm/llvm-project/commit/c4a53811c18b02490cbdc65be494e49018e23900
  Author: Sjoerd Meijer <smeijer at nvidia.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/docs/TestSuiteGuide.md

  Log Message:
  -----------
  [test-suite] Document the LLVM test-suite benchmark apps (#105843)

There is no documentation or description of the different apps in the
LLVM benchmark test-suite and this is a first attempt to document this
for the MultiSource apps.


  Commit: ece6566048086cf2870d2c2bff46384df1b9e531
      https://github.com/llvm/llvm-project/commit/ece6566048086cf2870d2c2bff46384df1b9e531
  Author: Pradeep Kumar <pradeepku at nvidia.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
    A mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
    M mlir/test/Target/LLVMIR/nvvmir.mlir

  Log Message:
  -----------
  [MLIR][NVVM] Add support for fence.proxy.{acquire, release} Ops (#106689)


  Commit: fef3426ad3d8d5bf01941438467df318d00c6279
      https://github.com/llvm/llvm-project/commit/fef3426ad3d8d5bf01941438467df318d00c6279
  Author: Chris Apple <cja-private at pm.me>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/docs/LangRef.rst
    M llvm/include/llvm/Bitcode/LLVMBitCodes.h
    M llvm/include/llvm/IR/Attributes.td
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/Transforms/Utils/CodeExtractor.cpp
    M llvm/test/Bitcode/attributes.ll
    M llvm/test/Bitcode/compatibility.ll
    R llvm/test/Verifier/rtsan-attrs.ll

  Log Message:
  -----------
  Revert "[LLVM][rtsan] Add LLVM nosanitize_realtime attribute (#105447)" (#106743)

This reverts commit 178fc4779ece31392a2cd01472b0279e50b3a199.

This attribute was not needed now that we are using the lsan style
ScopedDisabler for disabling this sanitizer

See #106736 
#106125 

For more discussion


  Commit: 82a5ab756fdbce432794c00bdeeb95aa7e403d3f
      https://github.com/llvm/llvm-project/commit/82a5ab756fdbce432794c00bdeeb95aa7e403d3f
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/InstCombine/X86/x86-vperm.ll

  Log Message:
  -----------
  [X86] x86-vperm.ll - strip superfluous semicolon check lines. NFC.


  Commit: d01e0f7fb10ff1f9e2b797ce8437c701dfd58cbc
      https://github.com/llvm/llvm-project/commit/d01e0f7fb10ff1f9e2b797ce8437c701dfd58cbc
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/InstCombine/X86/x86-vperm.ll
    M llvm/test/Transforms/InstCombine/X86/x86-vpermi2.ll

  Log Message:
  -----------
  [InstCombine][X86] Add vpermv/vpermv3 test coverage for #106413


  Commit: a3816b5a573dbf57ba3082a919ca2de6b47257e9
      https://github.com/llvm/llvm-project/commit/a3816b5a573dbf57ba3082a919ca2de6b47257e9
  Author: Patryk Wychowaniec <pwychowaniec at pm.me>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M lld/test/ELF/avr-reloc.s

  Log Message:
  -----------
  [AVR] Fix LLD test (#106739)

Since we don't generate relocations for those, it doesn't make sense to
assert them here; fallout of
https://github.com/llvm/llvm-project/pull/106722.


  Commit: 924907bc6aa17bb15241143dc9858da971b25908
      https://github.com/llvm/llvm-project/commit/924907bc6aa17bb15241143dc9858da971b25908
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll

  Log Message:
  -----------
  [DAG] Prefer 0.0 over -0.0 as neutral value for FADD w/NoSignedZero (#106616)

When getting a neutral value, we can prefer using a positive zero over a
negative zero if nsz is set on the FADD (or reduction). A positive zero
should be cheaper to materialize on basically all targets.

Arguably, we should be doing this kind of canonicalization in
DAGCombine, but we don't do that for any of the other reduction
variants, so this seems like path of least resistance. This does mean
that we can only do this for "fast" reductions. Just nsz isn't enough,
as that goes through the SEQ_FADD path where the IR level start value
isn't folded away.

If folks think this is to RISCV specific, let me know. There's a trivial
RISCV specific implementation. I went with the generic one as I through
this might benefit other targets.


  Commit: 49b04e60ed99307b0b4369b8956e6c15c7094d07
      https://github.com/llvm/llvm-project/commit/49b04e60ed99307b0b4369b8956e6c15c7094d07
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/lib/SandboxIR/BUILD.gn
    M llvm/utils/gn/secondary/llvm/unittests/SandboxIR/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 034f2b380bd2


  Commit: 5224f65b44f9873c8298d51233005d4802ff0ba0
      https://github.com/llvm/llvm-project/commit/5224f65b44f9873c8298d51233005d4802ff0ba0
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 115b87636b9f


  Commit: b4d9c52db474041e417f547b699caeeecfa714cc
      https://github.com/llvm/llvm-project/commit/b4d9c52db474041e417f547b699caeeecfa714cc
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/unittests/Transforms/IPO/BUILD.gn

  Log Message:
  -----------
  [gn build] Port bd6531b95086


  Commit: 206b5aff44a95754f6dd7a5696efa024e983ac59
      https://github.com/llvm/llvm-project/commit/206b5aff44a95754f6dd7a5696efa024e983ac59
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/AtomicExpandPass.cpp
    M llvm/test/CodeGen/AArch64/atomicrmw-fadd.ll
    M llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll
    M llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll
    M llvm/test/CodeGen/AArch64/atomicrmw-fsub.ll

  Log Message:
  -----------
  AtomicExpand: Allow incrementally legalizing atomicrmw (#103371)

If a lowering changed control flow, resume the legalization
loop at the first newly inserted block.

This will allow incrementally legalizing atomicrmw and cmpxchg.

The AArch64 test might be a bugfix. Previously it would lower
the vector FP case as a cmpxchg loop, but cmpxchgs get lowered
but previously weren't. Maybe it shouldn't be reporting cmpxchg
for the expand type in the first place though.


  Commit: 5703d8572f1bcca7bdcd01f1d83ad98ebb07ced0
      https://github.com/llvm/llvm-project/commit/5703d8572f1bcca7bdcd01f1d83ad98ebb07ced0
  Author: Brendan Dahl <brendan.dahl at gmail.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsWebAssembly.def
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/lib/Headers/wasm_simd128.h
    M cross-project-tests/intrinsic-header-tests/wasm_simd128.c
    M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
    M llvm/test/CodeGen/WebAssembly/half-precision.ll

  Log Message:
  -----------
  [WebAssembly] Add intrinsics to wasm_simd128.h for all FP16 instructions (#106465)

Getting this to work required a few additional changes:
- Add builtins for any instructions that can't be done with plain C
currently.
- Add support for the saturating version of fp_to_<s,i>_I16x8. Other
vector sizes supported this already.
- Support bitcast of f16x8 to v128. Needed to return a __f16x8 as
v128_t.


  Commit: c55e24b8507d47a8cc04b5d9570e8e3d02be1ca3
      https://github.com/llvm/llvm-project/commit/c55e24b8507d47a8cc04b5d9570e8e3d02be1ca3
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMatInt.cpp

  Log Message:
  -----------
  [llvm][LoongArch] Fix BSTRINS_D test failures on 32 bit hosts

eaf87d32754beb5bec10bab517bf56e25575b48e added new code that uses
64 bit types and ULL for constants, mostly, but a few UL snuck in.

UL is still 4 bytes on 32 bit, ULL is 8.

This fixes test failures on 32 bit Arm:
https://lab.llvm.org/buildbot/#/builders/39/builds/1338


  Commit: d58d105cdaf366d7db3f60d356b21bc8e64666fb
      https://github.com/llvm/llvm-project/commit/d58d105cdaf366d7db3f60d356b21bc8e64666fb
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Analysis/VectorUtils.cpp
    M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions.ll

  Log Message:
  -----------
  [Analysis] isTriviallyVectorizable - add vectorization support for acos/asin/atan and cosh/sinh/tanh intrinsics (#106584)

Show fallback cases in amdlibm tests where it doesn't have that specific op


  Commit: 68f0d20a9b507383a7577144bbd4811abe787e42
      https://github.com/llvm/llvm-project/commit/68f0d20a9b507383a7577144bbd4811abe787e42
  Author: JoelWee <32009741+JoelWee at users.noreply.github.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp

  Log Message:
  -----------
  Fix clang after ece6566048086cf2870d2c2bff46384df1b9e531


  Commit: a2615ad45c73095dfda6ae546de107aacb10cbb7
      https://github.com/llvm/llvm-project/commit/a2615ad45c73095dfda6ae546de107aacb10cbb7
  Author: JoelWee <32009741+JoelWee at users.noreply.github.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M mlir/include/mlir/IR/Block.h

  Log Message:
  -----------
  [mlir] Align mlir::Block (#106717)

This fixes an error from the LatticeAnchor PointerUnion with
ProgramPoint in b6603e1bf1

```
third_party/llvm/llvm-project/llvm/include/llvm/ADT/PointerIntPair.h:172:17: error: static assertion failed due to requirement '2U <= PointerUnionUIntTraits<mlir::GenericLatticeAnchor *, mlir::ProgramPoint, mlir::Value>::NumLowBitsAvailable': PointerIntPair with integer size too large for pointer
  172 |   static_assert(IntBits <= PtrTraits::NumLowBitsAvailable,
```


  Commit: 97122550961944f2376f0e84a73cdd5b9e042bc4
      https://github.com/llvm/llvm-project/commit/97122550961944f2376f0e84a73cdd5b9e042bc4
  Author: Aaron Ballman <aaron at aaronballman.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M clang-tools-extra/docs/clang-tidy/Contributing.rst

  Log Message:
  -----------
  Fix a minor issue with the documentation; NFC


  Commit: 1faa9c8a023fb42fda31fa1e6dd6d6d462fb7619
      https://github.com/llvm/llvm-project/commit/1faa9c8a023fb42fda31fa1e6dd6d6d462fb7619
  Author: Paul T Robinson <paul.robinson at sony.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/docs/Security.rst

  Log Message:
  -----------
  [Security] Nominate Matthew Voss to replace Paul Robinson on the Secu… (#106112)

…rity Group

Matthew is a member of Sony's PS4/PS5 toolchain team, most visible for
his work on LTO, but he also has a long-standing interest in security.
He will replace Paul as one of Sony's participants in the Security Group
as Paul will be retiring from Sony at the end of September.


  Commit: 348e74139ad7f06fdf8b332a81842de4bdf03b0c
      https://github.com/llvm/llvm-project/commit/348e74139ad7f06fdf8b332a81842de4bdf03b0c
  Author: Louis Dionne <ldionne.2 at gmail.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M libcxx/include/__chrono/leap_second.h
    M libcxx/include/__chrono/parser_std_format_spec.h
    M libcxx/include/__chrono/statically_widen.h
    M libcxx/include/__chrono/time_zone_link.h
    M libcxx/include/__expected/expected.h
    M libcxx/include/__format/buffer.h
    M libcxx/include/__format/concepts.h
    M libcxx/include/__format/container_adaptor.h
    M libcxx/include/__format/enable_insertable.h
    M libcxx/include/__format/escaped_output_table.h
    M libcxx/include/__format/extended_grapheme_cluster_table.h
    M libcxx/include/__format/format_arg.h
    M libcxx/include/__format/format_arg_store.h
    M libcxx/include/__format/format_args.h
    M libcxx/include/__format/format_context.h
    M libcxx/include/__format/format_error.h
    M libcxx/include/__format/format_functions.h
    M libcxx/include/__format/format_parse_context.h
    M libcxx/include/__format/format_string.h
    M libcxx/include/__format/format_to_n_result.h
    M libcxx/include/__format/formatter_bool.h
    M libcxx/include/__format/formatter_char.h
    M libcxx/include/__format/formatter_floating_point.h
    M libcxx/include/__format/formatter_integer.h
    M libcxx/include/__format/formatter_integral.h
    M libcxx/include/__format/formatter_output.h
    M libcxx/include/__format/formatter_pointer.h
    M libcxx/include/__format/formatter_string.h
    M libcxx/include/__format/formatter_tuple.h
    M libcxx/include/__format/indic_conjunct_break_table.h
    M libcxx/include/__format/parser_std_format_spec.h
    M libcxx/include/__format/range_default_formatter.h
    M libcxx/include/__format/range_formatter.h
    M libcxx/include/__format/unicode.h
    M libcxx/include/__format/width_estimation_table.h
    M libcxx/include/__fwd/format.h
    M libcxx/include/__memory/allocator.h
    M libcxx/include/__type_traits/is_member_pointer.h
    M libcxx/include/__type_traits/is_void.h
    M libcxx/include/array
    M libcxx/include/forward_list
    M libcxx/include/iosfwd
    M libcxx/include/list
    M libcxx/include/set
    M libcxx/include/string
    M libcxx/include/syncstream
    M libcxx/include/tuple
    M libcxx/include/vector
    M libcxx/modules/std/format.inc
    M libcxx/src/include/refstring.h
    M libcxx/utils/generate_escaped_output_table.py
    M libcxx/utils/generate_extended_grapheme_cluster_table.py
    M libcxx/utils/generate_indic_conjunct_break_table.py
    M libcxx/utils/generate_width_estimation_table.py

  Log Message:
  -----------
  [libc++][NFC] Run clang-format on libcxx/include

This re-formats a few headers that had become out-of-sync with respect
to formatting since we ran clang-format on the whole codebase. There's
surprisingly few instances of it.


  Commit: 68805de90280dc8d8df39ff3f6289033deb487cf
      https://github.com/llvm/llvm-project/commit/68805de90280dc8d8df39ff3f6289033deb487cf
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Analysis/IVDescriptors.cpp

  Log Message:
  -----------
  [IVDesc] Reuse getBinOpIdentity in getRecurrenceIdentity [nfc]

Avoid duplication so that we can easily tell these lists are in sync.


  Commit: 941feb76c8186d2e237690511b48f57c6bda282b
      https://github.com/llvm/llvm-project/commit/941feb76c8186d2e237690511b48f57c6bda282b
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/test/Analysis/CostModel/X86/icmp-codesize.ll
    M llvm/test/Analysis/CostModel/X86/icmp-latency.ll
    M llvm/test/Analysis/CostModel/X86/icmp-sizelatency.ll
    M llvm/test/Analysis/CostModel/X86/icmp.ll

  Log Message:
  -----------
  [CostModel][X86] Fix SSE41/SSE42 cost checks on icmp tests

Noticed on #106747 - some SSE41 tests didn't match the SSE2 baseline so we were missing ALL the checks :(


  Commit: 18e55052d6c7da765bbec311b1b6ac9590a2bfa3
      https://github.com/llvm/llvm-project/commit/18e55052d6c7da765bbec311b1b6ac9590a2bfa3
  Author: Connie Zhu <60797237+connieyzhu at users.noreply.github.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M mlir/test/lit.cfg.py
    M polly/test/UnitIsl/lit.cfg
    M polly/test/lit.cfg

  Log Message:
  -----------
  [mlir][polly][llvm-lit] Fixed logic for turning on external shell in lit (#106458)

For both mlir and polly, the lit internal shell is the default shell for
running lit tests. However, if the user wanted to switch back to the
external shell by setting `LIT_USE_INTERNAL_SHELL=0`, the `not` used in
the body of the `if` conditional changes `use_lit_shell` to be True
instead of the intended False. Removing `not` allows for this lit config
to work as intended.

Fixes https://github.com/llvm/llvm-project/issues/106459.


  Commit: f1cf09104eddbbe81c75e112a85c4f8dc14d5035
      https://github.com/llvm/llvm-project/commit/f1cf09104eddbbe81c75e112a85c4f8dc14d5035
  Author: Harini0924 <harinidonthula at google.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M compiler-rt/test/nsan/vec_sqrt.cpp

  Log Message:
  -----------
  [compiler-rt][test] Added `env` command to fix NSAN_OPTIONS command not found error (#106676)

Resolved the issue where `'NSAN_OPTIONS=check_nan=true,halt_on_error=0'`
was not recognized as a command. Changed the test command to set the
environment variable correctly using `env`.
fixes: #106598


  Commit: f81f283b365f99e1a71a836381c36874e965d80e
      https://github.com/llvm/llvm-project/commit/f81f283b365f99e1a71a836381c36874e965d80e
  Author: Florian Mayer <fmayer at google.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M clang/test/CodeGen/address-safety-attr-flavors.cpp
    M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
    M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/basic.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
    R llvm/test/Instrumentation/HWAddressSanitizer/attrinfer.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/fixed-shadow.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/hwasan-pass-second-run.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/mem-attr.ll

  Log Message:
  -----------
  Revert "Reapply "[HWASan] remove incorrectly inferred attributes" (#106622)" (#106758)

Reverts llvm/llvm-project#106624

caused timeouts


  Commit: 9764cf888502fe6dd15ab21de5c2f73cae47a2c0
      https://github.com/llvm/llvm-project/commit/9764cf888502fe6dd15ab21de5c2f73cae47a2c0
  Author: Harini0924 <harinidonthula at google.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    A llvm/utils/lit/tests/Inputs/shtest-glob/example_file1.input
    A llvm/utils/lit/tests/Inputs/shtest-glob/example_file2.input
    A llvm/utils/lit/tests/Inputs/shtest-glob/glob-echo.txt
    A llvm/utils/lit/tests/Inputs/shtest-glob/glob-mkdir.txt
    A llvm/utils/lit/tests/Inputs/shtest-glob/lit.cfg
    A llvm/utils/lit/tests/shtest-glob.py

  Log Message:
  -----------
  [llvm-lit] Add precommit test to verify current behavior of glob expansion in lit's internal shell (#106325)

This patch introduces a precommit test to verify the current behavior of
glob expansion in lit's internal shell. The motivation for this test
stems from an issue encountered during the BOLT test suite when running
with the lit internal shell using the command:

`LIT_USE_INTERNAL_SHELL=1 ninja check-bolt`

During execution, the following error was observed:
```
File "/usr/local/google/home/harinidonthula/llvm-project/llvm/utils/lit/lit/TestRunner.py", line 416, in executeBuiltinEcho
    stdout.write(encode(maybeUnescape(args[-1])))
TypeError: string argument expected, got 'GlobItem'
```
The `executeBuiltinEcho` function in the lit testing framework expects a
string to be passed to `stdout.write`, but it received a `GlobItem`
object instead. This precommit test is designed to check the current
behavior where the glob pattern isn't correctly expanded, leading to
this `TypeError`.

While this patch doesn't fix the issue, it helps in understanding and
verifying the current behavior. The feedback I received from this
[PR](https://github.com/llvm/llvm-project/pull/105925) suggests using
`cmd.args = expand_glob_expressions(cmd.args, shenv.cwd)` to match the
behavior of `executeBuiltinMkdir` and `executeBuiltinRm`, but it is
recognized that the internal shell should ideally expand globs before
calling any built-in command.

**Request for Feedback:**
I'm looking for feedback on how to improve this precommit test,
specifically regarding the handling and expansion of glob patterns for
commands like mkdir and rm within the internal shell. Currently, the
args are expanded at the beginning of these functions, which should
ensure proper glob expansion. However, I'd appreciate guidance on
whether I should write additional tests to verify that mkdir and rm are
handling glob expansions correctly.

If such tests are recommended, I would also appreciate advice on the
best approach to implement them, considering the existing framework and
the way glob expansion is expected to function in the internal shell.
Should these tests confirm that the current implementation passes, or
are there specific edge cases I should be aware of?

**Next Steps:**

In my follow-up PR, I plan to address the UNRESOLVED error by expanding
the entire command, ensuring correct and consistent behavior across all
commands. The current test checks for an unresolved issue with the glob
expansion, specifically looking for a `TypeError` due to an unexpanded
`GlobItem`. This will be updated to reflect the correct behavior once
the issue is resolved.

This change is relevant for [[RFC] Enabling the Lit Internal Shell by
Default](https://discourse.llvm.org/t/rfc-enabling-the-lit-internal-shell-by-default/80179/3)


  Commit: 9a0030e0f737fa06a4693a16d546b6336e138304
      https://github.com/llvm/llvm-project/commit/9a0030e0f737fa06a4693a16d546b6336e138304
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

  Log Message:
  -----------
  [ARM] Don't use -1 as invalid register number in assembly parser. (#106666)

Use MCRegister instead.


  Commit: 688843bda88e6dcc4f66a1283717258438dbbb96
      https://github.com/llvm/llvm-project/commit/688843bda88e6dcc4f66a1283717258438dbbb96
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/calling-conv-half.ll
    M llvm/test/CodeGen/RISCV/float-imm.ll
    M llvm/test/CodeGen/RISCV/half-imm.ll

  Log Message:
  -----------
  [RISCV] Add constant folding combine for FMV_X_ANYEXTW/H. (#106653)


  Commit: c25293c6dd9a71b4655d1d6497ab8576c15e446e
      https://github.com/llvm/llvm-project/commit/c25293c6dd9a71b4655d1d6497ab8576c15e446e
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfabs-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfneg-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vcopysign-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfabs-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfneg-vp.ll

  Log Message:
  -----------
  [LegalizeVectorOps][RISCV] Don't promote VP_FABS/FNEG/FCOPYSIGN. (#106659)

Promoting canonicalizes NaNs which changes the semantics. Bitcast to
integer and use logic ops instead.


  Commit: 5b3ba438dfa7815bb0f3be07a300866085a431b9
      https://github.com/llvm/llvm-project/commit/5b3ba438dfa7815bb0f3be07a300866085a431b9
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Utils/LoopUtils.cpp

  Log Message:
  -----------
  Restructure createSimpleTargetReduction to match VP path [NFC]

Reduces code significantly, but more importantly makes it obvious that
this variant matches the VP variant just below.


  Commit: 9aa25b8c15c99d8e717121837a2559801e311e2d
      https://github.com/llvm/llvm-project/commit/9aa25b8c15c99d8e717121837a2559801e311e2d
  Author: Walter Erquinigo <a20012251 at gmail.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
    M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFProperties.td

  Log Message:
  -----------
  [LLDB][DWARF] Add an option to silence unsupported DW_FORM warnings (#106609)

My build of LLDB is all the time loading targets with a version of
libc++ that was built with gcc that uses the DW_FORM 0x1e that is not
implemented by LLVM, and I doubt it'll ever implement it. It's used for
some 128 bit encoding of numbers, which is just very weird. Because of
this, LLDB is showing some warnings all the time for my users, so I'm
adding a flag to control the enablement of this warning.


  Commit: 26f6091dc9c24bdf22390f2b9f68aacc4669ef36
      https://github.com/llvm/llvm-project/commit/26f6091dc9c24bdf22390f2b9f68aacc4669ef36
  Author: Xiang Li <python3kgae at outlook.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/include/llvm/BinaryFormat/DXContainer.h
    M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
    M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
    M llvm/lib/BinaryFormat/DXContainer.cpp
    M llvm/lib/ObjectYAML/DXContainerYAML.cpp
    M llvm/test/ObjectYAML/DXContainer/DomainMaskVectors.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-amplification.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-compute.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-domain.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-geometry.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-hull.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-mesh.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-pixel.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-vertex.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-amplification.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-compute.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-domain.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-geometry.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-hull.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-mesh.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-pixel.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-vertex.yaml

  Log Message:
  -----------
  [DirectX] Replace ResourceFlag enum with struct fields (#106617)

Remove the enum about ResourceFlag.
Add struct ResourceFlags which save the resource flags with bool fields.

This will get better yaml dump.

For #103275


  Commit: 4b553f4916180ac46c250b2625c5ee6f64b26533
      https://github.com/llvm/llvm-project/commit/4b553f4916180ac46c250b2625c5ee6f64b26533
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
    M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
    M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
    M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
    M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
    M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
    M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-insertelement.ll
    M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss.ll

  Log Message:
  -----------
  Regen a bunch of vectorizer tests to avoid naming churn in upcoming review


  Commit: 5af4ba2684b9b59de3bf8135f62e05ab68cfc489
      https://github.com/llvm/llvm-project/commit/5af4ba2684b9b59de3bf8135f62e05ab68cfc489
  Author: Harini0924 <harinidonthula at google.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    R llvm/utils/lit/tests/Inputs/shtest-glob/example_file1.input
    R llvm/utils/lit/tests/Inputs/shtest-glob/example_file2.input
    R llvm/utils/lit/tests/Inputs/shtest-glob/glob-echo.txt
    R llvm/utils/lit/tests/Inputs/shtest-glob/glob-mkdir.txt
    R llvm/utils/lit/tests/Inputs/shtest-glob/lit.cfg
    R llvm/utils/lit/tests/shtest-glob.py

  Log Message:
  -----------
  Revert "[llvm-lit] Add precommit test to verify current behavior of glob expansion in lit's internal shell" (#106763)

Reverts llvm/llvm-project#106325
Broke some Buildbots.


  Commit: 5500e21942f7047344b6fee62d3e08c0ba2f9182
      https://github.com/llvm/llvm-project/commit/5500e21942f7047344b6fee62d3e08c0ba2f9182
  Author: Walter Erquinigo <a20012251 at gmail.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
    M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFProperties.td

  Log Message:
  -----------
  Revert "[LLDB][DWARF] Add an option to silence unsupported DW_FORM warnings" (#106765)

Reverts llvm/llvm-project#106609


  Commit: a4aa6bc8fc2130761b8db5db4748059127662785
      https://github.com/llvm/llvm-project/commit/a4aa6bc8fc2130761b8db5db4748059127662785
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    A llvm/test/Transforms/SLPVectorizer/X86/multi-nodes-bv-vectorized.ll

  Log Message:
  -----------
  [SLP]Fix PR106667: carefully look for operand nodes.

If the operand node has the same scalars as one of the vectorized nodes,
the compiler could miss this and incorrectly request minbitwidth data
for the wrong node. It may lead to a compiler crash, because the
  vectorized node might have different minbw result.

Fixes https://github.com/llvm/llvm-project/issues/106667


  Commit: 6023d17e6b6624913b85fe9d2b5d79ae681e5764
      https://github.com/llvm/llvm-project/commit/6023d17e6b6624913b85fe9d2b5d79ae681e5764
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

  Log Message:
  -----------
  [SLP][NFC]Add a function description, NFC.


  Commit: ef7b18a53c0d186dcda1e322be6035407fdedb55
      https://github.com/llvm/llvm-project/commit/ef7b18a53c0d186dcda1e322be6035407fdedb55
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp

  Log Message:
  -----------
  [X86] Rename trailing whitespace. NFC.

Noticed in clang-formatting of #106750


  Commit: d0d0e125a66b7c7921ad82c13c893bf592f071ba
      https://github.com/llvm/llvm-project/commit/d0d0e125a66b7c7921ad82c13c893bf592f071ba
  Author: Marina Taylor <marina_taylor at apple.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

  Log Message:
  -----------
  [AArch64] Fix a presumed typo in isFPImmLegal limit. NFC (#106716)

The worst possible case for a double literal goes like:

```
  mov ...
  movk ..., lsl #16
  movk ..., lsl #32
  movk ..., lsl #48
  fmov ...
```

The limit of 5 in the code gives the impression that `Insn` includes all
instructions including the `fmov`, but that's not true. It only counts
the integer moves. This led me astray on some other work in this area.


  Commit: 0efa38699a4988793cdd51426fe27f00b5e5ce37
      https://github.com/llvm/llvm-project/commit/0efa38699a4988793cdd51426fe27f00b5e5ce37
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-08-31 (Sat, 31 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
    A llvm/test/CodeGen/RISCV/rvv/reduce-vl-peephole.ll
    A llvm/test/CodeGen/RISCV/rvv/reduce-vl-peephole.mir

  Log Message:
  -----------
  [RISCV] Check VL dominates and potentially move in tryReduceVL (#106753)

Similar to what we do in foldVMV_V_V with the passthru, if we end up
changing the Src's VL in tryReduceVL we need to make sure it dominates.

Fixes #106735


  Commit: 130eddf7a13f15c9c48b7fa7faf60e9bbee4f703
      https://github.com/llvm/llvm-project/commit/130eddf7a13f15c9c48b7fa7faf60e9bbee4f703
  Author: Jonas Devlieghere <jonas at devlieghere.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M lldb/include/lldb/Core/SourceManager.h
    M lldb/source/API/SBSourceManager.cpp
    M lldb/source/Breakpoint/BreakpointResolverFileRegex.cpp
    M lldb/source/Commands/CommandObjectBreakpoint.cpp
    M lldb/source/Commands/CommandObjectSource.cpp
    M lldb/source/Core/Disassembler.cpp
    M lldb/source/Core/IOHandlerCursesGUI.cpp
    M lldb/source/Core/SourceManager.cpp
    M lldb/source/Expression/REPL.cpp
    M lldb/source/Target/StackFrame.cpp
    M lldb/source/Target/StackFrameList.cpp

  Log Message:
  -----------
  [lldb] Deal with SupportFiles in SourceManager (NFC) (#106740)

To support detecting MD5 checksum mismatches, deal with SupportFiles
rather than a plain FileSpecs in the SourceManager.


  Commit: 2c7e1b8893061fdf487f2d9945d2d1eecd59a604
      https://github.com/llvm/llvm-project/commit/2c7e1b8893061fdf487f2d9945d2d1eecd59a604
  Author: vporpo <vporpodas at google.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/include/llvm/SandboxIR/SandboxIR.h
    M llvm/include/llvm/SandboxIR/SandboxIRValues.def
    M llvm/include/llvm/SandboxIR/Type.h
    M llvm/lib/SandboxIR/SandboxIR.cpp
    M llvm/unittests/SandboxIR/SandboxIRTest.cpp

  Log Message:
  -----------
  [SandboxIR] Implement ConstantFP (#106648)

This patch implements sandboxir::ConstantFP mirroring llvm::ConstantFP.


  Commit: 07178981246c56e8beafe7fe49f0f442436f08c4
      https://github.com/llvm/llvm-project/commit/07178981246c56e8beafe7fe49f0f442436f08c4
  Author: rjmansfield <rjmansfield at users.noreply.github.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
    M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

  Log Message:
  -----------
  Fix cl::desc typos in aarch64-enable-dead-defs and arm-implicit-it. (#106712)


  Commit: c49770c60f26e449379447109f7d915bd8de0384
      https://github.com/llvm/llvm-project/commit/c49770c60f26e449379447109f7d915bd8de0384
  Author: Nicolas van Kempen <nvankemp at gmail.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M clang-tools-extra/clang-tidy/tool/run-clang-tidy.py
    M clang/docs/tools/generate_formatted_state.py
    M clang/tools/scan-view/share/startfile.py
    M clang/utils/creduce-clang-crash.py
    M lldb/bindings/interface/SBErrorDocstrings.i
    M lldb/packages/Python/lldbsuite/test/decorators.py
    M lldb/packages/Python/lldbsuite/test/lldbtest.py
    M llvm/utils/UpdateTestChecks/common.py
    M llvm/utils/git/pre-push.py
    M llvm/utils/gn/gn.py

  Log Message:
  -----------
  [NFC] Prefer subprocess.DEVNULL over os.devnull (#106500)

There is no need to support Python 2.7 anymore, Python 3.3+ has
`subprocess.DEVNULL`. This is good practice and also prevents file
handles from
staying open unnecessarily.

Also remove a couple unused or unneeded `__future__` imports.


  Commit: 079746d2c0804ddf616766eb525270d9c57ab542
      https://github.com/llvm/llvm-project/commit/079746d2c0804ddf616766eb525270d9c57ab542
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
    M llvm/test/Transforms/SLPVectorizer/X86/remark-masked-loads-consecutive-loads-same-ptr.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reorder-possible-strided-node.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather2.ll

  Log Message:
  -----------
  [SLP]Better cost estimation for masked gather or "clustered" loads.

After landing support for actual vectorization of the "clustered" loads,
need better estimate the cost between the masked gather and clustered loads.
This includes estimation of the address calculation and better
estimation of the gathered loads. Also, this estimation now relies on
SLPCostThreshold option, allowing modify the behavior of the compiler.

Reviewers: RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/105858


  Commit: 8a267b721180b172e329601039a7e170fa8aa5b5
      https://github.com/llvm/llvm-project/commit/8a267b721180b172e329601039a7e170fa8aa5b5
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

  Log Message:
  -----------
  [SLP][NFC]Remove unused variable


  Commit: a5d18bb9561fb6f72fe2858cb61ef4555ee3cdfa
      https://github.com/llvm/llvm-project/commit/a5d18bb9561fb6f72fe2858cb61ef4555ee3cdfa
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-30 (Fri, 30 Aug 2024)

  Changed paths:
    M .github/workflows/pr-code-format.yml
    M .github/workflows/release-binaries.yml
    M .github/workflows/release-doxygen.yml
    M .github/workflows/release-lit.yml
    M .github/workflows/release-sources.yml
    M .github/workflows/release-tasks.yml
    M clang-tools-extra/clang-tidy/tool/run-clang-tidy.py
    M clang-tools-extra/clangd/CollectMacros.cpp
    M clang-tools-extra/clangd/CollectMacros.h
    M clang-tools-extra/clangd/ModulesBuilder.cpp
    M clang-tools-extra/clangd/ParsedAST.cpp
    M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
    M clang-tools-extra/docs/clang-tidy/Contributing.rst
    M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
    M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
    M clang/cmake/caches/Release.cmake
    M clang/docs/ReleaseNotes.rst
    M clang/docs/tools/generate_formatted_state.py
    M clang/include/clang-c/Index.h
    M clang/include/clang/AST/ASTContext.h
    M clang/include/clang/AST/ASTNodeTraverser.h
    M clang/include/clang/AST/Decl.h
    M clang/include/clang/AST/RecursiveASTVisitor.h
    M clang/include/clang/AST/Type.h
    M clang/include/clang/AST/TypeLoc.h
    M clang/include/clang/AST/TypeProperties.td
    M clang/include/clang/Basic/Builtins.td
    M clang/include/clang/Basic/BuiltinsWebAssembly.def
    M clang/include/clang/Basic/TypeNodes.td
    M clang/include/clang/Basic/riscv_vector.td
    M clang/include/clang/CodeGen/CodeGenAction.h
    M clang/include/clang/ExtractAPI/API.h
    M clang/include/clang/Frontend/FrontendActions.h
    M clang/include/clang/Sema/ExternalSemaSource.h
    M clang/include/clang/Sema/MultiplexExternalSemaSource.h
    M clang/include/clang/Sema/Sema.h
    M clang/include/clang/Sema/SemaHLSL.h
    M clang/include/clang/Serialization/ASTReader.h
    M clang/include/clang/Serialization/ASTWriter.h
    M clang/include/clang/Serialization/ModuleFile.h
    M clang/include/clang/Serialization/TypeBitCodes.def
    M clang/lib/AST/ASTContext.cpp
    M clang/lib/AST/ASTImporter.cpp
    M clang/lib/AST/ASTStructuralEquivalence.cpp
    M clang/lib/AST/ByteCode/Compiler.cpp
    M clang/lib/AST/ByteCode/Compiler.h
    M clang/lib/AST/ByteCode/Interp.cpp
    M clang/lib/AST/ByteCode/Interp.h
    M clang/lib/AST/ByteCode/InterpBlock.cpp
    M clang/lib/AST/ByteCode/Pointer.h
    M clang/lib/AST/ExprConstant.cpp
    M clang/lib/AST/ItaniumMangle.cpp
    M clang/lib/AST/TypeLoc.cpp
    M clang/lib/AST/TypePrinter.cpp
    M clang/lib/Basic/SourceManager.cpp
    M clang/lib/Basic/Targets/DirectX.h
    M clang/lib/CodeGen/BackendUtil.cpp
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/lib/CodeGen/CGDebugInfo.cpp
    M clang/lib/CodeGen/CodeGenAction.cpp
    M clang/lib/CodeGen/CodeGenFunction.cpp
    M clang/lib/Driver/ToolChain.cpp
    M clang/lib/ExtractAPI/API.cpp
    M clang/lib/Format/ContinuationIndenter.cpp
    M clang/lib/Format/FormatToken.h
    M clang/lib/Format/TokenAnnotator.cpp
    M clang/lib/Format/UnwrappedLineParser.cpp
    M clang/lib/Frontend/FrontendActions.cpp
    M clang/lib/Headers/wasm_simd128.h
    M clang/lib/Parse/ParseOpenMP.cpp
    M clang/lib/Sema/MultiplexExternalSemaSource.cpp
    M clang/lib/Sema/SemaARM.cpp
    M clang/lib/Sema/SemaCast.cpp
    M clang/lib/Sema/SemaChecking.cpp
    M clang/lib/Sema/SemaDecl.cpp
    M clang/lib/Sema/SemaDeclCXX.cpp
    M clang/lib/Sema/SemaExpr.cpp
    M clang/lib/Sema/SemaExprCXX.cpp
    M clang/lib/Sema/SemaHLSL.cpp
    M clang/lib/Sema/SemaInit.cpp
    M clang/lib/Sema/SemaOpenMP.cpp
    M clang/lib/Sema/SemaOverload.cpp
    M clang/lib/Sema/SemaPseudoObject.cpp
    M clang/lib/Sema/SemaStmt.cpp
    M clang/lib/Sema/SemaType.cpp
    M clang/lib/Sema/TreeTransform.h
    M clang/lib/Serialization/ASTReader.cpp
    M clang/lib/Serialization/ASTReaderDecl.cpp
    M clang/lib/Serialization/ASTWriter.cpp
    M clang/lib/StaticAnalyzer/Checkers/CheckPlacementNew.cpp
    M clang/lib/StaticAnalyzer/Checkers/StackAddrEscapeChecker.cpp
    M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
    A clang/test/AST/ByteCode/constexpr-vectors.cpp
    A clang/test/AST/ByteCode/cxx11-pedantic.cpp
    M clang/test/AST/ByteCode/new-delete.cpp
    M clang/test/AST/ByteCode/unions.cpp
    M clang/test/Analysis/stack-addr-ps.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdm.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesef.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesem.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaeskf1.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaeskf2.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vandn.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vbrev.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vbrev8.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vclmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vclmulh.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vclz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcpopv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vctz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vghsh.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vgmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrev8.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrol.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vror.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsha2ch.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsha2cl.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsha2ms.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm3c.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm3me.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm4k.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm4r.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwsll.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesdf.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesdm.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesef.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesem.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaeskf1.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaeskf2.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vandn.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vbrev.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vbrev8.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vclmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vclmulh.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vclz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vcpopv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vctz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vghsh.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vgmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vrev8.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vrol.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vror.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsha2ch.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsha2cl.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsha2ms.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsm3c.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsm3me.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsm4k.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsm4r.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vwsll.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesdf.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesdm.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesef.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesem.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaeskf1.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaeskf2.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vandn.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vbrev.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vbrev8.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vclmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vclmulh.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vclz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vcpopv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vctz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vghsh.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vgmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrev8.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrol.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vror.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsha2ch.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsha2cl.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsha2ms.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsm3c.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsm3me.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsm4k.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsm4r.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwsll.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesdf.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesdm.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesef.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesem.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaeskf1.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaeskf2.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vandn.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vbrev.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vbrev8.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vclmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vclmulh.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vclz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vcpopv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vctz.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vghsh.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vgmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vrev8.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vrol.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vror.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsha2ch.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsha2cl.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsha2ms.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsm3c.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsm3me.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsm4k.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsm4r.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vwsll.c
    M clang/test/CodeGen/aarch64-targetattr.c
    M clang/test/CodeGen/compound-literal.c
    A clang/test/CodeGenCXX/GH106182.cpp
    M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
    M clang/test/CodeGenHLSL/builtins/all.hlsl
    M clang/test/CodeGenHLSL/builtins/any.hlsl
    M clang/test/CodeGenHLSL/builtins/frac.hlsl
    M clang/test/CodeGenHLSL/builtins/lerp.hlsl
    M clang/test/CodeGenHLSL/builtins/normalize.hlsl
    M clang/test/CodeGenHLSL/builtins/rsqrt.hlsl
    A clang/test/CodeGenHLSL/implicit-norecurse-attrib.hlsl
    M clang/test/CodeGenHLSL/semantics/DispatchThreadID.hlsl
    A clang/test/CodeGenHLSL/static-local-ctor.hlsl
    M clang/test/CodeGenHLSL/this-assignment-overload.hlsl
    M clang/test/CodeGenHLSL/this-assignment.hlsl
    M clang/test/Driver/print-multi-selection-flags.c
    M clang/test/Headers/__clang_hip_math.hip
    A clang/test/Modules/compare-file-size.py
    M clang/test/Modules/no-local-decl-in-reduced-bmi.cppm
    A clang/test/Modules/pr102721.cppm
    A clang/test/Modules/pr106483.cppm
    M clang/test/Modules/reduced-bmi-empty-module-purview-std.cppm
    M clang/test/Modules/reduced-bmi-empty-module-purview.cppm
    M clang/test/Modules/reduced-bmi-size.cppm
    A clang/test/Modules/skip-func-def-odr-with-pch.cppm
    M clang/test/Modules/unreached-static-entities.cppm
    A clang/test/SemaCXX/GH106182.cpp
    M clang/test/SemaCXX/builtins.cpp
    M clang/test/SemaCXX/vector.cpp
    M clang/test/SemaTemplate/default-arguments.cpp
    R clang/test/SemaTemplate/default-parm-init.cpp
    M clang/test/SemaTemplate/temp_arg_nontype.cpp
    M clang/tools/clang-repl/CMakeLists.txt
    M clang/tools/libclang/CIndex.cpp
    M clang/tools/libclang/CXType.cpp
    M clang/tools/scan-build-py/CMakeLists.txt
    M clang/tools/scan-view/share/startfile.py
    M clang/unittests/Basic/SourceManagerTest.cpp
    M clang/unittests/Format/TokenAnnotatorTest.cpp
    M clang/utils/creduce-clang-crash.py
    M compiler-rt/lib/builtins/CMakeLists.txt
    M compiler-rt/lib/builtins/aarch64/sme-abi-init.c
    M compiler-rt/lib/builtins/cpu_model/riscv.c
    M compiler-rt/lib/interception/interception.h
    M compiler-rt/lib/interception/interception_type_test.cpp
    M compiler-rt/lib/rtsan/rtsan.cpp
    M compiler-rt/lib/rtsan/rtsan.h
    M compiler-rt/lib/rtsan/tests/rtsan_test_functional.cpp
    M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors.cpp
    M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
    M compiler-rt/test/lsan/TestCases/create_thread_leak.cpp
    M compiler-rt/test/nsan/vec_sqrt.cpp
    M cross-project-tests/intrinsic-header-tests/wasm_simd128.c
    A flang/include/flang/Lower/Cuda.h
    M flang/include/flang/Optimizer/Dialect/FIROps.td
    M flang/include/flang/Tools/TargetSetup.h
    M flang/lib/Evaluate/intrinsics-library.cpp
    M flang/lib/Frontend/FrontendActions.cpp
    M flang/lib/Lower/Allocatable.cpp
    M flang/lib/Lower/Bridge.cpp
    M flang/lib/Lower/OpenACC.cpp
    M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
    M flang/lib/Lower/OpenMP/DataSharingProcessor.h
    M flang/lib/Lower/OpenMP/OpenMP.cpp
    M flang/lib/Optimizer/Dialect/FIROps.cpp
    M flang/lib/Semantics/canonicalize-acc.cpp
    M flang/lib/Semantics/canonicalize-directives.cpp
    M flang/lib/Semantics/check-acc-structure.cpp
    M flang/lib/Semantics/check-directive-structure.h
    M flang/module/ieee_arithmetic.f90
    M flang/test/CMakeLists.txt
    A flang/test/Driver/print-pipeline-passes.f90
    M flang/test/Evaluate/fold-out_of_range.f90
    M flang/test/Evaluate/folding07.f90
    M flang/test/Fir/convert.fir
    M flang/test/HLFIR/assumed_shape_with_value_keyword.f90
    M flang/test/Lower/CUDA/cuda-allocatable.cuf
    M flang/test/Lower/CUDA/cuda-data-transfer.cuf
    M flang/test/Lower/HLFIR/select-rank.f90
    M flang/test/Lower/Intrinsics/ieee_class_queries.f90
    M flang/test/Lower/Intrinsics/ieee_unordered.f90
    M flang/test/Lower/Intrinsics/system_clock.f90
    A flang/test/Lower/OpenACC/acc-loop-and-cpu-dir.f90
    A flang/test/Lower/OpenACC/acc-shortloop-ignore.f90
    A flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
    A flang/test/Lower/OpenMP/distribute-parallel-do.f90
    M flang/test/Lower/OpenMP/if-clause.f90
    M flang/test/Lower/OpenMP/loop-compound.f90
    M flang/test/Lower/OpenMP/master.f90
    M flang/test/Lower/OpenMP/parallel-reduction3.f90
    M flang/test/Lower/OpenMP/unstructured.f90
    M flang/test/Lower/OpenMP/wsloop-reduction-array-assumed-shape.f90
    M flang/test/Lower/OpenMP/wsloop-reduction-array.f90
    M flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
    M flang/test/Lower/OpenMP/wsloop-reduction-max-byref.f90
    M flang/test/Lower/OpenMP/wsloop-reduction-max.f90
    M flang/test/Lower/OpenMP/wsloop-reduction-min-byref.f90
    M flang/test/Lower/OpenMP/wsloop-reduction-min.f90
    M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
    M flang/test/Lower/OpenMP/wsloop-variable.f90
    M flang/test/Lower/common-block.f90
    M flang/test/Semantics/OpenACC/acc-routine-validity.f90
    M flang/test/Semantics/kinds03.f90
    M flang/test/Semantics/loop-directives.f90
    M flang/test/Semantics/modfile26.f90
    M flang/test/Semantics/realkinds-aarch64-01.f90
    M flang/test/lit.cfg.py
    M flang/test/lit.site.cfg.py.in
    M flang/tools/f18/CMakeLists.txt
    M flang/unittests/Runtime/CommandTest.cpp
    M libc/config/gpu/entrypoints.txt
    M libc/config/linux/x86_64/entrypoints.txt
    M libc/include/llvm-libc-macros/stdlib-macros.h
    M libc/include/stdlib.h.def
    M libc/include/string.h.def
    M libc/newhdrgen/yaml/stdlib.yaml
    M libc/newhdrgen/yaml/string.yaml
    M libc/spec/stdc.td
    M libc/src/stdlib/CMakeLists.txt
    A libc/src/stdlib/strtod_l.cpp
    A libc/src/stdlib/strtod_l.h
    A libc/src/stdlib/strtof_l.cpp
    A libc/src/stdlib/strtof_l.h
    A libc/src/stdlib/strtol_l.cpp
    A libc/src/stdlib/strtol_l.h
    A libc/src/stdlib/strtold_l.cpp
    A libc/src/stdlib/strtold_l.h
    A libc/src/stdlib/strtoll_l.cpp
    A libc/src/stdlib/strtoll_l.h
    A libc/src/stdlib/strtoul_l.cpp
    A libc/src/stdlib/strtoul_l.h
    A libc/src/stdlib/strtoull_l.cpp
    A libc/src/stdlib/strtoull_l.h
    M libc/src/string/CMakeLists.txt
    M libc/src/string/memory_utils/x86_64/inline_memcpy.h
    A libc/src/string/strcoll_l.cpp
    A libc/src/string/strcoll_l.h
    A libc/src/string/strxfrm_l.cpp
    A libc/src/string/strxfrm_l.h
    M libc/test/src/math/performance_testing/BinaryOpSingleOutputPerf.h
    M libc/test/src/math/performance_testing/CMakeLists.txt
    M libc/test/src/math/performance_testing/fmod_perf.cpp
    M libc/test/src/math/performance_testing/fmodf16_perf.cpp
    M libc/test/src/math/performance_testing/fmodf_perf.cpp
    A libc/test/src/math/performance_testing/fmul_perf.cpp
    A libc/test/src/math/performance_testing/fmull_perf.cpp
    M libc/test/src/math/performance_testing/hypot_perf.cpp
    M libc/test/src/math/performance_testing/hypotf_perf.cpp
    M libc/test/src/math/performance_testing/max_min_funcs_perf.cpp
    M libc/test/src/math/performance_testing/misc_basic_ops_perf.cpp
    M libcxx/docs/Status/Cxx20Issues.csv
    M libcxx/include/__chrono/leap_second.h
    M libcxx/include/__chrono/parser_std_format_spec.h
    M libcxx/include/__chrono/statically_widen.h
    M libcxx/include/__chrono/time_zone_link.h
    M libcxx/include/__expected/expected.h
    M libcxx/include/__format/buffer.h
    M libcxx/include/__format/concepts.h
    M libcxx/include/__format/container_adaptor.h
    M libcxx/include/__format/enable_insertable.h
    M libcxx/include/__format/escaped_output_table.h
    M libcxx/include/__format/extended_grapheme_cluster_table.h
    M libcxx/include/__format/format_arg.h
    M libcxx/include/__format/format_arg_store.h
    M libcxx/include/__format/format_args.h
    M libcxx/include/__format/format_context.h
    M libcxx/include/__format/format_error.h
    M libcxx/include/__format/format_functions.h
    M libcxx/include/__format/format_parse_context.h
    M libcxx/include/__format/format_string.h
    M libcxx/include/__format/format_to_n_result.h
    M libcxx/include/__format/formatter_bool.h
    M libcxx/include/__format/formatter_char.h
    M libcxx/include/__format/formatter_floating_point.h
    M libcxx/include/__format/formatter_integer.h
    M libcxx/include/__format/formatter_integral.h
    M libcxx/include/__format/formatter_output.h
    M libcxx/include/__format/formatter_pointer.h
    M libcxx/include/__format/formatter_string.h
    M libcxx/include/__format/formatter_tuple.h
    M libcxx/include/__format/indic_conjunct_break_table.h
    M libcxx/include/__format/parser_std_format_spec.h
    M libcxx/include/__format/range_default_formatter.h
    M libcxx/include/__format/range_formatter.h
    M libcxx/include/__format/unicode.h
    M libcxx/include/__format/width_estimation_table.h
    M libcxx/include/__fwd/format.h
    M libcxx/include/__memory/allocator.h
    M libcxx/include/__type_traits/is_member_pointer.h
    M libcxx/include/__type_traits/is_void.h
    M libcxx/include/__type_traits/make_unsigned.h
    M libcxx/include/array
    M libcxx/include/cmath
    M libcxx/include/complex
    M libcxx/include/forward_list
    M libcxx/include/iosfwd
    M libcxx/include/istream
    M libcxx/include/list
    M libcxx/include/set
    M libcxx/include/string
    M libcxx/include/syncstream
    M libcxx/include/tuple
    M libcxx/include/vector
    M libcxx/modules/std/format.inc
    M libcxx/src/include/refstring.h
    M libcxx/test/libcxx/numerics/c.math/constexpr-fns.pass.cpp
    M libcxx/test/libcxx/type_traits/is_specialization.verify.cpp
    M libcxx/test/std/input.output/syncstream/syncbuf/syncstream.syncbuf.cons/cons.default.pass.cpp
    M libcxx/test/std/language.support/cmp/cmp.alg/strong_order_long_double.verify.cpp
    M libcxx/test/std/numerics/bit/bit.cast/bit_cast.pass.cpp
    M libcxx/test/support/test_macros.h
    M libcxx/utils/generate_escaped_output_table.py
    M libcxx/utils/generate_extended_grapheme_cluster_table.py
    M libcxx/utils/generate_indic_conjunct_break_table.py
    M libcxx/utils/generate_width_estimation_table.py
    M lld/COFF/Chunks.cpp
    M lld/COFF/Chunks.h
    M lld/COFF/Writer.cpp
    A lld/test/COFF/arm64ec-range-thunks.s
    M lld/test/ELF/avr-reloc.s
    M lldb/bindings/interface/SBErrorDocstrings.i
    M lldb/include/lldb/Core/SourceManager.h
    M lldb/include/lldb/Target/ThreadPlan.h
    M lldb/include/lldb/Target/ThreadPlanStepOverBreakpoint.h
    M lldb/include/lldb/Utility/ArchSpec.h
    M lldb/include/lldb/Utility/SupportFile.h
    M lldb/packages/Python/lldbsuite/test/decorators.py
    M lldb/packages/Python/lldbsuite/test/lldbtest.py
    M lldb/source/API/SBSourceManager.cpp
    M lldb/source/Breakpoint/BreakpointResolverFileRegex.cpp
    M lldb/source/Commands/CommandObjectBreakpoint.cpp
    M lldb/source/Commands/CommandObjectSource.cpp
    M lldb/source/Core/Disassembler.cpp
    M lldb/source/Core/IOHandlerCursesGUI.cpp
    M lldb/source/Core/SourceManager.cpp
    M lldb/source/Expression/REPL.cpp
    M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
    M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
    M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
    M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
    M lldb/source/Target/StackFrame.cpp
    M lldb/source/Target/StackFrameList.cpp
    M lldb/source/Target/ThreadPlanSingleThreadTimeout.cpp
    M lldb/source/Target/ThreadPlanStepOverBreakpoint.cpp
    M lldb/source/Utility/ArchSpec.cpp
    M lldb/test/API/functionalities/process_save_core_minidump/TestProcessSaveCoreMinidump.py
    M lldb/test/API/tools/lldb-dap/console/TestDAP_console.py
    M lldb/test/API/tools/lldb-dap/console/TestDAP_redirection_to_console.py
    M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
    M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
    M lldb/test/API/tools/lldb-dap/launch/main.c
    A lldb/test/Shell/Process/elf-core/aarch64-no-NT_ARM_TLS.yaml
    A lldb/test/Shell/Process/elf-core/lit.local.cfg
    M lldb/unittests/Core/SourceManagerTest.cpp
    M llvm/benchmarks/CMakeLists.txt
    A llvm/benchmarks/FormatVariadicBM.cpp
    M llvm/docs/CodeOfConduct.rst
    M llvm/docs/CommandGuide/llvm-profdata.rst
    M llvm/docs/LangRef.rst
    M llvm/docs/Security.rst
    M llvm/docs/TestSuiteGuide.md
    M llvm/include/llvm/ADT/ConcurrentHashtable.h
    M llvm/include/llvm/Analysis/FunctionPropertiesAnalysis.h
    M llvm/include/llvm/Analysis/PtrUseVisitor.h
    M llvm/include/llvm/BinaryFormat/DXContainer.h
    M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
    M llvm/include/llvm/Bitcode/LLVMBitCodes.h
    M llvm/include/llvm/CodeGen/ISDOpcodes.h
    M llvm/include/llvm/CodeGen/MachineInstr.h
    M llvm/include/llvm/CodeGen/Passes.h
    M llvm/include/llvm/CodeGen/SelectionDAGISel.h
    M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/ExecutorSharedMemoryMapperService.h
    M llvm/include/llvm/Frontend/OpenACC/ACC.td
    M llvm/include/llvm/IR/Attributes.td
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/include/llvm/IR/VPIntrinsics.def
    M llvm/include/llvm/InitializePasses.h
    M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
    M llvm/include/llvm/Passes/MachinePassRegistry.def
    M llvm/include/llvm/ProfileData/SampleProfReader.h
    M llvm/include/llvm/ProfileData/SampleProfWriter.h
    M llvm/include/llvm/SandboxIR/SandboxIR.h
    M llvm/include/llvm/SandboxIR/SandboxIRValues.def
    A llvm/include/llvm/SandboxIR/Type.h
    M llvm/include/llvm/Support/FormatVariadic.h
    M llvm/include/llvm/Support/TargetOpcodes.def
    M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
    M llvm/include/llvm/Target/Target.td
    M llvm/include/llvm/Target/TargetSelectionDAG.td
    M llvm/include/llvm/Transforms/IPO/Attributor.h
    M llvm/include/llvm/Transforms/IPO/FunctionImport.h
    M llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
    M llvm/include/llvm/Transforms/Utils/SimplifyCFGOptions.h
    M llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp
    M llvm/lib/Analysis/IVDescriptors.cpp
    M llvm/lib/Analysis/MLInlineAdvisor.cpp
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/lib/Analysis/VectorUtils.cpp
    M llvm/lib/BinaryFormat/DXContainer.cpp
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
    M llvm/lib/CodeGen/Analysis.cpp
    M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
    M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
    M llvm/lib/CodeGen/AtomicExpandPass.cpp
    M llvm/lib/CodeGen/CMakeLists.txt
    M llvm/lib/CodeGen/CodeGen.cpp
    M llvm/lib/CodeGen/CodeGenPrepare.cpp
    M llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
    M llvm/lib/CodeGen/EdgeBundles.cpp
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/GlobalISel/Utils.cpp
    M llvm/lib/CodeGen/MachineCSE.cpp
    M llvm/lib/CodeGen/MachineConvergenceVerifier.cpp
    M llvm/lib/CodeGen/MachineInstr.cpp
    M llvm/lib/CodeGen/MachineLoopInfo.cpp
    M llvm/lib/CodeGen/MachineScheduler.cpp
    M llvm/lib/CodeGen/MachineSink.cpp
    M llvm/lib/CodeGen/MachineVerifier.cpp
    M llvm/lib/CodeGen/RegAllocFast.cpp
    A llvm/lib/CodeGen/RemoveLoadsIntoFakeUses.cpp
    M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/lib/CodeGen/TargetPassConfig.cpp
    M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
    M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
    M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
    M llvm/lib/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp
    M llvm/lib/ExecutionEngine/Orc/TargetProcess/ExecutorSharedMemoryMapperService.cpp
    M llvm/lib/ExecutionEngine/Orc/TaskDispatch.cpp
    M llvm/lib/IR/BasicBlock.cpp
    M llvm/lib/IR/Instruction.cpp
    M llvm/lib/IR/IntrinsicInst.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/ObjectYAML/DXContainerYAML.cpp
    M llvm/lib/Passes/PassBuilder.cpp
    M llvm/lib/Passes/PassBuilderPipelines.cpp
    M llvm/lib/ProfileData/SampleProfReader.cpp
    M llvm/lib/ProfileData/SampleProfWriter.cpp
    M llvm/lib/SandboxIR/CMakeLists.txt
    M llvm/lib/SandboxIR/SandboxIR.cpp
    A llvm/lib/SandboxIR/Type.cpp
    M llvm/lib/Support/BalancedPartitioning.cpp
    M llvm/lib/Support/ErrorHandling.cpp
    M llvm/lib/Support/FormatVariadic.cpp
    M llvm/lib/Support/LockFileManager.cpp
    M llvm/lib/Support/ModRef.cpp
    M llvm/lib/Support/RWMutex.cpp
    M llvm/lib/Support/Unix/Process.inc
    M llvm/lib/Support/Z3Solver.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64Processors.td
    M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
    M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
    M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
    A llvm/lib/Target/AMDGPU/GCNDPPCombine.h
    M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
    A llvm/lib/Target/AMDGPU/SIFoldOperands.h
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
    M llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
    M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
    M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
    M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
    M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
    M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
    M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMatInt.cpp
    M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMatInt.h
    M llvm/lib/Target/NVPTX/NVPTXAliasAnalysis.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
    M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
    M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrFormats.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
    M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
    M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
    M llvm/lib/Target/Sparc/SparcInstrAliases.td
    M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
    M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
    M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
    M llvm/lib/Target/X86/MCTargetDesc/X86MCExpr.h
    M llvm/lib/Target/X86/X86FloatingPoint.cpp
    M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
    M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
    M llvm/lib/Transforms/IPO/FunctionImport.cpp
    M llvm/lib/Transforms/IPO/SCCP.cpp
    M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
    M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
    M llvm/lib/Transforms/Scalar/LICM.cpp
    M llvm/lib/Transforms/Scalar/SROA.cpp
    M llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp
    M llvm/lib/Transforms/Utils/CloneFunction.cpp
    M llvm/lib/Transforms/Utils/CodeExtractor.cpp
    M llvm/lib/Transforms/Utils/Local.cpp
    M llvm/lib/Transforms/Utils/LoopUtils.cpp
    M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
    M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
    M llvm/lib/Transforms/Utils/SCCPSolver.cpp
    M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    A llvm/test/Analysis/CostModel/RISCV/cast-half.ll
    M llvm/test/Analysis/CostModel/RISCV/cast.ll
    M llvm/test/Analysis/CostModel/RISCV/fixed-vector-gather.ll
    M llvm/test/Analysis/CostModel/RISCV/fixed-vector-scatter.ll
    M llvm/test/Analysis/CostModel/RISCV/rvv-extractelement.ll
    M llvm/test/Analysis/CostModel/RISCV/rvv-insertelement.ll
    M llvm/test/Analysis/CostModel/RISCV/scalable-gather.ll
    M llvm/test/Analysis/CostModel/RISCV/scalable-scatter.ll
    M llvm/test/Analysis/CostModel/X86/icmp-codesize.ll
    M llvm/test/Analysis/CostModel/X86/icmp-latency.ll
    M llvm/test/Analysis/CostModel/X86/icmp-sizelatency.ll
    M llvm/test/Analysis/CostModel/X86/icmp.ll
    A llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
    M llvm/test/Analysis/ScalarEvolution/flags-from-poison-dbg.ll
    M llvm/test/Bitcode/attributes.ll
    M llvm/test/Bitcode/compatibility.ll
    M llvm/test/CodeGen/AArch64/O0-pipeline.ll
    M llvm/test/CodeGen/AArch64/O3-pipeline.ll
    R llvm/test/CodeGen/AArch64/atomicrmw-fadd-fp-vector.ll
    A llvm/test/CodeGen/AArch64/atomicrmw-fadd.ll
    A llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll
    A llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll
    A llvm/test/CodeGen/AArch64/atomicrmw-fsub.ll
    M llvm/test/CodeGen/AArch64/sve2-histcnt.ll
    A llvm/test/CodeGen/AMDGPU/amdgpu-attributor-accesslist-offsetbins-out-of-sync.ll
    M llvm/test/CodeGen/AMDGPU/dpp_combine.mir
    M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
    R llvm/test/CodeGen/AMDGPU/fail.llvm.fptrunc.round.ll
    M llvm/test/CodeGen/AMDGPU/fract-match.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.mir
    A llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.err.ll
    M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
    M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
    M llvm/test/CodeGen/AMDGPU/si-fold-scalar-clamp.mir
    M llvm/test/CodeGen/AMDGPU/skip-fold-regsequence.mir
    M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
    M llvm/test/CodeGen/ARM/O3-pipeline.ll
    A llvm/test/CodeGen/AVR/jmp.ll
    A llvm/test/CodeGen/AVR/ldd-immediate-overflow.ll
    A llvm/test/CodeGen/AVR/std-immediate-overflow.ll
    M llvm/test/CodeGen/LoongArch/O0-pipeline.ll
    M llvm/test/CodeGen/LoongArch/ctlz-cttz-ctpop.ll
    M llvm/test/CodeGen/LoongArch/imm.ll
    M llvm/test/CodeGen/LoongArch/ir-instruction/load-store.ll
    M llvm/test/CodeGen/LoongArch/merge-base-offset.ll
    M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
    M llvm/test/CodeGen/LoongArch/sextw-removal.ll
    A llvm/test/CodeGen/MIR/X86/fake-use-tailcall.mir
    A llvm/test/CodeGen/NVPTX/compute-ptx-value-vts.ll
    M llvm/test/CodeGen/NVPTX/nvptx-aa.ll
    A llvm/test/CodeGen/NVPTX/vector-returns.ll
    M llvm/test/CodeGen/PowerPC/O0-pipeline.ll
    M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
    M llvm/test/CodeGen/PowerPC/fma-negate.ll
    M llvm/test/CodeGen/PowerPC/fp-strict.ll
    M llvm/test/CodeGen/PowerPC/is_fpclass.ll
    M llvm/test/CodeGen/PowerPC/vec_abs.ll
    M llvm/test/CodeGen/PowerPC/vec_fneg.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/shufflevector.ll
    A llvm/test/CodeGen/RISCV/GlobalISel/scalablevec-combiner-crash.ll
    M llvm/test/CodeGen/RISCV/O0-pipeline.ll
    M llvm/test/CodeGen/RISCV/O3-pipeline.ll
    M llvm/test/CodeGen/RISCV/bfloat-arith.ll
    M llvm/test/CodeGen/RISCV/calling-conv-half.ll
    M llvm/test/CodeGen/RISCV/float-imm.ll
    M llvm/test/CodeGen/RISCV/half-arith-strict.ll
    M llvm/test/CodeGen/RISCV/half-arith.ll
    M llvm/test/CodeGen/RISCV/half-bitmanip-dagcombines.ll
    M llvm/test/CodeGen/RISCV/half-imm.ll
    M llvm/test/CodeGen/RISCV/half-intrinsics.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-reverse.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfabs-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfneg-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll
    A llvm/test/CodeGen/RISCV/rvv/pr106109.ll
    A llvm/test/CodeGen/RISCV/rvv/reduce-vl-peephole.ll
    A llvm/test/CodeGen/RISCV/rvv/reduce-vl-peephole.mir
    M llvm/test/CodeGen/RISCV/rvv/vcopysign-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfabs-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfneg-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vp-reverse-int.ll
    M llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask.ll
    M llvm/test/CodeGen/Thumb2/pr52817.ll
    M llvm/test/CodeGen/WebAssembly/half-precision.ll
    M llvm/test/CodeGen/X86/O0-pipeline.ll
    M llvm/test/CodeGen/X86/code-align-loops.ll
    A llvm/test/CodeGen/X86/fake-use-hpfloat.ll
    A llvm/test/CodeGen/X86/fake-use-ld.ll
    A llvm/test/CodeGen/X86/fake-use-scheduler.mir
    A llvm/test/CodeGen/X86/fake-use-simple-tail-call.ll
    A llvm/test/CodeGen/X86/fake-use-suppress-load.ll
    A llvm/test/CodeGen/X86/fake-use-tailcall.ll
    A llvm/test/CodeGen/X86/fake-use-vector.ll
    A llvm/test/CodeGen/X86/fake-use-vector2.ll
    A llvm/test/CodeGen/X86/fake-use-zero-length.ll
    M llvm/test/CodeGen/X86/fsafdo_test1.ll
    M llvm/test/CodeGen/X86/fsafdo_test4.ll
    A llvm/test/CodeGen/X86/inline-asm-int-to-fp.ll
    M llvm/test/CodeGen/X86/opt-pipeline.ll
    A llvm/test/DebugInfo/AArch64/fake-use-global-isel.ll
    A llvm/test/DebugInfo/Inputs/check-fake-use.py
    M llvm/test/DebugInfo/MIR/X86/empty-inline.mir
    M llvm/test/DebugInfo/X86/discriminator.ll
    A llvm/test/DebugInfo/X86/fake-use.ll
    A llvm/test/DebugInfo/X86/is_stmt-at-block-start.ll
    M llvm/test/Instrumentation/HWAddressSanitizer/stack-safety-analysis.ll
    A llvm/test/MC/AArch64/SVE/directive-arch-negative.s
    M llvm/test/MC/AArch64/SVE/directive-arch_extension-negative.s
    M llvm/test/MC/AArch64/SVE/directive-cpu-negative.s
    M llvm/test/MC/AArch64/directive-arch-negative.s
    M llvm/test/MC/AArch64/directive-arch_extension-negative.s
    M llvm/test/MC/AVR/inst-brbc.s
    M llvm/test/MC/AVR/inst-brbs.s
    A llvm/test/MC/AVR/inst-brcc.s
    A llvm/test/MC/AVR/inst-brcs.s
    A llvm/test/MC/AVR/inst-breq.s
    A llvm/test/MC/AVR/inst-brge.s
    A llvm/test/MC/AVR/inst-brhc.s
    A llvm/test/MC/AVR/inst-brhs.s
    A llvm/test/MC/AVR/inst-brid.s
    A llvm/test/MC/AVR/inst-brie.s
    A llvm/test/MC/AVR/inst-brlo.s
    A llvm/test/MC/AVR/inst-brlt.s
    A llvm/test/MC/AVR/inst-brmi.s
    A llvm/test/MC/AVR/inst-brne.s
    A llvm/test/MC/AVR/inst-brpl.s
    A llvm/test/MC/AVR/inst-brsh.s
    A llvm/test/MC/AVR/inst-brtc.s
    A llvm/test/MC/AVR/inst-brts.s
    A llvm/test/MC/AVR/inst-brvc.s
    A llvm/test/MC/AVR/inst-brvs.s
    R llvm/test/MC/AVR/inst-family-cond-branch.s
    M llvm/test/MC/AVR/inst-rcall.s
    M llvm/test/MC/AVR/inst-rjmp.s
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp8.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp8.txt
    A llvm/test/MC/Disassembler/X86/apx/evex-w-opsize.txt
    M llvm/test/MC/LoongArch/Macros/macros-li.s
    M llvm/test/MC/Sparc/sparc-misc-instructions.s
    M llvm/test/MachineVerifier/test_g_splat_vector.mir
    M llvm/test/ObjectYAML/DXContainer/DomainMaskVectors.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv0-amplification.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv0-compute.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv0-domain.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv0-geometry.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv0-hull.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv0-mesh.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv0-pixel.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv0-vertex.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv1-amplification.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv1-compute.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv1-domain.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv1-geometry.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv1-hull.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv1-mesh.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv1-pixel.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv1-vertex.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-amplification.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-compute.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-domain.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-geometry.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-hull.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-mesh.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-pixel.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv2-vertex.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-amplification.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-compute.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-domain.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-geometry.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-hull.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-mesh.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-pixel.yaml
    M llvm/test/ObjectYAML/DXContainer/PSVv3-vertex.yaml
    M llvm/test/ObjectYAML/DXContainer/SigElements.yaml
    M llvm/test/Other/new-pm-print-pipeline.ll
    M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
    M llvm/test/TableGen/intrinsic-attrs.td
    M llvm/test/Transforms/Attributor/nofpclass.ll
    A llvm/test/Transforms/CodeGenPrepare/X86/fake-use-phi.ll
    A llvm/test/Transforms/CodeGenPrepare/X86/fake-use-split-ret.ll
    A llvm/test/Transforms/GVN/fake-use-constprop.ll
    M llvm/test/Transforms/Inline/X86/inline-target-cpu-i686.ll
    M llvm/test/Transforms/Inline/X86/inline-target-cpu-x86_64.ll
    A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-all-active-lanes-cvt.ll
    A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-no-active-lanes-cvt.ll
    M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
    M llvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll
    M llvm/test/Transforms/InstCombine/X86/x86-avx512.ll
    A llvm/test/Transforms/InstCombine/X86/x86-vperm.ll
    M llvm/test/Transforms/InstCombine/X86/x86-vpermi2.ll
    M llvm/test/Transforms/InstCombine/X86/x86-vpermil-inseltpoison.ll
    M llvm/test/Transforms/InstCombine/X86/x86-vpermil.ll
    M llvm/test/Transforms/LICM/hoist-add-sub.ll
    A llvm/test/Transforms/LoopUnroll/X86/runtime-unroll-addrec-cost.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
    M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
    A llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
    M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
    A llvm/test/Transforms/LoopVectorize/X86/cost-constant-known-via-scev.ll
    M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
    M llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll
    M llvm/test/Transforms/LoopVectorize/if-reduction.ll
    M llvm/test/Transforms/LoopVectorize/phi-cost.ll
    M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
    M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
    M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
    M llvm/test/Transforms/PGOProfile/memprof.ll
    A llvm/test/Transforms/PhaseOrdering/X86/masked-memory-ops-with-cf.ll
    M llvm/test/Transforms/SCCP/pointer-nonnull.ll
    M llvm/test/Transforms/SCCP/range-attribute.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions.ll
    A llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
    M llvm/test/Transforms/SLPVectorizer/RISCV/math-function.ll
    M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
    R llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred-parent.ll
    R llvm/test/Transforms/SLPVectorizer/X86/alternate-opcode-sindle-bv.ll
    R llvm/test/Transforms/SLPVectorizer/X86/arith-div-undef.ll
    R llvm/test/Transforms/SLPVectorizer/X86/bool-logical-op-reduction-with-poison.ll
    R llvm/test/Transforms/SLPVectorizer/X86/buildvector-insert-mask-size.ll
    R llvm/test/Transforms/SLPVectorizer/X86/buildvector-nodes-dependency.ll
    R llvm/test/Transforms/SLPVectorizer/X86/call-arg-reduced-by-minbitwidth.ll
    R llvm/test/Transforms/SLPVectorizer/X86/catchswitch.ll
    A llvm/test/Transforms/SLPVectorizer/X86/cmp-in-bv-node-type-cost.ll
    R llvm/test/Transforms/SLPVectorizer/X86/crash_exceed_scheduling.ll
    R llvm/test/Transforms/SLPVectorizer/X86/diamond_broadcast.ll
    M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
    A llvm/test/Transforms/SLPVectorizer/X86/multi-nodes-bv-vectorized.ll
    M llvm/test/Transforms/SLPVectorizer/X86/odd_store.ll
    M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
    M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
    M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-insertelement.ll
    M llvm/test/Transforms/SLPVectorizer/X86/remark-masked-loads-consecutive-loads-same-ptr.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reorder-possible-strided-node.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather2.ll
    M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss.ll
    A llvm/test/Transforms/SLPVectorizer/alternate-cmp-swapped-pred-parent.ll
    A llvm/test/Transforms/SLPVectorizer/alternate-opcode-sindle-bv.ll
    A llvm/test/Transforms/SLPVectorizer/arith-div-undef.ll
    A llvm/test/Transforms/SLPVectorizer/bool-logical-op-reduction-with-poison.ll
    A llvm/test/Transforms/SLPVectorizer/buildvector-insert-mask-size.ll
    A llvm/test/Transforms/SLPVectorizer/buildvector-nodes-dependency.ll
    A llvm/test/Transforms/SLPVectorizer/call-arg-reduced-by-minbitwidth.ll
    A llvm/test/Transforms/SLPVectorizer/catchswitch.ll
    A llvm/test/Transforms/SLPVectorizer/crash_exceed_scheduling.ll
    A llvm/test/Transforms/SLPVectorizer/diamond_broadcast.ll
    M llvm/test/Transforms/SLPVectorizer/insertelement-across-zero.ll
    A llvm/test/Transforms/SLPVectorizer/resized-alt-shuffle-after-minbw.ll
    A llvm/test/Transforms/SROA/fake-use-escape.ll
    A llvm/test/Transforms/SROA/fake-use-sroa.ll
    A llvm/test/Transforms/SimplifyCFG/X86/hoist-loads-stores-with-cf.ll
    R llvm/test/Verifier/rtsan-attrs.ll
    M llvm/test/tools/dxil-dis/BasicIR.ll
    M llvm/test/tools/dxil-dis/debug-info.ll
    M llvm/test/tools/dxil-dis/opaque-gep.ll
    M llvm/test/tools/dxil-dis/opaque-pointers.ll
    A llvm/test/tools/llvm-profdata/Inputs/split-layout.profdata
    A llvm/test/tools/llvm-profdata/sample-split-layout.test
    R llvm/test/tools/llvm-split/AMDGPU/declarations-debug.ll
    M llvm/test/tools/llvm-split/AMDGPU/declarations.ll
    M llvm/tools/bugpoint/CMakeLists.txt
    M llvm/tools/dsymutil/dsymutil.cpp
    M llvm/tools/lli/ChildTarget/ChildTarget.cpp
    M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
    M llvm/tools/llvm-exegesis/lib/Error.cpp
    M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
    M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
    M llvm/tools/llvm-mt/llvm-mt.cpp
    M llvm/tools/llvm-pdbutil/ExplainOutputStyle.cpp
    M llvm/tools/llvm-profdata/llvm-profdata.cpp
    M llvm/tools/llvm-reduce/deltas/Delta.cpp
    M llvm/unittests/Analysis/FunctionPropertiesAnalysisTest.cpp
    M llvm/unittests/Analysis/MLModelRunnerTest.cpp
    M llvm/unittests/ExecutionEngine/Orc/SharedMemoryMapperTest.cpp
    M llvm/unittests/ExecutionEngine/Orc/TaskDispatchTest.cpp
    M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp
    M llvm/unittests/IR/VPIntrinsicTest.cpp
    M llvm/unittests/Object/DXContainerTest.cpp
    M llvm/unittests/SandboxIR/CMakeLists.txt
    M llvm/unittests/SandboxIR/SandboxIRTest.cpp
    M llvm/unittests/SandboxIR/TrackerTest.cpp
    A llvm/unittests/SandboxIR/TypesTest.cpp
    M llvm/unittests/Support/CMakeLists.txt
    M llvm/unittests/Support/CrashRecoveryTest.cpp
    M llvm/unittests/Support/FormatVariadicTest.cpp
    M llvm/unittests/Support/ManagedStatic.cpp
    M llvm/unittests/Support/MemoryBufferTest.cpp
    A llvm/unittests/Support/ModRefTest.cpp
    M llvm/unittests/Support/ParallelTest.cpp
    M llvm/unittests/Support/Path.cpp
    M llvm/unittests/Support/ThreadPool.cpp
    M llvm/unittests/Support/Threading.cpp
    M llvm/unittests/Support/WithColorTest.cpp
    M llvm/unittests/Support/raw_ostream_test.cpp
    M llvm/unittests/TargetParser/TargetParserTest.cpp
    M llvm/unittests/Transforms/IPO/CMakeLists.txt
    A llvm/unittests/Transforms/IPO/ImportIDTableTests.cpp
    M llvm/utils/TableGen/IntrinsicEmitter.cpp
    M llvm/utils/TableGen/X86DisassemblerTables.cpp
    M llvm/utils/UpdateTestChecks/common.py
    M llvm/utils/git/pre-push.py
    M llvm/utils/gn/gn.py
    M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
    M llvm/utils/gn/secondary/llvm/lib/SandboxIR/BUILD.gn
    M llvm/utils/gn/secondary/llvm/unittests/SandboxIR/BUILD.gn
    M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
    M llvm/utils/gn/secondary/llvm/unittests/Transforms/IPO/BUILD.gn
    M llvm/utils/lit/lit/TestRunner.py
    A llvm/utils/lit/tests/Inputs/shtest-env-negative/env-calls-cd.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-negative/env-calls-colon.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-negative/env-calls-echo.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-negative/env-calls-export.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-negative/env-calls-mkdir.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-negative/env-calls-not-builtin.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-negative/env-calls-rm.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-negative/lit.cfg
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-args-last-is-assign.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-args-last-is-u-arg.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-args-last-is-u.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-args-nested-none.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-calls-env.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-no-subcommand.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-u.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/env.txt
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/lit.cfg
    A llvm/utils/lit/tests/Inputs/shtest-env-positive/mixed.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-args-last-is-assign.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-args-last-is-u-arg.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-args-last-is-u.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-args-nested-none.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-args-none.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-calls-cd.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-calls-colon.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-calls-echo.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-calls-env.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-calls-export.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-calls-mkdir.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-calls-not-builtin.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-calls-rm.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env-u.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/env.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/lit.cfg
    R llvm/utils/lit/tests/Inputs/shtest-env/mixed.txt
    R llvm/utils/lit/tests/Inputs/shtest-env/print_environment.py
    A llvm/utils/lit/tests/shtest-env-negative.py
    A llvm/utils/lit/tests/shtest-env-positive.py
    R llvm/utils/lit/tests/shtest-env.py
    M llvm/utils/release/build_llvm_release.bat
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
    M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
    M mlir/include/mlir/IR/Block.h
    M mlir/lib/Conversion/AffineToStandard/CMakeLists.txt
    M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
    M mlir/lib/Conversion/ComplexToLLVM/CMakeLists.txt
    M mlir/lib/Conversion/ControlFlowToSCF/CMakeLists.txt
    M mlir/lib/Conversion/SCFToControlFlow/CMakeLists.txt
    M mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
    M mlir/lib/Conversion/VectorToSCF/CMakeLists.txt
    M mlir/lib/Dialect/Affine/Transforms/CMakeLists.txt
    M mlir/lib/Dialect/Complex/IR/CMakeLists.txt
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    M mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
    M mlir/lib/Dialect/Linalg/Transforms/MeshShardingInterfaceImpl.cpp
    M mlir/lib/Dialect/MemRef/IR/CMakeLists.txt
    M mlir/lib/Dialect/MemRef/TransformOps/CMakeLists.txt
    M mlir/lib/Dialect/MemRef/Transforms/CMakeLists.txt
    M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
    M mlir/lib/Dialect/SCF/Utils/Utils.cpp
    M mlir/lib/Dialect/SparseTensor/Transforms/CMakeLists.txt
    M mlir/lib/Dialect/Tensor/IR/CMakeLists.txt
    M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
    M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
    M mlir/test/Conversion/ArmSMEToLLVM/tile-spills-and-fills.mlir
    M mlir/test/Dialect/ArmSME/tile-zero-masks.mlir
    M mlir/test/Dialect/OpenMP/invalid.mlir
    M mlir/test/Dialect/OpenMP/ops.mlir
    M mlir/test/Dialect/SCF/loop-unroll.mlir
    M mlir/test/Dialect/Tosa/invalid.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir
    A mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
    M mlir/test/Target/LLVMIR/nvvmir.mlir
    M mlir/test/lit.cfg.py
    M mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-yaml-gen.cpp
    M mlir/tools/mlir-tblgen/LLVMIRConversionGen.cpp
    M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
    M mlir/tools/mlir-tblgen/OpFormatGen.cpp
    M mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
    M polly/test/UnitIsl/lit.cfg
    M polly/test/lit.cfg
    M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  Rebase

Created using spr 1.3.5


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