[all-commits] [llvm/llvm-project] b01c00: [TII][RISCV] Add renamable bit to copyPhysReg (#91...

[Piyou Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b01c006f734a0977a4fd9c7f1a706c8230663739
      https://github.com/llvm/llvm-project/commit/b01c006f734a0977a4fd9c7f1a706c8230663739
  Author: Piyou Chen <piyou.chen at sifive.com>
  Date:   2024-08-27 (Tue, 27 Aug 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetInstrInfo.h
    M llvm/lib/CodeGen/TargetInstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.h
    M llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
    M llvm/lib/Target/AMDGPU/R600InstrInfo.h
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    M llvm/lib/Target/ARC/ARCInstrInfo.cpp
    M llvm/lib/Target/ARC/ARCInstrInfo.h
    M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
    M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
    M llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
    M llvm/lib/Target/ARM/Thumb1InstrInfo.h
    M llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
    M llvm/lib/Target/ARM/Thumb2InstrInfo.h
    M llvm/lib/Target/AVR/AVRInstrInfo.cpp
    M llvm/lib/Target/AVR/AVRInstrInfo.h
    M llvm/lib/Target/BPF/BPFInstrInfo.cpp
    M llvm/lib/Target/BPF/BPFInstrInfo.h
    M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
    M llvm/lib/Target/CSKY/CSKYInstrInfo.h
    M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
    M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
    M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
    M llvm/lib/Target/Lanai/LanaiInstrInfo.h
    M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
    M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
    M llvm/lib/Target/M68k/M68kInstrInfo.cpp
    M llvm/lib/Target/M68k/M68kInstrInfo.h
    M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
    M llvm/lib/Target/MSP430/MSP430InstrInfo.h
    M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
    M llvm/lib/Target/Mips/Mips16InstrInfo.h
    M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
    M llvm/lib/Target/Mips/MipsSEInstrInfo.h
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
    M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
    M llvm/lib/Target/PowerPC/PPCInstrInfo.h
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h
    M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
    M llvm/lib/Target/SPIRV/SPIRVInstrInfo.h
    M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
    M llvm/lib/Target/Sparc/SparcInstrInfo.h
    M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
    M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
    M llvm/lib/Target/VE/VEInstrInfo.cpp
    M llvm/lib/Target/VE/VEInstrInfo.h
    M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.h
    M llvm/lib/Target/X86/X86InstrInfo.cpp
    M llvm/lib/Target/X86/X86InstrInfo.h
    M llvm/lib/Target/XCore/XCoreInstrInfo.cpp
    M llvm/lib/Target/XCore/XCoreInstrInfo.h
    M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
    M llvm/lib/Target/Xtensa/XtensaInstrInfo.h
    A llvm/test/CodeGen/RISCV/renamable-copy.mir

  Log Message:
  -----------
  [TII][RISCV] Add renamable bit to copyPhysReg (#91179)

The renamable flag is useful during MachineCopyPropagation but renamable
flag will be dropped after lowerCopy in some case.

This patch introduces extra arguments to pass the renamable flag to
copyPhysReg.



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