[all-commits] [llvm/llvm-project] 5b41eb: [RISCV] Fix more boundary cases in immediate selec...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5b41eb3a6dcd92711b4adf946e4d9d29c3886007
      https://github.com/llvm/llvm-project/commit/5b41eb3a6dcd92711b4adf946e4d9d29c3886007
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-25 (Sun, 25 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
    M llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll

  Log Message:
  -----------
  [RISCV] Fix more boundary cases in immediate selection for Zdinx load/store on RV32. (#105874)

In order to support -unaligned-scalar-mem properly, we need to be more
careful with immediates of global variables. We need to guarantee that
adding 4 in RISCVExpandingPseudos won't overflow simm12. Since we don't
know what the simm12 is until link time, the only way to guarantee this
is to make sure the base address is at least 8 byte aligned.

There were also several corner cases bugs in immediate folding where we
would fold an immediate in the range [2044,2047] where adding 4 would
overflow. These are not related to unaligned-scalar-mem.



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