[all-commits] [llvm/llvm-project] 2cb25d: [DAG][RISCV] Use vp_reduce_fadd/fmul when widening...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2cb25d5608453655a2ed39d8177034ab7773aac2
      https://github.com/llvm/llvm-project/commit/2cb25d5608453655a2ed39d8177034ab7773aac2
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-08-24 (Sat, 24 Aug 2024)

  Changed paths:
    M llvm/include/llvm/IR/VPIntrinsics.def
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll

  Log Message:
  -----------
  [DAG][RISCV] Use vp_reduce_fadd/fmul when widening types for FP reductions (#105840)

This is a follow up to #105455 which updates the VPIntrinsic mappings
for the fadd and fmul cases, and supports both ordered and unordered
reductions. This allows the use a single wider operation with a
restricted EVL instead of padding the vector with the neutral element.

This has all the same tradeoffs as the previous patch.



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