[all-commits] [llvm/llvm-project] 216d6a: [bazel] Fix mlir build broken by 681ae097. (#105552)
Justin Bogner via All-commits
all-commits at lists.llvm.org
Fri Aug 23 10:49:51 PDT 2024
Branch: refs/heads/users/bogner/sprmain.directx-lower-llvmdxhandlefrombinding-to-dxil-ops
Home: https://github.com/llvm/llvm-project
Commit: 216d6a06524e4a8ebd6de2806c473b92d3349c4e
https://github.com/llvm/llvm-project/commit/216d6a06524e4a8ebd6de2806c473b92d3349c4e
Author: Chenguang Wang <w3cing at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix mlir build broken by 681ae097. (#105552)
The cmake config creates two targets, `MLIRTensorMeshShardingExtensions`
and `MLIRTensorAllExtensions`; but for bazel, with the `Func` dialect we
only have a single `FuncExtensions`. Here I am following the `Func`
dialect convension to only create a single `TensorExtensions`.
Commit: 3b7611594f010ecd5233ab9580b2feb88837f9ef
https://github.com/llvm/llvm-project/commit/3b7611594f010ecd5233ab9580b2feb88837f9ef
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/ErrorReporting.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/test/sanitizer/double_free.c
M offload/test/sanitizer/double_free_racy.c
M offload/test/sanitizer/free_wrong_ptr_kind.c
M offload/test/sanitizer/free_wrong_ptr_kind.cpp
A offload/test/sanitizer/ptr_outside_alloc_1.c
A offload/test/sanitizer/ptr_outside_alloc_2.c
A offload/test/sanitizer/use_after_free_1.c
A offload/test/sanitizer/use_after_free_2.c
Log Message:
-----------
[Offload] Improve error reporting on memory faults (#104254)
Since we can already track allocations, we can diagnose memory faults to
some degree. If the fault happens in a prior allocation (use after free)
or "close but outside" one, we can provide that information to the user.
Note that the fault address might be page aligned, and not all accesses
trigger a fault, especially for allocations that are backed by a
MemoryManager. Still, if people disable the MemoryManager or the
allocation is big enough, we can sometimes provide valueable feedback.
Commit: 1c9d8a62cb208afe1bc87669c7dd5d9590e615b2
https://github.com/llvm/llvm-project/commit/1c9d8a62cb208afe1bc87669c7dd5d9590e615b2
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
A libcxx/cmake/caches/AMDGPU.cmake
A libcxx/cmake/caches/NVPTX.cmake
Log Message:
-----------
[libcxx] Add cache file for the GPU build (#99348)
Summary:
This patch adds a CMake cache config file for the GPU build. This cache
will set the default required options when used from the LLVM runtime
interface or directly. These options pretty much disable everything the
GPU can't handle.
With this and the following patches: #99259, #99243, #99287, and #99333,
we will be able to build `libc++` targeting the GPU with an invocation
like this.
```
$ cmake ../llvm
-DRUNTIMES_nvptx64-nvidia-cuda_CACHE_FILES=${LLVM_SRC}/../libcxx/cmake/caches/NVPTX.cmake \
-DRUNTIMES_amdgcn-amd-amdhsa_CACHE_FILES=${LLVM_SRC}/../libcxx/cmake/caches/AMDGPU.cmake \
-DRUNTIMES_nvptx64-nvidia-cuda_LLVM_ENABLE_RUNTIMES=compiler-rt;libc;libcxx \
-DRUNTIMES_amdgcn-amd-amdhsa_LLVM_ENABLE_RUNTIMES=compiler-rt;libc;libcxx \
-DLLVM_RUNTIME_TARGETS=amdgcn-amd-amdhsa;nvptx64-nvidia-cuda \
```
This will then install the libraries and headers into the appropriate
locations for use with `clang`.
Commit: c61d565721d0cf03e2658ec65a3526dd89142e52
https://github.com/llvm/llvm-project/commit/c61d565721d0cf03e2658ec65a3526dd89142e52
Author: David Green <david.green at arm.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
Log Message:
-----------
[AArch64] Set scalar fneg to free for fnmul (#104814)
A fneg(fmul(..)) or fmul(fneg(..)) can be folded into a fnmul under
AArch64. https://clang.godbolt.org/z/znPj34Mae
This discounts the cost of the fneg in such patterns to be free.
Commit: e78156a0e225673e592920410c8cadc94f19aa66
https://github.com/llvm/llvm-project/commit/e78156a0e225673e592920410c8cadc94f19aa66
Author: Sumanth Gundapaneni <sumanth.gundapaneni at amd.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/test/CodeGen/AMDGPU/lround.ll
Log Message:
-----------
Scalarize the vector inputs to llvm.lround intrinsic by default. (#101054)
Verifier is updated in a different patch to let the vector types for
llvm.lround and llvm.llround intrinsics.
Commit: 6cb14599ade843be3171fa7e4dd5f3601a3bb0de
https://github.com/llvm/llvm-project/commit/6cb14599ade843be3171fa7e4dd5f3601a3bb0de
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
M lldb/source/Plugins/Process/minidump/MinidumpParser.cpp
M lldb/source/Plugins/Process/minidump/MinidumpParser.h
M lldb/source/Plugins/Process/minidump/MinidumpTypes.cpp
M lldb/source/Plugins/Process/minidump/MinidumpTypes.h
M lldb/test/API/functionalities/postmortem/minidump-new/TestMiniDumpNew.py
A lldb/test/API/functionalities/postmortem/minidump-new/linux-x86_64_mem64.yaml
Log Message:
-----------
[LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (#101086)
This PR is in response to a bug my coworker @mbucko discovered where on
MacOS Minidumps were being created where the 64b memory regions were
readable, but were not being listed in
`SBProcess.GetMemoryRegionList()`. This went unnoticed in #95312 due to
all the linux testing including /proc/pid maps. On MacOS generated dumps
(or any dump without access to /proc/pid) we would fail to properly map
Memory Regions due to there being two independent methods for 32b and
64b mapping.
In this PR I addressed this minor bug and merged the methods, but in
order to add test coverage required additions to `obj2yaml` and
`yaml2obj` which make up the bulk of this patch.
Lastly, there are some non-required changes such as the addition of the
`Memory64ListHeader` type, to make writing/reading the header section of
the Memory64List easier.
Commit: ec866638ff36b4a01b38a3ab8ef604596cb37178
https://github.com/llvm/llvm-project/commit/ec866638ff36b4a01b38a3ab8ef604596cb37178
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx23Papers.csv
Log Message:
-----------
[libc++][NFC] A few mechanical adjustments to capitalization in status files
Make sure that we consistently use `Nothing To Do`, and that we use the
RST tags properly (e.g. '|Complete|' instead of 'Complete').
Commit: 7a28192ce1c1d9d0398348eabc46c94eadb317d8
https://github.com/llvm/llvm-project/commit/7a28192ce1c1d9d0398348eabc46c94eadb317d8
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx17.rst
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx20.rst
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/docs/Status/Cxx23.rst
M libcxx/docs/Status/Cxx23Issues.csv
Log Message:
-----------
[libc++] Standardize how we track removed and superseded papers
Instead of having various status entries like 'Superseded by XXX',
we use '|Nothing To Do|' but we add a note explaining that the paper
was pulled at another meeting.
Commit: ae48affd25ac8e211a5bc1c72ef208615fc7eb7d
https://github.com/llvm/llvm-project/commit/ae48affd25ac8e211a5bc1c72ef208615fc7eb7d
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Minor style fixes in lowerVectorMaskVecReduction [nfc]
Reuse existing routine to avoid duplication, and reduce variable scopes.
Commit: c975dc1da03d684604ddf787b07b63fb8e903648
https://github.com/llvm/llvm-project/commit/c975dc1da03d684604ddf787b07b63fb8e903648
Author: Harini0924 <79345568+Harini0924 at users.noreply.github.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/test/ClangScanDeps/pr61006.cppm
M clang/test/Driver/coverage.c
M clang/test/Driver/program-path-priority.c
Log Message:
-----------
[clang] [test] Use lit Syntax for Environment Variables in Clang subproject (#102647)
This patch updates the clang tests by replacing shell command
substitutions with lit-compatible syntax for setting and referencing
environment variables. Specifically, the use of shell-style variable
substitution (e.g., `DEFAULT_TRIPLE=`and `EXPECTED_RESOURCE_DIR=`) has
been replaced with `env` and `%{env}` to align with lit's internal shell
requirements. These changes ensure that environment variables are
properly set and accessed within the lit environment.
When using the lit internal shell with the command
`LIT_USE_INTERNAL_SHELL=1 ninja check-clang`, one common error
encountered is:
```
FAIL: Clang :: Driver/program-path-priority.c (19 of 20640)
******************** TEST 'Clang :: Driver/program-path-priority.c' FAILED ********************
Exit Code: 127
Command Output (stdout):
--
# RUN: at line 90
DEFAULT_TRIPLE=`/usr/local/google/home/harinidonthula/llvm-project/build/tools/clang/test/Driver/Output/program-path-priority.c.tmp/clang --version | grep "Target:" | cut -d ' ' -f2`
# executed command: 'DEFAULT_TRIPLE=`/usr/local/google/home/harinidonthula/llvm-project/build/tools/clang/test/Driver/Output/program-path-priority.c.tmp/clang' --version
# .---command stderr------------
# | 'DEFAULT_TRIPLE=`/usr/local/google/home/harinidonthula/llvm-project/build/tools/clang/test/Driver/Output/program-path-priority.c.tmp/clang': command not found
# `-----------------------------
# error: command failed with exit status: 127
```
To fix this issue, the patch replaces traditional shell substitutions
with lit's environment variable handling, ensuring compatibility with
the lit internal shell framework. This update applies to both the
handling of the `DEFAULT_TRIPLE` and `EXPECTED_RESOURCE_DIR` variables,
allowing the tests to pass when using the lit internal shell.
The patch also adds `env` to the `PWD` variable setting in the following
command to ensure the environment variable is correctly set within the
lit internal shell:
```
// RUN: %if system-linux %{ env PWD=/proc/self/cwd %clang -### -c --coverage %s -o foo/bar.o 2>&1 | FileCheck --check-prefix=PWD %s %}
```
fixes: #102395
[link to
RFC](https://discourse.llvm.org/t/rfc-enabling-the-lit-internal-shell-by-default/80179)
Commit: b89fef8f67974ebcd4114fa75ac2e53fd687870c
https://github.com/llvm/llvm-project/commit/b89fef8f67974ebcd4114fa75ac2e53fd687870c
Author: Michael Jones <michaelrj at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M libc/docs/build_and_test.rst
M libc/docs/contributing.rst
R libc/docs/dev/api_test.rst
R libc/docs/dev/ground_truth_specification.rst
M libc/docs/dev/header_generation.rst
M libc/docs/dev/index.rst
R libc/docs/dev/mechanics_of_public_api.rst
M libc/docs/dev/source_tree_layout.rst
M libc/docs/full_cross_build.rst
M libc/docs/full_host_build.rst
M libc/docs/fullbuild_mode.rst
M libc/docs/gpu/building.rst
M libc/docs/index.rst
M libc/docs/overlay_mode.rst
M libc/docs/porting.rst
Log Message:
-----------
[libc][docs] Update docs to reflect new headergen (#102381)
Since new headergen is now the default for building LLVM-libc, the docs
need to be updated to reflect that. While I was editing those docs, I
took a quick pass at updating other out-of-date pages.
Commit: 22d3fb182c9199ac3d51e5577c6647508a7a37f0
https://github.com/llvm/llvm-project/commit/22d3fb182c9199ac3d51e5577c6647508a7a37f0
Author: Mircea Trofin <mtrofin at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/test/Analysis/CtxProfAnalysis/full-cycle.ll
M llvm/test/Analysis/CtxProfAnalysis/load.ll
Log Message:
-----------
[ctx_prof] Profile flatterner (#104539)
Eventually we'll need to flatten the profile (at the end of all IPO) and lower to "vanilla" `MD_prof`. This is the first part of that.
Issue #89287
Commit: a6bae5cb37919bb0b855dd468d4982340a5740d2
https://github.com/llvm/llvm-project/commit/a6bae5cb37919bb0b855dd468d4982340a5740d2
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
A llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-any.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-disabled.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-enabled.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-any.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-disabled.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-enabled.ll
Log Message:
-----------
[AMDGPU] Split GCNSubtarget into its own file. NFC. (#105525)
Commit: 47e0212f00f707a4bb92714afe9c748116887d62
https://github.com/llvm/llvm-project/commit/47e0212f00f707a4bb92714afe9c748116887d62
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port a6bae5cb3791
Commit: c09fdac0b577ca0bfef141765d0a9ae1b6040893
https://github.com/llvm/llvm-project/commit/c09fdac0b577ca0bfef141765d0a9ae1b6040893
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/docs/GettingInvolved.rst
M llvm/docs/_static/LoopOptWG_invite.ics
Log Message:
-----------
[Docs] Update Loop Optimization WG call.
The WebEx link will become invalid soon, we are switching to Google
Meet. Also, changing the cadence from biweekly to monthly.
Commit: 6257a98b258a3f17b78af31bf43009a559c5dd1d
https://github.com/llvm/llvm-project/commit/6257a98b258a3f17b78af31bf43009a559c5dd1d
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/step/TestDAP_step.py
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Implement `StepGranularity` for "next" and "step-in" (#105464)
VS Code requests the `instruction` stepping granularity if the assembly
view is currently focused. By implementing `StepGranularity`, we can
hence properly single-step through assembly code.
Commit: 8b4d4bee2a45f637fb4dcda49b592374e93a6480
https://github.com/llvm/llvm-project/commit/8b4d4bee2a45f637fb4dcda49b592374e93a6480
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/unittests/ADT/StringRefTest.cpp
Log Message:
-----------
[NFC][ADT] Remove << operators from StringRefTest (#105500)
- Remove ostream << operators for StringRef and StringRef pair from
StringTest.
Both of these are natively supported by googletest framework.
Commit: 89c556cfda4de346774c9fe547da6af9121dfa97
https://github.com/llvm/llvm-project/commit/89c556cfda4de346774c9fe547da6af9121dfa97
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
Log Message:
-----------
[flang][OpenMP] Follow-up to build-breakage fix (#102028)
Adjust the handling of a few of the new clauses.
Commit: 6ec3130a38e6982a61e7fa74bd5223c95c0bb918
https://github.com/llvm/llvm-project/commit/6ec3130a38e6982a61e7fa74bd5223c95c0bb918
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/test/tools/llvm-cgdata/merge-archive.test
M llvm/test/tools/llvm-cgdata/merge-concat.test
M llvm/test/tools/llvm-cgdata/merge-double.test
M llvm/test/tools/llvm-cgdata/merge-single.test
Log Message:
-----------
[CGData] Fix tests for sed without using options (#105546)
This fixes a build issue for AIX --
https://github.com/llvm/llvm-project/pull/101461.
Commit: e31252bf54dedadfe78b36d07ea6084156faa38a
https://github.com/llvm/llvm-project/commit/e31252bf54dedadfe78b36d07ea6084156faa38a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/phi-nodes-as-operand-reorder.ll
Log Message:
-----------
[SLP]Fix PR105120: fix the order of phi nodes vectorization.
The operands of the phi nodes should be vectorized in the same order, in
which they were created, otherwise the compiler may crash when trying
to correctly build dependency for nodes with non-schedulable
instructions for gather/buildvector nodes.
Fixes https://github.com/llvm/llvm-project/issues/105120
Commit: b765fdd997be9ff0afb6de87077cd53d5f3d349c
https://github.com/llvm/llvm-project/commit/b765fdd997be9ff0afb6de87077cd53d5f3d349c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
Log Message:
-----------
[SLP]Try to keep scalars, used in phi nodes, if phi nodes from same block are vectorized.
Before doing the vectorization of the PHI nodes, the compiler sorts them
by the opcodes of the operands. If the scalar is replaced during the
vectorization by extractelement, it breaks this sorting and prevent some
further vectorization attempts. Patch tries to improve this by doing
extra analysis of the scalars and tries to keep them, if it is found that
this scalar is used in other (external) PHI node in the same block.
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/103923
Commit: 4b35624ce0ac5b487d39880e75b5d85f4d49eec0
https://github.com/llvm/llvm-project/commit/4b35624ce0ac5b487d39880e75b5d85f4d49eec0
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sve-fixed-length-int-abd.ll
A llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-abd.ll
Log Message:
-----------
[AArch64] Add SVE lowering of fixed-length UABD/SABD (#104991)
Commit: 716594da176b4cbc956e7c7ab90988db6f907686
https://github.com/llvm/llvm-project/commit/716594da176b4cbc956e7c7ab90988db6f907686
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Add ShuffleVectorInst (#104891)
This is missing tracking for `setShuffleMask`. I'll add it in a follow-up.
Commit: b03b170dd39799b4fb25ffe70b81d0cf0c7d7346
https://github.com/llvm/llvm-project/commit/b03b170dd39799b4fb25ffe70b81d0cf0c7d7346
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/ADT/StringExtras.h
M llvm/unittests/ADT/StringExtrasTest.cpp
Log Message:
-----------
[ADT] Add `isPunct` to StringExtras (#105461)
- Add `isPunct` to StringExtras.h.
- Add unit test for `isPunct` to StringExtrasTest.
Commit: 84fa7b438e1fba0c88b21784e716926017b9fe49
https://github.com/llvm/llvm-project/commit/84fa7b438e1fba0c88b21784e716926017b9fe49
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M libcxx/utils/synchronize_csv_status_files.py
Log Message:
-----------
[libc++] Improve the granularity of status tracking from Github issues
This enhances the Github - CSV synchronization script to understand
some of the idioms we use in the CSV status files, like |Nothing To Do|
and others.
Commit: cfd4c1805ead139f84a4465719c49cca53f07f27
https://github.com/llvm/llvm-project/commit/cfd4c1805ead139f84a4465719c49cca53f07f27
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M flang/include/flang/Optimizer/CodeGen/CGPasses.td
M flang/include/flang/Optimizer/CodeGen/CodeGen.h
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CLOptions.inc
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Support/InternalNames.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/CompilerGeneratedNames.cpp
M flang/lib/Semantics/runtime-type-info.cpp
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Fir/basic-program.fir
M flang/test/Fir/convert-to-llvm.fir
A flang/test/Fir/convert-type-desc-to-llvm.fir
M flang/test/Fir/polymorphic.fir
M flang/test/Fir/type-descriptor.fir
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/dense-array-any-rank.f90
Log Message:
-----------
[RFC][flang] Replace special symbols in uniqued global names. (#104859)
This change addresses more "issues" as the one resolved in #71338.
Some targets (e.g. NVPTX) do not accept global names containing
`.`. In particular, the global variables created to represent
the runtime information of derived types use `.` in their names.
A derived type's descriptor object may be used in the device code,
e.g. to initialize a descriptor of a variable of this type.
Thus, the runtime type info objects may need to be compiled
for the device.
Moreover, at least the derived types' descriptor objects
may need to be registered (think of `omp declare target`)
for the host-device association so that the addendum pointer
can be properly mapped to the device for descriptors using
a derived type's descriptor as their addendum pointer.
The registration implies knowing the name of the global variable
in the device image so that proper host code can be created.
So it is better to name the globals the same way for the host
and the device.
CompilerGeneratedNamesConversion pass renames all uniqued globals
such that the special symbols (currently `.`) are replaced
with `X`. The pass is supposed to be run for the host and the device.
An option is added to FIR-to-LLVM conversion pass to indicate
whether the new pass has been run before or not. This setting
affects how the codegen computes the names of the derived types'
descriptors for FIR derived types.
fir::NameUniquer now allows `X` to be part of a name, because
the name deconstruction may be applied to the mangled names
after CompilerGeneratedNamesConversion pass.
Commit: 30ca06c4d0d06f67f10a9e19d4333acc2074811b
https://github.com/llvm/llvm-project/commit/30ca06c4d0d06f67f10a9e19d4333acc2074811b
Author: John Harrison <harjohn at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
A lldb/test/API/tools/lldb-dap/output/Makefile
A lldb/test/API/tools/lldb-dap/output/TestDAP_output.py
A lldb/test/API/tools/lldb-dap/output/main.c
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/OutputRedirector.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] When sending a DAP Output Event break each message into separate lines. (#105456)
Previously, when output like `"hello\nworld\n"` was produced by lldb (or
the process) the message would be sent as a single Output event. By
being a single event this causes VS Code to treat this as a single
message in the console when handling displaying and filtering in the
Debug Console.
Instead, with these changes we send each line as its own event. This
results in VS Code representing each line of output from lldb-dap as an
individual output message.
Resolves #105444
Commit: 46c94bed5af48f3785c3370a9297ea29d7918cd5
https://github.com/llvm/llvm-project/commit/46c94bed5af48f3785c3370a9297ea29d7918cd5
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx23Issues.csv
Log Message:
-----------
[libc++] Mark LWG3404 as implemented
LWG3404 was implemented along with subrange.
Closes #104282
Commit: ab86fc74c04ff508f909b7b6131df1551dd833fc
https://github.com/llvm/llvm-project/commit/ab86fc74c04ff508f909b7b6131df1551dd833fc
Author: Jonas Rickert <Jonas.Rickert at amd.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M mlir/include/mlir/IR/MLIRContext.h
Log Message:
-----------
[mlir] Add nodiscard attribute to allowsUnregisteredDialects (#105530)
This getter can easily be confused with the similar named
allowUnregisteredDialects setter
Commit: f709cd5add0ea36bb14259e9716bd74e5c762128
https://github.com/llvm/llvm-project/commit/f709cd5add0ea36bb14259e9716bd74e5c762128
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
R clang/test/CodeGenCoroutines/coro-dwarf-O2.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroInternal.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/test/Transforms/Coroutines/coro-debug-O2.ll
Log Message:
-----------
Revert "[Coroutines] Salvage the debug information for coroutine frames within optimizations"
This reverts commit 522c253f47ea27d8eeb759e06f8749092b1de71e.
This series of commits causes Clang crashes. The reproducer is posted on
https://github.com/llvm/llvm-project/commit/08a0dece2b2431db8abe650bb43cba01e781e1ce.
Commit: dc12ccd13f98a3f3ec4af07e60f6fe1344965e17
https://github.com/llvm/llvm-project/commit/dc12ccd13f98a3f3ec4af07e60f6fe1344965e17
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
Log Message:
-----------
Revert "[Coroutines] Fix -Wunused-variable in CoroFrame.cpp (NFC)"
This reverts commit d48b807aa8abd1cbfe8ac5d1ba27b8b3617fc5e6.
This series of commits causes Clang crashes. The reproducer is posted on
https://github.com/llvm/llvm-project/commit/08a0dece2b2431db8abe650bb43cba01e781e1ce
Commit: 5c7ae42c526b21acf65ab4b017d0a5fd4ac654a1
https://github.com/llvm/llvm-project/commit/5c7ae42c526b21acf65ab4b017d0a5fd4ac654a1
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-debug-dbg.values.ll
M llvm/test/Transforms/Coroutines/coro-debug-frame-variable.ll
Log Message:
-----------
Revert "[Coroutines] [NFCI] Don't search the DILocalVariable for __promise when constructing the debug varaible for __coro_frame"
This reverts commit 08a0dece2b2431db8abe650bb43cba01e781e1ce.
This series of commits causes Clang crashes. The reproducer is posted on
https://github.com/llvm/llvm-project/commit/08a0dece2b2431db8abe650bb43cba01e781e1ce.
Commit: be7d08cd59b0f23eea88e791b2413b44301949d3
https://github.com/llvm/llvm-project/commit/be7d08cd59b0f23eea88e791b2413b44301949d3
Author: Volodymyr Vasylkun <vvmposeydon at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/add.ll
A llvm/test/Transforms/InstCombine/sext-a-lt-b-plus-zext-a-gt-b-to-uscmp.ll
Log Message:
-----------
[InstCombine] Fold `sext(A < B) + zext(A > B)` into `ucmp/scmp(A, B)` (#103833)
This change also covers the fold of `zext(A > B) - zext(A < B)` since it
is already being canonicalized into the aforementioned pattern.
Proof: https://alive2.llvm.org/ce/z/AgnfMn
Commit: aa4c6557a1281df627cdf06684bdb08da2707200
https://github.com/llvm/llvm-project/commit/aa4c6557a1281df627cdf06684bdb08da2707200
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Fix use-of-uninitialized in ShuffleVectorInst unit test. (#105592)
I accidentally created a dangling ArrayRef local variable. Use a
SmallVector instead.
Commit: 9ebe8b9abde02340494883d1ed1897ef5837473b
https://github.com/llvm/llvm-project/commit/9ebe8b9abde02340494883d1ed1897ef5837473b
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/utils/TableGen/TableGen.cpp
Log Message:
-----------
[NFC][TableGen] Change global variables from anonymous NS to static (#105504)
- Move global variables in TableGen.cpp out of anonymous namespace and
make them static, per LLVM coding standards.
Commit: b5ba726577f7e7af880b62a6352c6208bda4cd0b
https://github.com/llvm/llvm-project/commit/b5ba726577f7e7af880b62a6352c6208bda4cd0b
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxIR] Add tracking for `ShuffleVectorInst::setShuffleMask`. (#105590)
Commit: 6b98a723653214a6cde05ae3cb5233af328ff101
https://github.com/llvm/llvm-project/commit/6b98a723653214a6cde05ae3cb5233af328ff101
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M libc/config/gpu/entrypoints.txt
M libc/docs/gpu/support.rst
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/scanf_core/CMakeLists.txt
M libc/src/stdio/scanf_core/vfscanf_internal.h
Log Message:
-----------
[libc] Add `scanf` support to the GPU build (#104812)
Summary:
The `scanf` function has a "system file" configuration, which is pretty
much what the GPU implementation does at this point. So we should be
able to use it in much the same way.
Commit: c557d8520413476221a4f3bf2b7b3fed17681691
https://github.com/llvm/llvm-project/commit/c557d8520413476221a4f3bf2b7b3fed17681691
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M flang/runtime/numeric.cpp
Log Message:
-----------
[flang][runtime] Add build-time flags to runtime to adjust SELECTED_x_KIND() (#105575)
Add FLANG_RUNTIME_NO_INTEGER_16 and FLANG_RUNTIME_NO_REAL_{2,10,16} to
allow one to disable those kinds from being returned from
SELECTED_INT_KIND and SELECTED_REAL_KIND even if they are actually
available in the C++ build compiler.
Commit: ec8fe7ad81af6c211fb26c34824092e5bca08f5e
https://github.com/llvm/llvm-project/commit/ec8fe7ad81af6c211fb26c34824092e5bca08f5e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/FunctionImport.h
Log Message:
-----------
[LTO] Use enum class for ImportFailureReason (NFC) (#105564)
It turns out that all uses of the enum values here are already
qualified like FunctionImporter::ImportFailureReason::None, so we can
switch to enum class without touching the rest of the codebase.
Commit: fdbc4089e7a6eafa4002a7981bcde94fc378bc18
https://github.com/llvm/llvm-project/commit/fdbc4089e7a6eafa4002a7981bcde94fc378bc18
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionImport.cpp
Log Message:
-----------
[LTO] Compare std::optional<ImportKind> directly with ImportKind (NFC) (#105561)
Note that:
Opt == Val if and only (Opt && *Opt == Val)
where:
std::optional<T> Opt;
T Val;
Commit: 19d3f3417100dc99caa4394fbd26fc0c4702264e
https://github.com/llvm/llvm-project/commit/19d3f3417100dc99caa4394fbd26fc0c4702264e
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lldb/test/Shell/Unwind/trap_frame_sym_ctx.test
Log Message:
-----------
[lldb] Speculative fix for trap_frame_sym_ctx.test
Unfortunately I can't actually reproduce this locally.
Commit: 1e70122cbc187c08de91a3fb42843efb1221e0e9
https://github.com/llvm/llvm-project/commit/1e70122cbc187c08de91a3fb42843efb1221e0e9
Author: Mircea Trofin <mtrofin at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/unittests/Analysis/CtxProfAnalysisTest.cpp
Log Message:
-----------
[ctx_prof] API to get the instrumentation of a BB (#105468)
Analogous to PR #104491
Issue #89287
Commit: f25e6515aa04e53a642bc79eb09a96e418cbbb03
https://github.com/llvm/llvm-project/commit/f25e6515aa04e53a642bc79eb09a96e418cbbb03
Author: Connie Zhu <60797237+connieyzhu at users.noreply.github.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M compiler-rt/test/fuzzer/features_dir.test
Log Message:
-----------
[compiler-rt][test] Added REQUIRES:shell to fuzzer test with for-loop (#105557)
This patch makes the features_dir.test file require a shell when
running. This will make the test file unsupported when running llvm-lit
with its internal shell implementation, which is enabled by turning on
the LIT_USE_INTERNAL_SHELL environment variable. Lit's internal shell
currently does not support for-loop syntax.
Commit: 04c827d0b5e629ba53e8ede94811a13a96db36a4
https://github.com/llvm/llvm-project/commit/04c827d0b5e629ba53e8ede94811a13a96db36a4
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Simplify matchers in ShuffleVectorInst unit test (NFC) (#105596)
Replace instances of `testing::ContainerEq(ArrayRef<int>({1, 2, 3, 4}))`
with `testing::ElementsAre(1, 2, 3, 4)` which is simpler and more
readable.
Commit: 64e464349bfca0d90e07f6db2f710d4d53cdacd4
https://github.com/llvm/llvm-project/commit/64e464349bfca0d90e07f6db2f710d4d53cdacd4
Author: eddyz87 <eddyz87 at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/lib/CodeGen/CGCall.cpp
A clang/test/CodeGen/bpf-attr-bpf-fastcall-1.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
A clang/test/Sema/bpf-attr-bpf-fastcall.c
M llvm/lib/Target/BPF/BPFCallingConv.td
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/BPFMIPeephole.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.h
A llvm/test/CodeGen/BPF/bpf-fastcall-1.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-2.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-3.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-regmask-1.ll
Log Message:
-----------
[BPF] introduce __attribute__((bpf_fastcall)) (#105417)
This commit introduces attribute bpf_fastcall to declare BPF functions
that do not clobber some of the caller saved registers (R0-R5).
The idea is to generate the code complying with generic BPF ABI,
but allow compatible Linux Kernel to remove unnecessary spills and
fills of non-scratched registers (given some compiler assistance).
For such functions do register allocation as-if caller saved registers
are not clobbered, but later wrap the calls with spill and fill
patterns that are simple to recognize in kernel.
For example for the following C code:
#define __bpf_fastcall __attribute__((bpf_fastcall))
void bar(void) __bpf_fastcall;
void buz(long i, long j, long k);
void foo(long i, long j, long k) {
bar();
buz(i, j, k);
}
First allocate registers as if:
foo:
call bar # note: no spills for i,j,k (r1,r2,r3)
call buz
exit
And later insert spills fills on the peephole phase:
foo:
*(u64 *)(r10 - 8) = r1; # Such call pattern is
*(u64 *)(r10 - 16) = r2; # correct when used with
*(u64 *)(r10 - 24) = r3; # old kernels.
call bar
r3 = *(u64 *)(r10 - 24); # But also allows new
r2 = *(u64 *)(r10 - 16); # kernels to recognize the
r1 = *(u64 *)(r10 - 8); # pattern and remove spills/fills.
call buz
exit
The offsets for generated spills/fills are picked as minimal stack
offsets for the function. Allocated stack slots are not used for any
other purposes, in order to simplify in-kernel analysis.
Commit: e2b97f3802ac5a75a603c9cacd2f3ab19b6cf9b5
https://github.com/llvm/llvm-project/commit/e2b97f3802ac5a75a603c9cacd2f3ab19b6cf9b5
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/Darwin/cstring_section.c
Log Message:
-----------
Revert "Speculative fix for asan/TestCases/Darwin/cstring_section.c"
This fix is not enough, and the breaking patch was reverted with 2704b804bec50c2b016bf678bd534c330ec655b6.
This reverts commit bf71c64839c0082e761a4f070ed92e01ced0187c.
Commit: 359c704004ec0826059578c79974d9ea29a8fbff
https://github.com/llvm/llvm-project/commit/359c704004ec0826059578c79974d9ea29a8fbff
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/Transforms/Utils/Local.h
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/test/DebugInfo/Generic/mem2reg-promote-alloca-1.ll
A llvm/test/DebugInfo/sroa-handle-dbg-value.ll
M llvm/test/Transforms/SROA/alignment.ll
M llvm/test/Transforms/SROA/vector-promotion.ll
Log Message:
-----------
Handle #dbg_values in SROA. (#94070)
This patch properly handles #dbg_values in SROA by making sure that any
#dbg_values get moved to before a store just like #dbg_declares do, or
the #dbg_value is correctly updated with the right alloca after an
aggregate alloca is broken up.
The issue stems from swift where #dbg_values are emitted and not
dbg.declares, the SROA pass doesn't handle the #dbg_values correctly and
it causes them to all have undefs
If we look at this simple-ish testcase (This is all I could reduce it
down to, and I am still relatively bad at writing llvm IR by hand so I
apologize in advance):
```
%T4main1TV13TangentVectorV = type <{ %T4main1UV13TangentVectorV, [7 x i8], %T4main1UV13TangentVectorV }>
%T4main1UV13TangentVectorV = type <{ %T1M1SVySfG, [7 x i8], %T4main1VV13TangentVectorV }>
%T1M1SVySfG = type <{ ptr, %Ts4Int8V }>
%Ts4Int8V = type <{ i8 }>
%T4main1VV13TangentVectorV = type <{ %T1M1SVySfG }>
define hidden swiftcc void @"$s4main1TV13TangentVectorV1poiyA2E_AEtFZ"(ptr noalias nocapture sret(%T4main1TV13TangentVectorV) %0, ptr noalias nocapture dereferenceable(57) %1, ptr noalias nocapture dereferenceable(57) %2) #0 !dbg !44 {
entry:
%3 = alloca %T4main1VV13TangentVectorV
%4 = alloca %T4main1UV13TangentVectorV
%5 = alloca %T4main1VV13TangentVectorV
%6 = alloca %T4main1UV13TangentVectorV
%7 = alloca %T4main1VV13TangentVectorV
%8 = alloca %T4main1UV13TangentVectorV
%9 = alloca %T4main1VV13TangentVectorV
%10 = alloca %T4main1UV13TangentVectorV
call void @llvm.lifetime.start.p0(i64 9, ptr %3)
call void @llvm.lifetime.start.p0(i64 25, ptr %4)
call void @llvm.lifetime.start.p0(i64 9, ptr %5)
call void @llvm.lifetime.start.p0(i64 25, ptr %6)
call void @llvm.lifetime.start.p0(i64 9, ptr %7)
call void @llvm.lifetime.start.p0(i64 25, ptr %8)
call void @llvm.lifetime.start.p0(i64 9, ptr %9)
call void @llvm.lifetime.start.p0(i64 25, ptr %10)
%.u1 = getelementptr inbounds %T4main1TV13TangentVectorV, ptr %1, i32 0, i32 0
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %4, ptr align 8 %.u1, i64 25, i1 false)
%.u11 = getelementptr inbounds %T4main1TV13TangentVectorV, ptr %2, i32 0, i32 0
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %6, ptr align 8 %.u11, i64 25, i1 false)
call void @llvm.dbg.value(metadata ptr %4, metadata !62, metadata !DIExpression(DW_OP_deref)), !dbg !75
%.s = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %4, i32 0, i32 0
%.s.c = getelementptr inbounds %T1M1SVySfG, ptr %.s, i32 0, i32 0
%11 = load ptr, ptr %.s.c
%.s.b = getelementptr inbounds %T1M1SVySfG, ptr %.s, i32 0, i32 1
%.s.b._value = getelementptr inbounds %Ts4Int8V, ptr %.s.b, i32 0, i32 0
%12 = load i8, ptr %.s.b._value
%.s2 = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %6, i32 0, i32 0
%.s2.c = getelementptr inbounds %T1M1SVySfG, ptr %.s2, i32 0, i32 0
%13 = load ptr, ptr %.s2.c
%.s2.b = getelementptr inbounds %T1M1SVySfG, ptr %.s2, i32 0, i32 1
%.s2.b._value = getelementptr inbounds %Ts4Int8V, ptr %.s2.b, i32 0, i32 0
%14 = load i8, ptr %.s2.b._value
%.v = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %4, i32 0, i32 2
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %3, ptr align 8 %.v, i64 9, i1 false)
%.v3 = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %6, i32 0, i32 2
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %5, ptr align 8 %.v3, i64 9, i1 false)
%.s4 = getelementptr inbounds %T4main1VV13TangentVectorV, ptr %3, i32 0, i32 0
%.s4.c = getelementptr inbounds %T1M1SVySfG, ptr %.s4, i32 0, i32 0
%18 = load ptr, ptr %.s4.c
%.s5 = getelementptr inbounds %T4main1VV13TangentVectorV, ptr %5, i32 0, i32 0
%.s5.c = getelementptr inbounds %T1M1SVySfG, ptr %.s5, i32 0, i32 0
%20 = load ptr, ptr %.s5.c
%.u2 = getelementptr inbounds %T4main1TV13TangentVectorV, ptr %1, i32 0, i32 2
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %8, ptr align 8 %.u2, i64 25, i1 false)
%.u26 = getelementptr inbounds %T4main1TV13TangentVectorV, ptr %2, i32 0, i32 2
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %10, ptr align 8 %.u26, i64 25, i1 false)
%.s7 = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %8, i32 0, i32 0
%.s7.c = getelementptr inbounds %T1M1SVySfG, ptr %.s7, i32 0, i32 0
%25 = load ptr, ptr %.s7.c
%.s7.b = getelementptr inbounds %T1M1SVySfG, ptr %.s7, i32 0, i32 1
%.s7.b._value = getelementptr inbounds %Ts4Int8V, ptr %.s7.b, i32 0, i32 0
%26 = load i8, ptr %.s7.b._value
%.s8 = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %10, i32 0, i32 0
%.s8.c = getelementptr inbounds %T1M1SVySfG, ptr %.s8, i32 0, i32 0
%27 = load ptr, ptr %.s8.c
%.s8.b = getelementptr inbounds %T1M1SVySfG, ptr %.s8, i32 0, i32 1
%.s8.b._value = getelementptr inbounds %Ts4Int8V, ptr %.s8.b, i32 0, i32 0
%28 = load i8, ptr %.s8.b._value
%.v9 = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %8, i32 0, i32 2
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %7, ptr align 8 %.v9, i64 9, i1 false)
%.v10 = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %10, i32 0, i32 2
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %9, ptr align 8 %.v10, i64 9, i1 false)
%.s11 = getelementptr inbounds %T4main1VV13TangentVectorV, ptr %7, i32 0, i32 0
%.s11.c = getelementptr inbounds %T1M1SVySfG, ptr %.s11, i32 0, i32 0
%32 = load ptr, ptr %.s11.c
%.s12 = getelementptr inbounds %T4main1VV13TangentVectorV, ptr %9, i32 0, i32 0
%.s12.c = getelementptr inbounds %T1M1SVySfG, ptr %.s12, i32 0, i32 0
%34 = load ptr, ptr %.s12.c
call void @llvm.lifetime.end.p0(i64 25, ptr %10)
call void @llvm.lifetime.end.p0(i64 9, ptr %9)
call void @llvm.lifetime.end.p0(i64 25, ptr %8)
call void @llvm.lifetime.end.p0(i64 9, ptr %7)
call void @llvm.lifetime.end.p0(i64 25, ptr %6)
call void @llvm.lifetime.end.p0(i64 9, ptr %5)
call void @llvm.lifetime.end.p0(i64 25, ptr %4)
call void @llvm.lifetime.end.p0(i64 9, ptr %3)
ret void
}
!llvm.module.flags = !{!0, !1, !2, !3, !4, !6, !7, !8, !9, !10, !11, !12, !13, !14, !15}
!swift.module.flags = !{!33}
!llvm.linker.options = !{!34, !35, !36, !37, !38, !39, !40, !41, !42, !43}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 14, i32 4]}
!1 = !{i32 1, !"Objective-C Version", i32 2}
!2 = !{i32 1, !"Objective-C Image Info Version", i32 0}
!3 = !{i32 1, !"Objective-C Image Info Section", !"__DATA, no_dead_strip"}
!4 = !{i32 1, !"Objective-C Garbage Collection", i8 0}
!6 = !{i32 7, !"Dwarf Version", i32 4}
!7 = !{i32 2, !"Debug Info Version", i32 3}
!8 = !{i32 1, !"wchar_size", i32 4}
!9 = !{i32 8, !"PIC Level", i32 2}
!10 = !{i32 7, !"uwtable", i32 1}
!11 = !{i32 7, !"frame-pointer", i32 1}
!12 = !{i32 1, !"Swift Version", i32 7}
!13 = !{i32 1, !"Swift ABI Version", i32 7}
!14 = !{i32 1, !"Swift Major Version", i8 6}
!15 = !{i32 1, !"Swift Minor Version", i8 0}
!16 = distinct !DICompileUnit(language: DW_LANG_Swift, file: !17, imports: !18, sdk: "MacOSX14.4.sdk")
!17 = !DIFile(filename: "/Users/emilpedersen/swift2/swift/test/IRGen/debug_scope_distinct.swift", directory: "/Users/emilpedersen/swift2")
!18 = !{!19, !21, !23, !25, !27, !29, !31}
!19 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !17, entity: !20, file: !17)
!20 = !DIModule(scope: null, name: "main", includePath: "/Users/emilpedersen/swift2/swift/test/IRGen")
!21 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !17, entity: !22, file: !17)
!22 = !DIModule(scope: null, name: "Swift", includePath: "/Users/emilpedersen/swift2/_build/Ninja-RelWithDebInfoAssert+stdlib-RelWithDebInfo/swift-macosx-arm64/lib/swift/macosx/Swift.swiftmodule/arm64-apple-macos.swiftmodule")
!23 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !17, entity: !24, line: 60)
!24 = !DIModule(scope: null, name: "_Differentiation", includePath: "/Users/emilpedersen/swift2/_build/Ninja-RelWithDebInfoAssert+stdlib-RelWithDebInfo/swift-macosx-arm64/lib/swift/macosx/_Differentiation.swiftmodule/arm64-apple-macos.swiftmodule")
!25 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !17, entity: !26, line: 61)
!26 = !DIModule(scope: null, name: "M", includePath: "/Users/emilpedersen/swift2/_build/Ninja-RelWithDebInfoAssert+stdlib-RelWithDebInfo/swift-macosx-arm64/test-macosx-arm64/IRGen/Output/debug_scope_distinct.swift.tmp/M.swiftmodule")
!27 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !17, entity: !28, file: !17)
!28 = !DIModule(scope: null, name: "_StringProcessing", includePath: "/Users/emilpedersen/swift2/_build/Ninja-RelWithDebInfoAssert+stdlib-RelWithDebInfo/swift-macosx-arm64/lib/swift/macosx/_StringProcessing.swiftmodule/arm64-apple-macos.swiftmodule")
!29 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !17, entity: !30, file: !17)
!30 = !DIModule(scope: null, name: "_SwiftConcurrencyShims", includePath: "/Users/emilpedersen/swift2/_build/Ninja-RelWithDebInfoAssert+stdlib-RelWithDebInfo/swift-macosx-arm64/lib/swift/shims")
!31 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !17, entity: !32, file: !17)
!32 = !DIModule(scope: null, name: "_Concurrency", includePath: "/Users/emilpedersen/swift2/_build/Ninja-RelWithDebInfoAssert+stdlib-RelWithDebInfo/swift-macosx-arm64/lib/swift/macosx/_Concurrency.swiftmodule/arm64-apple-macos.swiftmodule")
!33 = !{i1 false}
!34 = !{!"-lswiftCore"}
!35 = !{!"-lswift_StringProcessing"}
!36 = !{!"-lswift_Differentiation"}
!37 = !{!"-lswiftDarwin"}
!38 = !{!"-lswift_Concurrency"}
!39 = !{!"-lswiftSwiftOnoneSupport"}
!40 = !{!"-lobjc"}
!41 = !{!"-lswiftCompatibilityConcurrency"}
!42 = !{!"-lswiftCompatibility56"}
!43 = !{!"-lswiftCompatibilityPacks"}
!44 = distinct !DISubprogram( unit: !16, declaration: !52, retainedNodes: !53)
!45 = !DIFile(filename: "<compiler-generated>", directory: "/")
!46 = !DICompositeType(tag: DW_TAG_structure_type, scope: !47, elements: !48, identifier: "$s4main1TV13TangentVectorVD")
!47 = !DICompositeType(tag: DW_TAG_structure_type, identifier: "$s4main1TVD")
!48 = !{}
!49 = !DISubroutineType(types: !50)
!50 = !{!51}
!51 = !DICompositeType(tag: DW_TAG_structure_type, identifier: "$s4main1TV13TangentVectorVXMtD")
!52 = !DISubprogram( file: !45, type: !49, spFlags: DISPFlagOptimized)
!53 = !{!54, !56, !57}
!54 = !DILocalVariable( scope: !44, type: !55, flags: DIFlagArtificial)
!55 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !46)
!56 = !DILocalVariable( scope: !44, flags: DIFlagArtificial)
!57 = !DILocalVariable( scope: !44, type: !58, flags: DIFlagArtificial)
!58 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !51)
!62 = !DILocalVariable( scope: !63, type: !72, flags: DIFlagArtificial)
!63 = distinct !DISubprogram( type: !66, unit: !16, declaration: !69, retainedNodes: !70)
!64 = !DICompositeType(tag: DW_TAG_structure_type, scope: !65, identifier: "$s4main1UV13TangentVectorVD")
!65 = !DICompositeType(tag: DW_TAG_structure_type, identifier: "$s4main1UVD")
!66 = !DISubroutineType(types: !67)
!67 = !{!68}
!68 = !DICompositeType(tag: DW_TAG_structure_type, identifier: "$s4main1UV13TangentVectorVXMtD")
!69 = !DISubprogram( spFlags: DISPFlagOptimized)
!70 = !{!71, !73}
!71 = !DILocalVariable( scope: !63, flags: DIFlagArtificial)
!72 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !64)
!73 = !DILocalVariable( scope: !63, type: !74, flags: DIFlagArtificial)
!74 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !68)
!75 = !DILocation( scope: !63, inlinedAt: !76)
!76 = distinct !DILocation( scope: !44)
```
if we run
` opt -S -passes=sroa file.ll -o -`
With this patch we will see
```
%.sroa.5.sroa.021 = alloca [7 x i8], align 8
tail call void @llvm.dbg.value(metadata ptr %.sroa.5.sroa.021, metadata !59, metadata !DIExpression(DW_OP_deref, DW_OP_LLVM_fragment, 72, 56)), !dbg !72
%.sroa.5.sroa.014 = alloca [7 x i8], align 8
```
Without this patch we will see:
```
%.sroa.5.sroa.021 = alloca [7 x i8], align 8
%.sroa.5.sroa.014 = alloca [7 x i8], align 8
```
Thus this patch ensures that llvm.dbg.values that use allocas that are broken up still have the correct metadata and debug information is preserved
This is part of a stack of patches and is preceded by: https://github.com/llvm/llvm-project/pull/94068
Commit: d23c24f336674727d281258157fc5b15ce9040a4
https://github.com/llvm/llvm-project/commit/d23c24f336674727d281258157fc5b15ce9040a4
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/test/Instrumentation/NumericalStabilitySanitizer/basic.ll
Log Message:
-----------
[llvm][nsan] Skip function declarations (#105598)
Skip function declarations in the instrumentation pass.
Commit: 2b66417d08d8e87f42cd154370ad1722ae7842c8
https://github.com/llvm/llvm-project/commit/2b66417d08d8e87f42cd154370ad1722ae7842c8
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M libc/src/stdio/scanf_core/CMakeLists.txt
Log Message:
-----------
[libc] Fix accidentally using system file on GPU
Summary:
Forgot to delete this
Commit: 8e0b9c85924ca22a65d57988ea2c5c22a5181ed9
https://github.com/llvm/llvm-project/commit/8e0b9c85924ca22a65d57988ea2c5c22a5181ed9
Author: John Harrison <harjohn at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lldb/test/API/tools/lldb-dap/output/TestDAP_output.py
Log Message:
-----------
[lldb-dap] Skip the lldb-dap output test on windows, it seems all the lldb-dap tests are disabled on windows. (#105604)
This should fix https://lab.llvm.org/buildbot/#/builders/141/builds/1747
Commit: 7854b16d2699ca7cc02d4ea066230d370c751ba9
https://github.com/llvm/llvm-project/commit/7854b16d2699ca7cc02d4ea066230d370c751ba9
Author: vporpo <vporpodas at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxIR] Implement FuncletPadInst, CatchPadInst and CleanupInst (#105294)
This patch implements sandboxir::FuncletPadInst,CatchInst,CleanupInst
mirroring their llvm:: counterparts.
Commit: 0ca77f6656a772624a591261957f6b313a0d544e
https://github.com/llvm/llvm-project/commit/0ca77f6656a772624a591261957f6b313a0d544e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/hypervisor-csr-names.s
M llvm/test/MC/RISCV/machine-csr-names.s
A llvm/test/MC/RISCV/smctr-ssctr-valid.s
M llvm/test/MC/RISCV/supervisor-csr-names.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add CSRs and an instruction for Smctr and Ssctr extensions. (#105148)
https://github.com/riscv/riscv-control-transfer-records/releases/tag/v1.0_rc3
Commit: 65f66d2c605f0c9b0af26244f4d42ca93f552ec8
https://github.com/llvm/llvm-project/commit/65f66d2c605f0c9b0af26244f4d42ca93f552ec8
Author: Ivan R. Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M flang/docs/OpenMP-declare-target.md
M flang/docs/OpenMP-descriptor-management.md
M flang/include/flang/Optimizer/CMakeLists.txt
A flang/include/flang/Optimizer/OpenMP/CMakeLists.txt
A flang/include/flang/Optimizer/OpenMP/Passes.h
A flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CLOptions.inc
M flang/lib/Frontend/CMakeLists.txt
M flang/lib/Optimizer/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/FunctionFiltering.cpp
A flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
A flang/lib/Optimizer/OpenMP/MarkDeclareTarget.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
R flang/lib/Optimizer/Transforms/OMPFunctionFiltering.cpp
R flang/lib/Optimizer/Transforms/OMPMapInfoFinalization.cpp
R flang/lib/Optimizer/Transforms/OMPMarkDeclareTarget.cpp
M flang/tools/bbc/CMakeLists.txt
M flang/tools/fir-opt/CMakeLists.txt
M flang/tools/fir-opt/fir-opt.cpp
M flang/tools/tco/CMakeLists.txt
Log Message:
-----------
[flang][NFC] Move OpenMP related passes into a separate directory (#104732)
Reapplied with fixed library dependencies for shared lib build
Commit: bf88db78bd80cb624b49510c628ba841fb1fed04
https://github.com/llvm/llvm-project/commit/bf88db78bd80cb624b49510c628ba841fb1fed04
Author: itrofimow <i.trofimow at yandex.ru>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/DebugInfo/Symbolize/Symbolize.h
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
Log Message:
-----------
[Symbolizer, DebugInfo] Clean up LLVMSymbolizer API: const string& -> StringRef (#104541)
Nothing in the affected code depends on the `ModuleName` being
null-terminated,
so take it by `StringRef` instead of `const std::string &`.
This change simplifies API consumption, since one doesn't always have a
`std::string` at the call site (might have `std::string_view` instead),
and also gives some minor performance improvements by removing
string-copies in the cache-hit path of `getOrCreateModuleInfo`.
Commit: c62fa63ff1a043dc62b88270680657483f307fae
https://github.com/llvm/llvm-project/commit/c62fa63ff1a043dc62b88270680657483f307fae
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Move mainPart to Ctx. NFC
Ctx was introduced in March 2022 as a more suitable place for such
singletons.
Commit: 796787d07c30cb9448e1f9ff3f3da06c2fc96ccd
https://github.com/llvm/llvm-project/commit/796787d07c30cb9448e1f9ff3f3da06c2fc96ccd
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
Log Message:
-----------
[ELF] Remove unneeded script->. NFC
Commit: 88636854b007affdbe324369b26c9ded66934b22
https://github.com/llvm/llvm-project/commit/88636854b007affdbe324369b26c9ded66934b22
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/sext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/zext.mir
Log Message:
-----------
[RISCV][GISel] Correct registers classes in vector sext/zext.mir tests. NFC
The liveins were always for an LMUL=1 register class even if the
first instruction used a larger regsister class.
One test in zext.mir used the wrong class for the first instruction.
Commit: 503907dc505db1e439e7061113bf84dd105f2e35
https://github.com/llvm/llvm-project/commit/503907dc505db1e439e7061113bf84dd105f2e35
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lld/ELF/LinkerScript.h
Log Message:
-----------
[ELF] LinkerScript: initialize dot. NFC
Ensure that `dot` is initialized even if `script` uses
default-initialization.
Commit: 4629aa17976b4110e6e94e7c92926c789730702e
https://github.com/llvm/llvm-project/commit/4629aa17976b4110e6e94e7c92926c789730702e
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
M lld/ELF/MapFile.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Move script into Ctx. NFC
Ctx was introduced in March 2022 as a more suitable place for such
singletons.
We now use default-initialization for `LinkerScript` and should pay
attention to non-class types (e.g. `dot` is initialized by commit
503907dc505db1e439e7061113bf84dd105f2e35).
Commit: f3bf46f5308a9684f4a5493268d6a96396130871
https://github.com/llvm/llvm-project/commit/f3bf46f5308a9684f4a5493268d6a96396130871
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/anyext.mir
Log Message:
-----------
[RISCV][GISel] Correct registers classes in vector anyext.mir test. NFC
Commit: 8039886e6d8985921802295dbc86401546120ac8
https://github.com/llvm/llvm-project/commit/8039886e6d8985921802295dbc86401546120ac8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/frame-index.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
Log Message:
-----------
AMDGPU: Handle folding frame indexes into s_add_i32 (#101694)
This does not yet enable producing direct frame index
references in s_add_i32, only the lowering.
Commit: ded6dd244cce3e683201a668ce321d4474baa8fb
https://github.com/llvm/llvm-project/commit/ded6dd244cce3e683201a668ce321d4474baa8fb
Author: h-vetinari <h.vetinari at gmx.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/docs/StandardCPlusPlusModules.rst
Log Message:
-----------
[clang][NFC] remove resolved issue from StandardCPlusPlusModules.rst (#105610)
This landed as https://github.com/llvm/llvm-project/pull/102287 for main
& https://github.com/llvm/llvm-project/pull/102561 for 19.x
CC @ChuanqiXu9
Commit: fde2d23ee2a204050a210f2f7b290643a272f737
https://github.com/llvm/llvm-project/commit/fde2d23ee2a204050a210f2f7b290643a272f737
Author: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenPGO.cpp
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M offload/DeviceRTL/CMakeLists.txt
A offload/DeviceRTL/include/Profiling.h
A offload/DeviceRTL/src/Profiling.cpp
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/plugins-nextgen/common/include/GlobalHandler.h
M offload/plugins-nextgen/common/src/GlobalHandler.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/test/CMakeLists.txt
M offload/test/lit.cfg
M offload/test/lit.site.cfg.in
A offload/test/offloading/pgo1.c
Log Message:
-----------
[PGO][OpenMP] Instrumentation for GPU devices (Revision of #76587) (#102691)
This pull request is a revised version of #76587. This pull request
fixes some build issues that were present in the previous version of
this change.
> This pull request is the first part of an ongoing effort to extends
PGO instrumentation to GPU device code. This PR makes the following
changes:
>
> - Adds blank registration functions to device RTL
> - Gives PGO globals protected visibility when targeting a supported
GPU
> - Handles any addrspace casts for PGO calls
> - Implements PGO global extraction in GPU plugins (currently only
dumps info)
>
> These changes can be tested by supplying `-fprofile-instrument=clang`
while targeting a GPU.
Commit: 410f751144e8b2e9574f03e0d0fb8560fe3cb797
https://github.com/llvm/llvm-project/commit/410f751144e8b2e9574f03e0d0fb8560fe3cb797
Author: serge-sans-paille <sergesanspaille at free.fr>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M flang/runtime/copy.cpp
Log Message:
-----------
[Flang][Runtime] Fix type used to store result of typeInfo::Value::Ge… (#105589)
…tValue
Current choice was only working out of accident on 64 bit machine, it
led to an implicit cast to smaller type on 32 bit machine. Use the exact
type instead.
Commit: 820396c3a874f57205bfe52cc82bcac3a0035b3d
https://github.com/llvm/llvm-project/commit/820396c3a874f57205bfe52cc82bcac3a0035b3d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
Log Message:
-----------
[Transforms] Construct SmallVector with iterator ranges (NFC) (#105607)
Commit: 0534c4f693d4643e71f7a02c7937b655fdcd9c82
https://github.com/llvm/llvm-project/commit/0534c4f693d4643e71f7a02c7937b655fdcd9c82
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/Darwin/cstring_section.c
Log Message:
-----------
[asan][Darwin] Simplify test (#105599)
Checking order of sections is not a goal of the test.
The goal is make sure there is only one "Hello"
string and it's in __asan_cstring.
Commit: 5f6172f0684b6a224d207ff8d093fc9aad92e331
https://github.com/llvm/llvm-project/commit/5f6172f0684b6a224d207ff8d093fc9aad92e331
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
A llvm/include/llvm/Transforms/Utils/ControlFlowUtils.h
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/ControlFlowUtils.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/Transforms/FixIrreducible/basic.ll
M llvm/test/Transforms/FixIrreducible/bug45623.ll
M llvm/test/Transforms/FixIrreducible/nested.ll
M llvm/test/Transforms/FixIrreducible/switch.ll
M llvm/test/Transforms/FixIrreducible/unreachable.ll
M llvm/test/Transforms/StructurizeCFG/workarounds/needs-unified-loop-exits.ll
M llvm/test/Transforms/UnifyLoopExits/integer_guards.ll
M llvm/test/Transforms/UnifyLoopExits/nested.ll
M llvm/test/Transforms/UnifyLoopExits/restore-ssa.ll
M llvm/test/Transforms/UnifyLoopExits/undef-phis.ll
Log Message:
-----------
[Transforms] Refactor CreateControlFlowHub (#103013)
CreateControlFlowHub is a method that redirects control flow edges from a set of
incoming blocks to a set of outgoing blocks through a new set of "guard" blocks.
This is now refactored into a separate file with one enhancement: The input to
the method is now a set of branches rather than two sets of blocks.
The original implementation reroutes every edge from incoming blocks to outgoing
blocks. But it is possible that for some incoming block InBB, some successor S
might be in the set of outgoing blocks, but that particular edge should not be
rerouted. The new implementation makes this possible by allowing the user to
specify the targets of each branch that need to be rerouted.
This is needed when improving the implementation of FixIrreducible #101386.
Current use in FixIrreducible does not demonstrate this finer control over the
edges being rerouted. But in UnifyLoopExits, when only one successor of an
exiting block is an exit block, this refinement now reroutes only the relevant
control-flow through the edge; the non-exit successor is not rerouted. This
results in fewer branches and PHI nodes in the hub.
Commit: b4feb26606de84ff53d9b65a3b79c00a2b4d7c22
https://github.com/llvm/llvm-project/commit/b4feb26606de84ff53d9b65a3b79c00a2b4d7c22
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.cpp
M lld/ELF/Target.h
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Move target to Ctx. NFC
Ctx was introduced in March 2022 as a more suitable place for such
singletons.
Follow-up to driver (2022-10) and script (2024-08).
Commit: 67d3ef74b31e1517d4f679e754cc2b3041c95901
https://github.com/llvm/llvm-project/commit/67d3ef74b31e1517d4f679e754cc2b3041c95901
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCCodeEmitter.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVRegisterInfo.td
M llvm/lib/Target/SPIRV/SPIRVSubtarget.h
M llvm/test/CodeGen/SPIRV/constant/global-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-aggregate-constant.ll
M llvm/test/CodeGen/SPIRV/constant/local-bool-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-float-point-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-integers-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-null-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-vector-matrix-constants.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_arbitrary_precision_integers.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_cache_controls/decorate-prefetch-w-cache-controls.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_two_calls.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_global_variable_fpga_decorations/global-var-decorations.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_global_variable_host_access/global-var-host-access.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_inline_assembly/inline_asm.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_optnone.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/builtin-op-wrappers.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_variable_length_array/builtin_alloca.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_variable_length_array/vararr.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_variable_length_array/vararr_spec_const.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_no_integer_wrap_decoration.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_shader_clock/shader_clock.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_subgroup_rotate/subgroup-rotate.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_uniform_group_instructions/uniform-group-instructions.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions-but-one.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions.ll
M llvm/test/CodeGen/SPIRV/function/alloca-load-store.ll
M llvm/test/CodeGen/SPIRV/function/identity-function.ll
M llvm/test/CodeGen/SPIRV/function/multiple-anonymous-functions.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-definition.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-with-attributes.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-with-call.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_DispatchThreadID.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveGetLaneIndex.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/abs.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/acos.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/atan.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/ceil.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cos.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cosh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/exp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/exp2.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/floor.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmad.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/frac.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/lerp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log10.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log2.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/pow.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/rcp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reversebits.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/round.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/rsqrt.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sinh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/smax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/smin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sqrt.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/tan.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/tanh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/trunc.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/umax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/umin.ll
M llvm/test/CodeGen/SPIRV/image/sampler.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic-ptr.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic_acqrel.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic_seq.ll
M llvm/test/CodeGen/SPIRV/instructions/call-complex-function.ll
M llvm/test/CodeGen/SPIRV/instructions/call-trivial-function.ll
M llvm/test/CodeGen/SPIRV/instructions/fcmp.ll
M llvm/test/CodeGen/SPIRV/instructions/float-casts.ll
M llvm/test/CodeGen/SPIRV/instructions/float-fast-flags.ll
M llvm/test/CodeGen/SPIRV/instructions/icmp.ll
M llvm/test/CodeGen/SPIRV/instructions/intrinsics.ll
M llvm/test/CodeGen/SPIRV/instructions/nested-composites.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-bitwise-operations.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-floating-point-arithmetic.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-integer-arithmetic.ll
M llvm/test/CodeGen/SPIRV/instructions/select-ptr-load.ll
M llvm/test/CodeGen/SPIRV/instructions/select.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-nested-composite-store.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-simple-composite-store.ll
M llvm/test/CodeGen/SPIRV/instructions/unreachable.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-bitwise-operations.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-floating-point-arithmetic.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-integer-arithmetic.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/abs.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/assume.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bswap.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ceil.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctlz.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctpop.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/cttz.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fabs.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-intrinsics.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/invariant.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/lifetime.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/add.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/and.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fadd.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmax.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmaximum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmin.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fminimum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmul.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/mul.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/or.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/smax.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/smin.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/umax.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/umin.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/xor.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/maxnum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/nearbyint.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ptr-annotation.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/satur-arith.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/sqrt.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/umul.with.overflow.ll
M llvm/test/CodeGen/SPIRV/pointers/argument-ptr-to-struct.ll
M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-accesschain.ll
M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-load.ll
M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-store.ll
M llvm/test/CodeGen/SPIRV/pointers/complex.ll
M llvm/test/CodeGen/SPIRV/pointers/custom-kernel-arg-type.ll
M llvm/test/CodeGen/SPIRV/pointers/duplicate-type-ptr-def.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-addressspace.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-base-type.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-bitcast-load.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-kernel-arg-char.ll
M llvm/test/CodeGen/SPIRV/pointers/global-ptrtoint.ll
M llvm/test/CodeGen/SPIRV/pointers/global-zeroinitializer.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-builtin-vload-type-discrapency.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-addressspace.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type-deduction-no-bitcast-to-generic.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type-deduction-no-metadata.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-ptr-i8-default-element-type.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-ptr-no-bitcast.ll
M llvm/test/CodeGen/SPIRV/pointers/load-addressspace.ll
M llvm/test/CodeGen/SPIRV/pointers/nested-struct-opaque-pointers.ll
M llvm/test/CodeGen/SPIRV/pointers/ptr-argument-byref.ll
M llvm/test/CodeGen/SPIRV/pointers/ptr-argument-byval.ll
M llvm/test/CodeGen/SPIRV/pointers/store-kernel-arg-i8-ptr-as-value-operand.ll
M llvm/test/CodeGen/SPIRV/pointers/store-kernel-arg-ptr-as-value-operand.ll
M llvm/test/CodeGen/SPIRV/pointers/store-operand-ptr-to-struct.ll
M llvm/test/CodeGen/SPIRV/pointers/struct-opaque-pointers.ll
M llvm/test/CodeGen/SPIRV/pointers/two-bitcast-or-param-users.ll
M llvm/test/CodeGen/SPIRV/pointers/two-subsequent-bitcasts.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-args-rev.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-args.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call-chain.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call-complex.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call-rev.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-call-no-bitcast.ll
M llvm/test/CodeGen/SPIRV/pointers/typeof-ptr-int.ll
M llvm/test/CodeGen/SPIRV/pointers/variables-storage-class.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_ballot.ll
Log Message:
-----------
[SPIR-V] Rework usage of virtual registers' types and classes (#104104)
This PR continues https://github.com/llvm/llvm-project/pull/101732
changes in virtual register processing aimed to improve correctness of
emitted MIR between passes from the perspective of MachineVerifier.
Namely, the following changes are introduced:
* register classes (lib/Target/SPIRV/SPIRVRegisterInfo.td) and
instruction patterns (lib/Target/SPIRV/SPIRVInstrInfo.td) are corrected
and simplified (by removing unnecessary sophisticated options) -- e.g.,
this PR gets rid of duplicating 32/64 bits patterns, removes ANYID
register class and simplifies definition of the rest of register
classes,
* hardcoded LLT scalar types in passes before instruction selection are
corrected -- the goal is to have correct bit width before instruction
selection, and use 64 bits registers for pattern matching in the
instruction selection pass; 32-bit registers remain where they are
described in such terms by SPIR-V specification (like, for example,
creation of virtual registers for scope/mem semantics operands),
* rework virtual register type/class assignment for calls/builtins
lowering,
* a series of minor changes to fix validity of emitted code between
passes:
- ensure that that bitcast changes the type,
- fix the pattern for instruction selection for OpExtInst,
- simplify inline asm operands usage,
- account for arbitrary integer sizes / update legalizer rules;
* add '-verify-machineinstrs' to existed test cases.
See also https://github.com/llvm/llvm-project/issues/88129 that this PR
may resolve.
This PR fixes a great number of issues reported by MachineVerifier and,
as a result, reduces a number of failed test cases for the mode with
expensive checks set on from ~200 to ~57.
Commit: de2b6cb6ab6472a13c68ddcd963aa2f25e298772
https://github.com/llvm/llvm-project/commit/de2b6cb6ab6472a13c68ddcd963aa2f25e298772
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/select-cmp.ll
Log Message:
-----------
[InstCombine] Fold icmp over select of cmp more aggressively (#105536)
When folding an icmp into a select, treat an icmp of a constant with a
one-use ucmp/scmp intrinsic as a simplification. These comparisons will
reduce down to an icmp.
This addresses a regression seen in Rust and also in llvm-opt-benchmark.
Commit: e3389365b5d62bc9781dc9a23b14d72e333018d7
https://github.com/llvm/llvm-project/commit/e3389365b5d62bc9781dc9a23b14d72e333018d7
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M compiler-rt/lib/CMakeLists.txt
Log Message:
-----------
Build SanitizerCommon if ctx_profile enabled (#105495)
ctx_profile has a dependency on SanitizerCommon, so make sure it is
built even if we otherwise disable sanitizers.
Commit: c79d1fa540390f6e37e1ea326153559eeadd0de6
https://github.com/llvm/llvm-project/commit/c79d1fa540390f6e37e1ea326153559eeadd0de6
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/literals.cpp
Log Message:
-----------
[clang][bytecode] Don't discard all void-typed expressions (#105625)
For void-types InitListExprs, we need to diagnose them as invalid. But
only if we are _not_ discarding.
Commit: fab515ca7f3c64b47dd94a92156a4696771ee22a
https://github.com/llvm/llvm-project/commit/fab515ca7f3c64b47dd94a92156a4696771ee22a
Author: Andrei Safronov <safronov at espressif.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.h
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperators.td
A llvm/test/CodeGen/Xtensa/bswap.ll
A llvm/test/CodeGen/Xtensa/ctlz-cttz-ctpop.ll
A llvm/test/CodeGen/Xtensa/div.ll
A llvm/test/CodeGen/Xtensa/mul.ll
A llvm/test/CodeGen/Xtensa/rotl-rotr.ll
A llvm/test/CodeGen/Xtensa/shift.ll
Log Message:
-----------
[Xtensa] Implement lowering Mul/Div/Shift operations. (#99981)
Implement lowering of the Mul/Div operations and also shift parts
operations. Implement lowering of the bit manipulations, like
ROT/SWAP/CTPOP/CTTZ/CTLZ.
Commit: c368a720a0b40bb8fe4aff3971fe9a7009c85aa6
https://github.com/llvm/llvm-project/commit/c368a720a0b40bb8fe4aff3971fe9a7009c85aa6
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
Log Message:
-----------
[clang] Merge lifetimebound and GSL code paths for lifetime analysis (#104906)
In the current lifetime analysis, we have two parallel code paths: one
for lifetimebound and another for GSL. These paths perform the same
logic, both determining whether to continue visiting subexpressions.
This PR merges the two paths into a single code path. As a result, we'll
reduce the overhead by eliminating a redundant visit to subexpressions.
The change is mostly NFC (No Functional Change). The only notable
difference is that when a subexpression is visited due to either
lifetimebound or GSL, we will prioritize the lifetimebound path. This
means the final diagnostic will be -Wdangling (rather than both
`-Wdangling` and `-Wdangling-gsl`)
This might cause a slight change in behavior if the -Wdangling
diagnostic is disabled, but I think this is not a major concern since
both diagnostics are enabled by default.
Fixes #93386
Commit: b4ac5c4b7cefae442fc8365586ff9d2d324380a8
https://github.com/llvm/llvm-project/commit/b4ac5c4b7cefae442fc8365586ff9d2d324380a8
Author: Christian Sigg <csigg at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
R mlir/test/Integration/GPU/CUDA/sm90/asd
Log Message:
-----------
[mlir][cuda] NFC: Remove accidentally committed 'asd' file. (#105491)
Co-authored-by: Christian Sigg <chsigg at users.noreply.github.com>
Commit: 1b664fe2548d4cd5ce7a495cde4a86b5531af123
https://github.com/llvm/llvm-project/commit/1b664fe2548d4cd5ce7a495cde4a86b5531af123
Author: Dhruv Srivastava <dhruv.srivastava at ibm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M lldb/include/lldb/lldb-private-enumerations.h
M lldb/source/Utility/ArchSpec.cpp
Log Message:
-----------
[lldb][AIX] Updating XCOFF,PPC entry in LLDB ArchSpec (#105523)
This PR is in reference to porting LLDB on AIX.
Link to discussions on llvm discourse and github:
1. https://discourse.llvm.org/t/port-lldb-to-ibm-aix/80640
2. #101657
The complete changes for porting are present in this draft PR:
#102601
The changes in this PR are intended to update the Architecture entry for
LLDB with XCOFF,PPC.
1. Added new ArchitectureType `eArchTypeXCOFF`
2. Added a new `ArchDefinitionEntry g_xcoff_arch_entries[]`
3. Added a new case for `XCOFF in ArchSpec::SetArchitecture(..)`
4. Updated `ArchDefinition *g_arch_definitions[]`
Commit: 1e44e7afd799f582171a79355ce353fde134e806
https://github.com/llvm/llvm-project/commit/1e44e7afd799f582171a79355ce353fde134e806
Author: Daniel Cederman <cederman at gaisler.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
A clang/test/Driver/sparc-fix.c
Log Message:
-----------
[Sparc] Add flags to enable errata workaround pass for GR712RC and UT700 (#104742)
This adds the flags -mfix-gr712rc and -mfix-ut700 which enables the
necessary errata workarounds for the GR712RC and UT700 processors. The
functionality enabled by the flags is the same as the functionality
provided by the corresponding GCC flags.
Commit: 00a1a45a7dcdcd8b1f969958a6d927b595567090
https://github.com/llvm/llvm-project/commit/00a1a45a7dcdcd8b1f969958a6d927b595567090
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Target/LLVMIR/llvmir-phi-loc.mlir
Log Message:
-----------
[mlir][llvmir][debug] Correctly generate location for phi nodes. (#105534)
In
[convertBlockImpl](https://github.com/llvm/llvm-project/blob/87eeed1f0ebe57abffde560c25dd9829dc6038f3/mlir/lib/Target/LLVMIR/ModuleTranslation.cpp#L959),
the debug location is set on the builder before the op is processed.
This results in correct location being given to corresponding llvm
instructions. But same is not done when phi nodes are created a few
lines above. This result is phi nodes getting whatever the current debug
location of the builder is. It can be nothing or in worst case a stale
location. Fixed by calling SetCurrentDebugLocation before generating phi
nodes.
Commit: 14c7e4a1844904f3db9b2dc93b722925a8c66b27
https://github.com/llvm/llvm-project/commit/14c7e4a1844904f3db9b2dc93b722925a8c66b27
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/CMakeLists.txt
M llvm/cmake/config-ix.cmake
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/Support/float128.h
M llvm/lib/Analysis/CMakeLists.txt
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Support/APFloat.cpp
Log Message:
-----------
Enable logf128 constant folding for hosts with 128bit long double (#104929)
This is a reland of (#96287). This patch attempts to reduce the reverted
patch's clang compile time by removing #includes of float128.h and
inlining convertToQuad functions instead.
Commit: 15e915a44f0d0bf092214586d3ec86e2bb7636d7
https://github.com/llvm/llvm-project/commit/15e915a44f0d0bf092214586d3ec86e2bb7636d7
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M mlir/include/mlir/Analysis/DataFlow/ConstantPropagationAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/DenseAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/IntegerRangeAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/LivenessAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/SparseAnalysis.h
M mlir/lib/Analysis/DataFlow/ConstantPropagationAnalysis.cpp
M mlir/lib/Analysis/DataFlow/DenseAnalysis.cpp
M mlir/lib/Analysis/DataFlow/IntegerRangeAnalysis.cpp
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/lib/Analysis/DataFlow/SparseAnalysis.cpp
A mlir/test/Analysis/DataFlow/test-last-modified-error.mlir
M mlir/test/lib/Analysis/DataFlow/TestDenseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseDataFlowAnalysis.h
M mlir/test/lib/Analysis/DataFlow/TestDenseForwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestSparseBackwardDataFlowAnalysis.cpp
Log Message:
-----------
[mlir][dataflow] Propagate errors from `visitOperation` (#105448)
Base `DataFlowAnalysis::visit` returns `LogicalResult`, but wrappers's
Sparse/Dense/Forward/Backward `visitOperation` doesn't.
Sometimes it's needed to abort solver early if some unrecoverable
condition detected inside analysis.
Update `visitOperation` to return `LogicalResult` and propagate it to
`solver.initializeAndRun()`. Only `visitOperation` is updated for now,
it's possible to update other hooks like `visitNonControlFlowArguments`,
bit it's not needed immediately and let's keep this PR small.
Hijacked `UnderlyingValueAnalysis` test analysis to test it.
Commit: 378daa6c6fd10d3704be449f2fe9c55df522a6e9
https://github.com/llvm/llvm-project/commit/378daa6c6fd10d3704be449f2fe9c55df522a6e9
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
A llvm/test/Transforms/MemCpyOpt/pr102994.ll
Log Message:
-----------
[MemCpyOpt] Avoid infinite loops in `MemCpyOptPass::processMemCpyMemCpyDependence` (#103218)
Closes https://github.com/llvm/llvm-project/issues/102994.
Commit: ccb2b79655217587accfa592c575f9b7267308b9
https://github.com/llvm/llvm-project/commit/ccb2b79655217587accfa592c575f9b7267308b9
Author: Matt Devereau <matthew.devereau at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/test/Transforms/InstSimplify/ConstProp/logf128.ll
Log Message:
-----------
Fix logf128 tests to allow negative NaNs from (#104929)
Commit: 9ff0468436c957fadcd8926683696a879cbc78a0
https://github.com/llvm/llvm-project/commit/9ff0468436c957fadcd8926683696a879cbc78a0
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
A libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/implicit_ctad.compile.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/implicit_ctad.pass.cpp
A libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/mutex.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/copy_assign.compile.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/copy_ctor.compile.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/default.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/move_assign.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/move_ctor.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_adopt_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_defer_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_duration.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_time_point.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_try_to_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/try_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/try_lock_for.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/try_lock_until.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/unlock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.mod/member_swap.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.mod/nonmember_swap.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.mod/release.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.obs/mutex.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.obs/op_bool.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.obs/owns_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/types.compile.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/types.h
A libcxx/test/support/checking_mutex.h
Log Message:
-----------
[libc++] Refactor the std::unique_lock tests (#102151)
This makes some of the tests not flaky anymore, updates some tests to
also work in C++03 and modernizes them in general.
Commit: 716f7e2d18d03039c13ad90d5b3cb4f65c413b74
https://github.com/llvm/llvm-project/commit/716f7e2d18d03039c13ad90d5b3cb4f65c413b74
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
A llvm/test/Transforms/SimplifyCFG/switch-on-cmp.ll
Log Message:
-----------
[SimplifyCFG] Add tests for switch over cmp intrinsic (NFC)
Commit: 57dc09341e5eef758b1abce78822c51069157869
https://github.com/llvm/llvm-project/commit/57dc09341e5eef758b1abce78822c51069157869
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M cross-project-tests/debuginfo-tests/dexter/dex/utils/Version.py
Log Message:
-----------
[Dexter] Sanitize user details from git repo URL in dexter --version (#105533)
Currently the output of dexter --version contains the raw output of `git
remote get-url origin`, which may contain a username and password. This
patch adds a small change to remove these from the output string. A
similar patch for LLVM's default version string* also removes the git
URL altogether unless opted-in to; it's not clear whether this is a
necessary or desirable step yet, but if so we can trivially remove the
URL from Dexter as well.
*PR here: https://github.com/llvm/llvm-project/pull/105220
Commit: 51ca2354d0a4083b9219df131ceff98bccb622b4
https://github.com/llvm/llvm-project/commit/51ca2354d0a4083b9219df131ceff98bccb622b4
Author: Martin Storsjö <martin at martin.st>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/docs/TestingGuide.rst
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/tests/Inputs/shtest-define/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-define/value-escaped.txt
Log Message:
-----------
[lit] Fix substitutions containing backslashes (#103042)
Substitutions can be added in a couple different ways; they can be added
via the calling python scripts by adding entries to the
config.substitutions dictionary, or via DEFINE lines in the scripts
themselves.
The substitution strings passed to Python's re classes are interpreted
so that backslashes expand to escape sequences, and literal backslashes
need to be escaped.
On Unix, the script defined substitutions don't (usually, so far)
contain backslashes - but on Windows, they often do, due to paths
containing backslashes. This lead to a Windows specific escaping of
backslashes before doing Python re substitutions - since
7c9eab8fef0ed79a5911d21eb97b6b0fa9d39f82. There's nothing inherently
Windows specific about this though - any intended literal backslashes in
the substitution strings need to be escaped; this is how the Python re
API works.
The DEFINE lines were added later, and in order to cope with
backslashes, escaping of backslashes was added in the SubstDirective
class in TestRunner, applying to DEFINE lines in the tests only.
The fact that the escaping right before passing to the Python re API was
done conditionally on Windows led to two inconsistencies:
- DEFINE lines in the tests that contain backslashes got double
backslashes on Windows. (This was visible as a FIXME in
llvm/utils/lit/tests/Inputs/shtest-define/value-escaped.txt.)
- Script provided substitutions containing backslashes did not work on
Unix, but they did work on Windows.
By removing the escaping from SubstDirective and escaping it
unconditionally in the processLine function, before feeding the
substitutions to Python's re classes, we should have consistent
behaviour across platforms, and get rid of the FIXME in the lit test.
This fixes issues with substitutions containing backslashes on Unix
platforms, as encountered in PR #86649.
Commit: f67388232384682fb442d6e5501d9259c41fd714
https://github.com/llvm/llvm-project/commit/f67388232384682fb442d6e5501d9259c41fd714
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/ctlz-codesize.ll
M llvm/test/Analysis/CostModel/X86/ctlz-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/ctlz.ll
M llvm/test/Analysis/CostModel/X86/cttz-codesize.ll
M llvm/test/Analysis/CostModel/X86/cttz-sizelatency.ll
M llvm/test/CodeGen/X86/atomic-bit-test.ll
M llvm/test/CodeGen/X86/bit_ceil.ll
M llvm/test/CodeGen/X86/combine-or.ll
M llvm/test/CodeGen/X86/ctlo.ll
M llvm/test/CodeGen/X86/ctlz.ll
M llvm/test/CodeGen/X86/cttz.ll
M llvm/test/CodeGen/X86/known-never-zero.ll
M llvm/test/CodeGen/X86/lzcnt-cmp.ll
M llvm/test/CodeGen/X86/pr57673.ll
M llvm/test/CodeGen/X86/pr89877.ll
M llvm/test/CodeGen/X86/pr92569.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cttz-ctlz.ll
M llvm/test/Transforms/SLPVectorizer/X86/ctlz.ll
Log Message:
-----------
[X86] Allow speculative BSR/BSF instructions on targets with CMOV (#102885)
Currently targets without LZCNT/TZCNT won't speculate with BSR/BSF instructions in case they have a zero value input, meaning we always insert a test+branch for the zero-input case.
This patch proposes we allow speculation if the target has CMOV, and perform a branchless select instead to handle the zero input case. This will predominately help x86-64 targets where we haven't set any particular cpu target. We already always perform BSR/BSF instructions if we were lowering a CTLZ/CTTZ_ZERO_UNDEF instruction.
Commit: c46b41aaa6eaa787f808738d14c61a2f8b6d839f
https://github.com/llvm/llvm-project/commit/c46b41aaa6eaa787f808738d14c61a2f8b6d839f
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/test/Transforms/LoadStoreVectorizer/AArch64/pr37865.ll
Log Message:
-----------
LSV: forbid load-cycles when vectorizing; fix bug (#104815)
Forbid load-load cycles which would crash LoadStoreVectorizer when
reordering instructions.
Fixes #37865.
Commit: 93a9406af52a190ed37270839678b98f2e86a739
https://github.com/llvm/llvm-project/commit/93a9406af52a190ed37270839678b98f2e86a739
Author: David Green <david.green at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/rem.ll
Log Message:
-----------
[AArch64] Add GISel srem/urem tests of various sizes. NFC
Commit: 02cb7c9ef5aecea3a820bc98b50adf4d7c4c5eb6
https://github.com/llvm/llvm-project/commit/02cb7c9ef5aecea3a820bc98b50adf4d7c4c5eb6
Author: David Green <david.green at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/rem.ll
Log Message:
-----------
[AArch64][GlobalISel] Libcall i128 srem/urem and scalarize more vector types.
This better handles i128 scalar and vector types, and allows some of the other
odd-sized-vectors to successfully lower under GISel.
Commit: 61194617ad7862f144e0f6db34175553e8c34763
https://github.com/llvm/llvm-project/commit/61194617ad7862f144e0f6db34175553e8c34763
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/waitcnt-vmcnt-loop.mir
Log Message:
-----------
[AMDGPU] Add GFX12 test coverage for vmcnt flushing in loop headers (#105548)
Commit: 5506831f7bc8dc04ebe77f4d26940007bfb4ab39
https://github.com/llvm/llvm-project/commit/5506831f7bc8dc04ebe77f4d26940007bfb4ab39
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-vmcnt-loop.mir
Log Message:
-----------
[AMDGPU] GFX12 VMEM loads can write VGPR results out of order (#105549)
Fix SIInsertWaitcnts to account for this by adding extra waits to avoid
WAW dependencies.
Commit: 5bbd5984306ab0bdd89a2e81cd4965e5ae51c3fb
https://github.com/llvm/llvm-project/commit/5bbd5984306ab0bdd89a2e81cd4965e5ae51c3fb
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/cmake/modules/Findzstd.cmake
Log Message:
-----------
[cmake] Include GNUInstallDirs before using variables defined by it. (#83807)
This fixes an odd problem with the regex when `CMAKE_INSTALL_LIBDIR` is
not defined:
`string sub-command REGEX, mode REPLACE: regex "$" matched an empty
string.`
Fixes llvm/llvm-project#83802
Commit: 743e70bb7578276ac331c534547ef0d65600a8c1
https://github.com/llvm/llvm-project/commit/743e70bb7578276ac331c534547ef0d65600a8c1
Author: Matt Davis <mattd at nvidia.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/include/llvm/IR/DebugProgramInstruction.h
Log Message:
-----------
[DebugInfo][NFC] Constify debug DbgVariableRecord::{isDbgValue,isDbgDeclare} (#105570)
Constify debug DbgVariableRecord::{isDbgValue,isDbgDeclare}.
Commit: 7323e7eee3a819e9a2d8ec29f00d362bcad87731
https://github.com/llvm/llvm-project/commit/7323e7eee3a819e9a2d8ec29f00d362bcad87731
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M lldb/bindings/python/python-wrapper.swig
Log Message:
-----------
Revert "[lldb][swig] Use the correct variable in the return statement"
This reverts commit 65281570afd7e35e01533b07c6c2937de410fc52.
I'm reverting https://github.com/llvm/llvm-project/pull/104523
(https://github.com/llvm/llvm-project/commit/f01f80ce6ca7640bb0e267b84b1ed0e89b57e2d9)
and this fixup belongs to the same series of changes.
Commit: aa70f83e660453c006193aab7ba67c94db236948
https://github.com/llvm/llvm-project/commit/aa70f83e660453c006193aab7ba67c94db236948
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
R lldb/test/API/tools/lldb-dap/stackTrace/subtleFrames/Makefile
R lldb/test/API/tools/lldb-dap/stackTrace/subtleFrames/TestDAP_subtleFrames.py
R lldb/test/API/tools/lldb-dap/stackTrace/subtleFrames/main.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
Log Message:
-----------
Revert "[lldb-dap] Mark hidden frames as "subtle" (#105457)"
This reverts commit 6f456024c37424d9c8cc1cea07126a28f246588d, which
depends on https://github.com/llvm/llvm-project/pull/104523, which I'm
reverting.
Commit: 547917aebd1e79a8929b53f0ddf3b5185ee4df74
https://github.com/llvm/llvm-project/commit/547917aebd1e79a8929b53f0ddf3b5185ee4df74
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M lldb/bindings/python/python-wrapper.swig
M lldb/include/lldb/API/SBFrame.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/include/lldb/Target/StackFrameList.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/Target/Thread.h
M lldb/source/API/SBFrame.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/Commands/CommandCompletions.cpp
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/StackFrameList.cpp
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStepOut.cpp
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/commands/frame/recognizer/main.m
M lldb/test/API/commands/frame/recognizer/recognizer.py
R lldb/test/API/lang/cpp/std-function-recognizer/Makefile
R lldb/test/API/lang/cpp/std-function-recognizer/TestStdFunctionRecognizer.py
R lldb/test/API/lang/cpp/std-function-recognizer/main.cpp
Log Message:
-----------
Revert "[lldb] Extend frame recognizers to hide frames from backtraces (#104523)"
This reverts commit f01f80ce6ca7640bb0e267b84b1ed0e89b57e2d9.
This commit introduces an msan violation. See the discussion on https://github.com/llvm/llvm-project/pull/104523.
Commit: 125aa10b3d645bd26523a1bc321bb2e6b1cf04e1
https://github.com/llvm/llvm-project/commit/125aa10b3d645bd26523a1bc321bb2e6b1cf04e1
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Fix void unary * operators (#105640)
Discard the subexpr.
Commit: 6932f47cfdf4734d68759586047aee240861058e
https://github.com/llvm/llvm-project/commit/6932f47cfdf4734d68759586047aee240861058e
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[NFC][VPlan] Correct two typos in comments.
Commit: d7da79f2cd025ab1a526c7011aab062817a656b2
https://github.com/llvm/llvm-project/commit/d7da79f2cd025ab1a526c7011aab062817a656b2
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/utils/TableGen/NeonEmitter.cpp
M llvm/include/llvm/TableGen/SetTheory.h
M llvm/lib/TableGen/SetTheory.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
Log Message:
-----------
[NFC][SetTheory] Refactor to use const pointers and range loops (#105544)
- Refactor SetTheory code to use const pointers when possible.
- Use auto for variables initialized using dyn_cast<>.
- Use range based for loops and early continue.
Commit: c73b14ceaaea9b98d7318b97b70453388e758704
https://github.com/llvm/llvm-project/commit/c73b14ceaaea9b98d7318b97b70453388e758704
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx17.rst
M libcxx/docs/Status/Cxx17Papers.csv
Log Message:
-----------
[libc++] Fix the documentation build
There was a duplicate link target.
Commit: 6d30b67cf0fdd5f417af53b4acd593ded37b2db9
https://github.com/llvm/llvm-project/commit/6d30b67cf0fdd5f417af53b4acd593ded37b2db9
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx17.rst
M libcxx/docs/Status/Cxx20.rst
M libcxx/docs/Status/Cxx23.rst
M libcxx/docs/index.rst
Log Message:
-----------
[libc++] Add link to the Github conformance table from the documentation
Commit: a964635939ed9fadcaf6833b29f4ebeb9a9df4ef
https://github.com/llvm/llvm-project/commit/a964635939ed9fadcaf6833b29f4ebeb9a9df4ef
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[mlir][OpenMP] Add optional alloc region to reduction decl (#102522)
This region is intended to separate alloca operations from reduction
variable initialization. This makes it easier to hoist allocas to the
entry block before control flow and complex code for initialization.
The verifier checks that there is at most one block in the alloc region.
This is not sufficient to avoid control flow in general MLIR, but by the
time we are converting to LLVMIR structured control flow should already
have been lowered to the cf dialect.
1/3
Part 2: https://github.com/llvm/llvm-project/pull/102524
Part 3: https://github.com/llvm/llvm-project/pull/102525
Commit: 2efc81aff4a18a640c585d507c357868162dbd43
https://github.com/llvm/llvm-project/commit/2efc81aff4a18a640c585d507c357868162dbd43
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-private.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-byref.mlir
Log Message:
-----------
[mlir][OpenMP] Convert reduction alloc region to LLVMIR (#102524)
The intention of this change is to ensure that allocas end up in the
entry block not spread out amongst complex reduction variable
initialization code.
The tests we have are quite minimized for readability and
maintainability, making the benefits less obvious. The use case for this
is when there are multiple reduction variables each will multiple blocks
inside of the init region for that reduction.
2/3
Part 1: https://github.com/llvm/llvm-project/pull/102522
Part 3: https://github.com/llvm/llvm-project/pull/102525
Commit: f2027a9388728094d84837fc0fdd2e0325362e51
https://github.com/llvm/llvm-project/commit/f2027a9388728094d84837fc0fdd2e0325362e51
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M flang/lib/Lower/OpenMP/ReductionProcessor.cpp
M flang/test/Lower/OpenMP/delayed-privatization-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-add-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-array-lb.f90
M flang/test/Lower/OpenMP/parallel-reduction-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-array2.f90
M flang/test/Lower/OpenMP/parallel-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/reduction-array-intrinsic.f90
M flang/test/Lower/OpenMP/sections-array-reduction.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add-byref.f90
R flang/test/Lower/OpenMP/wsloop-reduction-add-hlfir-byref.f90
R flang/test/Lower/OpenMP/wsloop-reduction-add-hlfir.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-assumed-shape.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-byref.f90
R flang/test/Lower/OpenMP/wsloop-reduction-max-hlfir-byref.f90
R flang/test/Lower/OpenMP/wsloop-reduction-max-hlfir.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
M flang/test/Lower/OpenMP/wsloop-reduction-pointer.f90
Log Message:
-----------
[flang][OpenMP] use reduction alloc region (#102525)
I removed the `*-hlfir*` tests because they are duplicate now that the
other tests have been updated to use the HLFIR lowering.
3/3
Part 1: https://github.com/llvm/llvm-project/pull/102522
Part 2: https://github.com/llvm/llvm-project/pull/102524
Commit: d163935585cd8d538da8326a8e4e9e7da8aa1755
https://github.com/llvm/llvm-project/commit/d163935585cd8d538da8326a8e4e9e7da8aa1755
Author: Volodymyr Vasylkun <vvmposeydon at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/scmp.ll
Log Message:
-----------
[InstCombine] Fold `scmp(x -nsw y, 0)` to `scmp(x, y)` (#105583)
Proof: https://alive2.llvm.org/ce/z/v6VtXz
Commit: c82f7976ae20a7c76904415eae1964bab78f1a04
https://github.com/llvm/llvm-project/commit/c82f7976ae20a7c76904415eae1964bab78f1a04
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/CXX/temp/temp.decls/temp.mem/p1.cpp
Log Message:
-----------
[Clang][Sema] Rebuild template parameters for out-of-line template definitions and partial specializations (#104030)
We need to rebuild the template parameters of out-of-line
definitions/specializations of member templates in the context of the
current instantiation for the purposes of declaration matching. We
already do this for function templates and class templates, but not
variable templates, partial specializations of variable template, and
partial specializations of class templates. This patch fixes the latter
cases.
Commit: db94852b9b4ca1008ef2889175fe3af51f26a5b0
https://github.com/llvm/llvm-project/commit/db94852b9b4ca1008ef2889175fe3af51f26a5b0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/lib/AST/ByteCode/FunctionPointer.cpp
M clang/lib/AST/ByteCode/FunctionPointer.h
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/CMakeLists.txt
M clang/test/AST/ByteCode/c.c
Log Message:
-----------
[clang][bytecode] Allow adding offsets to function pointers (#105641)
Convert them to Pointers, do the offset calculation and then convert
them back to function pointers.
Commit: 7e3f9dd21f82751ad93a54756f5f098560f31097
https://github.com/llvm/llvm-project/commit/7e3f9dd21f82751ad93a54756f5f098560f31097
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/bit-checks.ll
Log Message:
-----------
[InstCombine] Add more tests for foldLogOpOfMaskedICmps transform (NFC)
Tests for cases that would have been regressed by
https://github.com/llvm/llvm-project/pull/104941.
Commit: dd3b43a455793e79b84171b8d522fc4d86dea61d
https://github.com/llvm/llvm-project/commit/dd3b43a455793e79b84171b8d522fc4d86dea61d
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[mlir][OpenMP][NFC] clean up optional reduction region parsing (#105644)
This can be handled in ODS instead of writing custom parsing/printing
code.
Thanks for the idea @skatrak
Commit: 318b0678e3baac5723a3805d719c04b9cf1d95c3
https://github.com/llvm/llvm-project/commit/318b0678e3baac5723a3805d719c04b9cf1d95c3
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir][LLVM] Add support for constant struct with multiple fields (#102752)
Currently `mlir.llvm.constant` of structure types restricts that the
structure type effectively represents a complex type -- it must have
exactly two fields of the same type and the field type must be either an
integer type or a float type.
This PR relaxes this restriction and it allows the structure type to
have an arbitrary number of fields.
Commit: d46812a7be13cae9a9f4f3491cb60a20c57c8da6
https://github.com/llvm/llvm-project/commit/d46812a7be13cae9a9f4f3491cb60a20c57c8da6
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/different-loops-recs.ll
M llvm/test/Analysis/ScalarEvolution/no-wrap-add-exprs.ll
M llvm/test/Transforms/PhaseOrdering/scev-custom-dl.ll
Log Message:
-----------
[Analysis] Teach ScalarEvolution::getRangeRef about more dereferenceable objects (#104778)
Whilst dealing with review comments on
https://github.com/llvm/llvm-project/pull/96752
I discovered that SCEV does not know about the dereferenceable attribute
on function arguments so I have updated getRangeRef to make use of it
by calling getPointerDereferenceableBytes.
Commit: 327edbe07ab4370ceb20ea7c805f64950871d835
https://github.com/llvm/llvm-project/commit/327edbe07ab4370ceb20ea7c805f64950871d835
Author: Zaara Syeda <syzaara at ca.ibm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
Log Message:
-----------
[PowerPC] Fix mask for __st[d/w/h/b]cx builtins (#104453)
These builtins are currently returning CR0 which will have the format
[0, 0, flag_true_if_saved, XER].
We only want to return flag_true_if_saved. This patch adds a shift to
remove the XER bit before returning.
Commit: 11e1378e56ef78e51e4fe7180511c6f40ae8dc67
https://github.com/llvm/llvm-project/commit/11e1378e56ef78e51e4fe7180511c6f40ae8dc67
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/sve-insert-scalable-vector.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Increase vector.insert test coverage.
Commit: c8f40e7cf546557e885fe06b0349753d78193872
https://github.com/llvm/llvm-project/commit/c8f40e7cf546557e885fe06b0349753d78193872
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/bit-checks.ll
Log Message:
-----------
[InstCombine] Add more test variants with poison elements (NFC)
Commit: 32679e10a9b66405c340213993f65b2edf5a794a
https://github.com/llvm/llvm-project/commit/32679e10a9b66405c340213993f65b2edf5a794a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/bit-checks.ll
Log Message:
-----------
[InstCombine] Handle logical op for and/or of icmp 0/-1
This aligns the transform with what foldLogOpOfMaskedICmp() does.
Commit: 41dcdfbff12a9bc06af25457d603b6ec26b6b45f
https://github.com/llvm/llvm-project/commit/41dcdfbff12a9bc06af25457d603b6ec26b6b45f
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libcxx/CMakeLists.txt
R libcxx/docs/BuildingLibcxx.rst
M libcxx/docs/Contributing.rst
M libcxx/docs/TestingLibcxx.rst
A libcxx/docs/UserDocumentation.rst
R libcxx/docs/UsingLibcxx.rst
A libcxx/docs/VendorDocumentation.rst
M libcxx/docs/index.rst
Log Message:
-----------
[libc++][docs] Major update to the documentation
- Landing page: add link to the libc++ Discord channel
- Landing page: reorder "Getting Involved" above "Design documents"
- Landing page: remove "Notes and Known Issues" which was completely outdated
- Rename "Using Libc++" to "User Documentation" and update contents
- Rename "Building Libc++" to "Vendor Documentation" and update contents
The "BuildingLibcxx" and "UsingLibcxx" pages have basically been used for
vendor and user documentation respectively. However, they were named in
a way that doesn't really make that clear. Renaming the pages now gives
us a location to clearly document what we target at vendors and what we
target at users, and to do that separately.
Commit: 00baa1af0f73f0e4c12edc12f57e62021ada7ccd
https://github.com/llvm/llvm-project/commit/00baa1af0f73f0e4c12edc12f57e62021ada7ccd
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/include/llvm/IR/VPIntrinsics.def
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
Log Message:
-----------
[DAG][RISCV] Use vp_reduce_* when widening illegal types for reductions (#105455)
This allows the use a single wider operation with a restricted EVL
instead of padding the vector with the neutral element.
For RISCV specifically, it's worth noting that an alternate padded
lowering is available when VL is one less than a power of two, and LMUL
<= m1. We could slide the vector operand up by one, and insert the
padding via a vslide1up. We don't currently pattern match this, but we
could. This form would arguably be better iff the surrounding code
wanted VL=4. This patch will force a VL toggle in that case instead.
Basically, it comes down to a question of whether we think odd sized
vectors are going to appear clustered with odd size vector operations,
or mixed in with larger power of two operations.
Note there is a potential downside of using vp nodes; we loose any
generic DAG combines which might have applied to the widened form.
Commit: 26a8a857dcdc219d57e39b495ff58aef7d746fdc
https://github.com/llvm/llvm-project/commit/26a8a857dcdc219d57e39b495ff58aef7d746fdc
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector-shuffle.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-non-power-of-2.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-combine.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/zve32-types.ll
Log Message:
-----------
[RISCV] Introduce local peephole to reduce VLs based on demanded VL (#104689)
This is a fairly narrow transform (at the moment) to reduce the VLs of
instructions feeding a store with a smaller VL. Note that the goal of
this transform isn't really to reduce VL - it's to reduce VL *toggles*.
To our knowledge, small reductions in VL without also changing LMUL are
generally not profitable on existing hardware.
For a single use instruction without side effects, fp exceptions, or a
result dependency on VL, reducing VL is legal if only a subset of
elements are legal. We'd already implemented this logic for vmv.v.v, and
this patch simply applies it to stores as an alternate root.
Longer term, I plan to extend this to other root instructions (i.e.
different kind of stores, reduces, etc..), and add a more general
recursive walkback through operands.
One risk with the dataflow based approach is that we could be reducing
VL of an instruction scheduled in a region with the wider VL (i.e. mixed
mode computations) forcing an additional VL toggle. An example of this
is the @insert_subvector_dag_loop test case, but it doesn't appear to
happen widely. I think this is a risk we should accept.
Commit: 29cb1e6b4fccb99d32eaa4b81af481d94be79242
https://github.com/llvm/llvm-project/commit/29cb1e6b4fccb99d32eaa4b81af481d94be79242
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-no-active-lanes-cmp.ll
Log Message:
-----------
[AArch64] optimise SVE cmp intrinsics with no active lanes (#104779)
This patch extends https://github.com/llvm/llvm-project/pull/73964 and
optimises SVE cmp intrinsics to zero vector when predicate is zero.
Commit: 58ac764b013606a67043cde6a287db3648d87582
https://github.com/llvm/llvm-project/commit/58ac764b013606a67043cde6a287db3648d87582
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libcxx/docs/ReleaseNotes.rst
R libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/ReleaseNotes/19.rst
R libcxx/docs/Status/Ranges.rst
R libcxx/docs/Status/RangesAlgorithms.csv
R libcxx/docs/Status/RangesMajorFeatures.csv
R libcxx/docs/Status/RangesViews.csv
R libcxx/docs/Status/Spaceship.rst
R libcxx/docs/Status/SpaceshipPapers.csv
R libcxx/docs/Status/SpaceshipProjects.csv
M libcxx/docs/index.rst
Log Message:
-----------
[libc++] Post-LLVM19-release docs cleanup (#99667)
This patch removes obsolete status pages for projects that were
completed: LLVM 18 release, C++20 Ranges and Spaceship support.
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: 4d85285ff68d11fcb8c6b296799a11074e7ff7d7
https://github.com/llvm/llvm-project/commit/4d85285ff68d11fcb8c6b296799a11074e7ff7d7
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/switch-on-cmp.ll
Log Message:
-----------
[SimplifyCFG] Fold switch over ucmp/scmp to icmp and br (#105636)
If we switch over ucmp/scmp and have two switch cases going to the same
destination, we can convert into icmp+br.
Fixes https://github.com/llvm/llvm-project/issues/105632.
Commit: 9402bb090824312882d47c8e52a1b1aeacbcfd3c
https://github.com/llvm/llvm-project/commit/9402bb090824312882d47c8e52a1b1aeacbcfd3c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/same-scalar-in-same-phi-extract.ll
Log Message:
-----------
[SLP]Do not count extractelement costs in unreachable/landing pad blocks.
If the external user of the scalar to be extract is in
unreachable/landing pad block, we can skip counting their cost.
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/105667
Commit: ec5e58519d24010beea937fccf5fc4541db3ec21
https://github.com/llvm/llvm-project/commit/ec5e58519d24010beea937fccf5fc4541db3ec21
Author: Mital Ashok <mital at mitalashok.co.uk>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[NFC] Replace bool <= bool comparison (#102948)
Static analyser tool cppcheck flags ordered comparison with `bool`s.
Replace with equivalent logical operators to prevent this.
Closes #102912
Commit: c4c5fdd933fa2d1f7624d863d05a4fb982b4c074
https://github.com/llvm/llvm-project/commit/c4c5fdd933fa2d1f7624d863d05a4fb982b4c074
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
R llvm/test/CodeGen/AMDGPU/indirect-addressing-si-noopt.ll
R llvm/test/CodeGen/AMDGPU/indirect-addressing-si-pregfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
Log Message:
-----------
[AMDGPU] Generate checks for vector indexing. NFC. (#105668)
This allows combining some test files that were only split because
adding new RUN lines introduced too much churn in the checks.
Commit: 8ba2ae31fa6a386d42aec5dedd685e99747dbf0f
https://github.com/llvm/llvm-project/commit/8ba2ae31fa6a386d42aec5dedd685e99747dbf0f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.h
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
Log Message:
-----------
[RISCV][GISel] Implement canLowerReturn. (#105465)
This allows us to handle return values that are too large to fit in x10
and x11. They will be converted to a sret by passing a pointer to where
to store the return value.
Commit: e76db25832d6ac2d3a36769b26f982d9dee4b346
https://github.com/llvm/llvm-project/commit/e76db25832d6ac2d3a36769b26f982d9dee4b346
Author: Dan Gohman <dev at sunfishcode.online>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/DwarfEHPrepare.cpp
A llvm/test/CodeGen/AArch64/dwarf-eh-prepare-dbg.ll
Log Message:
-----------
[DwarfEhPrepare] Assign dummy debug location for more inserted _Unwind_Resume calls (#105513)
Similar to the fix for #57469, ensure that the other `_Unwind_Resume`
call emitted by DwarfEHPrepare has a debug location if needed.
This fixes https://github.com/nbdd0121/unwinding/issues/34.
Commit: 69332bb8995aef60d830406de12cb79a50390261
https://github.com/llvm/llvm-project/commit/69332bb8995aef60d830406de12cb79a50390261
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/multiple_reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/scalarization-overhead.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/shuffle-vectors-mask-size.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/combined-loads-stored.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll
M llvm/test/Transforms/SLPVectorizer/X86/addsub.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-many-users-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-node-same-as-vect-but-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/inst_size_bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark-partial-loads-vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reused-pointer.ll
M llvm/test/Transforms/SLPVectorizer/X86/schedule_budget_debug_info.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2-unord.ll
M llvm/test/Transforms/SLPVectorizer/X86/tiny-tree.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect-gather-same-nodes.ll
Log Message:
-----------
[SLP]Improve/fix subvectors in gather/buildvector nodes handling
SLP vectorizer has an estimation for gather/buildvector nodes, which
contain some scalar loads. SLP vectorizer performs pretty similar (but
large in SLOCs) estimation, which not always correct. Instead, this
patch implements clustering analysis and actual node allocation with the
full analysis for the vectorized clustered scalars (not only loads, but
also some other instructions) with the correct cost estimation and
vector insert instructions. Improves overall vectorization quality and
simplifies analysis/estimations.
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/104144
Commit: 3c54aa14aa5f92ea2c96b85efbc7945ed55451e4
https://github.com/llvm/llvm-project/commit/3c54aa14aa5f92ea2c96b85efbc7945ed55451e4
Author: Sumanth Gundapaneni <sumanth.gundapaneni at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/IR/Verifier.cpp
Log Message:
-----------
[Verifier] Make lrint and lround intrinsic cases concise. NFC (#105676)
Commit: 9f418057dc73e4e5cb94a7cd671097275ffc29fc
https://github.com/llvm/llvm-project/commit/9f418057dc73e4e5cb94a7cd671097275ffc29fc
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
A lldb/test/Shell/Process/Inputs/a.out.yaml
A lldb/test/Shell/Process/Inputs/corefile.yaml
A lldb/test/Shell/Process/ProcessMachCoreArch.test
Log Message:
-----------
[lldb] Pick the correct architecutre when target and core file disagree (#105576)
In f9f3316, Adrian fixed an issue where LLDB wouldn't update the
target's architecture when the process reported a different triple that
only differed in its sub-architecture.
This unintentionally regressed core file debugging when the core file
reports the base architecture (e.g. armv7) while the main binary knows
the correct CPU subtype (e.g. armv7em). After the aforementioned change,
we update the target architecture from armv7em to armv7. Fix the issue
by trusting the target architecture over the ProcessMachCore process.
rdar://133834304
Commit: fe5d1f901a709bc6a2180b7a77b9d5948c6c3482
https://github.com/llvm/llvm-project/commit/fe5d1f901a709bc6a2180b7a77b9d5948c6c3482
Author: Rodolfo Wottrich <rgwott at users.noreply.github.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/test/MC/ARM/directive-fpu-multiple.s
A llvm/test/MC/ARM/directive-fpu-single-crypto-neon-fp-armv8.s
A llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-d16.s
A llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-sp-d16.s
A llvm/test/MC/ARM/directive-fpu-single-fp-armv8.s
A llvm/test/MC/ARM/directive-fpu-single-fpv4-sp-d16.s
A llvm/test/MC/ARM/directive-fpu-single-fpv5-d16.s
A llvm/test/MC/ARM/directive-fpu-single-fpv5-sp-d16.s
A llvm/test/MC/ARM/directive-fpu-single-neon-fp-armv8.s
A llvm/test/MC/ARM/directive-fpu-single-neon-fp16.s
A llvm/test/MC/ARM/directive-fpu-single-neon-vfpv4.s
A llvm/test/MC/ARM/directive-fpu-single-neon.s
A llvm/test/MC/ARM/directive-fpu-single-none.s
A llvm/test/MC/ARM/directive-fpu-single-vfp.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv2.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3-d16-fp16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3-d16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3-fp16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3xd-fp16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3xd.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv4-d16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv4.s
Log Message:
-----------
[ARM] Fix missing ELF FPU attributes for fp-armv8-fullfp16-d16 (#105677)
An assembly input with
> .fpu fp-armv8-fullfp16-d16
crashes the compiler because the ELF FPU attribute emitter misses the
respective entry. This patch fixes this.
Interestingly, compiling with -mfpu=fp-armv8-fullfp16-d16 does not cause
the crash because FPv5_D16 is an alias in the compiler and
> .fpu fpv5-d16
is emitted instead, which does not crash.
The existing .fpu directive test with multiple FPUs serves the purpose
of verifying that each possible FPU option is defined, but does not
trigger the crash because only the last .fpu directive goes effectively
down the code path. Therefore one test for each FPU is required.
Fixes #105674.
Commit: b21756f9f1038acd889dd3a12fd16f843d07c4a8
https://github.com/llvm/llvm-project/commit/b21756f9f1038acd889dd3a12fd16f843d07c4a8
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M lldb/unittests/Symbol/TestClangASTImporter.cpp
Log Message:
-----------
[lldb][test] Add a unit-test for importRecordLayoutFromOrigin
Commit: 8ab61404e866539f5e28e0f72ba7a510fa51dd3a
https://github.com/llvm/llvm-project/commit/8ab61404e866539f5e28e0f72ba7a510fa51dd3a
Author: David Green <david.green at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll
M llvm/test/CodeGen/AArch64/arm64-neon-across.ll
Log Message:
-----------
[AArch64] Lower aarch64_neon_saddlv via SADDLV nodes. (#103307)
This mirrors what GISel already does, extending the existing lowering of
aarch64_neon_saddlv/aarch64_neon_uaddlv to SADDLV/UADDLV. This allows us
to remove some tablegen patterns, and provides a little nicer codegen in
places as the nodes represent the result being in a vector register
correctly.
Commit: 24740ecfd100907150c5aa2d1c53bf17fb73966c
https://github.com/llvm/llvm-project/commit/24740ecfd100907150c5aa2d1c53bf17fb73966c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/test/CodeGen/X86/ctlz.ll
M llvm/test/CodeGen/X86/cttz.ll
Log Message:
-----------
[X86] Add BSR/BSF tests to check for implicit zero extension
Commit: 8c6f8c29e90666b747fc4b4612647554206a2be5
https://github.com/llvm/llvm-project/commit/8c6f8c29e90666b747fc4b4612647554206a2be5
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M compiler-rt/lib/asan/asan_flags.inc
M compiler-rt/lib/asan/asan_globals.cpp
M compiler-rt/test/asan/TestCases/Linux/initialization-nobug-lld.cpp
M compiler-rt/test/asan/TestCases/Linux/odr_indicator_unregister.cpp
M compiler-rt/test/asan/TestCases/Linux/odr_indicators.cpp
M compiler-rt/test/asan/TestCases/Windows/dll_global_dead_strip.c
M compiler-rt/test/asan/TestCases/Windows/dll_report_globals_symbolization_at_startup.cpp
M compiler-rt/test/asan/TestCases/Windows/global_dead_strip.c
M compiler-rt/test/asan/TestCases/Windows/report_globals_vs_freelibrary.cpp
M compiler-rt/test/asan/TestCases/initialization-nobug.cpp
Log Message:
-----------
Reland "[asan] Remove debug tracing from `report_globals` (#104404)" (#105601)
This reverts commit 2704b804bec50c2b016bf678bd534c330ec655b6
and relands #104404.
The Darwin should not fail after #105599.
Commit: a625435d3ef4c7bbfceb44498b9b5a2cbbed838b
https://github.com/llvm/llvm-project/commit/a625435d3ef4c7bbfceb44498b9b5a2cbbed838b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[Vectorize] Fix warnings
This patch fixes warnings of the form:
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp:9300:23: error: loop
variable '[E, Idx]' creates a copy from type 'const value_type' (aka
'const std::pair<const llvm::slpvectorizer::BoUpSLP::TreeEntry *,
unsigned int>') [-Werror,-Wrange-loop-construct]
Commit: 0bd90ec421da16df6d020d5a21b642a489491c1e
https://github.com/llvm/llvm-project/commit/0bd90ec421da16df6d020d5a21b642a489491c1e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Fix a warning
This patch fixes:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:6102:9: error:
unused variable 'OpVT' [-Werror,-Wunused-variable]
Commit: 46707b0a83b7769965f9b1b3d08b2cc6bd26c469
https://github.com/llvm/llvm-project/commit/46707b0a83b7769965f9b1b3d08b2cc6bd26c469
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
A lld/test/ELF/aarch64-mapsyms-implicit.s
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCTargetOptions.h
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/test/MC/AArch64/mapping-across-sections.s
Log Message:
-----------
[AArch64,ELF] Allow implicit $d/$x at section beginning
The start state of a new section is `EMS_None`, often leading to a
$d/$x at offset 0. Introduce a MCTargetOption/cl::opt
"implicit-mapsyms" to allow an alternative behavior
(https://github.com/ARM-software/abi-aa/issues/274):
* Set the start state to `EMS_Data` or `EMS_A64`.
* For text sections, add an ending $x only if the final data is not instructions.
* For non-text sections, add an ending $d only if the final data is not data commands.
```
.section .text.1,"ax"
nop
// emit $d
.long 42
// emit $x
.section .text.2,"ax"
nop
```
This new behavior decreases the .symtab size significantly:
```
% bloaty a64-2/bin/clang -- a64-0/bin/clang
FILE SIZE VM SIZE
-------------- --------------
-5.4% -1.13Mi [ = ] 0 .strtab
-50.9% -4.09Mi [ = ] 0 .symtab
-4.0% -5.22Mi [ = ] 0 TOTAL
```
---
This scheme works as long as the user can rule out some error scenarios:
* .text.1 assembled using the traditional behavior is combined with .text.2 using the new behavior
* A linker script combining non-text sections and text sections. The
lack of mapping symbols in the non-text sections could make them
treated as code, unless the linker inserts extra mapping symbols.
The above mix-and-match scenarios aren't an issue at all for a
significant portion of users.
A text section may start with data commands in rare cases (e.g.
-fsanitize=function) that many users don't care about. When combing
`(.text.0; .word 0)` and `(.text.1; .word 0)`, the ending $x of .text.0
and the initial $d of .text.1 may have the same address. If both
sections reside in the same file, ensure the ending symbol comes before
the initial $d of .text.1, so that a dumb linker respecting the symbol
order will place the ending $x before the initial $d.
Disassemblers using stable sort will see both symbols at the same
address, and the second will win.
When section ordering mechanisms (e.g. --symbol-ordering-file,
--call-graph-profile-sort, `.text : { second.o(.text) first.o(.text) }`)
are involved, the initial data in a text section following a text
section with trailing data could be misidentified as code, but the issue
is local and the risk could be acceptable.
Pull Request: https://github.com/llvm/llvm-project/pull/99718
Commit: 2012b25420160c3d4e595b29910afffa6c5f3fc2
https://github.com/llvm/llvm-project/commit/2012b25420160c3d4e595b29910afffa6c5f3fc2
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-and.mir
Log Message:
-----------
[AMDGPU][GlobalISel] Disable fixed-point iteration in all Combiners (#105517)
Disable fixed-point iteration in all AMDGPU Combiners after #102163.
This saves around 2% compile time in ad hoc testing on some large
graphics shaders. I did not notice any regressions in the generated
code, just a bunch of harmless differences in instruction selection and
register allocation.
Commit: 09262553fa1874bec04aebb1ecd3fd3386d316d5
https://github.com/llvm/llvm-project/commit/09262553fa1874bec04aebb1ecd3fd3386d316d5
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M lldb/include/lldb/Interpreter/Interfaces/ScriptedInterface.h
Log Message:
-----------
[lldb] Fix typos in ScriptedInterface.h
Commit: 83fc989a227a0cafb945307d4f0d68a4df864dc1
https://github.com/llvm/llvm-project/commit/83fc989a227a0cafb945307d4f0d68a4df864dc1
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
Log Message:
-----------
[CodeGen] Construct SmallVector with iterator ranges (NFC) (#105622)
Commit: eb549da9e5c1e626edb14ba9ce43e46ad3d088af
https://github.com/llvm/llvm-project/commit/eb549da9e5c1e626edb14ba9ce43e46ad3d088af
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
A clang/test/Driver/mmapsyms.c
A clang/test/Misc/cc1as-mmapsyms.c
M clang/tools/driver/cc1as_main.cpp
Log Message:
-----------
[Driver] Add -Wa, options -mmapsyms={default,implicit}
-Wa,-mmapsyms=implicit enables the alternative mapping symbol scheme
discussed at #99718.
While not conforming to the current aaelf64 ABI, the option is
invaluable for those with full control over their toolchain, no reliance
on weird relocatable files, and a strong focus on minimizing both
relocatable and executable sizes.
The option is discouraged when portability of the relocatable objects is
a concern.
https://maskray.me/blog/2024-07-21-mapping-symbols-rethinking-for-efficiency
elaborates the risk.
Pull Request: https://github.com/llvm/llvm-project/pull/104542
Commit: 6ec4c9c3eb4a556f848dac37a2d6f0d46ecc6f02
https://github.com/llvm/llvm-project/commit/6ec4c9c3eb4a556f848dac37a2d6f0d46ecc6f02
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vl.s
Log Message:
-----------
[MCA][X86] Add scatter instruction test coverage for #105675
Commit: 933f72217e4584db03f945a3b30e8c04537f4dab
https://github.com/llvm/llvm-project/commit/933f72217e4584db03f945a3b30e8c04537f4dab
Author: anjenner <161845516+anjenner at users.noreply.github.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/bindings/ocaml/llvm/llvm.ml
M llvm/bindings/ocaml/llvm/llvm.mli
Log Message:
-----------
[bindings][ocaml] Add missing AtomicRMW operations (#105673)
Commit: 27727d85a95dd501ce6d6660900b656622de9ae0
https://github.com/llvm/llvm-project/commit/27727d85a95dd501ce6d6660900b656622de9ae0
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/www/c_status.html
Log Message:
-----------
[C23] Remove WG14 N2517 from the status page
This paper proposes no normative changes, just updates an example in
the standard. It was incorrect for us to have marked it as No in the
first place.
Commit: 7d373cef4941e9be1c2c86375ba9a8943c55e9cd
https://github.com/llvm/llvm-project/commit/7d373cef4941e9be1c2c86375ba9a8943c55e9cd
Author: Brendan Dahl <brendan.dahl at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsWebAssembly.def
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/WebAssembly.cpp
M clang/lib/Basic/Targets/WebAssembly.h
M clang/test/CodeGen/builtins-wasm.c
M clang/test/Driver/wasm-features.c
M clang/test/Preprocessor/wasm-target-features.c
M llvm/lib/Target/WebAssembly/WebAssembly.td
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
M llvm/test/CodeGen/WebAssembly/half-precision.ll
M llvm/test/CodeGen/WebAssembly/offset.ll
M llvm/test/CodeGen/WebAssembly/target-features-cpus.ll
M llvm/test/MC/WebAssembly/simd-encodings.s
Log Message:
-----------
[WebAssembly] Change half-precision feature name to fp16. (#105434)
This better aligns with how the feature is being referred to and what
runtimes (V8) are calling it.
Commit: bc860b49a86089bf9bb7ada9927f2027e6ad9096
https://github.com/llvm/llvm-project/commit/bc860b49a86089bf9bb7ada9927f2027e6ad9096
Author: Florian Mayer <fmayer at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SCCPSolver.h
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
Log Message:
-----------
[NFC] [SCCP] remove unused functions (#105603)
Commit: b9c4c4ccf921c0481d51d4e0c9e862aa9ea3fcf3
https://github.com/llvm/llvm-project/commit/b9c4c4ccf921c0481d51d4e0c9e862aa9ea3fcf3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/CodeGenCXX/cxx2b-consteval-if.cpp
Log Message:
-----------
[clang][bytecode] Fix 'if consteval' in non-constant contexts (#104707)
The previous code made this a compile-time decision but it's not.
Commit: 4a2a1b51cb6b88820e28019040fb78d0c82685ab
https://github.com/llvm/llvm-project/commit/4a2a1b51cb6b88820e28019040fb78d0c82685ab
Author: Vladimir Vereschaka <vvereschaka at accesssoftek.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libcxx/test/std/input.output/iostream.format/std.manip/setfill_wchar_max.pass.cpp
Log Message:
-----------
[libc++] Adjust armv7 XFAIL target triple for the setfill_wchar_max test. (#105586)
Also allow XFAIL for armv7-*-linux-gnueabihf targets, not only for
armv7l-*.
Commit: c1e401f3624780f85f4c9a26960752ee3f37fafb
https://github.com/llvm/llvm-project/commit/c1e401f3624780f85f4c9a26960752ee3f37fafb
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/forward_list/TestDataFormatterGenericForwardList.py
A lldb/test/API/functionalities/memory/big-read/Makefile
A lldb/test/API/functionalities/memory/big-read/TestMemoryReadMaximumSize.py
A lldb/test/API/functionalities/memory/big-read/main.c
Log Message:
-----------
[lldb] Change the two remaining SInt64 settings in Target to uint (#105460)
TargetProperties.td had a few settings listed as signed integral values,
but the Target.cpp methods reading those values were reading them as
unsigned. e.g. target.max-memory-read-size, some accesses of
target.max-children-count, still today, previously
target.max-string-summary-length.
After Jonas' change to use templates to read these values in
https://reviews.llvm.org/D149774, when the code tried to fetch these
values, we'd eventually end up calling OptionValue::GetAsUInt64 which
checks that the value is actually a UInt64 before returning it; finding
that it was an SInt64, it would drop the user setting and return the
default value. This manifested as a bug that target.max-memory-read-size
is never used for memory read.
target.max-children-count is less straightforward, where one read of
that setting was fetching it as an int64_t, the other as a uint64_t.
I suspect all of these settings were originally marked as SInt64 so a
user could do -1 for "infinite", getting it static_cast to a UINT64_MAX
value along the way. I can't find any documentation for this behavior,
but it seems like something Greg would have done. We've partially lost
that behavior already via
https://github.com/llvm/llvm-project/pull/72233 for
target.max-string-summary-length, and this further removes it.
We're still fetching UInt64's and returning them as uint32_t's but I'm
not overly pressed about someone setting a count/size limit over 4GB.
I added a simple API test for the memory read setting limit.
Commit: 6b11573b8c5e3d36beee099dbe7347c2a007bf53
https://github.com/llvm/llvm-project/commit/6b11573b8c5e3d36beee099dbe7347c2a007bf53
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M compiler-rt/test/metadata/uar.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Transforms/FunctionAttrs/cold.ll
Log Message:
-----------
Recommit "[FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function"
Fixed up the uar test that was failing. It seems with the new `cold`
attribute the order of the functions is different. As far as I can
tell this is not a concern.
Closes #105559
Commit: b2cd81c93831fe256bddec5efa5a2765400076de
https://github.com/llvm/llvm-project/commit/b2cd81c93831fe256bddec5efa5a2765400076de
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/IR/VectorBuilder.cpp
Log Message:
-----------
[IR] Simplify comparisons with std::optional (NFC) (#105624)
For variable X of type std::optional, X && X.value_or(Y) == Z is
equivalent to X == Z when Y != Z.
Commit: 7faf2c95a4f1c3148c891608ed516eda3c9d3eb4
https://github.com/llvm/llvm-project/commit/7faf2c95a4f1c3148c891608ed516eda3c9d3eb4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512vl.s
Log Message:
-----------
[MCA][X86] Add scatter instruction test coverage for #105675
Missed IceLakeServer when I updated the other CPUs in 6ec4c9c3eb4a556f848dac37a2d6f0d46ecc6f02
Commit: 2c1f0642a2647883f35463aebf4f90a6b1f158c1
https://github.com/llvm/llvm-project/commit/2c1f0642a2647883f35463aebf4f90a6b1f158c1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512.s
Log Message:
-----------
[MCA][X86] Add missing 512-bit vpscatterqd/vscatterqps schedule data
This doesn't match uops.info yet - but it matches the existing vpscatterdq/vscatterqpd entries like uops.info says it should
Fixes #105675
Commit: c5a0c37b4279c2925b03993cd86a83bfc053f0cd
https://github.com/llvm/llvm-project/commit/c5a0c37b4279c2925b03993cd86a83bfc053f0cd
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/test/CodeGen/Xtensa/div.ll
Log Message:
-----------
[Xtensa,test] Fix div.ll after #99981
Commit: 1fa6c99a09ccca7558cb3c46fa5d4cbfb4d4bea5
https://github.com/llvm/llvm-project/commit/1fa6c99a09ccca7558cb3c46fa5d4cbfb4d4bea5
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Move EVL memory recipes to VPlanRecipes.cpp (NFC)
Move VPWiden[Load|Store]EVLRecipe::executeto VPlanRecipes.cpp in line
with other ::execute implementations that don't depend on anything
defined in LoopVectorization.cpp
Commit: e31322ba59071b4aa288c9d956f4c9d1ee10b080
https://github.com/llvm/llvm-project/commit/e31322ba59071b4aa288c9d956f4c9d1ee10b080
Author: Haowei <haowei at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libcxx/test/libcxx/utilities/expected/expected.expected/transform_error.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/transform_error.mandates.verify.cpp
Log Message:
-----------
[libc++] Fix transform_error.mandates.verify.cpp test on msvc (#104635)
PR #102851 marks reference types in union as error on msvc by changing
the clang, which makes 'transform_error.mandates.verify.cpp' no longer
failing on msvc from ToT. However, all libcxx buildbots do not build
clang from source, therefore, this test will still fail on these bots,
which is incorrect. This patch changed the expected error message of
this test so it can pass with both release branch clang and ToT clang.
Commit: 8f005f8306dc52577b3b9482d271fb463f0152a5
https://github.com/llvm/llvm-project/commit/8f005f8306dc52577b3b9482d271fb463f0152a5
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libc/config/gpu/entrypoints.txt
M libc/config/gpu/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/locale_t.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/locale-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/locale_t.h
A libc/include/llvm-libc-types/struct_lconv.h
A libc/include/locale.h.def
M libc/newhdrgen/yaml/ctype.yaml
A libc/newhdrgen/yaml/locale.yaml
M libc/spec/stdc.td
M libc/src/CMakeLists.txt
M libc/src/ctype/CMakeLists.txt
M libc/src/ctype/isalnum.cpp
A libc/src/ctype/isalnum_l.cpp
A libc/src/ctype/isalnum_l.h
M libc/src/ctype/isalpha.cpp
A libc/src/ctype/isalpha_l.cpp
A libc/src/ctype/isalpha_l.h
M libc/src/ctype/isblank.cpp
A libc/src/ctype/isblank_l.cpp
A libc/src/ctype/isblank_l.h
M libc/src/ctype/iscntrl.cpp
A libc/src/ctype/iscntrl_l.cpp
A libc/src/ctype/iscntrl_l.h
M libc/src/ctype/isdigit.cpp
A libc/src/ctype/isdigit_l.cpp
A libc/src/ctype/isdigit_l.h
M libc/src/ctype/isgraph.cpp
A libc/src/ctype/isgraph_l.cpp
A libc/src/ctype/isgraph_l.h
M libc/src/ctype/islower.cpp
A libc/src/ctype/islower_l.cpp
A libc/src/ctype/islower_l.h
M libc/src/ctype/isprint.cpp
A libc/src/ctype/isprint_l.cpp
A libc/src/ctype/isprint_l.h
M libc/src/ctype/ispunct.cpp
A libc/src/ctype/ispunct_l.cpp
A libc/src/ctype/ispunct_l.h
M libc/src/ctype/isspace.cpp
A libc/src/ctype/isspace_l.cpp
A libc/src/ctype/isspace_l.h
M libc/src/ctype/isupper.cpp
A libc/src/ctype/isupper_l.cpp
A libc/src/ctype/isupper_l.h
M libc/src/ctype/isxdigit.cpp
A libc/src/ctype/isxdigit_l.cpp
A libc/src/ctype/isxdigit_l.h
M libc/src/ctype/tolower.cpp
A libc/src/ctype/tolower_l.cpp
A libc/src/ctype/tolower_l.h
M libc/src/ctype/toupper.cpp
A libc/src/ctype/toupper_l.cpp
A libc/src/ctype/toupper_l.h
A libc/src/locale/CMakeLists.txt
A libc/src/locale/duplocale.cpp
A libc/src/locale/duplocale.h
A libc/src/locale/freelocale.cpp
A libc/src/locale/freelocale.h
A libc/src/locale/locale.cpp
A libc/src/locale/locale.h
A libc/src/locale/localeconv.cpp
A libc/src/locale/localeconv.h
A libc/src/locale/newlocale.cpp
A libc/src/locale/newlocale.h
A libc/src/locale/setlocale.cpp
A libc/src/locale/setlocale.h
A libc/src/locale/uselocale.cpp
A libc/src/locale/uselocale.h
M libc/test/src/CMakeLists.txt
A libc/test/src/locale/CMakeLists.txt
A libc/test/src/locale/locale_test.cpp
A libc/test/src/locale/localeconv_test.cpp
Log Message:
-----------
[libc] Add `ctype.h` locale variants (#102711)
Summary:
This patch adds all the libc ctype variants. These ignore the locale
ingormation completely, so they're pretty much just stubs. Because these
use locale information, which is system scope, we do not enable building
them outisde of full build mode.
Commit: 2f4232db0b72635b89c2356c8a2c0504b075a0ab
https://github.com/llvm/llvm-project/commit/2f4232db0b72635b89c2356c8a2c0504b075a0ab
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libc/config/gpu/entrypoints.txt
M libc/config/gpu/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/hdr/types/CMakeLists.txt
R libc/hdr/types/locale_t.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
R libc/include/llvm-libc-macros/locale-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
R libc/include/llvm-libc-types/locale_t.h
R libc/include/llvm-libc-types/struct_lconv.h
R libc/include/locale.h.def
M libc/newhdrgen/yaml/ctype.yaml
R libc/newhdrgen/yaml/locale.yaml
M libc/spec/stdc.td
M libc/src/CMakeLists.txt
M libc/src/ctype/CMakeLists.txt
M libc/src/ctype/isalnum.cpp
R libc/src/ctype/isalnum_l.cpp
R libc/src/ctype/isalnum_l.h
M libc/src/ctype/isalpha.cpp
R libc/src/ctype/isalpha_l.cpp
R libc/src/ctype/isalpha_l.h
M libc/src/ctype/isblank.cpp
R libc/src/ctype/isblank_l.cpp
R libc/src/ctype/isblank_l.h
M libc/src/ctype/iscntrl.cpp
R libc/src/ctype/iscntrl_l.cpp
R libc/src/ctype/iscntrl_l.h
M libc/src/ctype/isdigit.cpp
R libc/src/ctype/isdigit_l.cpp
R libc/src/ctype/isdigit_l.h
M libc/src/ctype/isgraph.cpp
R libc/src/ctype/isgraph_l.cpp
R libc/src/ctype/isgraph_l.h
M libc/src/ctype/islower.cpp
R libc/src/ctype/islower_l.cpp
R libc/src/ctype/islower_l.h
M libc/src/ctype/isprint.cpp
R libc/src/ctype/isprint_l.cpp
R libc/src/ctype/isprint_l.h
M libc/src/ctype/ispunct.cpp
R libc/src/ctype/ispunct_l.cpp
R libc/src/ctype/ispunct_l.h
M libc/src/ctype/isspace.cpp
R libc/src/ctype/isspace_l.cpp
R libc/src/ctype/isspace_l.h
M libc/src/ctype/isupper.cpp
R libc/src/ctype/isupper_l.cpp
R libc/src/ctype/isupper_l.h
M libc/src/ctype/isxdigit.cpp
R libc/src/ctype/isxdigit_l.cpp
R libc/src/ctype/isxdigit_l.h
M libc/src/ctype/tolower.cpp
R libc/src/ctype/tolower_l.cpp
R libc/src/ctype/tolower_l.h
M libc/src/ctype/toupper.cpp
R libc/src/ctype/toupper_l.cpp
R libc/src/ctype/toupper_l.h
R libc/src/locale/CMakeLists.txt
R libc/src/locale/duplocale.cpp
R libc/src/locale/duplocale.h
R libc/src/locale/freelocale.cpp
R libc/src/locale/freelocale.h
R libc/src/locale/locale.cpp
R libc/src/locale/locale.h
R libc/src/locale/localeconv.cpp
R libc/src/locale/localeconv.h
R libc/src/locale/newlocale.cpp
R libc/src/locale/newlocale.h
R libc/src/locale/setlocale.cpp
R libc/src/locale/setlocale.h
R libc/src/locale/uselocale.cpp
R libc/src/locale/uselocale.h
M libc/test/src/CMakeLists.txt
R libc/test/src/locale/CMakeLists.txt
R libc/test/src/locale/locale_test.cpp
R libc/test/src/locale/localeconv_test.cpp
Log Message:
-----------
Revert " [libc] Add `ctype.h` locale variants (#102711)"
This reverts commit 8f005f8306dc52577b3b9482d271fb463f0152a5.
Commit: 78d8ab2ab9e9f48e72597b5642285a5bbfcb75a5
https://github.com/llvm/llvm-project/commit/78d8ab2ab9e9f48e72597b5642285a5bbfcb75a5
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libc/config/gpu/entrypoints.txt
M libc/config/gpu/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/locale_t.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/locale-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/locale_t.h
A libc/include/llvm-libc-types/struct_lconv.h
A libc/include/locale.h.def
A libc/newhdrgen/yaml/locale.yaml
M libc/spec/stdc.td
M libc/src/CMakeLists.txt
A libc/src/locale/CMakeLists.txt
A libc/src/locale/duplocale.cpp
A libc/src/locale/duplocale.h
A libc/src/locale/freelocale.cpp
A libc/src/locale/freelocale.h
A libc/src/locale/locale.cpp
A libc/src/locale/locale.h
A libc/src/locale/localeconv.cpp
A libc/src/locale/localeconv.h
A libc/src/locale/newlocale.cpp
A libc/src/locale/newlocale.h
A libc/src/locale/setlocale.cpp
A libc/src/locale/setlocale.h
A libc/src/locale/uselocale.cpp
A libc/src/locale/uselocale.h
M libc/test/src/CMakeLists.txt
A libc/test/src/locale/CMakeLists.txt
A libc/test/src/locale/locale_test.cpp
A libc/test/src/locale/localeconv_test.cpp
Log Message:
-----------
[libc] Initial support for 'locale.h' in the LLVM libc (#102689)
Summary:
This patch adds the macros and entrypoints associated with the
`locale.h` entrypoints. These are mostly stubs, as we (for now and the
forseeable future) only expect to support the C and maybe C.UTF-8
locales in the LLVM libc.
Commit: f3a47b9e25e7aca0dc2cd2dec30cedd9aeffaecf
https://github.com/llvm/llvm-project/commit/f3a47b9e25e7aca0dc2cd2dec30cedd9aeffaecf
Author: Florian Mayer <fmayer at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/docs/ProgrammersManual.rst
Log Message:
-----------
[NFC] [Docs] add missing space
Commit: 518b1f02835c4face8aaaf646a0f3878c2382b0b
https://github.com/llvm/llvm-project/commit/518b1f02835c4face8aaaf646a0f3878c2382b0b
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libc/src/locale/locale.h
Log Message:
-----------
[libc] Fix leftover thread local
Commit: 319c7a42ba2e5be56757d622747ba317d3b9e9ad
https://github.com/llvm/llvm-project/commit/319c7a42ba2e5be56757d622747ba317d3b9e9ad
Author: Greg Roth <grroth at microsoft.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/test/CodeGenHLSL/builtins/dot-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/dot.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/DirectX/fdot.ll
M llvm/test/CodeGen/DirectX/idot.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fdot.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/idot.ll
Log Message:
-----------
[HLSL][SPIRV]Add SPIRV generation for HLSL dot (#104656)
This adds the SPIRV fdot, sdot, and udot intrinsics and allows them to
be created at codegen depending on the target architecture. This
required moving some of the DXIL-specific choices to DXIL instruction
expansion out of codegen and providing it with at a more generic fdot
intrinsic as well.
Removed some stale comments that gave the obsolete impression that type
conversions should be expected to match overloads.
The SPIRV intrinsic handling involves generating multiply and add
operations for integers and the existing OpDot operation for floating
point.
New tests for generating SPIRV float and integer dot intrinsics are
added as well as expanding HLSL tests to include SPIRV generation
Used new dot product intrinsic generation to implement normalize() in SPIRV
Incidentally changed existing dot intrinsic definitions to use
DefaultAttrsIntrinsic to match the newly added inrinsics
Fixes #88056
Commit: e5140aed275fe60b83188143f39011d5c0ee5bb0
https://github.com/llvm/llvm-project/commit/e5140aed275fe60b83188143f39011d5c0ee5bb0
Author: jeffreytan81 <jeffreytan at meta.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
Fix dap stacktrace perf issue (#104874)
We have got several customer reporting of slow stepping over the past
year in VSCode.
Profiling shows the slow stepping is caused by `stackTrace` request
which can take around 1 second for certain targets. Since VSCode sends
`stackTrace` during each stop event, the slow `stackTrace` request would
slow down stepping in VSCode. Below is the hot path:
```
|--68.75%--lldb_dap::DAP::HandleObject(llvm::json::Object const&)
| |
| |--57.70%--(anonymous namespace)::request_stackTrace(llvm::json::Object const&)
| | |
| | |--54.43%--lldb::SBThread::GetCurrentExceptionBacktrace()
| | | lldb_private::Thread::GetCurrentExceptionBacktrace()
| | | lldb_private::Thread::GetCurrentException()
| | | lldb_private::ItaniumABILanguageRuntime::GetExceptionObjectForThread(std::shared_ptr<lldb_private::Thread>)
| | | |
| | | |--53.43%--lldb_private::FunctionCaller::ExecuteFunction(lldb_private::ExecutionContext&, unsigned long*, lldb_private::EvaluateExpressionOptions const&, lldb_private::DiagnosticManager&, lldb_private::Value&)
| | | | |
| | | | |--25.23%--lldb_private::FunctionCaller::InsertFunction(lldb_private::ExecutionContext&, unsigned long&, lldb_private::DiagnosticManager&)
| | | | | |
| | | | | |--24.56%--lldb_private::FunctionCaller::WriteFunctionWrapper(lldb_private::ExecutionContext&, lldb_private::DiagnosticManager&)
| | | | | | |
| | | | | | |--19.73%--lldb_private::ExpressionParser::PrepareForExecution(unsigned long&, unsigned long&, std::shared_ptr<lldb_private::IRExecutionUnit>&, lldb_private::ExecutionContext&, bool&, lldb_private::ExecutionPolicy)
| | | | | | | lldb_private::ClangExpressionParser::DoPrepareForExecution(unsigned long&, unsigned long&, std::shared_ptr<lldb_private::IRExecutionUnit>&, lldb_private::ExecutionContext&, bool&, lldb_private::ExecutionPolicy)
| | | | | | | lldb_private::IRExecutionUnit::GetRunnableInfo(lldb_private::Status&, unsigned long&, unsigned long&)
| | | | | | | |
```
The hot path is added by https://reviews.llvm.org/D156465 which should
at least be disabled for Linux. Note: I am seeing similar performance
hot path on Mac.
This PR hides the feature behind `enableDisplayExtendedBacktrace` option
which needs to be enabled on-demand.
---------
Co-authored-by: jeffreytan81 <jeffreytan at fb.com>
Commit: 7bcf4d63cf3b7bcc789808ea4e9c8369e94467dc
https://github.com/llvm/llvm-project/commit/7bcf4d63cf3b7bcc789808ea4e9c8369e94467dc
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
A llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
Log Message:
-----------
[AMDGPU] Correctly insert s_nops for dst forwarding hazard (#100276)
MI300 ISA section 4.5 states there is a hazard between "VALU op which
uses OPSEL or SDWA with changes the result’s bit position" and "VALU op
consumes result of that op"
This includes the case where the second op is SDWA with same dest and
dst_sel != DWORD && dst_unused == UNUSED_PRESERVE. In this case, there
is an implicit read of the first op dst and the compiler needs to
resolve this hazard. Confirmed with HW team.
We model dst_unused == UNUSED_PRESERVE as tied-def of implicit operand,
so this PR checks for that.
MI300_SP_MAS section 1.3.9.2 specifies that CVT_SR_FP8_F32 and
CVT_SR_BF8_F32 with opsel[3:2] !=0 have dest forwarding issue.
Currently, we only add check for CVT_SR_FP8_F32 with opsel[3] != 0 --
this PR adds support opsel[2] != 0 as well
Commit: a7c8f41f2bec74b7dcd84932136bea801723de04
https://github.com/llvm/llvm-project/commit/a7c8f41f2bec74b7dcd84932136bea801723de04
Author: Raghu Maddhipatla <7686592+raghavendhra at users.noreply.github.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[NFC] [MLIR] [OpenMP] Fixing typo of clause. (#105712)
Commit: 856dadb33c38f4e3be592f11c3d67e7337e288c7
https://github.com/llvm/llvm-project/commit/856dadb33c38f4e3be592f11c3d67e7337e288c7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libc/config/gpu/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/CMakeLists.txt
M libc/newhdrgen/yaml/ctype.yaml
M libc/spec/stdc.td
M libc/src/ctype/CMakeLists.txt
M libc/src/ctype/isalnum.cpp
A libc/src/ctype/isalnum_l.cpp
A libc/src/ctype/isalnum_l.h
M libc/src/ctype/isalpha.cpp
A libc/src/ctype/isalpha_l.cpp
A libc/src/ctype/isalpha_l.h
M libc/src/ctype/isblank.cpp
A libc/src/ctype/isblank_l.cpp
A libc/src/ctype/isblank_l.h
M libc/src/ctype/iscntrl.cpp
A libc/src/ctype/iscntrl_l.cpp
A libc/src/ctype/iscntrl_l.h
M libc/src/ctype/isdigit.cpp
A libc/src/ctype/isdigit_l.cpp
A libc/src/ctype/isdigit_l.h
M libc/src/ctype/isgraph.cpp
A libc/src/ctype/isgraph_l.cpp
A libc/src/ctype/isgraph_l.h
M libc/src/ctype/islower.cpp
A libc/src/ctype/islower_l.cpp
A libc/src/ctype/islower_l.h
M libc/src/ctype/isprint.cpp
A libc/src/ctype/isprint_l.cpp
A libc/src/ctype/isprint_l.h
M libc/src/ctype/ispunct.cpp
A libc/src/ctype/ispunct_l.cpp
A libc/src/ctype/ispunct_l.h
M libc/src/ctype/isspace.cpp
A libc/src/ctype/isspace_l.cpp
A libc/src/ctype/isspace_l.h
M libc/src/ctype/isupper.cpp
A libc/src/ctype/isupper_l.cpp
A libc/src/ctype/isupper_l.h
M libc/src/ctype/isxdigit.cpp
A libc/src/ctype/isxdigit_l.cpp
A libc/src/ctype/isxdigit_l.h
M libc/src/ctype/tolower.cpp
A libc/src/ctype/tolower_l.cpp
A libc/src/ctype/tolower_l.h
M libc/src/ctype/toupper.cpp
A libc/src/ctype/toupper_l.cpp
A libc/src/ctype/toupper_l.h
Log Message:
-----------
[libc] Add `ctype.h` locale variants (#102711)
Summary:
This patch adds all the libc ctype variants. These ignore the locale
ingormation completely, so they're pretty much just stubs. Because these
use locale information, which is system scope, we do not enable building
them outisde of full build mode.
Commit: c2a96a243b26d93090b859f851f8c219cffeaeaa
https://github.com/llvm/llvm-project/commit/c2a96a243b26d93090b859f851f8c219cffeaeaa
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libc/spec/stdc.td
Log Message:
-----------
[libc] Fix locale structs with old headergen
Commit: e738c816f2079e2f0fdc395e53070cc1afd8bfac
https://github.com/llvm/llvm-project/commit/e738c816f2079e2f0fdc395e53070cc1afd8bfac
Author: Chris Apple <cja-private at pm.me>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512.s
Log Message:
-----------
Revert "[MCA][X86] Add missing 512-bit vpscatterqd/vscatterqps schedu… (#105716)
…le data"
This reverts commit 2c1f0642a2647883f35463aebf4f90a6b1f158c1.
Many build failures in: CodeGen/X86/scatter-schedule.ll
Example of a build failure:
https://lab.llvm.org/buildbot/#/builders/155/builds/1675
Commit: 3082a381f57ef2885c270f41f2955e08c79634c5
https://github.com/llvm/llvm-project/commit/3082a381f57ef2885c270f41f2955e08c79634c5
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/FunctionImport.h
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/tools/llvm-link/llvm-link.cpp
Log Message:
-----------
[LTO] Introduce helper functions to add GUIDs to ImportList (NFC) (#105555)
The new helper functions make the intent clearer while hiding
implementation details, including how we handle previously added
entries. Note that:
- If we are adding a GUID as a GlobalValueSummary::Definition, then we
override a previously added GlobalValueSummary::Declaration entry
for the same GUID.
- If we are adding a GUID as a GlobalValueSummary::Declaration, then a
previously added GlobalValueSummary::Definition entry for the same
GUID takes precedence, and no change is made.
Commit: ee08d9cba5615937acf28087da841886cc6a0144
https://github.com/llvm/llvm-project/commit/ee08d9cba5615937acf28087da841886cc6a0144
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/Bitcode/amdgcn-atomic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-rtn.ll
R llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.fadd-with-ret.ll
R llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
R llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx908.ll
R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.fadd.gfx90a.ll
R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll
R llvm/test/CodeGen/AMDGPU/unsupported-atomics.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat-fadd-fmin-fmax-intrinsics.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll
Log Message:
-----------
AMDGPU: Remove global/flat atomic fadd intrinics (#97051)
These have been replaced with atomicrmw.
Commit: e454d3103739c19a863a210701cc03528c96dd68
https://github.com/llvm/llvm-project/commit/e454d3103739c19a863a210701cc03528c96dd68
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Factor out precomputing costs from LVP::cost (NFC).
Move the logic for pre-computing costs of certain instructions to a
separate helper function, allowing re-use in a follow-up patch.
Commit: a2d8743cc86f96f6b1cbd85798328bd3fb2bf4de
https://github.com/llvm/llvm-project/commit/a2d8743cc86f96f6b1cbd85798328bd3fb2bf4de
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M lld/COFF/Chunks.cpp
M lld/COFF/Chunks.h
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/COFF/Writer.cpp
A lld/test/COFF/arm64ec-export-thunks.test
M lld/test/COFF/arm64ec-exports.s
A lld/test/COFF/arm64ec-patchable-thunks.test
Log Message:
-----------
[LLD][COFF] Generate X64 thunks for ARM64EC entry points and patchable functions. (#105499)
This implements Fast-Forward Sequences documented in ARM64EC
ABI https://learn.microsoft.com/en-us/windows/arm/arm64ec-abi.
There are two conditions when linker should generate such thunks:
- For each exported ARM64EC functions.
It applies only to ARM64EC functions (we may also have pure x64
functions, for which no thunk is needed). MSVC linker creates
`EXP+<mangled export name>` symbol in those cases that points to the
thunk and uses that symbol for the export. It's observable from the
module: it's possible to reference such symbols as I did in the test.
Note that it uses export name, not name of the symbol that's exported
(as in `foo` in `/EXPORT:foo=bar`). This implies that if the same
function is exported multiple times, it will have multiple thunks. I
followed this MSVC behavior.
- For hybrid_patchable functions.
The linker tries to generate a thunk for each undefined `EXP+*` symbol
(and such symbols are created by the compiler as a target of weak alias
from the demangled name). MSVC linker tries to find corresponding
`*$hp_target` symbol and if fails to do so, it outputs a cryptic error
like `LINK : fatal error LNK1000: Internal error during
IMAGE::BuildImage`. I just skip generating the thunk in such case (which
causes undefined reference error). MSVC linker additionally checks that
the symbol complex type is a function (see also #102898). We generally
don't do such checks in LLD, so I made it less strict. It should be
fine: if it's some data symbol, it will not have `$hp_target` symbol, so
we will skip it anyway.
Commit: cb4efe1d078144a72306732a56afea3885650e8d
https://github.com/llvm/llvm-project/commit/cb4efe1d078144a72306732a56afea3885650e8d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
Log Message:
-----------
[VPlan] Don't trigger VF assertion if VPlan has extra simplifications.
There are cases where VPlans contain some simplifications that are very
hard to accurately account for up-front in the legacy cost model. Those
cases are caused by un-simplified inputs, which trigger the assert
ensuring both the legacy and VPlan-based cost model agree on the VF.
To avoid false positives due to missed simplifications in general, only
trigger the assert if the chosen VPlan doesn't contain any additional
simplifications.
Fixes https://github.com/llvm/llvm-project/issues/104714.
Fixes https://github.com/llvm/llvm-project/issues/105713.
Commit: 768dba71fe0caf2b7e698a1c29c86a48bbd00149
https://github.com/llvm/llvm-project/commit/768dba71fe0caf2b7e698a1c29c86a48bbd00149
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Fix typo in cb4efe1d.
Commit: 172c4a4a147833f1c08df1555f3170aa9ccb6cbe
https://github.com/llvm/llvm-project/commit/172c4a4a147833f1c08df1555f3170aa9ccb6cbe
Author: Ian Anderson <iana at apple.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libunwind/include/CMakeLists.txt
R libunwind/include/mach-o/compact_unwind_encoding.modulemap
Log Message:
-----------
[libunwind] Stop installing the mach-o module map (#105616)
libunwind shouldn't know that compact_unwind_encoding.h is part of a
MachO module that it doesn't own. Delete the mach-o module map, and let
whatever is in charge of the mach-o directory be the one to say how its
module is organized and where compact_unwind_encoding.h fits in.
Commit: d010ec6af8162a8ae4e42d2cac5282f83db0ce07
https://github.com/llvm/llvm-project/commit/d010ec6af8162a8ae4e42d2cac5282f83db0ce07
Author: Chris Apple <cja-private at pm.me>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
A clang/docs/RealtimeSanitizer.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
M clang/docs/index.rst
M clang/include/clang/Basic/Sanitizers.def
M clang/include/clang/Driver/SanitizerArgs.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
A clang/test/CodeGen/rtsan_attribute_inserted.c
A clang/test/CodeGen/rtsan_entry_exit_insertion.c
A clang/test/CodeGen/rtsan_no_attribute_sanitizer_disabled.c
M clang/test/Driver/fsanitize.c
Log Message:
-----------
[clang][rtsan] Introduce realtime sanitizer codegen and driver (#102622)
Introduce the `-fsanitize=realtime` flag in clang driver
Plug in the RealtimeSanitizer PassManager pass in Codegen, and attribute
a function based on if it has the `[[clang::nonblocking]]` function
effect.
Commit: 8b5f606612de30ece5e113517decacca0d8ccb35
https://github.com/llvm/llvm-project/commit/8b5f606612de30ece5e113517decacca0d8ccb35
Author: Sirraide <aeternalmail at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/lib/Parse/ParseDeclCXX.cpp
A clang/test/Parser/friend-concept.cpp
Log Message:
-----------
[Clang] [Parser] Improve diagnostic for `friend concept` (#105121)
Diagnose this early after parsing declaration specifiers; this allows us
to issue a better diagnostic. This also checks for `concept friend` and
concept declarations w/o a template-head because it’s easiest to do that
at the same time.
Fixes #45182.
Commit: 42d06b8e555727e8e043d5ea9240ad103d950192
https://github.com/llvm/llvm-project/commit/42d06b8e555727e8e043d5ea9240ad103d950192
Author: Harini0924 <79345568+Harini0924 at users.noreply.github.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M compiler-rt/test/fuzzer/afl-driver-close-fd-mask.test
M compiler-rt/test/fuzzer/afl-driver-stderr.test
Log Message:
-----------
[compiler-rt][test] Change tests to remove the use of `unset` command in lit internal shell (#104880)
This patch rewrites tests to remove the use of the `unset` command,
which is not supported in the lit internal shell. The tests now use the
`env -u` to unset environment variables.
The `unset` command is used in shell environments to remove the
environment variable. However, because the lit internal shell does not
support the `unset` command, using it in tests would result in errors or
other unexpected behavior. To overcome this limitation, the tests have
been updated to use the `env -u` command instead. `env -u` is supported
by lit and effectively removes specified environment variables. This
allows the tests to achieve the same goal of unsetting environment
variables while ensuring compatibility with the lit internal shell.
This change is relevant for [[RFC] Enabling the Lit Internal Shell by
Default](https://discourse.llvm.org/t/rfc-enabling-the-lit-internal-shell-by-default/80179/3)
Fixes: #102397
Commit: d7fc779aacd4b5538bc42139892812aad8c6d528
https://github.com/llvm/llvm-project/commit/d7fc779aacd4b5538bc42139892812aad8c6d528
Author: Amir Bishara <139038766+amirBish at users.noreply.github.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/test/Dialect/Affine/loop-coalescing.mlir
Log Message:
-----------
[mlir][SCF]-Fix loop coalescing with iteration arguements (#105488)
Fix a bug found when coalescing loops which have iteration arguments,
such that the inner loop's terminator may have operands of the inner
loop iteration arguments which are about to be replaced by the outer
loop's iteration arguments.
The current flow leads to crush within the IR code.
Commit: 911e246fe8fd35bd82fc11db001513a1e2f6990c
https://github.com/llvm/llvm-project/commit/911e246fe8fd35bd82fc11db001513a1e2f6990c
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/include/llvm/ADT/StringRef.h
M llvm/unittests/ADT/StringRefTest.cpp
Log Message:
-----------
[NFC][ADT] Add reverse iterators and `value_type` to StringRef (#105579)
- Add reverse iterators and `value_type` to StringRef.
- Add unit test for all 4 iterator flavors.
- This prepares StringRef to be used with `SequenceToOffsetTable`.
Commit: a1e9b7e646b76bf844e8a9a101ebd27de11992ff
https://github.com/llvm/llvm-project/commit/a1e9b7e646b76bf844e8a9a101ebd27de11992ff
Author: Chris Apple <cja-private at pm.me>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
R clang/docs/RealtimeSanitizer.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
M clang/docs/index.rst
M clang/include/clang/Basic/Sanitizers.def
M clang/include/clang/Driver/SanitizerArgs.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
R clang/test/CodeGen/rtsan_attribute_inserted.c
R clang/test/CodeGen/rtsan_entry_exit_insertion.c
R clang/test/CodeGen/rtsan_no_attribute_sanitizer_disabled.c
M clang/test/Driver/fsanitize.c
Log Message:
-----------
Revert "[clang][rtsan] Introduce realtime sanitizer codegen and drive… (#105744)
…r (#102622)"
This reverts commit d010ec6af8162a8ae4e42d2cac5282f83db0ce07.
Build failure: https://lab.llvm.org/buildbot/#/builders/159/builds/4466
Commit: 4e6ff75efa14e0156c005ffcf3d7964dc754b792
https://github.com/llvm/llvm-project/commit/4e6ff75efa14e0156c005ffcf3d7964dc754b792
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[Vectorize] Fix a warning
This patch fixes:
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp:7245:1: error:
unused function 'planContainsAdditionalSimplifications'
[-Werror,-Wunused-function]
Commit: ca48b015a1719ba7be2d357056f348473d495d3d
https://github.com/llvm/llvm-project/commit/ca48b015a1719ba7be2d357056f348473d495d3d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionImport.cpp
Log Message:
-----------
[LTO] Use a helper function to add a definition (NFC) (#105721)
I missed this one when I introduced helper functions in:
commit 3082a381f57ef2885c270f41f2955e08c79634c5
Author: Kazu Hirata <kazu at google.com>
Date: Thu Aug 22 12:06:47 2024 -0700
Commit: 424b87b8d6f0fab0898cb5cfdf9b1bbf06ddee03
https://github.com/llvm/llvm-project/commit/424b87b8d6f0fab0898cb5cfdf9b1bbf06ddee03
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/cast.ll
Log Message:
-----------
[RISCV][TTI] Use legalized element types when costing casts (#105723)
This fixes a crash introduced by my
ac6e1fd0c089043fe60bd0040ba3cad884f00206.
I had failed to consider the case where a vector is truncated to an
illegal element type. The resulting intermediate VT wasn't an MVT and
we'd fail an assertion. Surprisingly, SLP does query illegal element
types in some cases.
Commit: 0d21c2b3e516617ee0fe60e2e5368e0c447b17ad
https://github.com/llvm/llvm-project/commit/0d21c2b3e516617ee0fe60e2e5368e0c447b17ad
Author: vporpo <vporpodas at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxIR] Implement CatchReturnInst (#105605)
This patch implements sandboxir::CatchReturnInst mirroring
llvm::CatchReturnInst.
Commit: 1df15042bdda3817827e39c772525a4a24c1adbe
https://github.com/llvm/llvm-project/commit/1df15042bdda3817827e39c772525a4a24c1adbe
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
Log Message:
-----------
Revert "[clang] Merge lifetimebound and GSL code paths for lifetime analysis (#104906)" (#105752)
Revert as it breaks libc++ tests, see #104906.
This reverts commit c368a720a0b40bb8fe4aff3971fe9a7009c85aa6.
Commit: ecfceb890d47e4c11804cdc2c38f905f691ef397
https://github.com/llvm/llvm-project/commit/ecfceb890d47e4c11804cdc2c38f905f691ef397
Author: h-vetinari <h.vetinari at gmx.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[clang][NFC] order C++ standards in reverse in release notes (#104866)
Noticed that the release notes currently have a weird order: C++17,
C++14(!), C++20, C++23, C++2c. Reorder them in reverse chronological
order, which also matches the [status
page](https://clang.llvm.org/cxx_status.html).
Commit: 25d976b45cb5b3d222d3a9cd94caa8a54031bbb7
https://github.com/llvm/llvm-project/commit/25d976b45cb5b3d222d3a9cd94caa8a54031bbb7
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AMDGPU/expamd-masked-load.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AMDGPU/expand-masked-gather.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AMDGPU/expand-masked-scatter.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AMDGPU/expand-masked-store.ll
Log Message:
-----------
[ScalarizeMaskedMemIntr] Don't use a scalar mask on GPUs (#104842)
ScalarizedMaskedMemIntr contains an optimization where the <N x i1> mask
is bitcast into an iN and then bit-tests with powers of two are used to
determine whether to load/store/... or not.
However, on machines with branch divergence (mainly GPUs), this is a
mis-optimization, since each i1 in the mask will be stored in a
condition register - that is, ecah of these "i1"s is likely to be a word
or two wide, making these bit operations counterproductive.
Therefore, amend this pass to skip the optimizaiton on targets that it
pessimizes.
Pre-commit tests #104645
Commit: 08e5a1de8227512d4774a534b91cb2353cef6284
https://github.com/llvm/llvm-project/commit/08e5a1de8227512d4774a534b91cb2353cef6284
Author: Jeff Niu <jeff at modular.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXProxyRegErasure.cpp
Log Message:
-----------
[llvm][NVPTX] Fix quadratic runtime in ProxyRegErasure (#105730)
This pass performs RAUW by walking the machine function for each RAUW
operation. For large functions, this runtime in this pass starts to blow
up. Linearize the pass by batching the RAUW ops at once.
Commit: be8ee098c4b45522eb4836ee0034469208c85c74
https://github.com/llvm/llvm-project/commit/be8ee098c4b45522eb4836ee0034469208c85c74
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
R utils/bazel/llvm-project-overlay/lldb/tools/lldb-dap/BUILD.bazel
Log Message:
-----------
[bazel] Move lldb-dap cc_binary to lldb/BUILD.bazel (#105733)
On linux lldb-dap uses the location of the lldb-dap binary to search for
lldb-server. Previously these were produced in different directories
corresponding to the BUILD file paths. It's not ideal that the BUILD
file location matters for the binary at runtime but it doesn't hurt to
have this tool here too like the others.
Commit: f06563a5c0d239a6b98f74db522681613254ad08
https://github.com/llvm/llvm-project/commit/f06563a5c0d239a6b98f74db522681613254ad08
Author: Yun-Fly <yunfei.song at intel.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
Log Message:
-----------
[mlir][tensor] Add consumer fusion for `tensor.pack` op. (#103715)
Add missing `getIterationDomainTileFromOperandTile` and `getTiledImplementationFromOperandTile` to `tensor.pack` and enable fusing it as a consumer. NOTE that, it only expects perfect tiling scenario without padding semantic currently.
Commit: 381405fafe9d48d29c777e7680902d0943834859
https://github.com/llvm/llvm-project/commit/381405fafe9d48d29c777e7680902d0943834859
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/include/llvm/TableGen/StringToOffsetTable.h
M llvm/utils/TableGen/IntrinsicEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Emit more readable builtin string table (#105445)
- Add `EmitStringLiteralDef` to StringToOffsetTable class to emit more
readable string table.
- Use that in `EmitIntrinsicToBuiltinMap`.
Commit: 987ffc31f8813f8b4157f5191dcff63a7c4db161
https://github.com/llvm/llvm-project/commit/987ffc31f8813f8b4157f5191dcff63a7c4db161
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
Log Message:
-----------
[AMDGPU] Refactor code for GETPC bundle updates in hazards (NFCI)
As suggested in review for PR #100067.
Refactor code for S_GETPC_B64 bundle updates for use with multiple
hazard mitigations.
Commit: 714033a6bf3a81b1350f969ddd83bcd9fbb703e8
https://github.com/llvm/llvm-project/commit/714033a6bf3a81b1350f969ddd83bcd9fbb703e8
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/QualifierFixerTest.cpp
Log Message:
-----------
[clang-format] Don't insert a space between :: and * (#105043)
Also, don't insert a space after ::* for method pointers.
See
https://github.com/llvm/llvm-project/pull/86253#issuecomment-2298404887.
Fixes #100841.
Commit: 151945151c3d29b3a6b3a630cf36942cab07fef9
https://github.com/llvm/llvm-project/commit/151945151c3d29b3a6b3a630cf36942cab07fef9
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
Revert "[Vectorize] Fix warnings" (#105771)
Triggers assert in compiler
https://lab.llvm.org/buildbot/#/builders/51/builds/2836
```
Instructions.cpp:1700: llvm::ShuffleVectorInst::ShuffleVectorInst(Value *, Value *, ArrayRef<int>, const Twine &, InsertPosition): Assertion `isValidOperands(V1, V2, Mask) && "Invalid shuffle vector instruction operands!"' failed.
```
This reverts commit a625435d3ef4c7bbfceb44498b9b5a2cbbed838b.
Commit: 62da359ce7a7ae09e6afa96227eb556be54aabb1
https://github.com/llvm/llvm-project/commit/62da359ce7a7ae09e6afa96227eb556be54aabb1
Author: bwlodarcz <bertrand.wlodarczyk at intel.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/docs/SPIRVUsage.rst
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
A llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.h
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
A llvm/test/CodeGen/SPIRV/debug-info/basic-global-di.ll
Log Message:
-----------
[SPIRV] Emitting DebugSource, DebugCompileUnit (#97558)
This commit introduces emission of DebugSource, DebugCompileUnit from
NonSemantic.Shader.DebugInfo.100 and required OpString with filename.
NonSemantic.Shader.DebugInfo.100 is divided, following DWARF into two
main concepts – emitting DIE and Line.
In DWARF .debug_abbriev and .debug_info sections are responsible for
emitting tree with information (DEIs) about e.g. types, compilation
unit. Corresponding to that in NonSemantic.Shader.DebugInfo.100 have
instructions like DebugSource, DebugCompileUnit etc. which preforms same
role in SPIR-V file. The difference is in fact that in SPIR-V there are
no sections but logical layout which forces order of the instruction
emission.
The NonSemantic.Shader.DebugInfo.100 requires for this type of global
information to be emitted after OpTypeXXX and OpConstantXXX
instructions.
One of the goals was to minimize changes and interaction with
SPIRVModuleAnalysis as possible which current commit achieves by
emitting it’s instructions directly into MachineFunction.
The possibility of duplicates are mitigated by guard inside pass which
emits the global information only once in one function.
By that method duplicates don’t have chance to be emitted.
>From that point, adding new debug global instructions should be
straightforward.
Commit: e15abb798282e4151f546eef14be4906f428eb46
https://github.com/llvm/llvm-project/commit/e15abb798282e4151f546eef14be4906f428eb46
Author: Lang Hames <lhames at gmail.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/LoadRelocatableObject.h
M llvm/include/llvm/ExecutionEngine/Orc/MachO.h
M llvm/lib/ExecutionEngine/Orc/LoadRelocatableObject.cpp
M llvm/lib/ExecutionEngine/Orc/MachO.cpp
Log Message:
-----------
[ORC] Add an identifier-override argument to loadRelocatableObject and friends.
API clients may want to use things other than paths as the buffer identifiers.
No testcase -- I haven't thought of a good way to expose this via the regression
testing tools.
rdar://133536831
Commit: 351f4a5593f1ef507708ec5eeca165b20add3340
https://github.com/llvm/llvm-project/commit/351f4a5593f1ef507708ec5eeca165b20add3340
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
Reland "[Vectorize] Fix warnings"" (#105772)
Revert was wrong,
The bot is still broken
https://lab.llvm.org/buildbot/#/builders/51/builds/2838
Reverts llvm/llvm-project#105771
Commit: fdaaa878443285e47a2cbc1b641ac04e2efa7881
https://github.com/llvm/llvm-project/commit/fdaaa878443285e47a2cbc1b641ac04e2efa7881
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/PlaceSafepoints.cpp
Log Message:
-----------
[Scalar] Remove an unused variable (#105767)
The last use was removed by:
commit 89fe570958f8b82df9a9c3b4c251ecba9753272a
Author: Philip Reames <listmail at philipreames.com>
Date: Tue May 12 23:39:23 2015 +0000
Commit: 7c3237d778572931ff097e81df43d0bce9d1d4f8
https://github.com/llvm/llvm-project/commit/7c3237d778572931ff097e81df43d0bce9d1d4f8
Author: Tom <pottagetom at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestComments.cpp
M clang/unittests/Format/FormatTestObjC.cpp
Log Message:
-----------
[clang-format] Change BinPackParameters to enum and add AlwaysOnePerLine (#101882)
Related issues that have requested this feature:
#51833
#23796
#53190 Partially solves - this issue requests is for both arguments and
parameters
Commit: 3563907969843cb5d97995fb02177ee578e33aa2
https://github.com/llvm/llvm-project/commit/3563907969843cb5d97995fb02177ee578e33aa2
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/FunctionImport.h
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/tools/llvm-link/llvm-link.cpp
Log Message:
-----------
[LTO] Turn ImportMapTy into a proper class (NFC) (#105748)
This patch turns type alias ImportMapTy into a proper class to provide
a more intuitive interface like:
ImportList.addDefinition(...)
as opposed to:
FunctionImporter::addDefinition(ImportList, ...)
Also, this patch requires all non-const accesses to go through
addDefinition, maybeAddDeclaration, and addGUID while providing const
accesses via:
const ImportMapTyImpl &getImportMap() const { return ImportMap; }
I realize ImportMapTy may not be the best name as a class (maybe OK as
a type alias). I am not renaming ImportMapTy in this patch at least
because there are 47 mentions of ImportMapTy under llvm/.
Commit: 96b3166602cbe3dc1240bc3189cf1581273928a2
https://github.com/llvm/llvm-project/commit/96b3166602cbe3dc1240bc3189cf1581273928a2
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/multiple_reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/scalarization-overhead.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/shuffle-vectors-mask-size.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/combined-loads-stored.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll
M llvm/test/Transforms/SLPVectorizer/X86/addsub.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-many-users-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-node-same-as-vect-but-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/inst_size_bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark-partial-loads-vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reused-pointer.ll
M llvm/test/Transforms/SLPVectorizer/X86/schedule_budget_debug_info.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2-unord.ll
M llvm/test/Transforms/SLPVectorizer/X86/tiny-tree.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect-gather-same-nodes.ll
Log Message:
-----------
Revert "[SLP]Improve/fix subvectors in gather/buildvector nodes handling" (#105780)
with "[Vectorize] Fix warnings"
It introduced compiler crashes, see #104144.
This reverts commit 69332bb8995aef60d830406de12cb79a50390261 and
351f4a5593f1ef507708ec5eeca165b20add3340.
Commit: 84aa02d3fa1f1f614c4f3c144ec118b2f05ae6b0
https://github.com/llvm/llvm-project/commit/84aa02d3fa1f1f614c4f3c144ec118b2f05ae6b0
Author: Benjamin Maxwell <macdue at dueutil.tech>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M mlir/include/mlir/IR/BuiltinAttributes.td
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/IR/BuiltinAttributes.cpp
M mlir/test/Dialect/MemRef/canonicalize.mlir
Log Message:
-----------
[memref] Handle edge case in subview of full static size fold (#105635)
It is possible to have a subview with a fully static size and a type
that matches the source type, but a dynamic offset that may be
different. However, currently the memref dialect folds:
```mlir
func.func @subview_of_static_full_size(
%arg0: memref<16x4xf32, strided<[4, 1], offset: ?>>, %idx: index)
-> memref<16x4xf32, strided<[4, 1], offset: ?>>
{
%0 = memref.subview %arg0[%idx, 0][16, 4][1, 1]
: memref<16x4xf32, strided<[4, 1], offset: ?>>
to memref<16x4xf32, strided<[4, 1], offset: ?>>
return %0 : memref<16x4xf32, strided<[4, 1], offset: ?>>
}
```
To:
```mlir
func.func @subview_of_static_full_size(
%arg0: memref<16x4xf32, strided<[4, 1], offset: ?>>, %arg1: index)
-> memref<16x4xf32, strided<[4, 1], offset: ?>>
{
return %arg0 : memref<16x4xf32, strided<[4, 1], offset: ?>>
}
```
Which drops the dynamic offset from the `subview` op.
Commit: 59721f2326988ece58fab183971f79b71f751b83
https://github.com/llvm/llvm-project/commit/59721f2326988ece58fab183971f79b71f751b83
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/include/llvm/MC/MCELFObjectWriter.h
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/test/MC/Mips/sort-relocation-table.s
Log Message:
-----------
[MIPS] Optimize sortRelocs for o32
The o32 ABI specifies:
> Each relocation type of R_MIPS_HI16 must have an associated R_MIPS_LO16 entry immediately following it in the list of relocations. [...] the addend AHL is computed as (AHI << 16) + (short)ALO
In practice, the high-part and low-part relocations may not be adjacent
in assembly files, requiring the assembler to reorder relocations.
http://reviews.llvm.org/D19718 performed the reordering, but did not
optimize for the common case where a %lo immediately follows its
matching %hi. The quadratic time complexity could make sections with
many relocations very slow to process.
This patch implements the fast path, simplifies the code, and makes the
behavior more similar to GNU assembler (for the .rel.mips_hilo_8b test).
We also remove `OriginalSymbol`, removing overhead for other targets.
Fix #104562
Pull Request: https://github.com/llvm/llvm-project/pull/104723
Commit: a69ba0a5f911ebdfd59b399e82ded8143e89e6cd
https://github.com/llvm/llvm-project/commit/a69ba0a5f911ebdfd59b399e82ded8143e89e6cd
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
Log Message:
-----------
[clang][bytecode][NFC] Get rid of const_casts in Move fns (#105698)
Commit: e5f196e4e7e3aec5c19adeacb7191ed0a099ea9a
https://github.com/llvm/llvm-project/commit/e5f196e4e7e3aec5c19adeacb7191ed0a099ea9a
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang/lib/Serialization/ASTReaderDecl.cpp
Log Message:
-----------
[NFCI] [C++20] [Modules] Relax the case for duplicated declaration in multiple module units for explicit specialization
Relax the case for duplicated declaration in multiple module units for
explicit specialization and refactor the implementation of
checkMultipleDefinitionInNamedModules a little bit.
This is intended to not affect any end users since it only relaxes the
condition to emit an error.
Commit: 39986f0b4d797e4ad3c12607f2b4abe2322b82bb
https://github.com/llvm/llvm-project/commit/39986f0b4d797e4ad3c12607f2b4abe2322b82bb
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang/lib/Serialization/ASTReaderDecl.cpp
Log Message:
-----------
[NFCI] [Serialization] Use demoteThisDefinitionToDeclaration instead of setCompleteDefinition(false) for CXXRecordDecl
When we merge the definition for CXXRecordDecl, we would use
setCompleteDefinition(false) to mark the merged definition. But this was
not the correct/good interface. We can't know that the merged definition
was a definition then. And actually, we provided an interface for this:
demoteThisDefinitionToDeclaration.
So this patch tries to use the correct API.
This was found in the downstream developing. This is not strictly NFC
but it is intended to be NFC for every end users.
Commit: 85b6aac7c25f9d2a976a76045ace1e7afebb5965
https://github.com/llvm/llvm-project/commit/85b6aac7c25f9d2a976a76045ace1e7afebb5965
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
A llvm/test/Transforms/ConstraintElimination/pr105785.ll
Log Message:
-----------
[ConstraintElim] Fix miscompilation caused by PR97974 (#105790)
Fixes https://github.com/llvm/llvm-project/issues/105785.
Commit: 28133d9159e814160fa622de6ffdcf36dd25f9d7
https://github.com/llvm/llvm-project/commit/28133d9159e814160fa622de6ffdcf36dd25f9d7
Author: David Green <david.green at arm.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/add.ll
A llvm/test/CodeGen/AArch64/mul.ll
A llvm/test/CodeGen/AArch64/sub.ll
Log Message:
-----------
[AArch64] Add Add/Sub/Mul test coverage for GISel. NFC
Commit: f53bfa39a7dae444650a9c0e16d52301a733f5fc
https://github.com/llvm/llvm-project/commit/f53bfa39a7dae444650a9c0e16d52301a733f5fc
Author: David Green <david.green at arm.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/andorxor.ll
Log Message:
-----------
[AArch64] Add And/Or/XOr test coverage for GISel. NFC
Commit: b02b5b7b598ff146f8d5ed529412236533429403
https://github.com/llvm/llvm-project/commit/b02b5b7b598ff146f8d5ed529412236533429403
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
Log Message:
-----------
[AMDGPU] Simplify use of hasMovrel and hasVGPRIndexMode (#105680)
The generic subtarget has neither of these features. Rather than forcing
HasMovrel on, it is simpler to expand dynamic vector indexing to a
sequence of compare/select instructions.
NFC for real subtargets.
Commit: 96509bb98fc0a7e929304a64362baaa2589d5a6b
https://github.com/llvm/llvm-project/commit/96509bb98fc0a7e929304a64362baaa2589d5a6b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaCXX/matrix-index-operator-sign-conversion.cpp
Log Message:
-----------
[Matrix] Preserve signedness when extending matrix index expression. (#103044)
As per [1] the indices for a matrix element access operator shall have
integral or unscoped enumeration types and be non-negative. At the
moment, the index expression is converted to SizeType irrespective of
the signedness of the index expression. This causes implicit sign
conversion warnings if any of the indices is signed.
As per the spec, using signed types as indices is allowed and should not
cause any warnings. If the index expression is signed, extend to
SignedSizeType to avoid the warning.
[1]
https://clang.llvm.org/docs/MatrixTypes.html#matrix-type-element-access-operator
PR: https://github.com/llvm/llvm-project/pull/103044
Commit: fa2dccb377d0b712223efe5b62e5fc633580a9e6
https://github.com/llvm/llvm-project/commit/fa2dccb377d0b712223efe5b62e5fc633580a9e6
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/waitcnt-vmcnt-loop.mir
Log Message:
-----------
[AMDGPU] Remove one case of vmcnt loop header flushing for GFX12 (#105550)
When a loop contains a VMEM load whose result is only used outside the
loop, do not bother to flush vmcnt in the loop head on GFX12. A wait for
vmcnt will be required inside the loop anyway, because VMEM instructions
can write their VGPR results out of order.
Commit: cf6cd1fd67356ca0c2972992928592d2430043d2
https://github.com/llvm/llvm-project/commit/cf6cd1fd67356ca0c2972992928592d2430043d2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/test/CodeGen/X86/scatter-schedule.ll
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512.s
Log Message:
-----------
[MCA][X86] Add missing 512-bit vpscatterqd/vscatterqps schedule data (REAPPLIED)
This doesn't match uops.info yet - but it matches the existing vpscatterdq/vscatterqpd entries like uops.info says it should
Reapplied with codegen fix for scatter-schedule.ll
Fixes #105675
Commit: 3cca522d21876da36145655bc14f334035b4265d
https://github.com/llvm/llvm-project/commit/3cca522d21876da36145655bc14f334035b4265d
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSerializationKinds.td
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
A clang/test/Modules/warn-duplicated-decls-in-module-units.cppm
Log Message:
-----------
[C++20] [Modules] Warn for duplicated decls in mutliple module units (#105799)
It is a long standing issue that the duplicated declarations in multiple
module units would cause the compilation performance to get slowed down.
And there are many questions or issue reports. So I think it is better
to add a warning for it.
And given this is not because the users' code violates the language
specification or any best practices, the warning is disabled by default
even if `-Wall` is specified. The users need to specify the warning
explcitly or use `Weverything`.
The documentation will add separately.
Commit: c8ba31700588eabbace2af40d711e235d13ab9bf
https://github.com/llvm/llvm-project/commit/c8ba31700588eabbace2af40d711e235d13ab9bf
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
Log Message:
-----------
[AMDGPU] Remove comment outdated by #96933
Commit: 646478f38b03cbc861ae17533c641c2a944118b3
https://github.com/llvm/llvm-project/commit/646478f38b03cbc861ae17533c641c2a944118b3
Author: David Green <david.green at arm.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/add.ll
M llvm/test/CodeGen/AArch64/andorxor.ll
M llvm/test/CodeGen/AArch64/mul.ll
M llvm/test/CodeGen/AArch64/sub.ll
Log Message:
-----------
[AArch64] Scalarize i128 add/sub/mul/and/or/xor vectors
This mirrors what we do for SDAG, scalarizing i128 vectors with
add/sub/mul/and/or/xor operators.
Commit: 38b8e54682567d685bc03f9fdef26baa6b708ef9
https://github.com/llvm/llvm-project/commit/38b8e54682567d685bc03f9fdef26baa6b708ef9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode][NFC] Remove containsErrors() check from delegate (#105804)
This check was removed a while ago from visit(), remove it from
delegate() as well.
Commit: 7b4b85b75d22a792b2ef80e6af4f0faf18da0a43
https://github.com/llvm/llvm-project/commit/7b4b85b75d22a792b2ef80e6af4f0faf18da0a43
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/c.c
Log Message:
-----------
[clang][bytecode] Reject void InitListExpr differently (#105802)
This reverts c79d1fa540390f6e37e1ea326153559eeadd0de6 and
125aa10b3d645bd26523a1bc321bb2e6b1cf04e1
Instead, use the previous approach but allow void-typed InitListExprs
with 0 initializers.
Commit: 4a12722110abb2ccb98173c82a7d7b96a5c098e0
https://github.com/llvm/llvm-project/commit/4a12722110abb2ccb98173c82a7d7b96a5c098e0
Author: Lang Hames <lhames at gmail.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MachO.h
M llvm/lib/ExecutionEngine/Orc/MachO.cpp
Log Message:
-----------
[ORC] Expose a non-destructive check-macho-buffer overload.
This allows clients to check buffers that they don't own.
rdar://133536831
Commit: cbf34a5f7701148d68951320a72f483849b22eaf
https://github.com/llvm/llvm-project/commit/cbf34a5f7701148d68951320a72f483849b22eaf
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
R llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
Log Message:
-----------
[AMDGPU] Remove dead pass: AMDGPUMachineCFGStructurizer (#105645)
Commit: 2b4b909509bc2aa7e7f6b3bc469c214bf42fea49
https://github.com/llvm/llvm-project/commit/2b4b909509bc2aa7e7f6b3bc469c214bf42fea49
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
Log Message:
-----------
[AMDGPU] Remove unused amdgpu-disable-structurizer flag (#105800)
Commit: 2f144ac5a13dc39389e1850417f4ac766b1f1ada
https://github.com/llvm/llvm-project/commit/2f144ac5a13dc39389e1850417f4ac766b1f1ada
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode][NFC] Remove containsErrors check from visitInitializer (#105811)
Commit: 2051a7bcd3f375c063f803df3cfde9e6e6d724ad
https://github.com/llvm/llvm-project/commit/2051a7bcd3f375c063f803df3cfde9e6e6d724ad
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Dialect/FIRAttr.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Transforms/ConstantArgumentGlobalisation.cpp
M flang/lib/Optimizer/Transforms/PolymorphicOpConversion.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/test/HLFIR/c_ptr_byvalue.f90
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/HLFIR/assumed-rank-calls.f90
M flang/test/Lower/HLFIR/assumed-rank-iface.f90
M flang/test/Lower/HLFIR/bindc-value-derived.f90
M flang/test/Lower/HLFIR/block_bindc_pocs.f90
M flang/test/Lower/HLFIR/call-sequence-associated-descriptors.f90
M flang/test/Lower/HLFIR/calls-character-singleton-result.f90
M flang/test/Lower/HLFIR/ignore-type-assumed-shape.f90
M flang/test/Lower/OpenMP/threadprivate-default-clause.f90
M flang/test/Lower/block.f90
M flang/test/Lower/call-bindc.f90
Log Message:
-----------
[flang][NFC] turn fir.call is_bind_c into enum for procedure flags (#105691)
First patch to fix a BIND(C) ABI issue
(https://github.com/llvm/llvm-project/issues/102113). I need to keep
track of BIND(C) in more locations (fir.dispatch and func.func
operations), and I need to fix a few passes that are dropping the
attribute on the floor. Since I expect more procedure attributes that
cannot be reflected in mlir::FunctionType will be needed for ABI,
optimizations, or debug info, this NFC patch adds a new enum attribute
to keep track of procedure attributes in the IR.
This patch is not updating lowering to lower more attributes, this will
be done in a separate patch to keep the test changes low here.
Adding the attribute on fir.dispatch and func.func will also be done in
separate patches.
Commit: 04ab647b3f145946397837c6ba10ae0795b9bd01
https://github.com/llvm/llvm-project/commit/04ab647b3f145946397837c6ba10ae0795b9bd01
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/include/llvm/TableGen/StringToOffsetTable.h
Log Message:
-----------
[NFC][TableGen] Refactor StringToOffsetTable (#105655)
- Make `EmitString` const by not mutating `AggregateString`.
- Use C++17 structured bindings in `GetOrAddStringOffset`.
- Use StringExtras version of isDigit instead of std::isdigit.
Commit: 1e3dc8cdb49bf7b8344d1d7f7befbb95a9fbdb63
https://github.com/llvm/llvm-project/commit/1e3dc8cdb49bf7b8344d1d7f7befbb95a9fbdb63
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
Log Message:
-----------
[Serialization] Fix a warning
This patch fixes:
clang/lib/Serialization/ASTReader.cpp:9978:27: error: lambda capture
'this' is not used [-Werror,-Wunused-lambda-capture]
Commit: 0d1d95ecc8cb0fc716f6535c5ceb403d42ef4862
https://github.com/llvm/llvm-project/commit/0d1d95ecc8cb0fc716f6535c5ceb403d42ef4862
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/PlaceSafepoints.cpp
Log Message:
-----------
[Transforms] Use a range-based for loop (NFC) (#105769)
Commit: 5def27c72c1f3e5be6770218fa45a615c411d5b1
https://github.com/llvm/llvm-project/commit/5def27c72c1f3e5be6770218fa45a615c411d5b1
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
Log Message:
-----------
[AMDGPU] Remove "amdgpu-enable-structurizer-workarounds" flag (#105819)
Commit: 4d348f72d3ac4289821f944a99cdb4b6af21aa7b
https://github.com/llvm/llvm-project/commit/4d348f72d3ac4289821f944a99cdb4b6af21aa7b
Author: KaiWeng <kaiweng at andestech.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
A llvm/test/CodeGen/RISCV/sdata-sections.ll
Log Message:
-----------
[RISCV] Let -data-sections also work on sbss/sdata sections (#87040)
Add an unique suffix to .sbss/.sdata if -fdata-sections.
Without assigning an unique .sbss/.sdata section to each symbols, a
linker may not be able to remove unused part when gc-section since all
used and unused symbols are all mixed in the same .sbss/.sdata section.
I believe this also matches the behavior of gcc.
Commit: b084111c8e26f96975f505c37d42e992066776f8
https://github.com/llvm/llvm-project/commit/b084111c8e26f96975f505c37d42e992066776f8
Author: Théo Degioanni <theo.degioanni.llvm.deluge062 at simplelogin.fr>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M mlir/lib/Transforms/Mem2Reg.cpp
M mlir/test/Transforms/mem2reg.mlir
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[mlir][mem2reg] Fix Mem2Reg attempting to promote in graph regions (#104910)
Mem2Reg assumes SSA dependencies but did not check for graph regions.
This fixes it.
---------
Co-authored-by: Christian Ulmann <christianulmann at gmail.com>
Commit: 2617023923175b0fd2a8cb94ad677c061c01627f
https://github.com/llvm/llvm-project/commit/2617023923175b0fd2a8cb94ad677c061c01627f
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/test/Preprocessor/aarch64-target-features.c
Log Message:
-----------
[clang][AArch64] Add SME2.1 feature macros (#105657)
Commit: c9b6339ad40cacb729cc714342d443e781fdfca3
https://github.com/llvm/llvm-project/commit/c9b6339ad40cacb729cc714342d443e781fdfca3
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/MachineStableHash.cpp
Log Message:
-----------
[NFC] Use stable_hash_combine instead of hash_combine (#105619)
I found the current stable hash is not deterministic across multiple
runs on a specific platform. This is because it uses `hash_combine`
instead of `stable_hash_combine`.
Commit: f142f8afe21bceb00fb495468aa0b5043e98c419
https://github.com/llvm/llvm-project/commit/f142f8afe21bceb00fb495468aa0b5043e98c419
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
[AMDGPU] Improve uniform argument handling in InstCombineIntrinsic (#105812)
Common up handling of intrinsics that are a no-op on uniform arguments.
This catches a couple of new cases:
readlane (readlane x, y), z -> readlane x, y
(for any z, does not have to equal y).
permlane64 (readfirstlane x) -> readfirstlane x
(and likewise for any other uniform argument to permlane64).
Commit: f3d2609af3031ddb54030548e86335f295cf49ca
https://github.com/llvm/llvm-project/commit/f3d2609af3031ddb54030548e86335f295cf49ca
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/multiple_reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/scalarization-overhead.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/shuffle-vectors-mask-size.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/combined-loads-stored.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll
M llvm/test/Transforms/SLPVectorizer/X86/addsub.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-many-users-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-node-same-as-vect-but-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/inst_size_bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark-partial-loads-vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reused-pointer.ll
M llvm/test/Transforms/SLPVectorizer/X86/schedule_budget_debug_info.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2-unord.ll
M llvm/test/Transforms/SLPVectorizer/X86/tiny-tree.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect-gather-same-nodes.ll
Log Message:
-----------
[SLP]Improve/fix subvectors in gather/buildvector nodes handling
SLP vectorizer has an estimation for gather/buildvector nodes, which
contain some scalar loads. SLP vectorizer performs pretty similar (but
large in SLOCs) estimation, which not always correct. Instead, this
patch implements clustering analysis and actual node allocation with the
full analysis for the vectorized clustered scalars (not only loads, but
also some other instructions) with the correct cost estimation and
vector insert instructions. Improves overall vectorization quality and
simplifies analysis/estimations.
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/104144
Commit: 002ba17094e8e60c5eb602938637ac97dbf280ed
https://github.com/llvm/llvm-project/commit/002ba17094e8e60c5eb602938637ac97dbf280ed
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV][MC] Name the vector tuple registers. NFC (#102726)
Currently vector tuple registers don't have the specified names, the
default name is, for example: `VRN3M2` -> `V8M2_V10M2_V12M2`, however
it's equivalent to `v8` in the assembly.
Commit: e3ce979f1b3ac1e7f2d0261d3abffbd12064eae6
https://github.com/llvm/llvm-project/commit/e3ce979f1b3ac1e7f2d0261d3abffbd12064eae6
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Driver/Options.td
M clang/test/Parser/parser_overflow.c
Log Message:
-----------
Revert "[clang] Increase the default expression nesting limit (#104717)"
This reverts commit 7597e0930638e0a20ca9bfc193a3d89575ce4469.
It caused several buildbot failures due to stack overflows with the
parser test.
Commit: 67a9093a473c851f1fe60d746354023dd6f39337
https://github.com/llvm/llvm-project/commit/67a9093a473c851f1fe60d746354023dd6f39337
Author: cceerczw <chengzhiwei6 at huawei.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Transforms/InstCombine/AArch64/sve-inst-combine-cmpne.ll
Log Message:
-----------
[instCombine][bugfix] Fix crash caused by using of cast in instCombineSVECmpNE (#102472)
Commit: dab19dac94eee19483ba1a7c37bdec4b8501acc3
https://github.com/llvm/llvm-project/commit/dab19dac94eee19483ba1a7c37bdec4b8501acc3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/RISCV/reversed-strided-node-with-external-ptr.ll
Log Message:
-----------
[SLP]Fix a crash for the strided nodes with reversed order and externally used pointer.
If the strided node is reversed, need to cehck for the last instruction,
not the first one in the list of scalars, when checking if the root
pointer must be extracted.
Commit: 858afe90aad9ca45165d64baec9249dd680c85d5
https://github.com/llvm/llvm-project/commit/858afe90aad9ca45165d64baec9249dd680c85d5
Author: Hans Wennborg <hans at chromium.org>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/rv64zba.ll
Log Message:
-----------
Revert "[RISCV] Add isel optimization for (and (sra y, c2), c1) to recover regression from #101751. (#104114)"
This caused an assert to fire:
llvm/include/llvm/Support/Casting.h:566:
decltype(auto) llvm::cast(const From &) [To = llvm::ConstantSDNode, From = llvm::SDValue]:
Assertion `isa<To>(Val) && "cast<Ty>() argument of incompatible type!"' failed.
see comment on the PR.
> If c1 is a shifted mask with c3 leading zeros and c4 trailing zeros. If
> c2 is greater than c3, we can use (srli (srai y, c2 - c3), c3 + c4)
> followed by a SHXADD with c4 as the X amount.
>
> Without Zba we can use (slli (srli (srai y, c2 - c3), c3 + c4), c4).
> Alive2: https://alive2.llvm.org/ce/z/AwhheR
This reverts commit 514481736cf943464125ef34570a7df0a19290de.
Commit: 05ce95ef0412ba8b3e3189db5ed130a9949bbefd
https://github.com/llvm/llvm-project/commit/05ce95ef0412ba8b3e3189db5ed130a9949bbefd
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang/test/CodeGen/tls-maxalign-modflag.c
M clang/test/CodeGenCXX/windows-itanium-init-guard.cpp
M clang/test/Driver/debug-options.c
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS5][clang][test] x86_64-scei-ps5 -> x86_64-sie-ps5 in tests (#105810)
`x86_64-sie-ps5` is the triple we share with PS5 toolchain users who
have reason to care about such things. The vast majority of PS5 checks
and tests already use this variant. Quashing the handful of stragglers
will help prevent future copy+paste of the discouraged variant.
Commit: 885c4365c1e8b80bdbbdfecf9b6d436e96be52ac
https://github.com/llvm/llvm-project/commit/885c4365c1e8b80bdbbdfecf9b6d436e96be52ac
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
Log Message:
-----------
[VPlan] Skip branches marked as dead in cost precomputation.
Don't consider the cost of branches marked to be skipped in VPlan cost
pre-computation. Those aren't included in the legacy cost, so they
should not be included in the VPlan cast.
Commit: 6a8f73803a32db75d22490d341bf8744722a9025
https://github.com/llvm/llvm-project/commit/6a8f73803a32db75d22490d341bf8744722a9025
Author: Hans Wennborg <hans at chromium.org>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M compiler-rt/lib/asan/asan_flags.inc
M compiler-rt/lib/asan/asan_globals.cpp
M compiler-rt/test/asan/TestCases/Linux/initialization-nobug-lld.cpp
M compiler-rt/test/asan/TestCases/Linux/odr_indicator_unregister.cpp
M compiler-rt/test/asan/TestCases/Linux/odr_indicators.cpp
M compiler-rt/test/asan/TestCases/Windows/dll_global_dead_strip.c
M compiler-rt/test/asan/TestCases/Windows/dll_report_globals_symbolization_at_startup.cpp
M compiler-rt/test/asan/TestCases/Windows/global_dead_strip.c
M compiler-rt/test/asan/TestCases/Windows/report_globals_vs_freelibrary.cpp
M compiler-rt/test/asan/TestCases/initialization-nobug.cpp
Log Message:
-----------
Revert "Reland "[asan] Remove debug tracing from `report_globals` (#104404)" (#105601)"
that change still breaks
SanitizerCommon-asan-x86_64-Darwin :: Darwin/print-stack-trace-in-code-loaded-after-fork.cpp
> This reverts commit 2704b804bec50c2b016bf678bd534c330ec655b6
> and relands #104404.
>
> The Darwin should not fail after #105599.
This reverts commit 8c6f8c29e90666b747fc4b4612647554206a2be5.
Commit: f77e8f765e425a575516c16e7034cb448d270fcc
https://github.com/llvm/llvm-project/commit/f77e8f765e425a575516c16e7034cb448d270fcc
Author: Chris Apple <cja-private at pm.me>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
A clang/docs/RealtimeSanitizer.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
M clang/docs/index.rst
M clang/include/clang/Basic/Sanitizers.def
M clang/include/clang/Driver/SanitizerArgs.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
A clang/test/CodeGen/rtsan_attribute_inserted.c
A clang/test/CodeGen/rtsan_entry_exit_insertion.c
A clang/test/CodeGen/rtsan_no_attribute_sanitizer_disabled.c
M clang/test/Driver/fsanitize.c
Log Message:
-----------
[clang][rtsan] Reland realtime sanitizer codegen and driver (#102622)
This reverts commit a1e9b7e646b76bf844e8a9a101ebd27de11992ff
This relands commit d010ec6af8162a8ae4e42d2cac5282f83db0ce07
No modifications from the original patch. It was determined that the
ubsan build failure was happening even after the revert, some examples:
https://lab.llvm.org/buildbot/#/builders/159/builds/4477
https://lab.llvm.org/buildbot/#/builders/159/builds/4478
https://lab.llvm.org/buildbot/#/builders/159/builds/4479
Commit: 3faf5b93cfd2b2723851191a244a9616d40771e7
https://github.com/llvm/llvm-project/commit/3faf5b93cfd2b2723851191a244a9616d40771e7
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang/www/c_status.html
Log Message:
-----------
[C23] Update status page for TS 18661 integration (#105693)
WG14 N2401 was removed from the list because it was library-only changes
that don't impact the compiler.
Everything having to do with decimal floating-point types was changed to
No because we do not currently have any support for those.
WG14 N2314 remains Unknown because it has changes to Annex F for binary
floating-point types.
Commit: 7f3793207bfcbb52b1367baefdfa7a6453041ade
https://github.com/llvm/llvm-project/commit/7f3793207bfcbb52b1367baefdfa7a6453041ade
Author: Harini0924 <79345568+Harini0924 at users.noreply.github.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M bolt/test/X86/end-symbol.test
M bolt/test/X86/instrumentation-eh_frame_hdr.cpp
Log Message:
-----------
[BOLT][test] Removed the use of parentheses in BOLT tests with lit internal shell (#105720)
This patch addresses compatibility issues with the lit internal shell by
removing the use of subshell execution (parentheses and subshell syntax)
in the `BOLT` tests. The lit internal shell does not support
parentheses, so the tests have been refactored to use separate command
invocations, with outputs redirected to temporary files where necessary.
This change is relevant for enabling the lit internal shell by default,
as outlined in [[RFC] Enabling the Lit Internal Shell by
Default](https://discourse.llvm.org/t/rfc-enabling-the-lit-internal-shell-by-default/80179)
fixes: #102401
Commit: 7c9008115a2a24788f07bb476fb28dcf5e661ae4
https://github.com/llvm/llvm-project/commit/7c9008115a2a24788f07bb476fb28dcf5e661ae4
Author: pawelszczerbuk <153013546+pawelszczerbuk at users.noreply.github.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
M mlir/test/Dialect/SCF/loop-pipelining.mlir
Log Message:
-----------
[SCF][PIPELINE] Handle the case when values from the peeled prologue may escape out of the loop (#105755)
Previously the values in the peeled prologue that weren't treated with
the `predicateFn` were passed to the loop body without any other
predication. If those values are later used outside of the loop body,
they may be incorrect if the num iterations is smaller than num stages -
1. We need similar masking for those, as is done in the main loop body,
using already existing predicates.
Commit: 6e78aef646c22b7087cbf7939c8016f4f59614a1
https://github.com/llvm/llvm-project/commit/6e78aef646c22b7087cbf7939c8016f4f59614a1
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/CXX/drs/cwg29xx.cpp
M clang/test/Lexer/cxx-features.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
M clang/test/SemaCXX/cxx2a-constexpr-dynalloc.cpp
A clang/test/SemaCXX/cxx2c-constexpr-placement-new.cpp
M clang/www/cxx_dr_status.html
M clang/www/cxx_status.html
Log Message:
-----------
[Clang] Implement P2747 constexpr placement new (#104586)
The implementation follows the resolution of CWG2922
Commit: 807557654a3c1c75b9ca3aedf8672805c7b441d4
https://github.com/llvm/llvm-project/commit/807557654a3c1c75b9ca3aedf8672805c7b441d4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] visitTRUNCATE_USAT_U - use sd_match to match FP_TO_UINT_SAT pattern. NFC.
Commit: ff5552c1b82ada19750792fa1f28a23a33ee39b3
https://github.com/llvm/llvm-project/commit/ff5552c1b82ada19750792fa1f28a23a33ee39b3
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/19.rst
M libcxx/docs/Status/Cxx17.rst
R libcxx/docs/Status/SpecialMath.rst
R libcxx/docs/Status/SpecialMathProjects.csv
R libcxx/docs/Status/Zip.rst
R libcxx/docs/Status/ZipProjects.csv
M libcxx/docs/index.rst
Log Message:
-----------
[libc++] Remove status pages tracking SpecialMath and Zip (#105672)
Instead of tracking those using our static CSV files, I created lists of
subtasks in their respective issues (#99939 and #105169) to track the
work that is still left.
Commit: b8f15051369978c423d74a3bd48a1b9ab6d31ee6
https://github.com/llvm/llvm-project/commit/b8f15051369978c423d74a3bd48a1b9ab6d31ee6
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/IR/Constants.cpp
Log Message:
-----------
[IR] Use a range-based for loop (NFC) (#105826)
Commit: 5a25854ed18ec5a51df6d1f7a2366a574a6846b0
https://github.com/llvm/llvm-project/commit/5a25854ed18ec5a51df6d1f7a2366a574a6846b0
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang-tools-extra/clangd/TUScheduler.cpp
Log Message:
-----------
[clangd] Construct SmallVector with ArrayRef (NFC) (#105829)
Commit: a9f62244f28a64e7b7338c2299ba169df70fbb03
https://github.com/llvm/llvm-project/commit/a9f62244f28a64e7b7338c2299ba169df70fbb03
Author: Matthias Springer <me at m-sp.org>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Conversion/ReconcileUnrealizedCasts/ReconcileUnrealizedCasts.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms][NFC] Move `ReconcileUnrealizedCasts` implementation (#104671)
Move the implementation of `ReconcileUnrealizedCasts` to
`DialectConversion.cpp`, so that it can be called from there in a future
commit.
This commit is in preparation of decoupling argument/source/target
materializations from the dialect conversion framework. The existing
logic around unresolved materializations that predicts IR changes to
decide if a cast op can be folded/erased will become obsolete, as
`ReconcileUnrealizedCasts` will perform these kind of foldings on fully
materialized IR.
---------
Co-authored-by: Markus Böck <markus.boeck02 at gmail.com>
Commit: b1560bdb2bc67006f3b8f7e84ee0356632bf8126
https://github.com/llvm/llvm-project/commit/b1560bdb2bc67006f3b8f7e84ee0356632bf8126
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
Log Message:
-----------
Reland "[clang] Merge lifetimebound and GSL code paths for lifetime analysis (#104906)" (#105838)
Reland without the `EnableLifetimeWarnings` removal. I will remove the
EnableLifetimeWarnings in a follow-up patch.
I have added a test to prevent regression.
Commit: fd7904a07bc26950fa7735fb6871a064e3ebc836
https://github.com/llvm/llvm-project/commit/fd7904a07bc26950fa7735fb6871a064e3ebc836
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M lldb/test/Shell/Unwind/trap_frame_sym_ctx.test
Log Message:
-----------
Revert "[lldb] Speculative fix for trap_frame_sym_ctx.test"
This reverts commit 19d3f3417100dc99caa4394fbd26fc0c4702264e.
Commit: 0381e01424692a746b941e470c4cc44f6f0bf258
https://github.com/llvm/llvm-project/commit/0381e01424692a746b941e470c4cc44f6f0bf258
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/rv64zba.ll
Log Message:
-----------
Recommit "[RISCV] Add isel optimization for (and (sra y, c2), c1) to recover regression from #101751. (#104114)"
Fixed an incorrect cast.
Original message:
If c1 is a shifted mask with c3 leading zeros and c4 trailing zeros. If
c2 is greater than c3, we can use (srli (srai y, c2 - c3), c3 + c4)
followed by a SHXADD with c4 as the X amount.
Without Zba we can use (slli (srli (srai y, c2 - c3), c3 + c4), c4).
Alive2: https://alive2.llvm.org/ce/z/AwhheR
Commit: 3d18cea904391f510ffd754713ce4e1731845ffb
https://github.com/llvm/llvm-project/commit/3d18cea904391f510ffd754713ce4e1731845ffb
Author: Max Coplan <mchcopl at gmail.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M libcxx/include/regex
Log Message:
-----------
[libc++][regex] Add _LIBCPP_FALLTHROUGH to suppress fallthrough warning (#100821)
Commit: 0bf5846553412978d30b84f06c6b6183890ab8e5
https://github.com/llvm/llvm-project/commit/0bf5846553412978d30b84f06c6b6183890ab8e5
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GISelChangeObserver.h
M llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
M llvm/lib/CodeGen/GlobalISel/GISelChangeObserver.cpp
M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
Log Message:
-----------
InstructionSelect: Use GISelChangeObserver instead of MachineFunction::Delegate (#105725)
The main difference is that it's possible for multiple change observers
to be installed at the same time whereas there can only be one
MachineFunction delegate installed. This allows downstream targets to
continue to use observers to recursively select. The target in question
was selecting a gMIR instruction to a machine instruction plus some gMIR
around it and relying on observers to ensure it correctly selected any
gMIR it created before returning to the main loop.
Commit: aec3ec04ac611f9a3d1e1ad075d50f62c1d1a1e2
https://github.com/llvm/llvm-project/commit/aec3ec04ac611f9a3d1e1ad075d50f62c1d1a1e2
Author: Florian Mayer <fmayer at google.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
Log Message:
-----------
[SCCP] fix non-determinism (#105758)
the visit order depended on hashing because we iterated over a
SmallPtrSet
Commit: df9767385701b6bb2ff0411ad6b407bcefbfe34c
https://github.com/llvm/llvm-project/commit/df9767385701b6bb2ff0411ad6b407bcefbfe34c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
A llvm/test/CodeGen/X86/fp16-libcalls.ll
Log Message:
-----------
[X86] Add some initial test coverage for half libcall expansion/promotion
We can add additional tests in the future, but this is an initial placeholder
Inspired by #105775
Commit: 83a7d8a37565e3cb33915591ba40624cea67be5e
https://github.com/llvm/llvm-project/commit/83a7d8a37565e3cb33915591ba40624cea67be5e
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-08-23 (Fri, 23 Aug 2024)
Changed paths:
M bolt/test/X86/end-symbol.test
M bolt/test/X86/instrumentation-eh_frame_hdr.cpp
M clang-tools-extra/clangd/TUScheduler.cpp
M clang/docs/ClangFormatStyleOptions.rst
A clang/docs/RealtimeSanitizer.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/StandardCPlusPlusModules.rst
M clang/docs/UsersManual.rst
M clang/docs/index.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinsWebAssembly.def
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSerializationKinds.td
M clang/include/clang/Basic/Sanitizers.def
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/SanitizerArgs.h
M clang/include/clang/Format/Format.h
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
A clang/lib/AST/ByteCode/FunctionPointer.cpp
M clang/lib/AST/ByteCode/FunctionPointer.h
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/WebAssembly.cpp
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/test/AST/ByteCode/c.c
M clang/test/AST/ByteCode/invalid.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/CXX/drs/cwg29xx.cpp
M clang/test/CXX/temp/temp.decls/temp.mem/p1.cpp
M clang/test/ClangScanDeps/pr61006.cppm
A clang/test/CodeGen/bpf-attr-bpf-fastcall-1.c
M clang/test/CodeGen/builtins-wasm.c
A clang/test/CodeGen/rtsan_attribute_inserted.c
A clang/test/CodeGen/rtsan_entry_exit_insertion.c
A clang/test/CodeGen/rtsan_no_attribute_sanitizer_disabled.c
M clang/test/CodeGen/tls-maxalign-modflag.c
M clang/test/CodeGenCXX/cxx2b-consteval-if.cpp
M clang/test/CodeGenCXX/windows-itanium-init-guard.cpp
R clang/test/CodeGenCoroutines/coro-dwarf-O2.cpp
M clang/test/CodeGenHLSL/builtins/dot-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/dot.hlsl
M clang/test/Driver/coverage.c
M clang/test/Driver/debug-options.c
M clang/test/Driver/fsanitize.c
A clang/test/Driver/mmapsyms.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/program-path-priority.c
M clang/test/Driver/ps5-linker.c
A clang/test/Driver/sparc-fix.c
M clang/test/Driver/wasm-features.c
M clang/test/Lexer/cxx-features.cpp
A clang/test/Misc/cc1as-mmapsyms.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
A clang/test/Modules/warn-duplicated-decls-in-module-units.cppm
A clang/test/Parser/friend-concept.cpp
M clang/test/Parser/parser_overflow.c
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/Preprocessor/wasm-target-features.c
A clang/test/Sema/bpf-attr-bpf-fastcall.c
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
M clang/test/SemaCXX/cxx2a-constexpr-dynalloc.cpp
A clang/test/SemaCXX/cxx2c-constexpr-placement-new.cpp
M clang/test/SemaCXX/matrix-index-operator-sign-conversion.cpp
M clang/tools/driver/cc1as_main.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestComments.cpp
M clang/unittests/Format/FormatTestObjC.cpp
M clang/unittests/Format/QualifierFixerTest.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
M clang/www/cxx_status.html
M compiler-rt/lib/CMakeLists.txt
M compiler-rt/test/asan/TestCases/Darwin/cstring_section.c
M compiler-rt/test/fuzzer/afl-driver-close-fd-mask.test
M compiler-rt/test/fuzzer/afl-driver-stderr.test
M compiler-rt/test/fuzzer/features_dir.test
M compiler-rt/test/metadata/uar.cpp
M cross-project-tests/debuginfo-tests/dexter/dex/utils/Version.py
M flang/docs/OpenMP-declare-target.md
M flang/docs/OpenMP-descriptor-management.md
M flang/include/flang/Optimizer/CMakeLists.txt
M flang/include/flang/Optimizer/CodeGen/CGPasses.td
M flang/include/flang/Optimizer/CodeGen/CodeGen.h
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
A flang/include/flang/Optimizer/OpenMP/CMakeLists.txt
A flang/include/flang/Optimizer/OpenMP/Passes.h
A flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CLOptions.inc
M flang/lib/Frontend/CMakeLists.txt
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/ReductionProcessor.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/CMakeLists.txt
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIRAttr.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
A flang/lib/Optimizer/OpenMP/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/FunctionFiltering.cpp
A flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
A flang/lib/Optimizer/OpenMP/MarkDeclareTarget.cpp
M flang/lib/Optimizer/Support/InternalNames.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/CompilerGeneratedNames.cpp
M flang/lib/Optimizer/Transforms/ConstantArgumentGlobalisation.cpp
R flang/lib/Optimizer/Transforms/OMPFunctionFiltering.cpp
R flang/lib/Optimizer/Transforms/OMPMapInfoFinalization.cpp
R flang/lib/Optimizer/Transforms/OMPMarkDeclareTarget.cpp
M flang/lib/Optimizer/Transforms/PolymorphicOpConversion.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/lib/Semantics/runtime-type-info.cpp
M flang/runtime/copy.cpp
M flang/runtime/numeric.cpp
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Fir/basic-program.fir
M flang/test/Fir/convert-to-llvm.fir
A flang/test/Fir/convert-type-desc-to-llvm.fir
M flang/test/Fir/polymorphic.fir
M flang/test/Fir/type-descriptor.fir
M flang/test/HLFIR/c_ptr_byvalue.f90
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/HLFIR/assumed-rank-calls.f90
M flang/test/Lower/HLFIR/assumed-rank-iface.f90
M flang/test/Lower/HLFIR/bindc-value-derived.f90
M flang/test/Lower/HLFIR/block_bindc_pocs.f90
M flang/test/Lower/HLFIR/call-sequence-associated-descriptors.f90
M flang/test/Lower/HLFIR/calls-character-singleton-result.f90
M flang/test/Lower/HLFIR/ignore-type-assumed-shape.f90
M flang/test/Lower/OpenMP/delayed-privatization-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-add-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-array-lb.f90
M flang/test/Lower/OpenMP/parallel-reduction-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-array2.f90
M flang/test/Lower/OpenMP/parallel-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/reduction-array-intrinsic.f90
M flang/test/Lower/OpenMP/sections-array-reduction.f90
M flang/test/Lower/OpenMP/threadprivate-default-clause.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add-byref.f90
R flang/test/Lower/OpenMP/wsloop-reduction-add-hlfir-byref.f90
R flang/test/Lower/OpenMP/wsloop-reduction-add-hlfir.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-assumed-shape.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-byref.f90
R flang/test/Lower/OpenMP/wsloop-reduction-max-hlfir-byref.f90
R flang/test/Lower/OpenMP/wsloop-reduction-max-hlfir.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
M flang/test/Lower/OpenMP/wsloop-reduction-pointer.f90
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/block.f90
M flang/test/Lower/call-bindc.f90
M flang/test/Lower/dense-array-any-rank.f90
M flang/tools/bbc/CMakeLists.txt
M flang/tools/fir-opt/CMakeLists.txt
M flang/tools/fir-opt/fir-opt.cpp
M flang/tools/tco/CMakeLists.txt
M libc/config/gpu/entrypoints.txt
M libc/config/gpu/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/docs/build_and_test.rst
M libc/docs/contributing.rst
R libc/docs/dev/api_test.rst
R libc/docs/dev/ground_truth_specification.rst
M libc/docs/dev/header_generation.rst
M libc/docs/dev/index.rst
R libc/docs/dev/mechanics_of_public_api.rst
M libc/docs/dev/source_tree_layout.rst
M libc/docs/full_cross_build.rst
M libc/docs/full_host_build.rst
M libc/docs/fullbuild_mode.rst
M libc/docs/gpu/building.rst
M libc/docs/gpu/support.rst
M libc/docs/index.rst
M libc/docs/overlay_mode.rst
M libc/docs/porting.rst
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/locale_t.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/locale-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/locale_t.h
A libc/include/llvm-libc-types/struct_lconv.h
A libc/include/locale.h.def
M libc/newhdrgen/yaml/ctype.yaml
A libc/newhdrgen/yaml/locale.yaml
M libc/spec/stdc.td
M libc/src/CMakeLists.txt
M libc/src/ctype/CMakeLists.txt
M libc/src/ctype/isalnum.cpp
A libc/src/ctype/isalnum_l.cpp
A libc/src/ctype/isalnum_l.h
M libc/src/ctype/isalpha.cpp
A libc/src/ctype/isalpha_l.cpp
A libc/src/ctype/isalpha_l.h
M libc/src/ctype/isblank.cpp
A libc/src/ctype/isblank_l.cpp
A libc/src/ctype/isblank_l.h
M libc/src/ctype/iscntrl.cpp
A libc/src/ctype/iscntrl_l.cpp
A libc/src/ctype/iscntrl_l.h
M libc/src/ctype/isdigit.cpp
A libc/src/ctype/isdigit_l.cpp
A libc/src/ctype/isdigit_l.h
M libc/src/ctype/isgraph.cpp
A libc/src/ctype/isgraph_l.cpp
A libc/src/ctype/isgraph_l.h
M libc/src/ctype/islower.cpp
A libc/src/ctype/islower_l.cpp
A libc/src/ctype/islower_l.h
M libc/src/ctype/isprint.cpp
A libc/src/ctype/isprint_l.cpp
A libc/src/ctype/isprint_l.h
M libc/src/ctype/ispunct.cpp
A libc/src/ctype/ispunct_l.cpp
A libc/src/ctype/ispunct_l.h
M libc/src/ctype/isspace.cpp
A libc/src/ctype/isspace_l.cpp
A libc/src/ctype/isspace_l.h
M libc/src/ctype/isupper.cpp
A libc/src/ctype/isupper_l.cpp
A libc/src/ctype/isupper_l.h
M libc/src/ctype/isxdigit.cpp
A libc/src/ctype/isxdigit_l.cpp
A libc/src/ctype/isxdigit_l.h
M libc/src/ctype/tolower.cpp
A libc/src/ctype/tolower_l.cpp
A libc/src/ctype/tolower_l.h
M libc/src/ctype/toupper.cpp
A libc/src/ctype/toupper_l.cpp
A libc/src/ctype/toupper_l.h
A libc/src/locale/CMakeLists.txt
A libc/src/locale/duplocale.cpp
A libc/src/locale/duplocale.h
A libc/src/locale/freelocale.cpp
A libc/src/locale/freelocale.h
A libc/src/locale/locale.cpp
A libc/src/locale/locale.h
A libc/src/locale/localeconv.cpp
A libc/src/locale/localeconv.h
A libc/src/locale/newlocale.cpp
A libc/src/locale/newlocale.h
A libc/src/locale/setlocale.cpp
A libc/src/locale/setlocale.h
A libc/src/locale/uselocale.cpp
A libc/src/locale/uselocale.h
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/scanf_core/CMakeLists.txt
M libc/src/stdio/scanf_core/vfscanf_internal.h
M libc/test/src/CMakeLists.txt
A libc/test/src/locale/CMakeLists.txt
A libc/test/src/locale/locale_test.cpp
A libc/test/src/locale/localeconv_test.cpp
M libcxx/CMakeLists.txt
A libcxx/cmake/caches/AMDGPU.cmake
A libcxx/cmake/caches/NVPTX.cmake
R libcxx/docs/BuildingLibcxx.rst
M libcxx/docs/Contributing.rst
M libcxx/docs/ReleaseNotes.rst
R libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/ReleaseNotes/19.rst
M libcxx/docs/Status/Cxx17.rst
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx20.rst
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/docs/Status/Cxx23.rst
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx23Papers.csv
R libcxx/docs/Status/Ranges.rst
R libcxx/docs/Status/RangesAlgorithms.csv
R libcxx/docs/Status/RangesMajorFeatures.csv
R libcxx/docs/Status/RangesViews.csv
R libcxx/docs/Status/Spaceship.rst
R libcxx/docs/Status/SpaceshipPapers.csv
R libcxx/docs/Status/SpaceshipProjects.csv
R libcxx/docs/Status/SpecialMath.rst
R libcxx/docs/Status/SpecialMathProjects.csv
R libcxx/docs/Status/Zip.rst
R libcxx/docs/Status/ZipProjects.csv
M libcxx/docs/TestingLibcxx.rst
A libcxx/docs/UserDocumentation.rst
R libcxx/docs/UsingLibcxx.rst
A libcxx/docs/VendorDocumentation.rst
M libcxx/docs/index.rst
M libcxx/include/regex
M libcxx/test/libcxx/utilities/expected/expected.expected/transform_error.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/transform_error.mandates.verify.cpp
M libcxx/test/std/input.output/iostream.format/std.manip/setfill_wchar_max.pass.cpp
A libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/implicit_ctad.compile.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/implicit_ctad.pass.cpp
A libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/mutex.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/copy_assign.compile.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/copy_ctor.compile.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/default.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/move_assign.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/move_ctor.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_adopt_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_defer_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_duration.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_time_point.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_try_to_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/try_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/try_lock_for.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/try_lock_until.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/unlock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.mod/member_swap.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.mod/nonmember_swap.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.mod/release.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.obs/mutex.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.obs/op_bool.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.obs/owns_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/types.compile.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/types.h
A libcxx/test/support/checking_mutex.h
M libcxx/utils/synchronize_csv_status_files.py
M libunwind/include/CMakeLists.txt
R libunwind/include/mach-o/compact_unwind_encoding.modulemap
M lld/COFF/Chunks.cpp
M lld/COFF/Chunks.h
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/COFF/Writer.cpp
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
M lld/ELF/MapFile.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.cpp
M lld/ELF/Target.h
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
A lld/test/COFF/arm64ec-export-thunks.test
M lld/test/COFF/arm64ec-exports.s
A lld/test/COFF/arm64ec-patchable-thunks.test
A lld/test/ELF/aarch64-mapsyms-implicit.s
M lldb/bindings/python/python-wrapper.swig
M lldb/include/lldb/API/SBFrame.h
M lldb/include/lldb/Interpreter/Interfaces/ScriptedInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/include/lldb/Target/StackFrameList.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/lldb-private-enumerations.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/API/SBFrame.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/Commands/CommandCompletions.cpp
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Plugins/Process/minidump/MinidumpParser.cpp
M lldb/source/Plugins/Process/minidump/MinidumpParser.h
M lldb/source/Plugins/Process/minidump/MinidumpTypes.cpp
M lldb/source/Plugins/Process/minidump/MinidumpTypes.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/StackFrameList.cpp
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStepOut.cpp
M lldb/source/Utility/ArchSpec.cpp
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/commands/frame/recognizer/main.m
M lldb/test/API/commands/frame/recognizer/recognizer.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/forward_list/TestDataFormatterGenericForwardList.py
A lldb/test/API/functionalities/memory/big-read/Makefile
A lldb/test/API/functionalities/memory/big-read/TestMemoryReadMaximumSize.py
A lldb/test/API/functionalities/memory/big-read/main.c
M lldb/test/API/functionalities/postmortem/minidump-new/TestMiniDumpNew.py
A lldb/test/API/functionalities/postmortem/minidump-new/linux-x86_64_mem64.yaml
R lldb/test/API/lang/cpp/std-function-recognizer/Makefile
R lldb/test/API/lang/cpp/std-function-recognizer/TestStdFunctionRecognizer.py
R lldb/test/API/lang/cpp/std-function-recognizer/main.cpp
A lldb/test/API/tools/lldb-dap/output/Makefile
A lldb/test/API/tools/lldb-dap/output/TestDAP_output.py
A lldb/test/API/tools/lldb-dap/output/main.c
R lldb/test/API/tools/lldb-dap/stackTrace/subtleFrames/Makefile
R lldb/test/API/tools/lldb-dap/stackTrace/subtleFrames/TestDAP_subtleFrames.py
R lldb/test/API/tools/lldb-dap/stackTrace/subtleFrames/main.cpp
M lldb/test/API/tools/lldb-dap/step/TestDAP_step.py
A lldb/test/Shell/Process/Inputs/a.out.yaml
A lldb/test/Shell/Process/Inputs/corefile.yaml
A lldb/test/Shell/Process/ProcessMachCoreArch.test
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/OutputRedirector.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/unittests/Symbol/TestClangASTImporter.cpp
M llvm/CMakeLists.txt
M llvm/bindings/ocaml/llvm/llvm.ml
M llvm/bindings/ocaml/llvm/llvm.mli
M llvm/cmake/config-ix.cmake
M llvm/cmake/modules/Findzstd.cmake
M llvm/docs/GettingInvolved.rst
M llvm/docs/ProgrammersManual.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/docs/SPIRVUsage.rst
M llvm/docs/TestingGuide.rst
M llvm/docs/_static/LoopOptWG_invite.ics
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/ADT/StringExtras.h
M llvm/include/llvm/ADT/StringRef.h
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/include/llvm/CodeGen/GlobalISel/GISelChangeObserver.h
M llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
M llvm/include/llvm/DebugInfo/Symbolize/Symbolize.h
M llvm/include/llvm/ExecutionEngine/Orc/LoadRelocatableObject.h
M llvm/include/llvm/ExecutionEngine/Orc/MachO.h
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/VPIntrinsics.def
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCELFObjectWriter.h
M llvm/include/llvm/MC/MCTargetOptions.h
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/include/llvm/Support/float128.h
M llvm/include/llvm/TableGen/SetTheory.h
M llvm/include/llvm/TableGen/StringToOffsetTable.h
M llvm/include/llvm/Transforms/IPO/FunctionImport.h
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
A llvm/include/llvm/Transforms/Utils/ControlFlowUtils.h
M llvm/include/llvm/Transforms/Utils/Local.h
M llvm/include/llvm/Transforms/Utils/SCCPSolver.h
M llvm/lib/Analysis/CMakeLists.txt
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/CodeGen/DwarfEHPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/GISelChangeObserver.cpp
M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineStableHash.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/lib/ExecutionEngine/Orc/LoadRelocatableObject.cpp
M llvm/lib/ExecutionEngine/Orc/MachO.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/VectorBuilder.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/TableGen/SetTheory.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
R llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
A llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/BPF/BPFCallingConv.td
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/BPFMIPeephole.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.h
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/NVPTX/NVPTXProxyRegErasure.cpp
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCCodeEmitter.cpp
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
A llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.h
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVRegisterInfo.td
M llvm/lib/Target/SPIRV/SPIRVSubtarget.h
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssembly.td
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.h
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperators.td
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroInternal.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/PlaceSafepoints.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/ControlFlowUtils.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/RISCV/cast.ll
M llvm/test/Analysis/CostModel/X86/ctlz-codesize.ll
M llvm/test/Analysis/CostModel/X86/ctlz-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/ctlz.ll
M llvm/test/Analysis/CostModel/X86/cttz-codesize.ll
M llvm/test/Analysis/CostModel/X86/cttz-sizelatency.ll
M llvm/test/Analysis/CtxProfAnalysis/full-cycle.ll
M llvm/test/Analysis/CtxProfAnalysis/load.ll
M llvm/test/Analysis/ScalarEvolution/different-loops-recs.ll
M llvm/test/Analysis/ScalarEvolution/no-wrap-add-exprs.ll
M llvm/test/Bitcode/amdgcn-atomic.ll
M llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll
A llvm/test/CodeGen/AArch64/add.ll
A llvm/test/CodeGen/AArch64/andorxor.ll
M llvm/test/CodeGen/AArch64/arm64-neon-across.ll
A llvm/test/CodeGen/AArch64/dwarf-eh-prepare-dbg.ll
A llvm/test/CodeGen/AArch64/mul.ll
A llvm/test/CodeGen/AArch64/rem.ll
A llvm/test/CodeGen/AArch64/sub.ll
A llvm/test/CodeGen/AArch64/sve-fixed-length-int-abd.ll
A llvm/test/CodeGen/AArch64/sve-insert-scalable-vector.ll
A llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-abd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-rtn.ll
R llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.fadd-with-ret.ll
R llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-and.mir
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
A llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
R llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/frame-index.mir
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx908.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
R llvm/test/CodeGen/AMDGPU/indirect-addressing-si-noopt.ll
R llvm/test/CodeGen/AMDGPU/indirect-addressing-si-pregfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.fadd.gfx90a.ll
R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll
M llvm/test/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-any.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-disabled.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-enabled.ll
R llvm/test/CodeGen/AMDGPU/unsupported-atomics.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-vmcnt-loop.mir
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-any.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-disabled.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-enabled.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-1.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-2.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-3.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-regmask-1.ll
M llvm/test/CodeGen/DirectX/fdot.ll
M llvm/test/CodeGen/DirectX/idot.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/anyext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/sext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/zext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector-shuffle.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-non-power-of-2.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-combine.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/zve32-types.ll
A llvm/test/CodeGen/RISCV/sdata-sections.ll
M llvm/test/CodeGen/SPIRV/constant/global-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-aggregate-constant.ll
M llvm/test/CodeGen/SPIRV/constant/local-bool-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-float-point-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-integers-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-null-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-vector-matrix-constants.ll
A llvm/test/CodeGen/SPIRV/debug-info/basic-global-di.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_arbitrary_precision_integers.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_cache_controls/decorate-prefetch-w-cache-controls.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_two_calls.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_global_variable_fpga_decorations/global-var-decorations.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_global_variable_host_access/global-var-host-access.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_inline_assembly/inline_asm.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_optnone.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/builtin-op-wrappers.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_variable_length_array/builtin_alloca.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_variable_length_array/vararr.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_variable_length_array/vararr_spec_const.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_no_integer_wrap_decoration.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_shader_clock/shader_clock.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_subgroup_rotate/subgroup-rotate.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_uniform_group_instructions/uniform-group-instructions.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions-but-one.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions.ll
M llvm/test/CodeGen/SPIRV/function/alloca-load-store.ll
M llvm/test/CodeGen/SPIRV/function/identity-function.ll
M llvm/test/CodeGen/SPIRV/function/multiple-anonymous-functions.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-definition.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-with-attributes.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-with-call.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_DispatchThreadID.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveGetLaneIndex.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/abs.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/acos.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/atan.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/ceil.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cos.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cosh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/exp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/exp2.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fdot.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/floor.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmad.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/frac.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/idot.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/lerp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log10.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log2.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/pow.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/rcp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reversebits.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/round.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/rsqrt.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sinh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/smax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/smin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sqrt.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/tan.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/tanh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/trunc.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/umax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/umin.ll
M llvm/test/CodeGen/SPIRV/image/sampler.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic-ptr.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic_acqrel.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic_seq.ll
M llvm/test/CodeGen/SPIRV/instructions/call-complex-function.ll
M llvm/test/CodeGen/SPIRV/instructions/call-trivial-function.ll
M llvm/test/CodeGen/SPIRV/instructions/fcmp.ll
M llvm/test/CodeGen/SPIRV/instructions/float-casts.ll
M llvm/test/CodeGen/SPIRV/instructions/float-fast-flags.ll
M llvm/test/CodeGen/SPIRV/instructions/icmp.ll
M llvm/test/CodeGen/SPIRV/instructions/intrinsics.ll
M llvm/test/CodeGen/SPIRV/instructions/nested-composites.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-bitwise-operations.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-floating-point-arithmetic.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-integer-arithmetic.ll
M llvm/test/CodeGen/SPIRV/instructions/select-ptr-load.ll
M llvm/test/CodeGen/SPIRV/instructions/select.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-nested-composite-store.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-simple-composite-store.ll
M llvm/test/CodeGen/SPIRV/instructions/unreachable.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-bitwise-operations.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-floating-point-arithmetic.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-integer-arithmetic.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/abs.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/assume.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bswap.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ceil.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctlz.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctpop.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/cttz.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fabs.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-intrinsics.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/invariant.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/lifetime.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/add.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/and.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fadd.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmax.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmaximum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmin.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fminimum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmul.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/mul.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/or.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/smax.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/smin.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/umax.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/umin.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/xor.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/maxnum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/nearbyint.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ptr-annotation.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/satur-arith.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/sqrt.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/umul.with.overflow.ll
M llvm/test/CodeGen/SPIRV/pointers/argument-ptr-to-struct.ll
M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-accesschain.ll
M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-load.ll
M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-store.ll
M llvm/test/CodeGen/SPIRV/pointers/complex.ll
M llvm/test/CodeGen/SPIRV/pointers/custom-kernel-arg-type.ll
M llvm/test/CodeGen/SPIRV/pointers/duplicate-type-ptr-def.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-addressspace.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-base-type.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-bitcast-load.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-kernel-arg-char.ll
M llvm/test/CodeGen/SPIRV/pointers/global-ptrtoint.ll
M llvm/test/CodeGen/SPIRV/pointers/global-zeroinitializer.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-builtin-vload-type-discrapency.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-addressspace.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type-deduction-no-bitcast-to-generic.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type-deduction-no-metadata.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-ptr-i8-default-element-type.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-ptr-no-bitcast.ll
M llvm/test/CodeGen/SPIRV/pointers/load-addressspace.ll
M llvm/test/CodeGen/SPIRV/pointers/nested-struct-opaque-pointers.ll
M llvm/test/CodeGen/SPIRV/pointers/ptr-argument-byref.ll
M llvm/test/CodeGen/SPIRV/pointers/ptr-argument-byval.ll
M llvm/test/CodeGen/SPIRV/pointers/store-kernel-arg-i8-ptr-as-value-operand.ll
M llvm/test/CodeGen/SPIRV/pointers/store-kernel-arg-ptr-as-value-operand.ll
M llvm/test/CodeGen/SPIRV/pointers/store-operand-ptr-to-struct.ll
M llvm/test/CodeGen/SPIRV/pointers/struct-opaque-pointers.ll
M llvm/test/CodeGen/SPIRV/pointers/two-bitcast-or-param-users.ll
M llvm/test/CodeGen/SPIRV/pointers/two-subsequent-bitcasts.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-args-rev.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-args.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call-chain.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call-complex.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call-rev.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-call-no-bitcast.ll
M llvm/test/CodeGen/SPIRV/pointers/typeof-ptr-int.ll
M llvm/test/CodeGen/SPIRV/pointers/variables-storage-class.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_ballot.ll
M llvm/test/CodeGen/WebAssembly/half-precision.ll
M llvm/test/CodeGen/WebAssembly/offset.ll
M llvm/test/CodeGen/WebAssembly/target-features-cpus.ll
M llvm/test/CodeGen/X86/atomic-bit-test.ll
M llvm/test/CodeGen/X86/bit_ceil.ll
M llvm/test/CodeGen/X86/combine-or.ll
M llvm/test/CodeGen/X86/ctlo.ll
M llvm/test/CodeGen/X86/ctlz.ll
M llvm/test/CodeGen/X86/cttz.ll
A llvm/test/CodeGen/X86/fp16-libcalls.ll
M llvm/test/CodeGen/X86/known-never-zero.ll
M llvm/test/CodeGen/X86/lzcnt-cmp.ll
M llvm/test/CodeGen/X86/pr57673.ll
M llvm/test/CodeGen/X86/pr89877.ll
M llvm/test/CodeGen/X86/pr92569.ll
M llvm/test/CodeGen/X86/scatter-schedule.ll
A llvm/test/CodeGen/Xtensa/bswap.ll
A llvm/test/CodeGen/Xtensa/ctlz-cttz-ctpop.ll
A llvm/test/CodeGen/Xtensa/div.ll
A llvm/test/CodeGen/Xtensa/mul.ll
A llvm/test/CodeGen/Xtensa/rotl-rotr.ll
A llvm/test/CodeGen/Xtensa/shift.ll
M llvm/test/DebugInfo/Generic/mem2reg-promote-alloca-1.ll
A llvm/test/DebugInfo/sroa-handle-dbg-value.ll
M llvm/test/Instrumentation/NumericalStabilitySanitizer/basic.ll
M llvm/test/MC/AArch64/mapping-across-sections.s
M llvm/test/MC/ARM/directive-fpu-multiple.s
A llvm/test/MC/ARM/directive-fpu-single-crypto-neon-fp-armv8.s
A llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-d16.s
A llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-sp-d16.s
A llvm/test/MC/ARM/directive-fpu-single-fp-armv8.s
A llvm/test/MC/ARM/directive-fpu-single-fpv4-sp-d16.s
A llvm/test/MC/ARM/directive-fpu-single-fpv5-d16.s
A llvm/test/MC/ARM/directive-fpu-single-fpv5-sp-d16.s
A llvm/test/MC/ARM/directive-fpu-single-neon-fp-armv8.s
A llvm/test/MC/ARM/directive-fpu-single-neon-fp16.s
A llvm/test/MC/ARM/directive-fpu-single-neon-vfpv4.s
A llvm/test/MC/ARM/directive-fpu-single-neon.s
A llvm/test/MC/ARM/directive-fpu-single-none.s
A llvm/test/MC/ARM/directive-fpu-single-vfp.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv2.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3-d16-fp16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3-d16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3-fp16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3xd-fp16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3xd.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv4-d16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv4.s
M llvm/test/MC/Mips/sort-relocation-table.s
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/hypervisor-csr-names.s
M llvm/test/MC/RISCV/machine-csr-names.s
A llvm/test/MC/RISCV/smctr-ssctr-valid.s
M llvm/test/MC/RISCV/supervisor-csr-names.s
M llvm/test/MC/WebAssembly/simd-encodings.s
M llvm/test/Transforms/CodeGenPrepare/X86/cttz-ctlz.ll
A llvm/test/Transforms/ConstraintElimination/pr105785.ll
M llvm/test/Transforms/Coroutines/coro-debug-O2.ll
M llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-debug-dbg.values.ll
M llvm/test/Transforms/Coroutines/coro-debug-frame-variable.ll
M llvm/test/Transforms/FixIrreducible/basic.ll
M llvm/test/Transforms/FixIrreducible/bug45623.ll
M llvm/test/Transforms/FixIrreducible/nested.ll
M llvm/test/Transforms/FixIrreducible/switch.ll
M llvm/test/Transforms/FixIrreducible/unreachable.ll
M llvm/test/Transforms/FunctionAttrs/cold.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat-fadd-fmin-fmax-intrinsics.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll
A llvm/test/Transforms/InstCombine/AArch64/sve-inst-combine-cmpne.ll
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-no-active-lanes-cmp.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/bit-checks.ll
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/InstCombine/select-cmp.ll
A llvm/test/Transforms/InstCombine/sext-a-lt-b-plus-zext-a-gt-b-to-uscmp.ll
M llvm/test/Transforms/InstSimplify/ConstProp/logf128.ll
M llvm/test/Transforms/LoadStoreVectorizer/AArch64/pr37865.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
A llvm/test/Transforms/MemCpyOpt/pr102994.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/PhaseOrdering/scev-custom-dl.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/multiple_reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/scalarization-overhead.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/shuffle-vectors-mask-size.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/combined-loads-stored.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/reversed-strided-node-with-external-ptr.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll
M llvm/test/Transforms/SLPVectorizer/X86/addsub.ll
M llvm/test/Transforms/SLPVectorizer/X86/ctlz.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-many-users-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-node-same-as-vect-but-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/inst_size_bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll
A llvm/test/Transforms/SLPVectorizer/X86/phi-nodes-as-operand-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark-partial-loads-vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-scalar-in-same-phi-extract.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reused-pointer.ll
M llvm/test/Transforms/SLPVectorizer/X86/schedule_budget_debug_info.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2-unord.ll
M llvm/test/Transforms/SLPVectorizer/X86/tiny-tree.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect-gather-same-nodes.ll
M llvm/test/Transforms/SROA/alignment.ll
M llvm/test/Transforms/SROA/vector-promotion.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AMDGPU/expamd-masked-load.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AMDGPU/expand-masked-gather.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AMDGPU/expand-masked-scatter.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AMDGPU/expand-masked-store.ll
A llvm/test/Transforms/SimplifyCFG/switch-on-cmp.ll
M llvm/test/Transforms/StructurizeCFG/workarounds/needs-unified-loop-exits.ll
M llvm/test/Transforms/UnifyLoopExits/integer_guards.ll
M llvm/test/Transforms/UnifyLoopExits/nested.ll
M llvm/test/Transforms/UnifyLoopExits/restore-ssa.ll
M llvm/test/Transforms/UnifyLoopExits/undef-phis.ll
M llvm/test/tools/llvm-cgdata/merge-archive.test
M llvm/test/tools/llvm-cgdata/merge-concat.test
M llvm/test/tools/llvm-cgdata/merge-double.test
M llvm/test/tools/llvm-cgdata/merge-single.test
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vl.s
M llvm/tools/llvm-link/llvm-link.cpp
M llvm/unittests/ADT/StringExtrasTest.cpp
M llvm/unittests/ADT/StringRefTest.cpp
M llvm/unittests/Analysis/CtxProfAnalysisTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/IntrinsicEmitter.cpp
M llvm/utils/TableGen/TableGen.cpp
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/tests/Inputs/shtest-define/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-define/value-escaped.txt
M mlir/include/mlir/Analysis/DataFlow/ConstantPropagationAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/DenseAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/IntegerRangeAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/LivenessAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/SparseAnalysis.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/IR/BuiltinAttributes.td
M mlir/include/mlir/IR/MLIRContext.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Analysis/DataFlow/ConstantPropagationAnalysis.cpp
M mlir/lib/Analysis/DataFlow/DenseAnalysis.cpp
M mlir/lib/Analysis/DataFlow/IntegerRangeAnalysis.cpp
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/lib/Analysis/DataFlow/SparseAnalysis.cpp
M mlir/lib/Conversion/ReconcileUnrealizedCasts/ReconcileUnrealizedCasts.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/lib/IR/BuiltinAttributes.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Transforms/Mem2Reg.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
A mlir/test/Analysis/DataFlow/test-last-modified-error.mlir
M mlir/test/Dialect/Affine/loop-coalescing.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/MemRef/canonicalize.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/SCF/loop-pipelining.mlir
R mlir/test/Integration/GPU/CUDA/sm90/asd
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
A mlir/test/Target/LLVMIR/llvmir-phi-loc.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/openmp-private.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-byref.mlir
M mlir/test/Transforms/mem2reg.mlir
M mlir/test/lib/Analysis/DataFlow/TestDenseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseDataFlowAnalysis.h
M mlir/test/lib/Analysis/DataFlow/TestDenseForwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestSparseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M offload/DeviceRTL/CMakeLists.txt
A offload/DeviceRTL/include/Profiling.h
A offload/DeviceRTL/src/Profiling.cpp
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/plugins-nextgen/common/include/ErrorReporting.h
M offload/plugins-nextgen/common/include/GlobalHandler.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/GlobalHandler.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/test/CMakeLists.txt
M offload/test/lit.cfg
M offload/test/lit.site.cfg.in
A offload/test/offloading/pgo1.c
M offload/test/sanitizer/double_free.c
M offload/test/sanitizer/double_free_racy.c
M offload/test/sanitizer/free_wrong_ptr_kind.c
M offload/test/sanitizer/free_wrong_ptr_kind.cpp
A offload/test/sanitizer/ptr_outside_alloc_1.c
A offload/test/sanitizer/ptr_outside_alloc_2.c
A offload/test/sanitizer/use_after_free_1.c
A offload/test/sanitizer/use_after_free_2.c
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
R utils/bazel/llvm-project-overlay/lldb/tools/lldb-dap/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.5-bogner
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/482c8280d10c...83a7d8a37565
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