[all-commits] [llvm/llvm-project] d7c84d: [LAA] Collect loop guards only once in MemoryDepCh...
Fangrui Song via All-commits
all-commits at lists.llvm.org
Thu Aug 22 09:21:10 PDT 2024
Branch: refs/heads/users/MaskRay/spr/driver-add-wa-options-mmapsymsdefaultimplicit
Home: https://github.com/llvm/llvm-project
Commit: d7c84d7b71fc5ea89b87480ff5d727496288799c
https://github.com/llvm/llvm-project/commit/d7c84d7b71fc5ea89b87480ff5d727496288799c
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
Log Message:
-----------
[LAA] Collect loop guards only once in MemoryDepChecker (NFCI).
This on its own gives small compile-time improvements in some configs
and enables using loop guards at more places in the future while keeping
compile-time impact low.
https://llvm-compile-time-tracker.com/compare.php?from=c44202574ff9a8c0632aba30c2765b134557435f&to=55ffc3dd920fa9af439fd39f8f9cc13509531420&stat=instructions:u
Commit: f47966b1de459a095b01ac2f9fa975076b609c06
https://github.com/llvm/llvm-project/commit/f47966b1de459a095b01ac2f9fa975076b609c06
Author: David CARLIER <devnexen at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerUtilFuchsia.cpp
Log Message:
-----------
[compiler-rt] Reland "SetThreadName implementation for Fuchsia" (#105179)
Commit: b6686e764c02b1373359bbd80d9c0e1a834d1a64
https://github.com/llvm/llvm-project/commit/b6686e764c02b1373359bbd80d9c0e1a834d1a64
Author: serge-sans-paille <sergesanspaille at free.fr>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M flang/runtime/edit-input.cpp
M flang/runtime/exceptions.cpp
M flang/runtime/stop.cpp
Log Message:
-----------
[Flang][Runtime] Handle missing definitions in <cfenv> (#101242)
According to the C99 standard, <fenv.h> may not define FE_INVALID and
the likes. Even if C++11 mandate them, musl and emscripten don't provide
them, so handle that case.
Commit: 7c4cadfc4333df8a20bb5a66b0ba4560bb4bd91c
https://github.com/llvm/llvm-project/commit/7c4cadfc4333df8a20bb5a66b0ba4560bb4bd91c
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.def
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/avx10_2_512convertintrin.h
A clang/lib/Headers/avx10_2convertintrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Sema/SemaX86.cpp
A clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
A clang/test/CodeGen/X86/avx10_2convert-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
A llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
A llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
A llvm/test/MC/Disassembler/X86/avx10.2convert-32.txt
A llvm/test/MC/Disassembler/X86/avx10.2convert-64.txt
A llvm/test/MC/X86/avx10.2convert-32-att.s
A llvm/test/MC/X86/avx10.2convert-32-intel.s
A llvm/test/MC/X86/avx10.2convert-64-att.s
A llvm/test/MC/X86/avx10.2convert-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][AVX10.2] Support AVX10.2-CONVERT new instructions. (#101600)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Commit: 9fa2386ff13289d46ebf31656f4be7859f501468
https://github.com/llvm/llvm-project/commit/9fa2386ff13289d46ebf31656f4be7859f501468
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add Hazard3 Core as taped out for RP2350 (#102452)
Luke Wren's Hazard3 is a configurable, open-source 32-bit RISC-V core.
The core's source code and docs are available on github:
https://github.com/wren6991/hazard3
This is the RISC-V core used in the RP2350, a recently announced SoC by
Raspberry Pi (which also contains Arm cores):
https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf
We have agreed to name this `-mcpu` option `rp2350-hazard3`, and it
reflects exactly the options configured in the RP2350 chips. Notably,
the Zbc is not configured, and nor is B because the `misa.B` bit is not
either.
Commit: 7063c9427e11b5028ab2e926768faa7ff431bb85
https://github.com/llvm/llvm-project/commit/7063c9427e11b5028ab2e926768faa7ff431bb85
Author: Longsheng Mou <moulongsheng at huawei.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/test/Dialect/Linalg/canonicalize.mlir
M mlir/test/Dialect/Linalg/loops.mlir
Log Message:
-----------
[mlir][Linalg] Bugfix for folder of `linalg.transpose` (#102888)
Folder of linalg transpose only support tensor type. Fix #102576.
Commit: 749ba7f6b29887a74d8f68837b21f478cd6e1486
https://github.com/llvm/llvm-project/commit/749ba7f6b29887a74d8f68837b21f478cd6e1486
Author: Hugo Trachino <hugo.trachino at huawei.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
Log Message:
-----------
[mlir][vector] Add more tests for ConvertVectorToLLVM (5/n) (#104784)
This patch aims to disambiguate test names for some of the
Vector-To-LLVM conversion pass.
Covers the following Ops:
* vector.extractelement
* vector.extract
* vector.insertelement
* vector.insert
1. Tests targetting `vector.{insert|extract}` Ops do not have names like
`{insert|extract}_element*` which was confusing against
`vector.{insert|extract}element` ops targetting tests.
2. Tests mention the type of the target/source buffer. e.g.
`@extractelement` => `@extractelement_from_vec_1d`
3. Align LIT ligns consistently with other tests.
4. Tests with a different type for position have a name updated
accordingly. `@extractelement_index` =>`@extractelement_index_position`
5. Tests with a dynamic value for position have a name updated
accordingly. `@extract_element_with_value_1d`
=>`@extract_scalar_dynamic_position_from_vec_1d`
6. Added the scalable flavour of the tests
`insert_scalar_into_vec_2d_dynamic_position` and
`@extract_scalar_from_vec_2d_dynamic_position`
Commit: 25ffd2efb33476f2a235f6cb1377759bab367324
https://github.com/llvm/llvm-project/commit/25ffd2efb33476f2a235f6cb1377759bab367324
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port 7c4cadfc4333
Commit: 99741ac28522f519713907d7bea4438ea5412e21
https://github.com/llvm/llvm-project/commit/99741ac28522f519713907d7bea4438ea5412e21
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/pr36983.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
Log Message:
-----------
[VPlan] Introduce explicit ExtractFromEnd recipes for live-outs. (#100658)
Introduce explicit ExtractFromEnd recipes to extract the final values
for live-outs instead of implicitly extracting in VPLiveOut::fixPhi.
This is a follow-up to the recent changes of modeling extracts for
recurrences and consolidates live-out extract creation for fixed-order
recurrences at a single place: addLiveOutsForFirstOrderRecurrences.
It is also in preparation of replacing VPLiveOut with VPIRInstructions
wrapping the original scalar phis.
PR: https://github.com/llvm/llvm-project/pull/100658
Commit: 9d739e54f4506bf9bd220c5d65f710b86a39f6d5
https://github.com/llvm/llvm-project/commit/9d739e54f4506bf9bd220c5d65f710b86a39f6d5
Author: Mital Ashok <mital at mitalashok.co.uk>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ExprCXX.h
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/test/CXX/drs/cwg23xx.cpp
M clang/test/SemaCXX/attr-annotate.cpp
M clang/test/SemaCXX/cxx2a-explicit-bool.cpp
M clang/test/SemaCXX/sugared-auto.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang] Implement CWG2351 `void{}` (#78060)
Per [CWG2351](https://wg21.link/CWG2351), allow `void{}`, treated the
same as `void()`: a prvalue expression of type `void` that performs no
initialization.
Note that the AST for the expression `T{}` looks like:
```
// using T = int;
CXXFunctionalCastExpr 'T':'int' functional cast to T <NoOp>
`-InitListExpr 'T':'int'
// using T = const int;
CXXFunctionalCastExpr 'int' functional cast to T <NoOp>
`-InitListExpr 'int'
// using T = void;
CXXFunctionalCastExpr 'T':'void' functional cast to T <ToVoid>
`-InitListExpr 'void'
// using T = const void;
CXXFunctionalCastExpr 'void' functional cast to T <ToVoid>
`-InitListExpr 'void'
```
As for `void()`/`T() [T = const void]`, that looked like
`CXXScalarValueInitExpr 'void'` and is unchanged after this.
For reference, C++98 [5.2.3p2] says:
> The expression `T()`, where `T` is a simple-type-specifier (7.1.5.2)
for a non-array complete object type or the (possibly cv-qualified) void
type, creates an rvalue of the specified type, whose value is determined
by default-initialization (8.5; no initialization is done for the
`void()` case). [*Note:* if `T` is a non-class type that is
*cv-qualified*, the `cv-qualifiers` are ignored when determining the
type of the resulting rvalue (3.10). ]
Though it is a bit of a misnomer that, for `T = void`,
`CXXScalarValueInitExpr` does not perform value initialization, it would
be a breaking change to change the AST node for `void()`, so I simply
reworded the doc comment.
Commit: 0b0ccd56c9cabef48a6c99abe6e0b41ac69e5faa
https://github.com/llvm/llvm-project/commit/0b0ccd56c9cabef48a6c99abe6e0b41ac69e5faa
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelperCasts.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-cast.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-extract-vec-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-with-flags.mir
M llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll
M llvm/test/CodeGen/AArch64/neon-extadd.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AArch64/vecreduce-add.ll
M llvm/test/CodeGen/AArch64/xtn.ll
M llvm/test/CodeGen/AArch64/zext.ll
Log Message:
-----------
[GlobalIsel] Push cast through build vector (#104634)
Credits: https://github.com/llvm/llvm-project/pull/100563
Commit: a811f263356af4fcf5b479c7a32d1bab44ac8954
https://github.com/llvm/llvm-project/commit/a811f263356af4fcf5b479c7a32d1bab44ac8954
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/unittests/Analysis/GraphWriterTest.cpp
Log Message:
-----------
[llvm][test] Write temporary files into a temporary directory
Commit: 768598bcc3528ff5c4cd2c8a9b74d023614e1a9e
https://github.com/llvm/llvm-project/commit/768598bcc3528ff5c4cd2c8a9b74d023614e1a9e
Author: Hans Wennborg <hans at chromium.org>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
R llvm/test/CodeGen/X86/avx512f-large-stack.ll
M llvm/test/CodeGen/X86/huge-stack.ll
M llvm/test/CodeGen/X86/win64-stackprobe-overflow.ll
Log Message:
-----------
Revert "[LLVM] [X86] Fix integer overflows in frame layout for huge frames (#101840)"
This casuses assertion failures targeting 32-bit x86:
lib/Target/X86/X86RegisterInfo.cpp:989:
virtual bool llvm::X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator, int, unsigned int, RegScavenger *) const:
Assertion `(Is64Bit || FitsIn32Bits) && "Requesting 64-bit offset in 32-bit immediate!"' failed.
See comment on the PR.
> Fix 32-bit integer overflows in the X86 target frame layout when dealing
> with frames larger than 4gb. When this occurs, we'll scavenge a scratch
> register to be able to hold the correct stack offset for frame locals.
>
> This completes reapplying #84114.
>
> Fixes #48911
> Fixes #75944
> Fixes #87154
This reverts commit 0abb7791614947bc24931dd851ade31d02496977.
Commit: bacedb5684c79d35af61c4e30fb5d7fd9c2daf97
https://github.com/llvm/llvm-project/commit/bacedb5684c79d35af61c4e30fb5d7fd9c2daf97
Author: Shao-Ce SUN <sunshaoce at outlook.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Remove experimental for Ssqosid ext (#105476)
Ratified: https://github.com/riscv/riscv-ssqosid/releases/tag/v1.0
Commit: 6c189eaea9941898e7379903d10274dbf6e2c545
https://github.com/llvm/llvm-project/commit/6c189eaea9941898e7379903d10274dbf6e2c545
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/CMakeLists.txt
A llvm/lib/Target/AArch64/SMEPeepholeOpt.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/sme-darwin-sve-vg.ll
A llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-streaming-body.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
M llvm/test/CodeGen/AArch64/sme-toggle-pstateza.ll
M llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
M llvm/test/CodeGen/AArch64/streaming-compatible-memory-ops.ll
Log Message:
-----------
[AArch64] Add SME peephole optimizer pass (#104612)
This pass removes back-to-back smstart/smstop instructions
to reduce the number of streaming mode changes in a function.
The implementation as proposed doesn't aim to solve all problems
yet and suggests a number of cases that can be optimized in the
future.
Commit: 126b56a234486a2cd05a8beca78bcf89fe47d167
https://github.com/llvm/llvm-project/commit/126b56a234486a2cd05a8beca78bcf89fe47d167
Author: Piyou Chen <piyou.chen at sifive.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/test/CodeGen/builtin-cpu-supports.c
M llvm/include/llvm/TargetParser/RISCVISAInfo.h
Log Message:
-----------
[RISCV] Make EmitRISCVCpuSupports accept multiple features (#104917)
This patch creates an additional EmitRISCVCpuSupports function to handle
situations with multiple features. It also modifies the original
EmitRISCVCpuSupports function to invoke the new one.
Commit: 5f91de9d18cfa136645c2cbc91901b676c10df81
https://github.com/llvm/llvm-project/commit/5f91de9d18cfa136645c2cbc91901b676c10df81
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx12_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
Log Message:
-----------
[AMDGPU][True16][test] added missing true16 flag in gfx12 asm vop1 (#104884)
added missing true16 flag in gfx12 asm vop1
Commit: 8ac140f390847e4e85e0a4fd910baaf46e5d115b
https://github.com/llvm/llvm-project/commit/8ac140f390847e4e85e0a4fd910baaf46e5d115b
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
Log Message:
-----------
[Clang][NFCI] Cleanup the fix for default function argument substitution (#104911)
(This is one step towards tweaking `getTemplateInstantiationArgs()` as
discussed in https://github.com/llvm/llvm-project/pull/102922)
We don't always substitute into default arguments while transforming a
function parameter. In that case, we would preserve the uninstantiated
expression until after, e.g. building up a CXXDefaultArgExpr and
instantiate the expression there.
For member function instantiation, this algorithm used to cause a
problem in that the default argument of an out-of-line member function
specialization couldn't get properly instantiated. This is because, in
`getTemplateInstantiationArgs()`, we would give up visiting a function's
declaration context if the function is a specialization of a member
template. For example,
```cpp
template <class T>
struct S {
template <class U>
void f(T = sizeof(T));
};
template <> template <class U>
void S<int>::f(int) {}
```
The default argument `sizeof(U)` that lexically appears inside the
declaration would be copied to the function declaration in the class
template specialization `S<int>`, as well as to the function's
out-of-line definition. We use template arguments collected from the
out-of-line function definition when substituting into the default
arguments. We would therefore give up the traversal after the function,
resulting in a single-level template argument of the `f` itself. However
the default argument here could still reference the template parameters
of the primary template, hence the error.
In fact, this is similar to constraint checking in some respects: we
actually want the "whole" template arguments relative to the primary
template, not those relative to the function definition. So this patch
adds another flag to indicate `getTemplateInstantiationArgs()` for that.
This patch also consolidates the tests for default arguments and removes
some unnecessary tests.
Commit: 6b8c194f8587945e063691992068f1f821837769
https://github.com/llvm/llvm-project/commit/6b8c194f8587945e063691992068f1f821837769
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
Log Message:
-----------
[gn build] Port 6c189eaea994
Commit: 3083459c1d7a723e946db99a5794f33242ba1402
https://github.com/llvm/llvm-project/commit/3083459c1d7a723e946db99a5794f33242ba1402
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Port a3d41879ecf5690a73f9226951d3856c7faa34a4
Commit: 297bb467acd31447d64f0540835127d50408e87d
https://github.com/llvm/llvm-project/commit/297bb467acd31447d64f0540835127d50408e87d
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS5][Driver] Link main components with -pie by default (#102901)
The PS5 linker currently forces `-pie` for typical link jobs. Have the
driver pass `pie` under the same conditions. With this change we can
remove our private linker patch and also allow `-no-pie` to have an
effect.
SIE tracker: TOOLCHAIN-16704
Commit: a105877646d68e48cdeeeadd9d1e075dc3c5d68d
https://github.com/llvm/llvm-project/commit/a105877646d68e48cdeeeadd9d1e075dc3c5d68d
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_loads.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_store.c
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/fp-reassoc-pragma.cpp
M clang/test/CodeGen/fp-reciprocal-pragma.cpp
M clang/test/CodeGen/ms-mixed-ptr-sizes.c
M clang/test/Headers/wasm.c
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Analysis/ValueTracking/known-power-of-two-urem.ll
M llvm/test/Analysis/ValueTracking/known-power-of-two.ll
M llvm/test/Analysis/ValueTracking/knownbits-and-or-xor-lowbit.ll
M llvm/test/Analysis/ValueTracking/knownbits-bmi-pattern.ll
M llvm/test/Analysis/ValueTracking/phi-known-bits.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-powr.ll
M llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-value.ll
M llvm/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll
M llvm/test/Transforms/InstCombine/2010-11-23-Distributed.ll
M llvm/test/Transforms/InstCombine/abs-1.ll
M llvm/test/Transforms/InstCombine/add-mask-neg.ll
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/add2.ll
M llvm/test/Transforms/InstCombine/add_or_sub.ll
M llvm/test/Transforms/InstCombine/and-or-icmp-const-icmp.ll
M llvm/test/Transforms/InstCombine/and-or-icmps.ll
M llvm/test/Transforms/InstCombine/and-or-not.ll
M llvm/test/Transforms/InstCombine/and-or.ll
M llvm/test/Transforms/InstCombine/and-xor-merge.ll
M llvm/test/Transforms/InstCombine/and-xor-or.ll
M llvm/test/Transforms/InstCombine/and.ll
M llvm/test/Transforms/InstCombine/apint-and-xor-merge.ll
M llvm/test/Transforms/InstCombine/apint-or.ll
M llvm/test/Transforms/InstCombine/apint-shift.ll
M llvm/test/Transforms/InstCombine/apint-sub.ll
M llvm/test/Transforms/InstCombine/ashr-lshr.ll
M llvm/test/Transforms/InstCombine/assume-align.ll
M llvm/test/Transforms/InstCombine/assume-separate_storage.ll
M llvm/test/Transforms/InstCombine/avg-lsb.ll
M llvm/test/Transforms/InstCombine/binop-and-shifts.ll
M llvm/test/Transforms/InstCombine/binop-cast.ll
M llvm/test/Transforms/InstCombine/bit-checks.ll
M llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll
M llvm/test/Transforms/InstCombine/bitcast.ll
M llvm/test/Transforms/InstCombine/bitreverse.ll
M llvm/test/Transforms/InstCombine/bswap-fold.ll
M llvm/test/Transforms/InstCombine/call-guard.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-uge-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ult-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v2-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v2-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v3-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v3-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v4-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v4-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/cast-mul-select.ll
M llvm/test/Transforms/InstCombine/cast.ll
M llvm/test/Transforms/InstCombine/cast_phi.ll
M llvm/test/Transforms/InstCombine/cast_ptr.ll
M llvm/test/Transforms/InstCombine/cmp-x-vs-neg-x.ll
M llvm/test/Transforms/InstCombine/conditional-negation.ll
M llvm/test/Transforms/InstCombine/ctpop-cttz.ll
M llvm/test/Transforms/InstCombine/ctpop-pow2.ll
M llvm/test/Transforms/InstCombine/cttz.ll
M llvm/test/Transforms/InstCombine/demorgan.ll
M llvm/test/Transforms/InstCombine/dependent-ivs.ll
M llvm/test/Transforms/InstCombine/fadd-fsub-factor.ll
M llvm/test/Transforms/InstCombine/fadd.ll
M llvm/test/Transforms/InstCombine/fast-basictest.ll
M llvm/test/Transforms/InstCombine/fast-math.ll
M llvm/test/Transforms/InstCombine/fcmp.ll
M llvm/test/Transforms/InstCombine/fdiv-sqrt.ll
M llvm/test/Transforms/InstCombine/fdiv.ll
M llvm/test/Transforms/InstCombine/float-shrink-compare.ll
M llvm/test/Transforms/InstCombine/fmul.ll
M llvm/test/Transforms/InstCombine/fold-ext-eq-c-with-op.ll
M llvm/test/Transforms/InstCombine/fold-inc-of-add-of-not-x-and-y-to-sub-x-from-y.ll
M llvm/test/Transforms/InstCombine/fold-select-fmul-if-zero.ll
M llvm/test/Transforms/InstCombine/fold-signbit-test-power2.ll
M llvm/test/Transforms/InstCombine/fpextend.ll
M llvm/test/Transforms/InstCombine/fptrunc.ll
M llvm/test/Transforms/InstCombine/free-inversion.ll
M llvm/test/Transforms/InstCombine/fsh.ll
M llvm/test/Transforms/InstCombine/fsub.ll
M llvm/test/Transforms/InstCombine/funnel.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/hoist-negation-out-of-bias-calculation.ll
M llvm/test/Transforms/InstCombine/hoist-xor-by-constant-from-xor-by-value.ll
M llvm/test/Transforms/InstCombine/icmp-add.ll
M llvm/test/Transforms/InstCombine/icmp-and-add-sub-xor-p2.ll
M llvm/test/Transforms/InstCombine/icmp-and-lowbit-mask.ll
M llvm/test/Transforms/InstCombine/icmp-and-shift.ll
M llvm/test/Transforms/InstCombine/icmp-custom-dl.ll
M llvm/test/Transforms/InstCombine/icmp-equality-rotate.ll
M llvm/test/Transforms/InstCombine/icmp-equality-xor.ll
M llvm/test/Transforms/InstCombine/icmp-ext-ext.ll
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/icmp-mul-zext.ll
M llvm/test/Transforms/InstCombine/icmp-mul.ll
M llvm/test/Transforms/InstCombine/icmp-of-and-x.ll
M llvm/test/Transforms/InstCombine/icmp-of-or-x.ll
M llvm/test/Transforms/InstCombine/icmp-of-trunc-ext.ll
M llvm/test/Transforms/InstCombine/icmp-of-xor-x.ll
M llvm/test/Transforms/InstCombine/icmp-or-of-select-with-zero.ll
M llvm/test/Transforms/InstCombine/icmp-or.ll
M llvm/test/Transforms/InstCombine/icmp-range.ll
M llvm/test/Transforms/InstCombine/icmp-rotate.ll
M llvm/test/Transforms/InstCombine/icmp-select-implies-common-op.ll
M llvm/test/Transforms/InstCombine/icmp-select.ll
M llvm/test/Transforms/InstCombine/icmp-sub.ll
M llvm/test/Transforms/InstCombine/icmp-uge-of-not-of-shl-allones-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ult-of-not-of-shl-allones-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp.ll
M llvm/test/Transforms/InstCombine/implies.ll
M llvm/test/Transforms/InstCombine/invert-variable-mask-in-masked-merge-scalar.ll
M llvm/test/Transforms/InstCombine/invert-variable-mask-in-masked-merge-vector.ll
M llvm/test/Transforms/InstCombine/ispow2.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
M llvm/test/Transforms/InstCombine/known-never-nan.ll
M llvm/test/Transforms/InstCombine/ldexp-ext.ll
M llvm/test/Transforms/InstCombine/log-pow.ll
M llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll
M llvm/test/Transforms/InstCombine/logical-select.ll
M llvm/test/Transforms/InstCombine/lshr-and-negC-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/lshr.ll
M llvm/test/Transforms/InstCombine/masked-merge-add.ll
M llvm/test/Transforms/InstCombine/masked-merge-and-of-ors.ll
M llvm/test/Transforms/InstCombine/masked-merge-or.ll
M llvm/test/Transforms/InstCombine/masked-merge-xor.ll
M llvm/test/Transforms/InstCombine/minmax-fold.ll
M llvm/test/Transforms/InstCombine/minmax-of-xor-x.ll
M llvm/test/Transforms/InstCombine/mul-masked-bits.ll
M llvm/test/Transforms/InstCombine/mul-pow2.ll
M llvm/test/Transforms/InstCombine/mul.ll
M llvm/test/Transforms/InstCombine/mul_fold.ll
M llvm/test/Transforms/InstCombine/mul_full_64.ll
M llvm/test/Transforms/InstCombine/not-add.ll
M llvm/test/Transforms/InstCombine/not.ll
M llvm/test/Transforms/InstCombine/onehot_merge.ll
M llvm/test/Transforms/InstCombine/or-xor-xor.ll
M llvm/test/Transforms/InstCombine/or-xor.ll
M llvm/test/Transforms/InstCombine/or.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-b.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-b.ll
M llvm/test/Transforms/InstCombine/phi.ll
M llvm/test/Transforms/InstCombine/pr44242.ll
M llvm/test/Transforms/InstCombine/pr49688.ll
M llvm/test/Transforms/InstCombine/pr75369.ll
M llvm/test/Transforms/InstCombine/ptr-int-ptr-icmp.ll
M llvm/test/Transforms/InstCombine/ptrmask.ll
M llvm/test/Transforms/InstCombine/range-check.ll
M llvm/test/Transforms/InstCombine/reassociate-nuw.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-b.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-b.ll
M llvm/test/Transforms/InstCombine/rem.ll
M llvm/test/Transforms/InstCombine/result-of-add-of-negative-is-non-zero-and-no-underflow.ll
M llvm/test/Transforms/InstCombine/result-of-add-of-negative-or-zero-is-non-zero-and-no-underflow.ll
M llvm/test/Transforms/InstCombine/result-of-usub-is-non-zero-and-no-overflow.ll
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
M llvm/test/Transforms/InstCombine/scalarization-inseltpoison.ll
M llvm/test/Transforms/InstCombine/scalarization.ll
M llvm/test/Transforms/InstCombine/select-and-or.ll
M llvm/test/Transforms/InstCombine/select-binop-cmp.ll
M llvm/test/Transforms/InstCombine/select-binop-foldable-floating-point.ll
M llvm/test/Transforms/InstCombine/select-cmp-eq-op-fold.ll
M llvm/test/Transforms/InstCombine/select-cmp.ll
M llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll
M llvm/test/Transforms/InstCombine/select-divrem.ll
M llvm/test/Transforms/InstCombine/select-factorize.ll
M llvm/test/Transforms/InstCombine/select-masked_gather.ll
M llvm/test/Transforms/InstCombine/select-masked_load.ll
M llvm/test/Transforms/InstCombine/select-of-bittest.ll
M llvm/test/Transforms/InstCombine/select-safe-transforms.ll
M llvm/test/Transforms/InstCombine/select-with-bitwise-ops.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstCombine/select_meta.ll
M llvm/test/Transforms/InstCombine/set.ll
M llvm/test/Transforms/InstCombine/shift-add.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest-with-truncation-lshr.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest-with-truncation-shl.ll
M llvm/test/Transforms/InstCombine/shift-direction-in-bit-test.ll
M llvm/test/Transforms/InstCombine/shift-logic.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/test/Transforms/InstCombine/shl-bo.ll
M llvm/test/Transforms/InstCombine/shuffle-binop.ll
M llvm/test/Transforms/InstCombine/signed-truncation-check.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
M llvm/test/Transforms/InstCombine/sink-not-into-and.ll
M llvm/test/Transforms/InstCombine/sink-not-into-or.ll
M llvm/test/Transforms/InstCombine/smax-icmp.ll
M llvm/test/Transforms/InstCombine/smin-icmp.ll
M llvm/test/Transforms/InstCombine/sub-ashr-or-to-icmp-select.ll
M llvm/test/Transforms/InstCombine/sub-gep.ll
M llvm/test/Transforms/InstCombine/sub-lshr-or-to-icmp-select.ll
M llvm/test/Transforms/InstCombine/sub-minmax.ll
M llvm/test/Transforms/InstCombine/sub-not.ll
M llvm/test/Transforms/InstCombine/sub-of-negatible-inseltpoison.ll
M llvm/test/Transforms/InstCombine/sub-of-negatible.ll
M llvm/test/Transforms/InstCombine/sub-xor-cmp.ll
M llvm/test/Transforms/InstCombine/sub.ll
M llvm/test/Transforms/InstCombine/trunc-binop-ext.ll
M llvm/test/Transforms/InstCombine/uaddo.ll
M llvm/test/Transforms/InstCombine/umax-icmp.ll
M llvm/test/Transforms/InstCombine/umin-icmp.ll
M llvm/test/Transforms/InstCombine/unordered-compare-and-ordered.ll
M llvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check-via-add.ll
M llvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check-via-xor.ll
M llvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check.ll
M llvm/test/Transforms/InstCombine/unsigned-add-overflow-check-via-add.ll
M llvm/test/Transforms/InstCombine/unsigned-add-overflow-check-via-xor.ll
M llvm/test/Transforms/InstCombine/unsigned-add-overflow-check.ll
M llvm/test/Transforms/InstCombine/unsigned-sub-lack-of-overflow-check.ll
M llvm/test/Transforms/InstCombine/unsigned-sub-overflow-check.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts.ll
M llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_shuffle.ll
M llvm/test/Transforms/InstCombine/vector-reverse.ll
M llvm/test/Transforms/InstCombine/vector-xor.ll
M llvm/test/Transforms/InstCombine/widenable-conditions.ll
M llvm/test/Transforms/InstCombine/xor.ll
M llvm/test/Transforms/InstCombine/xor2.ll
M llvm/test/Transforms/InstCombine/zext-bool-add-sub.ll
M llvm/test/Transforms/InstCombine/zext-or-icmp.ll
M llvm/test/Transforms/InstCombine/zext.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/extract-last-veclane.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/uniform-args-call-variants.ll
M llvm/test/Transforms/PGOProfile/chr.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoist-runtime-checks.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/peel-multiple-unreachable-exits-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/quant_4x4.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
M llvm/test/Transforms/PhaseOrdering/X86/hoist-load-of-baseptr.ll
M llvm/test/Transforms/PhaseOrdering/X86/speculation-vs-tbaa.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll
M llvm/test/Transforms/PhaseOrdering/fast-basictest.ll
M llvm/test/Transforms/PhaseOrdering/reassociate-instcombine.ll
M llvm/test/Transforms/PhaseOrdering/runtime-check-removal.ll
M llvm/test/Transforms/Reassociate/fast-ArrayOutOfBounds.ll
M llvm/test/Transforms/Reassociate/fast-SubReassociate.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp_commute-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp_commute.ll
Log Message:
-----------
[InstCombine] Remove some of the complexity-based canonicalization (#91185)
The idea behind this canonicalization is that it allows us to handle less
patterns, because we know that some will be canonicalized away. This is
indeed very useful to e.g. know that constants are always on the right.
However, this is only useful if the canonicalization is actually
reliable. This is the case for constants, but not for arguments: Moving
these to the right makes it look like the "more complex" expression is
guaranteed to be on the left, but this is not actually the case in
practice. It fails as soon as you replace the argument with another
instruction.
The end result is that it looks like things correctly work in tests,
while they actually don't. We use the "thwart complexity-based
canonicalization" trick to handle this in tests, but it's often a
challenge for new contributors to get this right, and based on the
regressions this PR originally exposed, we clearly don't get this right
in many cases.
For this reason, I think that it's better to remove this complexity
canonicalization. It will make it much easier to write tests for
commuted cases and make sure that they are handled.
Commit: 9d364286f3b63e99ed3838f179aa2223f930f1ab
https://github.com/llvm/llvm-project/commit/9d364286f3b63e99ed3838f179aa2223f930f1ab
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/Bitcode/amdgcn-atomic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx940.ll
Log Message:
-----------
AMDGPU: Remove flat/global atomic fadd v2bf16 intrinsics (#97050)
These are now fully covered by atomicrmw.
Commit: 681ae0972205e575ff1fd1d7ab0ef710ae364348
https://github.com/llvm/llvm-project/commit/681ae0972205e575ff1fd1d7ab0ef710ae364348
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/Func/Extensions/MeshShardingExtensions.h
R mlir/include/mlir/Dialect/Mesh/IR/TensorShardingInterfaceImpl.h
A mlir/include/mlir/Dialect/Tensor/Extensions/AllExtensions.h
A mlir/include/mlir/Dialect/Tensor/Extensions/MeshShardingExtensions.h
A mlir/include/mlir/Dialect/Tensor/IR/ShardingInterfaceImpl.h
M mlir/include/mlir/InitAllDialects.h
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Dialect/Mesh/Interfaces/CMakeLists.txt
R mlir/lib/Dialect/Mesh/Interfaces/TensorShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/CMakeLists.txt
A mlir/lib/Dialect/Tensor/Extensions/AllExtensions.cpp
A mlir/lib/Dialect/Tensor/Extensions/CMakeLists.txt
A mlir/lib/Dialect/Tensor/Extensions/MeshShardingExtensions.cpp
M mlir/tools/mlir-lsp-server/CMakeLists.txt
Log Message:
-----------
[MLIR][mesh] moving shardinginterfaceimpl for tensor to tensor extension lib (#104913)
Follow-up to #102598 : as discussed, move tensor sharding implementation
into separate tensor extension lib.
@sogartar @yaochengji, could you take a look at this PR?
Commit: 8109e5de57fbdfc0fd292f143da7dfa7543ebdab
https://github.com/llvm/llvm-project/commit/8109e5de57fbdfc0fd292f143da7dfa7543ebdab
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/abds-neg.ll
M llvm/test/CodeGen/AArch64/abds.ll
M llvm/test/CodeGen/AArch64/abdu-neg.ll
M llvm/test/CodeGen/AArch64/abdu.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/RISCV/abds-neg.ll
M llvm/test/CodeGen/RISCV/abds.ll
M llvm/test/CodeGen/RISCV/abdu-neg.ll
M llvm/test/CodeGen/RISCV/abdu.ll
M llvm/test/CodeGen/X86/abds-neg.ll
M llvm/test/CodeGen/X86/abds.ll
M llvm/test/CodeGen/X86/abdu.ll
Log Message:
-----------
[DAG] Add select_cc -> abd folds (#102137)
Fixes #100810
Commit: 0c07e7c211bed5e14372aebc2fc6edc16ecef8cb
https://github.com/llvm/llvm-project/commit/0c07e7c211bed5e14372aebc2fc6edc16ecef8cb
Author: Nathan Gauër <brioche at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
A llvm/test/CodeGen/SPIRV/block-ordering.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitchBranches.ll
M llvm/test/CodeGen/SPIRV/branching/Two_OpSwitch_same_register.ll
M llvm/test/CodeGen/SPIRV/branching/if-merging.ll
M llvm/test/CodeGen/SPIRV/branching/if-non-merging.ll
M llvm/test/CodeGen/SPIRV/branching/switch-range-check.ll
M llvm/test/CodeGen/SPIRV/phi-ptrcast-dominate.ll
M llvm/test/CodeGen/SPIRV/scfg-add-pre-headers.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-break.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-convergence-in-break.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-multiple-break.ll
A llvm/test/CodeGen/SPIRV/structurizer/merge-exit-simple-while-identity.ll
R llvm/test/CodeGen/SPIRV/structurizer/merge-exit-simple-white-identity.ll
Log Message:
-----------
[SPIR-V] Sort basic blocks to match the SPIR-V spec (#102929)
The SPIR-V spec required basic blocks to respect some kind of ordering
(A block dominating another cannot be after in the binary layout).
---------
Signed-off-by: Nathan Gauër <brioche at google.com>
Commit: 4e04286d61edfb56338ca3a6d0735c5384508b00
https://github.com/llvm/llvm-project/commit/4e04286d61edfb56338ca3a6d0735c5384508b00
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/x86-loopvectorize-costmodel.ll.expected
Log Message:
-----------
[VPlan] Only use selectVectorizationFactor for cross-check (NFCI). (#103033)
Use getBestVF to select VF up-front and only use
selectVectorizationFactor to get the VF legacy VF to check the
vectorization decision matches the VPlan-based cost model.
PR: https://github.com/llvm/llvm-project/pull/103033
Commit: a80dd44b0d96fa3ba3fe0501c3ad4b1ee7edff00
https://github.com/llvm/llvm-project/commit/a80dd44b0d96fa3ba3fe0501c3ad4b1ee7edff00
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/test/Analysis/LoopAccessAnalysis/symbolic-stride.ll
Log Message:
-----------
LAA: pre-commit tests for stride-versioning (#97570)
Add tests for when the Stride is unknown and equal to TC, with different
kinds of casts. In these cases, LAA should not speculate on Stride.
Commit: 7a19194d0ac0110e5dae43538423293b67a27466
https://github.com/llvm/llvm-project/commit/7a19194d0ac0110e5dae43538423293b67a27466
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/unittests/ADT/STLExtrasTest.cpp
Log Message:
-----------
[NFC][ADT] Add unit test for llvm::mismatch. (#105459)
- Add basic unit test for llvm::mismatch.
Commit: 0cff3e85db00b5f425cc4ed0d6921445afa891ca
https://github.com/llvm/llvm-project/commit/0cff3e85db00b5f425cc4ed0d6921445afa891ca
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/Support/ModRef.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Support/CMakeLists.txt
A llvm/lib/Support/ModRef.cpp
Log Message:
-----------
[NFC][Support] Move ModRef/MemoryEffects printers to their own file (#105367)
- Move raw_ostream << operators for `ModRef` and `MemoryEffects` to a
new ModRef.cpp file under llvm/Support (instead of AliasAnalysis.cpp)
- This enables calling these operators from `Core` files like
Instructions.cpp (for instance for debugging). Currently, they live in
`LLVMAnalysis` which cannot be linked with `Core`.
Commit: 2644fe4858a36ffa65c36645f362e79889a0ad21
https://github.com/llvm/llvm-project/commit/2644fe4858a36ffa65c36645f362e79889a0ad21
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[gn build] Port 0cff3e85db00
Commit: 4f075086e7b8d9108749117f53999cd4afdd6894
https://github.com/llvm/llvm-project/commit/4f075086e7b8d9108749117f53999cd4afdd6894
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[LLVM][VPlan] Keep all VPBlend masks until VPlan transformation. (#104015)
It's not possible to pick the best mask to remove when optimising
VPBlend at construction and so this patch refactors the code to move the
decision (and thus transformation) to VPlanTransforms.
NOTE: This patch does not change the decision of which mask to pick.
That will be done in a following PR to keep this patch as NFC from an
output point of view.
Commit: 170a21e7f00d0097d88cba3547967e500e0d8dfe
https://github.com/llvm/llvm-project/commit/170a21e7f00d0097d88cba3547967e500e0d8dfe
Author: Marius Kamp <msk at posteo.org>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/zext.ll
Log Message:
-----------
[InstCombine] Extend Fold of Zero-extended Bit Test (#102100)
Previously, (zext (icmp ne (and X, (1 << ShAmt)), 0)) has only been
folded if the bit width of X and the result were equal. Use a trunc or
zext instruction to also support other bit widths.
This is a follow-up to commit 533190acdb9d2ed774f96a998b5c03be3df4f857,
which introduced a regression: (zext (icmp ne (and (lshr X ShAmt) 1) 0))
is not folded any longer to (zext/trunc (and (lshr X ShAmt) 1)) since
the commit introduced the fold of (icmp ne (and (lshr X ShAmt) 1) 0) to
(icmp ne (and X (1 << ShAmt)) 0). The change introduced by this commit
restores this fold.
Alive proof: https://alive2.llvm.org/ce/z/MFkNXs
Relates to issue #86813 and pull request #101838.
Commit: ad435bcc14f42dc97286c717cd12446a0facb2ee
https://github.com/llvm/llvm-project/commit/ad435bcc14f42dc97286c717cd12446a0facb2ee
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/kernel-args.cu
Log Message:
-----------
[clang][CodeGen][SPIR-V][AMDGPU] Tweak AMDGCNSPIRV ABI to allow for the correct handling of aggregates passed to kernels / functions. (#102776)
The AMDGPU kernel ABI is not directly representable in SPIR-V, since it
relies on passing aggregates `byref`, and SPIR-V only encodes `byval`
(which the AMDGPU BE disallows for kernel arguments). As a temporary
solution to this mismatch, we add special handling for AMDGCN flavoured
SPIR-V, whereby aggregates are passed as direct, both to kernels and to
normal functions. This is not ideal (there are pathological cases where
performance is heavily impacted), but empirically robust and guaranteed
to work as the AMDGPU BE retains handling of `direct` passing for legacy
reasons.
We will revisit this in the future, but as it stands it is enough to
pass a wide array of integration tests and generates correct SPIR-V and
correct reverse translation into LLVM IR. The
amdgpu-kernel-arg-pointer-type test is updated via the automated script,
and thus becomes quite noisy.
Commit: 848658955a9d2d42ea3e319d191e2dcd5d76c837
https://github.com/llvm/llvm-project/commit/848658955a9d2d42ea3e319d191e2dcd5d76c837
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
M clang/lib/StaticAnalyzer/Checkers/Taint.cpp
M clang/test/Analysis/analyzer-config.c
M clang/test/Analysis/taint-generic.c
Log Message:
-----------
[analyzer] Limit `isTainted()` by skipping complicated symbols (#105493)
As discussed in
https://discourse.llvm.org/t/rfc-make-istainted-and-complex-symbols-friends/79570/10
Some `isTainted()` queries can blow up the analysis times, and
effectively halt the analysis under specific workloads.
We don't really have the time now to do a caching re-implementation of
`isTainted()`, so we need to workaround the case.
The workaround with the smallest blast radius was to limit what symbols
`isTainted()` does the query (by walking the SymExpr). So far, the
threshold 10 worked for us, but this value can be overridden using the
"max-tainted-symbol-complexity" config value.
This new option is "deprecated" from the getgo, as I expect this issue
to be fixed within the next few months and I don't want users to
override this value anyways. If they do, this message will let them know
that they are on their own, and the next release may break them (as we
no longer recognize this option if we drop it).
Mitigates #89720
CPP-5414
Commit: 2704b804bec50c2b016bf678bd534c330ec655b6
https://github.com/llvm/llvm-project/commit/2704b804bec50c2b016bf678bd534c330ec655b6
Author: Hans Wennborg <hans at chromium.org>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M compiler-rt/lib/asan/asan_flags.inc
M compiler-rt/lib/asan/asan_globals.cpp
M compiler-rt/test/asan/TestCases/Linux/initialization-nobug-lld.cpp
M compiler-rt/test/asan/TestCases/Linux/odr_indicator_unregister.cpp
M compiler-rt/test/asan/TestCases/Linux/odr_indicators.cpp
M compiler-rt/test/asan/TestCases/Windows/dll_global_dead_strip.c
M compiler-rt/test/asan/TestCases/Windows/dll_report_globals_symbolization_at_startup.cpp
M compiler-rt/test/asan/TestCases/Windows/global_dead_strip.c
M compiler-rt/test/asan/TestCases/Windows/report_globals_vs_freelibrary.cpp
M compiler-rt/test/asan/TestCases/initialization-nobug.cpp
Log Message:
-----------
Revert "[asan] Remove debug tracing from `report_globals` (#104404)"
This caused
SanitizerCommon-asan-x86_64-Darwin :: Darwin/print-stack-trace-in-code-loaded-after-fork.cpp
to fail, see comment on the PR.
> Printing globals registration is internal debug
> tracing and should be controlled with verbosity.
This reverts commit 68f6e7467651f38e0b97343bfbc49e0ce69eaedf and
follow-up commit ef6760116fa2fa21f78e7a3b499f77e1a3eb7b92.
Commit: 40eca60c5a273e7b89851c7c0b73b5f1037b29ed
https://github.com/llvm/llvm-project/commit/40eca60c5a273e7b89851c7c0b73b5f1037b29ed
Author: Zhikai Zeng <backlight.zzk at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/SemaTemplate/concepts-friends.cpp
Log Message:
-----------
[Clang] fix generic lambda inside requires-clause of friend function template (#99813)
fixes https://github.com/llvm/llvm-project/issues/98258
The cause is that the assertion "Nothing should reference a value below
the actual template depth" is incorrect since we can have a generic
lambda inside requires-clause of friend function template, and the
generic lambda can reference to values with greater template depth.
---------
Co-authored-by: cor3ntin <corentinjabot at gmail.com>
Commit: 1e5f275f36a3758c7c3b06d0b9e975c4eea3d0af
https://github.com/llvm/llvm-project/commit/1e5f275f36a3758c7c3b06d0b9e975c4eea3d0af
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.class/assign.compile.fail.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.class/assign.compile.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.class/copy.compile.fail.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.class/ctor.copy.compile.pass.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.class/ctor.default.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.class/default.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.class/lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.class/try_lock.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.recursive/assign.compile.fail.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.recursive/assign.compile.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.recursive/copy.compile.fail.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.recursive/ctor.copy.compile.pass.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.recursive/ctor.default.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.recursive/default.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.recursive/lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.recursive/try_lock.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/assign.compile.fail.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/assign.compile.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/copy.compile.fail.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/ctor.copy.compile.pass.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/ctor.default.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/default.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/try_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/try_lock_for.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/try_lock_until.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/assign.compile.fail.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/assign.compile.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/copy.compile.fail.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/ctor.copy.compile.pass.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/ctor.default.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/default.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/try_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/try_lock_for.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/try_lock_until.pass.cpp
Log Message:
-----------
[libc++] Refactor the tests for mutex, recursive mutex and their timed counterparts (#104852)
This refactoring is done to remove flakyness as described in
https://github.com/llvm/llvm-project/pull/89083.
Commit: 4f14bfeddedcf21e0eaf0ff3ddf7b62938f66df5
https://github.com/llvm/llvm-project/commit/4f14bfeddedcf21e0eaf0ff3ddf7b62938f66df5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/tools/llvm-reduce/deltas/RunIRPasses.cpp
Log Message:
-----------
[llvm-reduce] Disable fixpoint verification in InstCombine
We don't want to get fixpoint verification errors while reducing.
Commit: aa088438784dd76a859eee229ddaec17e0cb0651
https://github.com/llvm/llvm-project/commit/aa088438784dd76a859eee229ddaec17e0cb0651
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M libcxx/include/__compare/ordering.h
A libcxx/test/std/language.support/cmp/cmp.categories.pre/reject-other-than-literal-zero.verify.cpp
R libcxx/test/std/language.support/cmp/cmp.categories.pre/zero_type.verify.cpp
Log Message:
-----------
[libc++] Avoid -Wzero-as-null-pointer-constant in operator<=> (#79465)
Issue #43670 describes a situation where the following comparison will
issue a warning when -Wzero-as-null-pointer-constant is enabled:
#include <compare>
auto b = (1 <=> 2) < 0;
This code uses operator<(strong_ordering, Unspecified), which is
specified by the Standard to only work with a literal 0. In the library,
this is achieved by constructing Unspecified from a pointer, which works
but has the downside of triggering the warning.
This patch uses an alternative implementation where we require that the
operator is used exactly with an int of value 0 (known at compile-time),
however that value can technically be an expression like `1 - 1`, which
makes us a bit less strict than what's specified in the Standard.
Fixes #43670
Commit: 65281570afd7e35e01533b07c6c2937de410fc52
https://github.com/llvm/llvm-project/commit/65281570afd7e35e01533b07c6c2937de410fc52
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lldb/bindings/python/python-wrapper.swig
Log Message:
-----------
[lldb][swig] Use the correct variable in the return statement
The issue was introduced in
https://github.com/llvm/llvm-project/pull/104523.
The code introduces the `ret_val` variable but does not use it. Instead
it returns a pointer, which gets implicitly converted to bool.
Commit: 76c07984257b49dcc4786fa9fb3918a2c1342e23
https://github.com/llvm/llvm-project/commit/76c07984257b49dcc4786fa9fb3918a2c1342e23
Author: Aviad Cohen <aviadcohen7 at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/test/Dialect/MemRef/ops.mlir
Log Message:
-----------
[mlir][memref]: Allow collapse dummy strided unit dim (#103719)
Dimensions of size 1 should be skipped, because their strides are meaningless and could have any arbitrary value.
Commit: 281d17840c35a1d80303bb6170c253fe2411f95f
https://github.com/llvm/llvm-project/commit/281d17840c35a1d80303bb6170c253fe2411f95f
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/lib/Parse/ParseDecl.cpp
A clang/test/Parser/function-parameter-limit.cpp
Log Message:
-----------
[clang] Diagnose functions with too many parameters (#104833)
This patch adds a parser check when a function declaration or function
type declaration (in a function pointer declaration, for example) has
too many parameters for `FunctionTypeBits::NumParams` to hold. At the
moment of writing it's a 16-bit-wide bit-field, limiting the number of
parameters at 65536.
The check is added in the parser loop that goes over comma-separated
list of function parameters. This is not the solution Aaron suggested in
https://github.com/llvm/llvm-project/issues/35741#issuecomment-1638086571,
because it was found out that it's quite hard to recover from this
particular error in `GetFullTypeForDeclarator()`. Multiple options were
tried, but all of them led to crashes down the line.
I used LLVM Compile Time Tracker to ensure this does not introduce a
performance regression. I believe changes are in the noise:
https://llvm-compile-time-tracker.com/compare.php?from=de5ea2d122c31e1551654ff506c33df299f351b8&to=424818620766cedb2770e076ee359afeb0cc14ec&stat=instructions:u
Fixes #35741
Commit: 7ad7f8f7a3d443f4c17264d7e14cccdc020976b9
https://github.com/llvm/llvm-project/commit/7ad7f8f7a3d443f4c17264d7e14cccdc020976b9
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M libcxx/CMakeLists.txt
A libcxx/cmake/caches/Generic-no-terminal.cmake
M libcxx/include/__config_site.in
M libcxx/include/print
M libcxx/utils/ci/run-buildbot
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libcxx] Add `LIBCXX_HAS_TERMINAL_AVAILABLE` CMake option to disable `print` terminal checks (#99259)
Adds a new CMake option called `LIBCXX_HAS_TERMINAL_AVAILABLE` that
prevents us from checking for `isatty`.
Commit: 87eeed1f0ebe57abffde560c25dd9829dc6038f3
https://github.com/llvm/llvm-project/commit/87eeed1f0ebe57abffde560c25dd9829dc6038f3
Author: Ivan R. Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M flang/docs/OpenMP-declare-target.md
M flang/docs/OpenMP-descriptor-management.md
M flang/include/flang/Optimizer/CMakeLists.txt
A flang/include/flang/Optimizer/OpenMP/CMakeLists.txt
A flang/include/flang/Optimizer/OpenMP/Passes.h
A flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CLOptions.inc
M flang/lib/Frontend/CMakeLists.txt
M flang/lib/Optimizer/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/FunctionFiltering.cpp
A flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
A flang/lib/Optimizer/OpenMP/MarkDeclareTarget.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
R flang/lib/Optimizer/Transforms/OMPFunctionFiltering.cpp
R flang/lib/Optimizer/Transforms/OMPMapInfoFinalization.cpp
R flang/lib/Optimizer/Transforms/OMPMarkDeclareTarget.cpp
M flang/tools/bbc/CMakeLists.txt
M flang/tools/fir-opt/CMakeLists.txt
M flang/tools/fir-opt/fir-opt.cpp
M flang/tools/tco/CMakeLists.txt
Log Message:
-----------
[flang][NFC] Move OpenMP related passes into a separate directory (#104732)
Commit: e1912a15b6b05aab36b7bcbe617980e8d808bd80
https://github.com/llvm/llvm-project/commit/e1912a15b6b05aab36b7bcbe617980e8d808bd80
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/unittests/ADT/StringRefTest.cpp
Log Message:
-----------
[NFC][ADT] Format StringRefTest.cpp to fit in 80 columns. (#105502)
Commit: 3c8f139fb73a8610680b184afc88fe4b1485add0
https://github.com/llvm/llvm-project/commit/3c8f139fb73a8610680b184afc88fe4b1485add0
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/select-cmp.ll
Log Message:
-----------
[InstCombine] Add tests for icmp of select of cmp (NFC)
Commit: 68e21e16d21deee0f0226b4c771ff8b4731b7370
https://github.com/llvm/llvm-project/commit/68e21e16d21deee0f0226b4c771ff8b4731b7370
Author: Tomas Matheson <Tomas.Matheson at arm.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/test/MC/AArch64/arm64-system-encoding.s
M llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
Log Message:
-----------
[AArch64] Add support for ACTLR_EL12 system register (#105497)
Documentation can be found here:
https://developer.arm.com/documentation/ddi0601/2024-06/AArch64-Registers/ACTLR-EL1--Auxiliary-Control-Register--EL1-
Commit: bccb22709324ae329e3d80cf8af9dd225799bc17
https://github.com/llvm/llvm-project/commit/bccb22709324ae329e3d80cf8af9dd225799bc17
Author: Ivan Radanov Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M flang/docs/OpenMP-declare-target.md
M flang/docs/OpenMP-descriptor-management.md
M flang/include/flang/Optimizer/CMakeLists.txt
R flang/include/flang/Optimizer/OpenMP/CMakeLists.txt
R flang/include/flang/Optimizer/OpenMP/Passes.h
R flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CLOptions.inc
M flang/lib/Frontend/CMakeLists.txt
M flang/lib/Optimizer/CMakeLists.txt
R flang/lib/Optimizer/OpenMP/CMakeLists.txt
R flang/lib/Optimizer/OpenMP/FunctionFiltering.cpp
R flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
R flang/lib/Optimizer/OpenMP/MarkDeclareTarget.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/OMPFunctionFiltering.cpp
A flang/lib/Optimizer/Transforms/OMPMapInfoFinalization.cpp
A flang/lib/Optimizer/Transforms/OMPMarkDeclareTarget.cpp
M flang/tools/bbc/CMakeLists.txt
M flang/tools/fir-opt/CMakeLists.txt
M flang/tools/fir-opt/fir-opt.cpp
M flang/tools/tco/CMakeLists.txt
Log Message:
-----------
Revert "[flang][NFC] Move OpenMP related passes into a separate directory (#104732)"
This reverts commit 87eeed1f0ebe57abffde560c25dd9829dc6038f3.
Commit: d6d8243dcd4ea768549904036ed31b8e59e14c73
https://github.com/llvm/llvm-project/commit/d6d8243dcd4ea768549904036ed31b8e59e14c73
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/LTO/LTO.h
M llvm/lib/LTO/LTO.cpp
Log Message:
-----------
[LTO] Use DenseSet in computeLTOCacheKey (NFC) (#105466)
The two instances of std::set are used only for membership checking
purposes in computeLTOCacheKey. We do not need std::set's strengths
like iterators staying valid or the ability to traverse in a sorted
order. This patch changes them to DenseSet.
While I am at it, this patch replaces count with contains for slightly
increased readability.
Commit: 5ddc79b093f2afaaf2c69d20d7d44448da04458a
https://github.com/llvm/llvm-project/commit/5ddc79b093f2afaaf2c69d20d7d44448da04458a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/LTO/LTO.cpp
Log Message:
-----------
[LTO] Use a range-based for loop (NFC) (#105467)
Commit: 70e8c982d0589b1a56faf0768b45596c2da3a510
https://github.com/llvm/llvm-project/commit/70e8c982d0589b1a56faf0768b45596c2da3a510
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions.ll
Log Message:
-----------
[AArch64] Bail out for scalable vecs in areExtractShuffleVectors (#105484)
The added test triggers the following assert in `areExtractShuffleVectors`
that is called from `shouldSinkOperands`:
Assertion `(!isScalable() || isZero()) && "Request for a fixed element count on a scalable object"' failed.
I don't think scalable types can be extract shuffles, so bail early if
this is the case.
Commit: 32c38dd85ee27fc7c2dd6a749fc1f7af4abdbea1
https://github.com/llvm/llvm-project/commit/32c38dd85ee27fc7c2dd6a749fc1f7af4abdbea1
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
R libcxx/docs/Status/Cxx14.rst
R libcxx/docs/Status/Cxx14Issues.csv
R libcxx/docs/Status/Cxx14Papers.csv
M libcxx/docs/index.rst
M libcxx/utils/synchronize_csv_status_files.py
Log Message:
-----------
[libc++] Mark C++14 as complete and remove the status pages (#105514)
We already documented that libc++ was C++14 complete, but we still
documented the status of C++14. Since that is redundant (and I suspect
the C++14 status page was missing some stuff), simply remove them.
Commit: bf71c64839c0082e761a4f070ed92e01ced0187c
https://github.com/llvm/llvm-project/commit/bf71c64839c0082e761a4f070ed92e01ced0187c
Author: Hans Wennborg <hans at chromium.org>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/Darwin/cstring_section.c
Log Message:
-----------
Speculative fix for asan/TestCases/Darwin/cstring_section.c
It's been failing since https://green.lab.llvm.org/job/llvm.org/job/clang-stage1-RA/1812
It seems __TEXT,__cstring now comes before __TEXT,__const.
Commit: 8d4891591fb41780c2af6e18abd590faf1f5626c
https://github.com/llvm/llvm-project/commit/8d4891591fb41780c2af6e18abd590faf1f5626c
Author: Nico Weber <thakis at chromium.org>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn] port 7ad7f8f7a3d4
Commit: f0a3f8a370e3c85ee00cbc5e5d1c29e8ad3c51da
https://github.com/llvm/llvm-project/commit/f0a3f8a370e3c85ee00cbc5e5d1c29e8ad3c51da
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M libcxx/utils/synchronize_csv_status_files.py
Log Message:
-----------
[libc++] Enable C++23 and C++26 issues to be synchronized
As a drive-by, also switch to printing dangling issues instead of
killing the script, since those can be fairly common.
Commit: ddb5480e6799d0de72c2cd34c1e7f9ffd154e660
https://github.com/llvm/llvm-project/commit/ddb5480e6799d0de72c2cd34c1e7f9ffd154e660
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.mir
Log Message:
-----------
[AMDGPU][True16][MC] added VOPC realtrue/faketrue flag and fake16 instructions (#104739)
VOPC instructions were defined with HasTrue16BitInst flag while these
true16 instructions are actually implemented with fake16 profile.
Seperate them to true16 version and fake16 version by adding
UseRealTrue16 and UseFakeTrue16 flag and fake16 instructions.
The code default to use fake16. This is preparing for the upcoming
changes in MC to support realtrue 16bit operands and vdst. The true16
and fake16 profile will be modified in the later patches.
Commit: c9ba6d35c19022a582516e9455af3f0d79101adf
https://github.com/llvm/llvm-project/commit/c9ba6d35c19022a582516e9455af3f0d79101adf
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
Log Message:
-----------
[RISCV] Add coverage for fp reductions of <2^N-1 x FP> vectors
Commit: c0d222219a8d01d3945100114256d26cfe833a1c
https://github.com/llvm/llvm-project/commit/c0d222219a8d01d3945100114256d26cfe833a1c
Author: Andy Kaylor <andrew.kaylor at intel.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaAttr.cpp
A clang/test/CodeGen/ffp-contract-fast-honor-pramga-option.cpp
A clang/test/CodeGen/ffp-contract-fhp-pragma-override.cpp
Log Message:
-----------
Fix bug with -ffp-contract=fast-honor-pragmas (#104857)
This fixes a problem which caused clang to assert in the Sema pragma
handling if it encountered "#pragma STDC FP_CONTRACT DEFAULT" when
compiling with the -ffp-contract=fast-honor-pragmas option.
This fixes https://github.com/llvm/llvm-project/issues/104830
Commit: 278fc8efdf004a1959a31bb4c208df5ee733d5c8
https://github.com/llvm/llvm-project/commit/278fc8efdf004a1959a31bb4c208df5ee733d5c8
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AArch64/dag-combine-freeze.ll
Log Message:
-----------
[DAGCombiner] Fix ReplaceAllUsesOfValueWith mutation bug in visitFREEZE (#104924)
In visitFREEZE we have been collecting a set/vector of
MaybePoisonOperands that later was iterated over, applying a freeze to
those operands. However, C-level fuzzy testing has discovered that the
recursiveness of ReplaceAllUsesOfValueWith may cause later operands in
the MaybePoisonOperands vector to be replaced when replacing an earlier
operand. That would then turn up as
Assertion `N1.getOpcode() != ISD::DELETED_NODE &&
"Operand is DELETED_NODE!"' failed.
failures when trying to freeze those later operands.
So we need to make sure that the vector with MaybePoisonOperands is
mutated as well when needed. Or as the solution used in this patch, make
sure to keep track of operand numbers that should be frozen instead of
having a vector of SDValues. And then we can refetch the operands while
iterating over operand numbers.
The problem was seen after adding SELECT_CC to the set of operations
including in "AllowMultipleMaybePoisonOperands". I'm not sure, but I
guess that this could happen for other operations as well for which we
allow multiple maybe poison operands.
Commit: 6fd46089c9fbd5b22bb67ac3d6196fe70ba684c6
https://github.com/llvm/llvm-project/commit/6fd46089c9fbd5b22bb67ac3d6196fe70ba684c6
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.h
M flang/test/Integration/debug-fixed-array-type-2.f90
M flang/test/Transforms/debug-fixed-array-type.fir
Log Message:
-----------
[flang][debug] Allow non default array lower bounds. (#104467)
As mentioned in #98877, we currently always use 1 as lower bound for
fixed size arrays. This PR removes this restriction. It passes along
`DeclareOp` to type conversion functions and uses the shift information
(if present) to get the lower bound value. This was suggested by
@jeanPerier in
https://github.com/llvm/llvm-project/pull/96746#issuecomment-2195164553
This PR also adds a small cleanup that type conversion functions don't
take Location now. It was initially added so that location of derived
types can be passed. But that information can be extracted from typeInfo
objects and we don't need to pass it along.
This PR will handle the problem for local and global variable. We may
need a bit more work for derived type once the support for derived types
lands.
Fixes #98877.
Commit: 839275d0536f992591f4c5d81e13a26e6095dda6
https://github.com/llvm/llvm-project/commit/839275d0536f992591f4c5d81e13a26e6095dda6
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
Log Message:
-----------
[MLIR][OpenMP] Add missing OpenMP to LLVM conversion patterns (#104440)
This patch adds conversion patterns to LLVM for the following OpenMP
dialect operations:
- `omp.critical.declare`
- `omp.cancel`
- `omp.cancellation_point`
- `omp.distribute`
- `omp.teams`
- `omp.ordered`
- `omp.taskloop`
Also, arbitrary sorting of operations when passing them as template
argument lists when configuring that pass is replaced by alphabetical
sorting.
Commit: 6816a137985bfa38cda20b9cd4e23c361c3bd0de
https://github.com/llvm/llvm-project/commit/6816a137985bfa38cda20b9cd4e23c361c3bd0de
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M flang/test/Driver/fveclib-codegen.f90
Log Message:
-----------
[flang][Driver] Remove misleading test comment (#105528)
The test initially worked on ArmPL but this was changed during code
review and I neglected to fix this comment.
Thanks for pointing this out @banach-space
Commit: e49068624c48f4d906707b32b31f6a1d561605be
https://github.com/llvm/llvm-project/commit/e49068624c48f4d906707b32b31f6a1d561605be
Author: Alex Rice <alexrice999 at hotmail.co.uk>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M mlir/lib/TableGen/Operator.cpp
Log Message:
-----------
[mlir] [tablegen] Make `hasSummary` and `hasDescription` useful (#105531)
The `hasSummary` and `hasDescription` functions are currently useless as
they check if the corresponding `summary` and `description` are present.
However, these values are set to a default value of `""`, and so these
functions always return true.
This PR changes these functions to check if the summary and description
are just whitespace, which is presumably closer to their original
intent.
@math-fehr
@zero9178
Commit: 625841c3be4dbaab089c01217726a2906f3a8103
https://github.com/llvm/llvm-project/commit/625841c3be4dbaab089c01217726a2906f3a8103
Author: magic-akari <akari.ccino at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/tools/clang-format/clang-format-diff.py
M clang/tools/clang-format/clang-format-sublime.py
M clang/tools/clang-format/clang-format.el
M clang/tools/clang-format/clang-format.py
M clang/tools/clang-format/git-clang-format
Log Message:
-----------
[clang-format] Use double hyphen for multiple-letter flags (#100978)
- Closes: #100974
Commit: f7bbc40b0736cc417f57cd039b098b504cf6a71f
https://github.com/llvm/llvm-project/commit/f7bbc40b0736cc417f57cd039b098b504cf6a71f
Author: Siu Chi Chan <siuchi.chan at amd.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lld/test/ELF/hip-section-layout.s
Log Message:
-----------
[ELF,test] Enhance hip-section-layout.s
Check different object file order
Change-Id: I6096c12e29e9ddb6b3053f977e4cbb24eea9b7d3
Commit: f03b7830902225a8910d2972c39143355795efa9
https://github.com/llvm/llvm-project/commit/f03b7830902225a8910d2972c39143355795efa9
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/unittests/CGData/CMakeLists.txt
Log Message:
-----------
[CGData] Rename CodeGenDataTests to CGDataTests (#105463)
This addresses the comment for
https://github.com/llvm/llvm-project/pull/101461.
Commit: 216d6a06524e4a8ebd6de2806c473b92d3349c4e
https://github.com/llvm/llvm-project/commit/216d6a06524e4a8ebd6de2806c473b92d3349c4e
Author: Chenguang Wang <w3cing at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix mlir build broken by 681ae097. (#105552)
The cmake config creates two targets, `MLIRTensorMeshShardingExtensions`
and `MLIRTensorAllExtensions`; but for bazel, with the `Func` dialect we
only have a single `FuncExtensions`. Here I am following the `Func`
dialect convension to only create a single `TensorExtensions`.
Commit: 3b7611594f010ecd5233ab9580b2feb88837f9ef
https://github.com/llvm/llvm-project/commit/3b7611594f010ecd5233ab9580b2feb88837f9ef
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/ErrorReporting.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/test/sanitizer/double_free.c
M offload/test/sanitizer/double_free_racy.c
M offload/test/sanitizer/free_wrong_ptr_kind.c
M offload/test/sanitizer/free_wrong_ptr_kind.cpp
A offload/test/sanitizer/ptr_outside_alloc_1.c
A offload/test/sanitizer/ptr_outside_alloc_2.c
A offload/test/sanitizer/use_after_free_1.c
A offload/test/sanitizer/use_after_free_2.c
Log Message:
-----------
[Offload] Improve error reporting on memory faults (#104254)
Since we can already track allocations, we can diagnose memory faults to
some degree. If the fault happens in a prior allocation (use after free)
or "close but outside" one, we can provide that information to the user.
Note that the fault address might be page aligned, and not all accesses
trigger a fault, especially for allocations that are backed by a
MemoryManager. Still, if people disable the MemoryManager or the
allocation is big enough, we can sometimes provide valueable feedback.
Commit: 1c9d8a62cb208afe1bc87669c7dd5d9590e615b2
https://github.com/llvm/llvm-project/commit/1c9d8a62cb208afe1bc87669c7dd5d9590e615b2
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
A libcxx/cmake/caches/AMDGPU.cmake
A libcxx/cmake/caches/NVPTX.cmake
Log Message:
-----------
[libcxx] Add cache file for the GPU build (#99348)
Summary:
This patch adds a CMake cache config file for the GPU build. This cache
will set the default required options when used from the LLVM runtime
interface or directly. These options pretty much disable everything the
GPU can't handle.
With this and the following patches: #99259, #99243, #99287, and #99333,
we will be able to build `libc++` targeting the GPU with an invocation
like this.
```
$ cmake ../llvm
-DRUNTIMES_nvptx64-nvidia-cuda_CACHE_FILES=${LLVM_SRC}/../libcxx/cmake/caches/NVPTX.cmake \
-DRUNTIMES_amdgcn-amd-amdhsa_CACHE_FILES=${LLVM_SRC}/../libcxx/cmake/caches/AMDGPU.cmake \
-DRUNTIMES_nvptx64-nvidia-cuda_LLVM_ENABLE_RUNTIMES=compiler-rt;libc;libcxx \
-DRUNTIMES_amdgcn-amd-amdhsa_LLVM_ENABLE_RUNTIMES=compiler-rt;libc;libcxx \
-DLLVM_RUNTIME_TARGETS=amdgcn-amd-amdhsa;nvptx64-nvidia-cuda \
```
This will then install the libraries and headers into the appropriate
locations for use with `clang`.
Commit: c61d565721d0cf03e2658ec65a3526dd89142e52
https://github.com/llvm/llvm-project/commit/c61d565721d0cf03e2658ec65a3526dd89142e52
Author: David Green <david.green at arm.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
Log Message:
-----------
[AArch64] Set scalar fneg to free for fnmul (#104814)
A fneg(fmul(..)) or fmul(fneg(..)) can be folded into a fnmul under
AArch64. https://clang.godbolt.org/z/znPj34Mae
This discounts the cost of the fneg in such patterns to be free.
Commit: e78156a0e225673e592920410c8cadc94f19aa66
https://github.com/llvm/llvm-project/commit/e78156a0e225673e592920410c8cadc94f19aa66
Author: Sumanth Gundapaneni <sumanth.gundapaneni at amd.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/test/CodeGen/AMDGPU/lround.ll
Log Message:
-----------
Scalarize the vector inputs to llvm.lround intrinsic by default. (#101054)
Verifier is updated in a different patch to let the vector types for
llvm.lround and llvm.llround intrinsics.
Commit: 6cb14599ade843be3171fa7e4dd5f3601a3bb0de
https://github.com/llvm/llvm-project/commit/6cb14599ade843be3171fa7e4dd5f3601a3bb0de
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
M lldb/source/Plugins/Process/minidump/MinidumpParser.cpp
M lldb/source/Plugins/Process/minidump/MinidumpParser.h
M lldb/source/Plugins/Process/minidump/MinidumpTypes.cpp
M lldb/source/Plugins/Process/minidump/MinidumpTypes.h
M lldb/test/API/functionalities/postmortem/minidump-new/TestMiniDumpNew.py
A lldb/test/API/functionalities/postmortem/minidump-new/linux-x86_64_mem64.yaml
Log Message:
-----------
[LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (#101086)
This PR is in response to a bug my coworker @mbucko discovered where on
MacOS Minidumps were being created where the 64b memory regions were
readable, but were not being listed in
`SBProcess.GetMemoryRegionList()`. This went unnoticed in #95312 due to
all the linux testing including /proc/pid maps. On MacOS generated dumps
(or any dump without access to /proc/pid) we would fail to properly map
Memory Regions due to there being two independent methods for 32b and
64b mapping.
In this PR I addressed this minor bug and merged the methods, but in
order to add test coverage required additions to `obj2yaml` and
`yaml2obj` which make up the bulk of this patch.
Lastly, there are some non-required changes such as the addition of the
`Memory64ListHeader` type, to make writing/reading the header section of
the Memory64List easier.
Commit: ec866638ff36b4a01b38a3ab8ef604596cb37178
https://github.com/llvm/llvm-project/commit/ec866638ff36b4a01b38a3ab8ef604596cb37178
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx23Papers.csv
Log Message:
-----------
[libc++][NFC] A few mechanical adjustments to capitalization in status files
Make sure that we consistently use `Nothing To Do`, and that we use the
RST tags properly (e.g. '|Complete|' instead of 'Complete').
Commit: 7a28192ce1c1d9d0398348eabc46c94eadb317d8
https://github.com/llvm/llvm-project/commit/7a28192ce1c1d9d0398348eabc46c94eadb317d8
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx17.rst
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx20.rst
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/docs/Status/Cxx23.rst
M libcxx/docs/Status/Cxx23Issues.csv
Log Message:
-----------
[libc++] Standardize how we track removed and superseded papers
Instead of having various status entries like 'Superseded by XXX',
we use '|Nothing To Do|' but we add a note explaining that the paper
was pulled at another meeting.
Commit: ae48affd25ac8e211a5bc1c72ef208615fc7eb7d
https://github.com/llvm/llvm-project/commit/ae48affd25ac8e211a5bc1c72ef208615fc7eb7d
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Minor style fixes in lowerVectorMaskVecReduction [nfc]
Reuse existing routine to avoid duplication, and reduce variable scopes.
Commit: c975dc1da03d684604ddf787b07b63fb8e903648
https://github.com/llvm/llvm-project/commit/c975dc1da03d684604ddf787b07b63fb8e903648
Author: Harini0924 <79345568+Harini0924 at users.noreply.github.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/test/ClangScanDeps/pr61006.cppm
M clang/test/Driver/coverage.c
M clang/test/Driver/program-path-priority.c
Log Message:
-----------
[clang] [test] Use lit Syntax for Environment Variables in Clang subproject (#102647)
This patch updates the clang tests by replacing shell command
substitutions with lit-compatible syntax for setting and referencing
environment variables. Specifically, the use of shell-style variable
substitution (e.g., `DEFAULT_TRIPLE=`and `EXPECTED_RESOURCE_DIR=`) has
been replaced with `env` and `%{env}` to align with lit's internal shell
requirements. These changes ensure that environment variables are
properly set and accessed within the lit environment.
When using the lit internal shell with the command
`LIT_USE_INTERNAL_SHELL=1 ninja check-clang`, one common error
encountered is:
```
FAIL: Clang :: Driver/program-path-priority.c (19 of 20640)
******************** TEST 'Clang :: Driver/program-path-priority.c' FAILED ********************
Exit Code: 127
Command Output (stdout):
--
# RUN: at line 90
DEFAULT_TRIPLE=`/usr/local/google/home/harinidonthula/llvm-project/build/tools/clang/test/Driver/Output/program-path-priority.c.tmp/clang --version | grep "Target:" | cut -d ' ' -f2`
# executed command: 'DEFAULT_TRIPLE=`/usr/local/google/home/harinidonthula/llvm-project/build/tools/clang/test/Driver/Output/program-path-priority.c.tmp/clang' --version
# .---command stderr------------
# | 'DEFAULT_TRIPLE=`/usr/local/google/home/harinidonthula/llvm-project/build/tools/clang/test/Driver/Output/program-path-priority.c.tmp/clang': command not found
# `-----------------------------
# error: command failed with exit status: 127
```
To fix this issue, the patch replaces traditional shell substitutions
with lit's environment variable handling, ensuring compatibility with
the lit internal shell framework. This update applies to both the
handling of the `DEFAULT_TRIPLE` and `EXPECTED_RESOURCE_DIR` variables,
allowing the tests to pass when using the lit internal shell.
The patch also adds `env` to the `PWD` variable setting in the following
command to ensure the environment variable is correctly set within the
lit internal shell:
```
// RUN: %if system-linux %{ env PWD=/proc/self/cwd %clang -### -c --coverage %s -o foo/bar.o 2>&1 | FileCheck --check-prefix=PWD %s %}
```
fixes: #102395
[link to
RFC](https://discourse.llvm.org/t/rfc-enabling-the-lit-internal-shell-by-default/80179)
Commit: b89fef8f67974ebcd4114fa75ac2e53fd687870c
https://github.com/llvm/llvm-project/commit/b89fef8f67974ebcd4114fa75ac2e53fd687870c
Author: Michael Jones <michaelrj at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M libc/docs/build_and_test.rst
M libc/docs/contributing.rst
R libc/docs/dev/api_test.rst
R libc/docs/dev/ground_truth_specification.rst
M libc/docs/dev/header_generation.rst
M libc/docs/dev/index.rst
R libc/docs/dev/mechanics_of_public_api.rst
M libc/docs/dev/source_tree_layout.rst
M libc/docs/full_cross_build.rst
M libc/docs/full_host_build.rst
M libc/docs/fullbuild_mode.rst
M libc/docs/gpu/building.rst
M libc/docs/index.rst
M libc/docs/overlay_mode.rst
M libc/docs/porting.rst
Log Message:
-----------
[libc][docs] Update docs to reflect new headergen (#102381)
Since new headergen is now the default for building LLVM-libc, the docs
need to be updated to reflect that. While I was editing those docs, I
took a quick pass at updating other out-of-date pages.
Commit: 22d3fb182c9199ac3d51e5577c6647508a7a37f0
https://github.com/llvm/llvm-project/commit/22d3fb182c9199ac3d51e5577c6647508a7a37f0
Author: Mircea Trofin <mtrofin at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/test/Analysis/CtxProfAnalysis/full-cycle.ll
M llvm/test/Analysis/CtxProfAnalysis/load.ll
Log Message:
-----------
[ctx_prof] Profile flatterner (#104539)
Eventually we'll need to flatten the profile (at the end of all IPO) and lower to "vanilla" `MD_prof`. This is the first part of that.
Issue #89287
Commit: a6bae5cb37919bb0b855dd468d4982340a5740d2
https://github.com/llvm/llvm-project/commit/a6bae5cb37919bb0b855dd468d4982340a5740d2
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
A llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-any.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-disabled.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-enabled.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-any.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-disabled.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-enabled.ll
Log Message:
-----------
[AMDGPU] Split GCNSubtarget into its own file. NFC. (#105525)
Commit: 47e0212f00f707a4bb92714afe9c748116887d62
https://github.com/llvm/llvm-project/commit/47e0212f00f707a4bb92714afe9c748116887d62
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port a6bae5cb3791
Commit: c09fdac0b577ca0bfef141765d0a9ae1b6040893
https://github.com/llvm/llvm-project/commit/c09fdac0b577ca0bfef141765d0a9ae1b6040893
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/docs/GettingInvolved.rst
M llvm/docs/_static/LoopOptWG_invite.ics
Log Message:
-----------
[Docs] Update Loop Optimization WG call.
The WebEx link will become invalid soon, we are switching to Google
Meet. Also, changing the cadence from biweekly to monthly.
Commit: 6257a98b258a3f17b78af31bf43009a559c5dd1d
https://github.com/llvm/llvm-project/commit/6257a98b258a3f17b78af31bf43009a559c5dd1d
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/step/TestDAP_step.py
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Implement `StepGranularity` for "next" and "step-in" (#105464)
VS Code requests the `instruction` stepping granularity if the assembly
view is currently focused. By implementing `StepGranularity`, we can
hence properly single-step through assembly code.
Commit: 8b4d4bee2a45f637fb4dcda49b592374e93a6480
https://github.com/llvm/llvm-project/commit/8b4d4bee2a45f637fb4dcda49b592374e93a6480
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/unittests/ADT/StringRefTest.cpp
Log Message:
-----------
[NFC][ADT] Remove << operators from StringRefTest (#105500)
- Remove ostream << operators for StringRef and StringRef pair from
StringTest.
Both of these are natively supported by googletest framework.
Commit: 89c556cfda4de346774c9fe547da6af9121dfa97
https://github.com/llvm/llvm-project/commit/89c556cfda4de346774c9fe547da6af9121dfa97
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
Log Message:
-----------
[flang][OpenMP] Follow-up to build-breakage fix (#102028)
Adjust the handling of a few of the new clauses.
Commit: 6ec3130a38e6982a61e7fa74bd5223c95c0bb918
https://github.com/llvm/llvm-project/commit/6ec3130a38e6982a61e7fa74bd5223c95c0bb918
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/test/tools/llvm-cgdata/merge-archive.test
M llvm/test/tools/llvm-cgdata/merge-concat.test
M llvm/test/tools/llvm-cgdata/merge-double.test
M llvm/test/tools/llvm-cgdata/merge-single.test
Log Message:
-----------
[CGData] Fix tests for sed without using options (#105546)
This fixes a build issue for AIX --
https://github.com/llvm/llvm-project/pull/101461.
Commit: e31252bf54dedadfe78b36d07ea6084156faa38a
https://github.com/llvm/llvm-project/commit/e31252bf54dedadfe78b36d07ea6084156faa38a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/phi-nodes-as-operand-reorder.ll
Log Message:
-----------
[SLP]Fix PR105120: fix the order of phi nodes vectorization.
The operands of the phi nodes should be vectorized in the same order, in
which they were created, otherwise the compiler may crash when trying
to correctly build dependency for nodes with non-schedulable
instructions for gather/buildvector nodes.
Fixes https://github.com/llvm/llvm-project/issues/105120
Commit: b765fdd997be9ff0afb6de87077cd53d5f3d349c
https://github.com/llvm/llvm-project/commit/b765fdd997be9ff0afb6de87077cd53d5f3d349c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
Log Message:
-----------
[SLP]Try to keep scalars, used in phi nodes, if phi nodes from same block are vectorized.
Before doing the vectorization of the PHI nodes, the compiler sorts them
by the opcodes of the operands. If the scalar is replaced during the
vectorization by extractelement, it breaks this sorting and prevent some
further vectorization attempts. Patch tries to improve this by doing
extra analysis of the scalars and tries to keep them, if it is found that
this scalar is used in other (external) PHI node in the same block.
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/103923
Commit: 4b35624ce0ac5b487d39880e75b5d85f4d49eec0
https://github.com/llvm/llvm-project/commit/4b35624ce0ac5b487d39880e75b5d85f4d49eec0
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sve-fixed-length-int-abd.ll
A llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-abd.ll
Log Message:
-----------
[AArch64] Add SVE lowering of fixed-length UABD/SABD (#104991)
Commit: 716594da176b4cbc956e7c7ab90988db6f907686
https://github.com/llvm/llvm-project/commit/716594da176b4cbc956e7c7ab90988db6f907686
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Add ShuffleVectorInst (#104891)
This is missing tracking for `setShuffleMask`. I'll add it in a follow-up.
Commit: b03b170dd39799b4fb25ffe70b81d0cf0c7d7346
https://github.com/llvm/llvm-project/commit/b03b170dd39799b4fb25ffe70b81d0cf0c7d7346
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/ADT/StringExtras.h
M llvm/unittests/ADT/StringExtrasTest.cpp
Log Message:
-----------
[ADT] Add `isPunct` to StringExtras (#105461)
- Add `isPunct` to StringExtras.h.
- Add unit test for `isPunct` to StringExtrasTest.
Commit: 84fa7b438e1fba0c88b21784e716926017b9fe49
https://github.com/llvm/llvm-project/commit/84fa7b438e1fba0c88b21784e716926017b9fe49
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M libcxx/utils/synchronize_csv_status_files.py
Log Message:
-----------
[libc++] Improve the granularity of status tracking from Github issues
This enhances the Github - CSV synchronization script to understand
some of the idioms we use in the CSV status files, like |Nothing To Do|
and others.
Commit: cfd4c1805ead139f84a4465719c49cca53f07f27
https://github.com/llvm/llvm-project/commit/cfd4c1805ead139f84a4465719c49cca53f07f27
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M flang/include/flang/Optimizer/CodeGen/CGPasses.td
M flang/include/flang/Optimizer/CodeGen/CodeGen.h
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CLOptions.inc
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Support/InternalNames.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/CompilerGeneratedNames.cpp
M flang/lib/Semantics/runtime-type-info.cpp
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Fir/basic-program.fir
M flang/test/Fir/convert-to-llvm.fir
A flang/test/Fir/convert-type-desc-to-llvm.fir
M flang/test/Fir/polymorphic.fir
M flang/test/Fir/type-descriptor.fir
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/dense-array-any-rank.f90
Log Message:
-----------
[RFC][flang] Replace special symbols in uniqued global names. (#104859)
This change addresses more "issues" as the one resolved in #71338.
Some targets (e.g. NVPTX) do not accept global names containing
`.`. In particular, the global variables created to represent
the runtime information of derived types use `.` in their names.
A derived type's descriptor object may be used in the device code,
e.g. to initialize a descriptor of a variable of this type.
Thus, the runtime type info objects may need to be compiled
for the device.
Moreover, at least the derived types' descriptor objects
may need to be registered (think of `omp declare target`)
for the host-device association so that the addendum pointer
can be properly mapped to the device for descriptors using
a derived type's descriptor as their addendum pointer.
The registration implies knowing the name of the global variable
in the device image so that proper host code can be created.
So it is better to name the globals the same way for the host
and the device.
CompilerGeneratedNamesConversion pass renames all uniqued globals
such that the special symbols (currently `.`) are replaced
with `X`. The pass is supposed to be run for the host and the device.
An option is added to FIR-to-LLVM conversion pass to indicate
whether the new pass has been run before or not. This setting
affects how the codegen computes the names of the derived types'
descriptors for FIR derived types.
fir::NameUniquer now allows `X` to be part of a name, because
the name deconstruction may be applied to the mangled names
after CompilerGeneratedNamesConversion pass.
Commit: 30ca06c4d0d06f67f10a9e19d4333acc2074811b
https://github.com/llvm/llvm-project/commit/30ca06c4d0d06f67f10a9e19d4333acc2074811b
Author: John Harrison <harjohn at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
A lldb/test/API/tools/lldb-dap/output/Makefile
A lldb/test/API/tools/lldb-dap/output/TestDAP_output.py
A lldb/test/API/tools/lldb-dap/output/main.c
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/OutputRedirector.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] When sending a DAP Output Event break each message into separate lines. (#105456)
Previously, when output like `"hello\nworld\n"` was produced by lldb (or
the process) the message would be sent as a single Output event. By
being a single event this causes VS Code to treat this as a single
message in the console when handling displaying and filtering in the
Debug Console.
Instead, with these changes we send each line as its own event. This
results in VS Code representing each line of output from lldb-dap as an
individual output message.
Resolves #105444
Commit: 46c94bed5af48f3785c3370a9297ea29d7918cd5
https://github.com/llvm/llvm-project/commit/46c94bed5af48f3785c3370a9297ea29d7918cd5
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx23Issues.csv
Log Message:
-----------
[libc++] Mark LWG3404 as implemented
LWG3404 was implemented along with subrange.
Closes #104282
Commit: ab86fc74c04ff508f909b7b6131df1551dd833fc
https://github.com/llvm/llvm-project/commit/ab86fc74c04ff508f909b7b6131df1551dd833fc
Author: Jonas Rickert <Jonas.Rickert at amd.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M mlir/include/mlir/IR/MLIRContext.h
Log Message:
-----------
[mlir] Add nodiscard attribute to allowsUnregisteredDialects (#105530)
This getter can easily be confused with the similar named
allowUnregisteredDialects setter
Commit: f709cd5add0ea36bb14259e9716bd74e5c762128
https://github.com/llvm/llvm-project/commit/f709cd5add0ea36bb14259e9716bd74e5c762128
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
R clang/test/CodeGenCoroutines/coro-dwarf-O2.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroInternal.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/test/Transforms/Coroutines/coro-debug-O2.ll
Log Message:
-----------
Revert "[Coroutines] Salvage the debug information for coroutine frames within optimizations"
This reverts commit 522c253f47ea27d8eeb759e06f8749092b1de71e.
This series of commits causes Clang crashes. The reproducer is posted on
https://github.com/llvm/llvm-project/commit/08a0dece2b2431db8abe650bb43cba01e781e1ce.
Commit: dc12ccd13f98a3f3ec4af07e60f6fe1344965e17
https://github.com/llvm/llvm-project/commit/dc12ccd13f98a3f3ec4af07e60f6fe1344965e17
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
Log Message:
-----------
Revert "[Coroutines] Fix -Wunused-variable in CoroFrame.cpp (NFC)"
This reverts commit d48b807aa8abd1cbfe8ac5d1ba27b8b3617fc5e6.
This series of commits causes Clang crashes. The reproducer is posted on
https://github.com/llvm/llvm-project/commit/08a0dece2b2431db8abe650bb43cba01e781e1ce
Commit: 5c7ae42c526b21acf65ab4b017d0a5fd4ac654a1
https://github.com/llvm/llvm-project/commit/5c7ae42c526b21acf65ab4b017d0a5fd4ac654a1
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-debug-dbg.values.ll
M llvm/test/Transforms/Coroutines/coro-debug-frame-variable.ll
Log Message:
-----------
Revert "[Coroutines] [NFCI] Don't search the DILocalVariable for __promise when constructing the debug varaible for __coro_frame"
This reverts commit 08a0dece2b2431db8abe650bb43cba01e781e1ce.
This series of commits causes Clang crashes. The reproducer is posted on
https://github.com/llvm/llvm-project/commit/08a0dece2b2431db8abe650bb43cba01e781e1ce.
Commit: be7d08cd59b0f23eea88e791b2413b44301949d3
https://github.com/llvm/llvm-project/commit/be7d08cd59b0f23eea88e791b2413b44301949d3
Author: Volodymyr Vasylkun <vvmposeydon at gmail.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/add.ll
A llvm/test/Transforms/InstCombine/sext-a-lt-b-plus-zext-a-gt-b-to-uscmp.ll
Log Message:
-----------
[InstCombine] Fold `sext(A < B) + zext(A > B)` into `ucmp/scmp(A, B)` (#103833)
This change also covers the fold of `zext(A > B) - zext(A < B)` since it
is already being canonicalized into the aforementioned pattern.
Proof: https://alive2.llvm.org/ce/z/AgnfMn
Commit: aa4c6557a1281df627cdf06684bdb08da2707200
https://github.com/llvm/llvm-project/commit/aa4c6557a1281df627cdf06684bdb08da2707200
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Fix use-of-uninitialized in ShuffleVectorInst unit test. (#105592)
I accidentally created a dangling ArrayRef local variable. Use a
SmallVector instead.
Commit: 9ebe8b9abde02340494883d1ed1897ef5837473b
https://github.com/llvm/llvm-project/commit/9ebe8b9abde02340494883d1ed1897ef5837473b
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/utils/TableGen/TableGen.cpp
Log Message:
-----------
[NFC][TableGen] Change global variables from anonymous NS to static (#105504)
- Move global variables in TableGen.cpp out of anonymous namespace and
make them static, per LLVM coding standards.
Commit: b5ba726577f7e7af880b62a6352c6208bda4cd0b
https://github.com/llvm/llvm-project/commit/b5ba726577f7e7af880b62a6352c6208bda4cd0b
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxIR] Add tracking for `ShuffleVectorInst::setShuffleMask`. (#105590)
Commit: 6b98a723653214a6cde05ae3cb5233af328ff101
https://github.com/llvm/llvm-project/commit/6b98a723653214a6cde05ae3cb5233af328ff101
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M libc/config/gpu/entrypoints.txt
M libc/docs/gpu/support.rst
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/scanf_core/CMakeLists.txt
M libc/src/stdio/scanf_core/vfscanf_internal.h
Log Message:
-----------
[libc] Add `scanf` support to the GPU build (#104812)
Summary:
The `scanf` function has a "system file" configuration, which is pretty
much what the GPU implementation does at this point. So we should be
able to use it in much the same way.
Commit: c557d8520413476221a4f3bf2b7b3fed17681691
https://github.com/llvm/llvm-project/commit/c557d8520413476221a4f3bf2b7b3fed17681691
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M flang/runtime/numeric.cpp
Log Message:
-----------
[flang][runtime] Add build-time flags to runtime to adjust SELECTED_x_KIND() (#105575)
Add FLANG_RUNTIME_NO_INTEGER_16 and FLANG_RUNTIME_NO_REAL_{2,10,16} to
allow one to disable those kinds from being returned from
SELECTED_INT_KIND and SELECTED_REAL_KIND even if they are actually
available in the C++ build compiler.
Commit: ec8fe7ad81af6c211fb26c34824092e5bca08f5e
https://github.com/llvm/llvm-project/commit/ec8fe7ad81af6c211fb26c34824092e5bca08f5e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/FunctionImport.h
Log Message:
-----------
[LTO] Use enum class for ImportFailureReason (NFC) (#105564)
It turns out that all uses of the enum values here are already
qualified like FunctionImporter::ImportFailureReason::None, so we can
switch to enum class without touching the rest of the codebase.
Commit: fdbc4089e7a6eafa4002a7981bcde94fc378bc18
https://github.com/llvm/llvm-project/commit/fdbc4089e7a6eafa4002a7981bcde94fc378bc18
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionImport.cpp
Log Message:
-----------
[LTO] Compare std::optional<ImportKind> directly with ImportKind (NFC) (#105561)
Note that:
Opt == Val if and only (Opt && *Opt == Val)
where:
std::optional<T> Opt;
T Val;
Commit: 19d3f3417100dc99caa4394fbd26fc0c4702264e
https://github.com/llvm/llvm-project/commit/19d3f3417100dc99caa4394fbd26fc0c4702264e
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lldb/test/Shell/Unwind/trap_frame_sym_ctx.test
Log Message:
-----------
[lldb] Speculative fix for trap_frame_sym_ctx.test
Unfortunately I can't actually reproduce this locally.
Commit: 1e70122cbc187c08de91a3fb42843efb1221e0e9
https://github.com/llvm/llvm-project/commit/1e70122cbc187c08de91a3fb42843efb1221e0e9
Author: Mircea Trofin <mtrofin at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/unittests/Analysis/CtxProfAnalysisTest.cpp
Log Message:
-----------
[ctx_prof] API to get the instrumentation of a BB (#105468)
Analogous to PR #104491
Issue #89287
Commit: f25e6515aa04e53a642bc79eb09a96e418cbbb03
https://github.com/llvm/llvm-project/commit/f25e6515aa04e53a642bc79eb09a96e418cbbb03
Author: Connie Zhu <60797237+connieyzhu at users.noreply.github.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M compiler-rt/test/fuzzer/features_dir.test
Log Message:
-----------
[compiler-rt][test] Added REQUIRES:shell to fuzzer test with for-loop (#105557)
This patch makes the features_dir.test file require a shell when
running. This will make the test file unsupported when running llvm-lit
with its internal shell implementation, which is enabled by turning on
the LIT_USE_INTERNAL_SHELL environment variable. Lit's internal shell
currently does not support for-loop syntax.
Commit: 04c827d0b5e629ba53e8ede94811a13a96db36a4
https://github.com/llvm/llvm-project/commit/04c827d0b5e629ba53e8ede94811a13a96db36a4
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Simplify matchers in ShuffleVectorInst unit test (NFC) (#105596)
Replace instances of `testing::ContainerEq(ArrayRef<int>({1, 2, 3, 4}))`
with `testing::ElementsAre(1, 2, 3, 4)` which is simpler and more
readable.
Commit: 64e464349bfca0d90e07f6db2f710d4d53cdacd4
https://github.com/llvm/llvm-project/commit/64e464349bfca0d90e07f6db2f710d4d53cdacd4
Author: eddyz87 <eddyz87 at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/lib/CodeGen/CGCall.cpp
A clang/test/CodeGen/bpf-attr-bpf-fastcall-1.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
A clang/test/Sema/bpf-attr-bpf-fastcall.c
M llvm/lib/Target/BPF/BPFCallingConv.td
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/BPFMIPeephole.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.h
A llvm/test/CodeGen/BPF/bpf-fastcall-1.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-2.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-3.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-regmask-1.ll
Log Message:
-----------
[BPF] introduce __attribute__((bpf_fastcall)) (#105417)
This commit introduces attribute bpf_fastcall to declare BPF functions
that do not clobber some of the caller saved registers (R0-R5).
The idea is to generate the code complying with generic BPF ABI,
but allow compatible Linux Kernel to remove unnecessary spills and
fills of non-scratched registers (given some compiler assistance).
For such functions do register allocation as-if caller saved registers
are not clobbered, but later wrap the calls with spill and fill
patterns that are simple to recognize in kernel.
For example for the following C code:
#define __bpf_fastcall __attribute__((bpf_fastcall))
void bar(void) __bpf_fastcall;
void buz(long i, long j, long k);
void foo(long i, long j, long k) {
bar();
buz(i, j, k);
}
First allocate registers as if:
foo:
call bar # note: no spills for i,j,k (r1,r2,r3)
call buz
exit
And later insert spills fills on the peephole phase:
foo:
*(u64 *)(r10 - 8) = r1; # Such call pattern is
*(u64 *)(r10 - 16) = r2; # correct when used with
*(u64 *)(r10 - 24) = r3; # old kernels.
call bar
r3 = *(u64 *)(r10 - 24); # But also allows new
r2 = *(u64 *)(r10 - 16); # kernels to recognize the
r1 = *(u64 *)(r10 - 8); # pattern and remove spills/fills.
call buz
exit
The offsets for generated spills/fills are picked as minimal stack
offsets for the function. Allocated stack slots are not used for any
other purposes, in order to simplify in-kernel analysis.
Commit: e2b97f3802ac5a75a603c9cacd2f3ab19b6cf9b5
https://github.com/llvm/llvm-project/commit/e2b97f3802ac5a75a603c9cacd2f3ab19b6cf9b5
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/Darwin/cstring_section.c
Log Message:
-----------
Revert "Speculative fix for asan/TestCases/Darwin/cstring_section.c"
This fix is not enough, and the breaking patch was reverted with 2704b804bec50c2b016bf678bd534c330ec655b6.
This reverts commit bf71c64839c0082e761a4f070ed92e01ced0187c.
Commit: 359c704004ec0826059578c79974d9ea29a8fbff
https://github.com/llvm/llvm-project/commit/359c704004ec0826059578c79974d9ea29a8fbff
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/Transforms/Utils/Local.h
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/test/DebugInfo/Generic/mem2reg-promote-alloca-1.ll
A llvm/test/DebugInfo/sroa-handle-dbg-value.ll
M llvm/test/Transforms/SROA/alignment.ll
M llvm/test/Transforms/SROA/vector-promotion.ll
Log Message:
-----------
Handle #dbg_values in SROA. (#94070)
This patch properly handles #dbg_values in SROA by making sure that any
#dbg_values get moved to before a store just like #dbg_declares do, or
the #dbg_value is correctly updated with the right alloca after an
aggregate alloca is broken up.
The issue stems from swift where #dbg_values are emitted and not
dbg.declares, the SROA pass doesn't handle the #dbg_values correctly and
it causes them to all have undefs
If we look at this simple-ish testcase (This is all I could reduce it
down to, and I am still relatively bad at writing llvm IR by hand so I
apologize in advance):
```
%T4main1TV13TangentVectorV = type <{ %T4main1UV13TangentVectorV, [7 x i8], %T4main1UV13TangentVectorV }>
%T4main1UV13TangentVectorV = type <{ %T1M1SVySfG, [7 x i8], %T4main1VV13TangentVectorV }>
%T1M1SVySfG = type <{ ptr, %Ts4Int8V }>
%Ts4Int8V = type <{ i8 }>
%T4main1VV13TangentVectorV = type <{ %T1M1SVySfG }>
define hidden swiftcc void @"$s4main1TV13TangentVectorV1poiyA2E_AEtFZ"(ptr noalias nocapture sret(%T4main1TV13TangentVectorV) %0, ptr noalias nocapture dereferenceable(57) %1, ptr noalias nocapture dereferenceable(57) %2) #0 !dbg !44 {
entry:
%3 = alloca %T4main1VV13TangentVectorV
%4 = alloca %T4main1UV13TangentVectorV
%5 = alloca %T4main1VV13TangentVectorV
%6 = alloca %T4main1UV13TangentVectorV
%7 = alloca %T4main1VV13TangentVectorV
%8 = alloca %T4main1UV13TangentVectorV
%9 = alloca %T4main1VV13TangentVectorV
%10 = alloca %T4main1UV13TangentVectorV
call void @llvm.lifetime.start.p0(i64 9, ptr %3)
call void @llvm.lifetime.start.p0(i64 25, ptr %4)
call void @llvm.lifetime.start.p0(i64 9, ptr %5)
call void @llvm.lifetime.start.p0(i64 25, ptr %6)
call void @llvm.lifetime.start.p0(i64 9, ptr %7)
call void @llvm.lifetime.start.p0(i64 25, ptr %8)
call void @llvm.lifetime.start.p0(i64 9, ptr %9)
call void @llvm.lifetime.start.p0(i64 25, ptr %10)
%.u1 = getelementptr inbounds %T4main1TV13TangentVectorV, ptr %1, i32 0, i32 0
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %4, ptr align 8 %.u1, i64 25, i1 false)
%.u11 = getelementptr inbounds %T4main1TV13TangentVectorV, ptr %2, i32 0, i32 0
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %6, ptr align 8 %.u11, i64 25, i1 false)
call void @llvm.dbg.value(metadata ptr %4, metadata !62, metadata !DIExpression(DW_OP_deref)), !dbg !75
%.s = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %4, i32 0, i32 0
%.s.c = getelementptr inbounds %T1M1SVySfG, ptr %.s, i32 0, i32 0
%11 = load ptr, ptr %.s.c
%.s.b = getelementptr inbounds %T1M1SVySfG, ptr %.s, i32 0, i32 1
%.s.b._value = getelementptr inbounds %Ts4Int8V, ptr %.s.b, i32 0, i32 0
%12 = load i8, ptr %.s.b._value
%.s2 = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %6, i32 0, i32 0
%.s2.c = getelementptr inbounds %T1M1SVySfG, ptr %.s2, i32 0, i32 0
%13 = load ptr, ptr %.s2.c
%.s2.b = getelementptr inbounds %T1M1SVySfG, ptr %.s2, i32 0, i32 1
%.s2.b._value = getelementptr inbounds %Ts4Int8V, ptr %.s2.b, i32 0, i32 0
%14 = load i8, ptr %.s2.b._value
%.v = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %4, i32 0, i32 2
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %3, ptr align 8 %.v, i64 9, i1 false)
%.v3 = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %6, i32 0, i32 2
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %5, ptr align 8 %.v3, i64 9, i1 false)
%.s4 = getelementptr inbounds %T4main1VV13TangentVectorV, ptr %3, i32 0, i32 0
%.s4.c = getelementptr inbounds %T1M1SVySfG, ptr %.s4, i32 0, i32 0
%18 = load ptr, ptr %.s4.c
%.s5 = getelementptr inbounds %T4main1VV13TangentVectorV, ptr %5, i32 0, i32 0
%.s5.c = getelementptr inbounds %T1M1SVySfG, ptr %.s5, i32 0, i32 0
%20 = load ptr, ptr %.s5.c
%.u2 = getelementptr inbounds %T4main1TV13TangentVectorV, ptr %1, i32 0, i32 2
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %8, ptr align 8 %.u2, i64 25, i1 false)
%.u26 = getelementptr inbounds %T4main1TV13TangentVectorV, ptr %2, i32 0, i32 2
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %10, ptr align 8 %.u26, i64 25, i1 false)
%.s7 = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %8, i32 0, i32 0
%.s7.c = getelementptr inbounds %T1M1SVySfG, ptr %.s7, i32 0, i32 0
%25 = load ptr, ptr %.s7.c
%.s7.b = getelementptr inbounds %T1M1SVySfG, ptr %.s7, i32 0, i32 1
%.s7.b._value = getelementptr inbounds %Ts4Int8V, ptr %.s7.b, i32 0, i32 0
%26 = load i8, ptr %.s7.b._value
%.s8 = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %10, i32 0, i32 0
%.s8.c = getelementptr inbounds %T1M1SVySfG, ptr %.s8, i32 0, i32 0
%27 = load ptr, ptr %.s8.c
%.s8.b = getelementptr inbounds %T1M1SVySfG, ptr %.s8, i32 0, i32 1
%.s8.b._value = getelementptr inbounds %Ts4Int8V, ptr %.s8.b, i32 0, i32 0
%28 = load i8, ptr %.s8.b._value
%.v9 = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %8, i32 0, i32 2
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %7, ptr align 8 %.v9, i64 9, i1 false)
%.v10 = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %10, i32 0, i32 2
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %9, ptr align 8 %.v10, i64 9, i1 false)
%.s11 = getelementptr inbounds %T4main1VV13TangentVectorV, ptr %7, i32 0, i32 0
%.s11.c = getelementptr inbounds %T1M1SVySfG, ptr %.s11, i32 0, i32 0
%32 = load ptr, ptr %.s11.c
%.s12 = getelementptr inbounds %T4main1VV13TangentVectorV, ptr %9, i32 0, i32 0
%.s12.c = getelementptr inbounds %T1M1SVySfG, ptr %.s12, i32 0, i32 0
%34 = load ptr, ptr %.s12.c
call void @llvm.lifetime.end.p0(i64 25, ptr %10)
call void @llvm.lifetime.end.p0(i64 9, ptr %9)
call void @llvm.lifetime.end.p0(i64 25, ptr %8)
call void @llvm.lifetime.end.p0(i64 9, ptr %7)
call void @llvm.lifetime.end.p0(i64 25, ptr %6)
call void @llvm.lifetime.end.p0(i64 9, ptr %5)
call void @llvm.lifetime.end.p0(i64 25, ptr %4)
call void @llvm.lifetime.end.p0(i64 9, ptr %3)
ret void
}
!llvm.module.flags = !{!0, !1, !2, !3, !4, !6, !7, !8, !9, !10, !11, !12, !13, !14, !15}
!swift.module.flags = !{!33}
!llvm.linker.options = !{!34, !35, !36, !37, !38, !39, !40, !41, !42, !43}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 14, i32 4]}
!1 = !{i32 1, !"Objective-C Version", i32 2}
!2 = !{i32 1, !"Objective-C Image Info Version", i32 0}
!3 = !{i32 1, !"Objective-C Image Info Section", !"__DATA, no_dead_strip"}
!4 = !{i32 1, !"Objective-C Garbage Collection", i8 0}
!6 = !{i32 7, !"Dwarf Version", i32 4}
!7 = !{i32 2, !"Debug Info Version", i32 3}
!8 = !{i32 1, !"wchar_size", i32 4}
!9 = !{i32 8, !"PIC Level", i32 2}
!10 = !{i32 7, !"uwtable", i32 1}
!11 = !{i32 7, !"frame-pointer", i32 1}
!12 = !{i32 1, !"Swift Version", i32 7}
!13 = !{i32 1, !"Swift ABI Version", i32 7}
!14 = !{i32 1, !"Swift Major Version", i8 6}
!15 = !{i32 1, !"Swift Minor Version", i8 0}
!16 = distinct !DICompileUnit(language: DW_LANG_Swift, file: !17, imports: !18, sdk: "MacOSX14.4.sdk")
!17 = !DIFile(filename: "/Users/emilpedersen/swift2/swift/test/IRGen/debug_scope_distinct.swift", directory: "/Users/emilpedersen/swift2")
!18 = !{!19, !21, !23, !25, !27, !29, !31}
!19 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !17, entity: !20, file: !17)
!20 = !DIModule(scope: null, name: "main", includePath: "/Users/emilpedersen/swift2/swift/test/IRGen")
!21 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !17, entity: !22, file: !17)
!22 = !DIModule(scope: null, name: "Swift", includePath: "/Users/emilpedersen/swift2/_build/Ninja-RelWithDebInfoAssert+stdlib-RelWithDebInfo/swift-macosx-arm64/lib/swift/macosx/Swift.swiftmodule/arm64-apple-macos.swiftmodule")
!23 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !17, entity: !24, line: 60)
!24 = !DIModule(scope: null, name: "_Differentiation", includePath: "/Users/emilpedersen/swift2/_build/Ninja-RelWithDebInfoAssert+stdlib-RelWithDebInfo/swift-macosx-arm64/lib/swift/macosx/_Differentiation.swiftmodule/arm64-apple-macos.swiftmodule")
!25 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !17, entity: !26, line: 61)
!26 = !DIModule(scope: null, name: "M", includePath: "/Users/emilpedersen/swift2/_build/Ninja-RelWithDebInfoAssert+stdlib-RelWithDebInfo/swift-macosx-arm64/test-macosx-arm64/IRGen/Output/debug_scope_distinct.swift.tmp/M.swiftmodule")
!27 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !17, entity: !28, file: !17)
!28 = !DIModule(scope: null, name: "_StringProcessing", includePath: "/Users/emilpedersen/swift2/_build/Ninja-RelWithDebInfoAssert+stdlib-RelWithDebInfo/swift-macosx-arm64/lib/swift/macosx/_StringProcessing.swiftmodule/arm64-apple-macos.swiftmodule")
!29 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !17, entity: !30, file: !17)
!30 = !DIModule(scope: null, name: "_SwiftConcurrencyShims", includePath: "/Users/emilpedersen/swift2/_build/Ninja-RelWithDebInfoAssert+stdlib-RelWithDebInfo/swift-macosx-arm64/lib/swift/shims")
!31 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !17, entity: !32, file: !17)
!32 = !DIModule(scope: null, name: "_Concurrency", includePath: "/Users/emilpedersen/swift2/_build/Ninja-RelWithDebInfoAssert+stdlib-RelWithDebInfo/swift-macosx-arm64/lib/swift/macosx/_Concurrency.swiftmodule/arm64-apple-macos.swiftmodule")
!33 = !{i1 false}
!34 = !{!"-lswiftCore"}
!35 = !{!"-lswift_StringProcessing"}
!36 = !{!"-lswift_Differentiation"}
!37 = !{!"-lswiftDarwin"}
!38 = !{!"-lswift_Concurrency"}
!39 = !{!"-lswiftSwiftOnoneSupport"}
!40 = !{!"-lobjc"}
!41 = !{!"-lswiftCompatibilityConcurrency"}
!42 = !{!"-lswiftCompatibility56"}
!43 = !{!"-lswiftCompatibilityPacks"}
!44 = distinct !DISubprogram( unit: !16, declaration: !52, retainedNodes: !53)
!45 = !DIFile(filename: "<compiler-generated>", directory: "/")
!46 = !DICompositeType(tag: DW_TAG_structure_type, scope: !47, elements: !48, identifier: "$s4main1TV13TangentVectorVD")
!47 = !DICompositeType(tag: DW_TAG_structure_type, identifier: "$s4main1TVD")
!48 = !{}
!49 = !DISubroutineType(types: !50)
!50 = !{!51}
!51 = !DICompositeType(tag: DW_TAG_structure_type, identifier: "$s4main1TV13TangentVectorVXMtD")
!52 = !DISubprogram( file: !45, type: !49, spFlags: DISPFlagOptimized)
!53 = !{!54, !56, !57}
!54 = !DILocalVariable( scope: !44, type: !55, flags: DIFlagArtificial)
!55 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !46)
!56 = !DILocalVariable( scope: !44, flags: DIFlagArtificial)
!57 = !DILocalVariable( scope: !44, type: !58, flags: DIFlagArtificial)
!58 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !51)
!62 = !DILocalVariable( scope: !63, type: !72, flags: DIFlagArtificial)
!63 = distinct !DISubprogram( type: !66, unit: !16, declaration: !69, retainedNodes: !70)
!64 = !DICompositeType(tag: DW_TAG_structure_type, scope: !65, identifier: "$s4main1UV13TangentVectorVD")
!65 = !DICompositeType(tag: DW_TAG_structure_type, identifier: "$s4main1UVD")
!66 = !DISubroutineType(types: !67)
!67 = !{!68}
!68 = !DICompositeType(tag: DW_TAG_structure_type, identifier: "$s4main1UV13TangentVectorVXMtD")
!69 = !DISubprogram( spFlags: DISPFlagOptimized)
!70 = !{!71, !73}
!71 = !DILocalVariable( scope: !63, flags: DIFlagArtificial)
!72 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !64)
!73 = !DILocalVariable( scope: !63, type: !74, flags: DIFlagArtificial)
!74 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !68)
!75 = !DILocation( scope: !63, inlinedAt: !76)
!76 = distinct !DILocation( scope: !44)
```
if we run
` opt -S -passes=sroa file.ll -o -`
With this patch we will see
```
%.sroa.5.sroa.021 = alloca [7 x i8], align 8
tail call void @llvm.dbg.value(metadata ptr %.sroa.5.sroa.021, metadata !59, metadata !DIExpression(DW_OP_deref, DW_OP_LLVM_fragment, 72, 56)), !dbg !72
%.sroa.5.sroa.014 = alloca [7 x i8], align 8
```
Without this patch we will see:
```
%.sroa.5.sroa.021 = alloca [7 x i8], align 8
%.sroa.5.sroa.014 = alloca [7 x i8], align 8
```
Thus this patch ensures that llvm.dbg.values that use allocas that are broken up still have the correct metadata and debug information is preserved
This is part of a stack of patches and is preceded by: https://github.com/llvm/llvm-project/pull/94068
Commit: d23c24f336674727d281258157fc5b15ce9040a4
https://github.com/llvm/llvm-project/commit/d23c24f336674727d281258157fc5b15ce9040a4
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/test/Instrumentation/NumericalStabilitySanitizer/basic.ll
Log Message:
-----------
[llvm][nsan] Skip function declarations (#105598)
Skip function declarations in the instrumentation pass.
Commit: 2b66417d08d8e87f42cd154370ad1722ae7842c8
https://github.com/llvm/llvm-project/commit/2b66417d08d8e87f42cd154370ad1722ae7842c8
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M libc/src/stdio/scanf_core/CMakeLists.txt
Log Message:
-----------
[libc] Fix accidentally using system file on GPU
Summary:
Forgot to delete this
Commit: 8e0b9c85924ca22a65d57988ea2c5c22a5181ed9
https://github.com/llvm/llvm-project/commit/8e0b9c85924ca22a65d57988ea2c5c22a5181ed9
Author: John Harrison <harjohn at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lldb/test/API/tools/lldb-dap/output/TestDAP_output.py
Log Message:
-----------
[lldb-dap] Skip the lldb-dap output test on windows, it seems all the lldb-dap tests are disabled on windows. (#105604)
This should fix https://lab.llvm.org/buildbot/#/builders/141/builds/1747
Commit: 7854b16d2699ca7cc02d4ea066230d370c751ba9
https://github.com/llvm/llvm-project/commit/7854b16d2699ca7cc02d4ea066230d370c751ba9
Author: vporpo <vporpodas at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxIR] Implement FuncletPadInst, CatchPadInst and CleanupInst (#105294)
This patch implements sandboxir::FuncletPadInst,CatchInst,CleanupInst
mirroring their llvm:: counterparts.
Commit: 0ca77f6656a772624a591261957f6b313a0d544e
https://github.com/llvm/llvm-project/commit/0ca77f6656a772624a591261957f6b313a0d544e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/hypervisor-csr-names.s
M llvm/test/MC/RISCV/machine-csr-names.s
A llvm/test/MC/RISCV/smctr-ssctr-valid.s
M llvm/test/MC/RISCV/supervisor-csr-names.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add CSRs and an instruction for Smctr and Ssctr extensions. (#105148)
https://github.com/riscv/riscv-control-transfer-records/releases/tag/v1.0_rc3
Commit: 65f66d2c605f0c9b0af26244f4d42ca93f552ec8
https://github.com/llvm/llvm-project/commit/65f66d2c605f0c9b0af26244f4d42ca93f552ec8
Author: Ivan R. Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M flang/docs/OpenMP-declare-target.md
M flang/docs/OpenMP-descriptor-management.md
M flang/include/flang/Optimizer/CMakeLists.txt
A flang/include/flang/Optimizer/OpenMP/CMakeLists.txt
A flang/include/flang/Optimizer/OpenMP/Passes.h
A flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CLOptions.inc
M flang/lib/Frontend/CMakeLists.txt
M flang/lib/Optimizer/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/FunctionFiltering.cpp
A flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
A flang/lib/Optimizer/OpenMP/MarkDeclareTarget.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
R flang/lib/Optimizer/Transforms/OMPFunctionFiltering.cpp
R flang/lib/Optimizer/Transforms/OMPMapInfoFinalization.cpp
R flang/lib/Optimizer/Transforms/OMPMarkDeclareTarget.cpp
M flang/tools/bbc/CMakeLists.txt
M flang/tools/fir-opt/CMakeLists.txt
M flang/tools/fir-opt/fir-opt.cpp
M flang/tools/tco/CMakeLists.txt
Log Message:
-----------
[flang][NFC] Move OpenMP related passes into a separate directory (#104732)
Reapplied with fixed library dependencies for shared lib build
Commit: bf88db78bd80cb624b49510c628ba841fb1fed04
https://github.com/llvm/llvm-project/commit/bf88db78bd80cb624b49510c628ba841fb1fed04
Author: itrofimow <i.trofimow at yandex.ru>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/include/llvm/DebugInfo/Symbolize/Symbolize.h
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
Log Message:
-----------
[Symbolizer, DebugInfo] Clean up LLVMSymbolizer API: const string& -> StringRef (#104541)
Nothing in the affected code depends on the `ModuleName` being
null-terminated,
so take it by `StringRef` instead of `const std::string &`.
This change simplifies API consumption, since one doesn't always have a
`std::string` at the call site (might have `std::string_view` instead),
and also gives some minor performance improvements by removing
string-copies in the cache-hit path of `getOrCreateModuleInfo`.
Commit: c62fa63ff1a043dc62b88270680657483f307fae
https://github.com/llvm/llvm-project/commit/c62fa63ff1a043dc62b88270680657483f307fae
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Move mainPart to Ctx. NFC
Ctx was introduced in March 2022 as a more suitable place for such
singletons.
Commit: 796787d07c30cb9448e1f9ff3f3da06c2fc96ccd
https://github.com/llvm/llvm-project/commit/796787d07c30cb9448e1f9ff3f3da06c2fc96ccd
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
Log Message:
-----------
[ELF] Remove unneeded script->. NFC
Commit: 88636854b007affdbe324369b26c9ded66934b22
https://github.com/llvm/llvm-project/commit/88636854b007affdbe324369b26c9ded66934b22
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/sext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/zext.mir
Log Message:
-----------
[RISCV][GISel] Correct registers classes in vector sext/zext.mir tests. NFC
The liveins were always for an LMUL=1 register class even if the
first instruction used a larger regsister class.
One test in zext.mir used the wrong class for the first instruction.
Commit: 503907dc505db1e439e7061113bf84dd105f2e35
https://github.com/llvm/llvm-project/commit/503907dc505db1e439e7061113bf84dd105f2e35
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lld/ELF/LinkerScript.h
Log Message:
-----------
[ELF] LinkerScript: initialize dot. NFC
Ensure that `dot` is initialized even if `script` uses
default-initialization.
Commit: 4629aa17976b4110e6e94e7c92926c789730702e
https://github.com/llvm/llvm-project/commit/4629aa17976b4110e6e94e7c92926c789730702e
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
M lld/ELF/MapFile.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Move script into Ctx. NFC
Ctx was introduced in March 2022 as a more suitable place for such
singletons.
We now use default-initialization for `LinkerScript` and should pay
attention to non-class types (e.g. `dot` is initialized by commit
503907dc505db1e439e7061113bf84dd105f2e35).
Commit: f3bf46f5308a9684f4a5493268d6a96396130871
https://github.com/llvm/llvm-project/commit/f3bf46f5308a9684f4a5493268d6a96396130871
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/anyext.mir
Log Message:
-----------
[RISCV][GISel] Correct registers classes in vector anyext.mir test. NFC
Commit: 8039886e6d8985921802295dbc86401546120ac8
https://github.com/llvm/llvm-project/commit/8039886e6d8985921802295dbc86401546120ac8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/frame-index.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
Log Message:
-----------
AMDGPU: Handle folding frame indexes into s_add_i32 (#101694)
This does not yet enable producing direct frame index
references in s_add_i32, only the lowering.
Commit: ded6dd244cce3e683201a668ce321d4474baa8fb
https://github.com/llvm/llvm-project/commit/ded6dd244cce3e683201a668ce321d4474baa8fb
Author: h-vetinari <h.vetinari at gmx.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/docs/StandardCPlusPlusModules.rst
Log Message:
-----------
[clang][NFC] remove resolved issue from StandardCPlusPlusModules.rst (#105610)
This landed as https://github.com/llvm/llvm-project/pull/102287 for main
& https://github.com/llvm/llvm-project/pull/102561 for 19.x
CC @ChuanqiXu9
Commit: fde2d23ee2a204050a210f2f7b290643a272f737
https://github.com/llvm/llvm-project/commit/fde2d23ee2a204050a210f2f7b290643a272f737
Author: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenPGO.cpp
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M offload/DeviceRTL/CMakeLists.txt
A offload/DeviceRTL/include/Profiling.h
A offload/DeviceRTL/src/Profiling.cpp
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/plugins-nextgen/common/include/GlobalHandler.h
M offload/plugins-nextgen/common/src/GlobalHandler.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/test/CMakeLists.txt
M offload/test/lit.cfg
M offload/test/lit.site.cfg.in
A offload/test/offloading/pgo1.c
Log Message:
-----------
[PGO][OpenMP] Instrumentation for GPU devices (Revision of #76587) (#102691)
This pull request is a revised version of #76587. This pull request
fixes some build issues that were present in the previous version of
this change.
> This pull request is the first part of an ongoing effort to extends
PGO instrumentation to GPU device code. This PR makes the following
changes:
>
> - Adds blank registration functions to device RTL
> - Gives PGO globals protected visibility when targeting a supported
GPU
> - Handles any addrspace casts for PGO calls
> - Implements PGO global extraction in GPU plugins (currently only
dumps info)
>
> These changes can be tested by supplying `-fprofile-instrument=clang`
while targeting a GPU.
Commit: 410f751144e8b2e9574f03e0d0fb8560fe3cb797
https://github.com/llvm/llvm-project/commit/410f751144e8b2e9574f03e0d0fb8560fe3cb797
Author: serge-sans-paille <sergesanspaille at free.fr>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M flang/runtime/copy.cpp
Log Message:
-----------
[Flang][Runtime] Fix type used to store result of typeInfo::Value::Ge… (#105589)
…tValue
Current choice was only working out of accident on 64 bit machine, it
led to an implicit cast to smaller type on 32 bit machine. Use the exact
type instead.
Commit: 820396c3a874f57205bfe52cc82bcac3a0035b3d
https://github.com/llvm/llvm-project/commit/820396c3a874f57205bfe52cc82bcac3a0035b3d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
Log Message:
-----------
[Transforms] Construct SmallVector with iterator ranges (NFC) (#105607)
Commit: 0534c4f693d4643e71f7a02c7937b655fdcd9c82
https://github.com/llvm/llvm-project/commit/0534c4f693d4643e71f7a02c7937b655fdcd9c82
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/Darwin/cstring_section.c
Log Message:
-----------
[asan][Darwin] Simplify test (#105599)
Checking order of sections is not a goal of the test.
The goal is make sure there is only one "Hello"
string and it's in __asan_cstring.
Commit: 5f6172f0684b6a224d207ff8d093fc9aad92e331
https://github.com/llvm/llvm-project/commit/5f6172f0684b6a224d207ff8d093fc9aad92e331
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
A llvm/include/llvm/Transforms/Utils/ControlFlowUtils.h
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/ControlFlowUtils.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/Transforms/FixIrreducible/basic.ll
M llvm/test/Transforms/FixIrreducible/bug45623.ll
M llvm/test/Transforms/FixIrreducible/nested.ll
M llvm/test/Transforms/FixIrreducible/switch.ll
M llvm/test/Transforms/FixIrreducible/unreachable.ll
M llvm/test/Transforms/StructurizeCFG/workarounds/needs-unified-loop-exits.ll
M llvm/test/Transforms/UnifyLoopExits/integer_guards.ll
M llvm/test/Transforms/UnifyLoopExits/nested.ll
M llvm/test/Transforms/UnifyLoopExits/restore-ssa.ll
M llvm/test/Transforms/UnifyLoopExits/undef-phis.ll
Log Message:
-----------
[Transforms] Refactor CreateControlFlowHub (#103013)
CreateControlFlowHub is a method that redirects control flow edges from a set of
incoming blocks to a set of outgoing blocks through a new set of "guard" blocks.
This is now refactored into a separate file with one enhancement: The input to
the method is now a set of branches rather than two sets of blocks.
The original implementation reroutes every edge from incoming blocks to outgoing
blocks. But it is possible that for some incoming block InBB, some successor S
might be in the set of outgoing blocks, but that particular edge should not be
rerouted. The new implementation makes this possible by allowing the user to
specify the targets of each branch that need to be rerouted.
This is needed when improving the implementation of FixIrreducible #101386.
Current use in FixIrreducible does not demonstrate this finer control over the
edges being rerouted. But in UnifyLoopExits, when only one successor of an
exiting block is an exit block, this refinement now reroutes only the relevant
control-flow through the edge; the non-exit successor is not rerouted. This
results in fewer branches and PHI nodes in the hub.
Commit: b4feb26606de84ff53d9b65a3b79c00a2b4d7c22
https://github.com/llvm/llvm-project/commit/b4feb26606de84ff53d9b65a3b79c00a2b4d7c22
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-21 (Wed, 21 Aug 2024)
Changed paths:
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.cpp
M lld/ELF/Target.h
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Move target to Ctx. NFC
Ctx was introduced in March 2022 as a more suitable place for such
singletons.
Follow-up to driver (2022-10) and script (2024-08).
Commit: 67d3ef74b31e1517d4f679e754cc2b3041c95901
https://github.com/llvm/llvm-project/commit/67d3ef74b31e1517d4f679e754cc2b3041c95901
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCCodeEmitter.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVRegisterInfo.td
M llvm/lib/Target/SPIRV/SPIRVSubtarget.h
M llvm/test/CodeGen/SPIRV/constant/global-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-aggregate-constant.ll
M llvm/test/CodeGen/SPIRV/constant/local-bool-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-float-point-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-integers-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-null-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-vector-matrix-constants.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_arbitrary_precision_integers.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_cache_controls/decorate-prefetch-w-cache-controls.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_two_calls.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_global_variable_fpga_decorations/global-var-decorations.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_global_variable_host_access/global-var-host-access.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_inline_assembly/inline_asm.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_optnone.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/builtin-op-wrappers.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_variable_length_array/builtin_alloca.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_variable_length_array/vararr.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_variable_length_array/vararr_spec_const.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_no_integer_wrap_decoration.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_shader_clock/shader_clock.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_subgroup_rotate/subgroup-rotate.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_uniform_group_instructions/uniform-group-instructions.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions-but-one.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions.ll
M llvm/test/CodeGen/SPIRV/function/alloca-load-store.ll
M llvm/test/CodeGen/SPIRV/function/identity-function.ll
M llvm/test/CodeGen/SPIRV/function/multiple-anonymous-functions.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-definition.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-with-attributes.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-with-call.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_DispatchThreadID.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveGetLaneIndex.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/abs.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/acos.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/atan.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/ceil.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cos.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cosh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/exp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/exp2.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/floor.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmad.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/frac.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/lerp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log10.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log2.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/pow.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/rcp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reversebits.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/round.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/rsqrt.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sinh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/smax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/smin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sqrt.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/tan.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/tanh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/trunc.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/umax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/umin.ll
M llvm/test/CodeGen/SPIRV/image/sampler.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic-ptr.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic_acqrel.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic_seq.ll
M llvm/test/CodeGen/SPIRV/instructions/call-complex-function.ll
M llvm/test/CodeGen/SPIRV/instructions/call-trivial-function.ll
M llvm/test/CodeGen/SPIRV/instructions/fcmp.ll
M llvm/test/CodeGen/SPIRV/instructions/float-casts.ll
M llvm/test/CodeGen/SPIRV/instructions/float-fast-flags.ll
M llvm/test/CodeGen/SPIRV/instructions/icmp.ll
M llvm/test/CodeGen/SPIRV/instructions/intrinsics.ll
M llvm/test/CodeGen/SPIRV/instructions/nested-composites.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-bitwise-operations.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-floating-point-arithmetic.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-integer-arithmetic.ll
M llvm/test/CodeGen/SPIRV/instructions/select-ptr-load.ll
M llvm/test/CodeGen/SPIRV/instructions/select.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-nested-composite-store.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-simple-composite-store.ll
M llvm/test/CodeGen/SPIRV/instructions/unreachable.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-bitwise-operations.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-floating-point-arithmetic.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-integer-arithmetic.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/abs.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/assume.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bswap.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ceil.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctlz.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctpop.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/cttz.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fabs.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-intrinsics.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/invariant.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/lifetime.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/add.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/and.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fadd.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmax.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmaximum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmin.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fminimum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmul.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/mul.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/or.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/smax.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/smin.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/umax.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/umin.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/xor.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/maxnum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/nearbyint.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ptr-annotation.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/satur-arith.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/sqrt.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/umul.with.overflow.ll
M llvm/test/CodeGen/SPIRV/pointers/argument-ptr-to-struct.ll
M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-accesschain.ll
M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-load.ll
M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-store.ll
M llvm/test/CodeGen/SPIRV/pointers/complex.ll
M llvm/test/CodeGen/SPIRV/pointers/custom-kernel-arg-type.ll
M llvm/test/CodeGen/SPIRV/pointers/duplicate-type-ptr-def.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-addressspace.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-base-type.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-bitcast-load.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-kernel-arg-char.ll
M llvm/test/CodeGen/SPIRV/pointers/global-ptrtoint.ll
M llvm/test/CodeGen/SPIRV/pointers/global-zeroinitializer.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-builtin-vload-type-discrapency.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-addressspace.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type-deduction-no-bitcast-to-generic.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type-deduction-no-metadata.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-ptr-i8-default-element-type.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-ptr-no-bitcast.ll
M llvm/test/CodeGen/SPIRV/pointers/load-addressspace.ll
M llvm/test/CodeGen/SPIRV/pointers/nested-struct-opaque-pointers.ll
M llvm/test/CodeGen/SPIRV/pointers/ptr-argument-byref.ll
M llvm/test/CodeGen/SPIRV/pointers/ptr-argument-byval.ll
M llvm/test/CodeGen/SPIRV/pointers/store-kernel-arg-i8-ptr-as-value-operand.ll
M llvm/test/CodeGen/SPIRV/pointers/store-kernel-arg-ptr-as-value-operand.ll
M llvm/test/CodeGen/SPIRV/pointers/store-operand-ptr-to-struct.ll
M llvm/test/CodeGen/SPIRV/pointers/struct-opaque-pointers.ll
M llvm/test/CodeGen/SPIRV/pointers/two-bitcast-or-param-users.ll
M llvm/test/CodeGen/SPIRV/pointers/two-subsequent-bitcasts.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-args-rev.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-args.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call-chain.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call-complex.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call-rev.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-call-no-bitcast.ll
M llvm/test/CodeGen/SPIRV/pointers/typeof-ptr-int.ll
M llvm/test/CodeGen/SPIRV/pointers/variables-storage-class.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_ballot.ll
Log Message:
-----------
[SPIR-V] Rework usage of virtual registers' types and classes (#104104)
This PR continues https://github.com/llvm/llvm-project/pull/101732
changes in virtual register processing aimed to improve correctness of
emitted MIR between passes from the perspective of MachineVerifier.
Namely, the following changes are introduced:
* register classes (lib/Target/SPIRV/SPIRVRegisterInfo.td) and
instruction patterns (lib/Target/SPIRV/SPIRVInstrInfo.td) are corrected
and simplified (by removing unnecessary sophisticated options) -- e.g.,
this PR gets rid of duplicating 32/64 bits patterns, removes ANYID
register class and simplifies definition of the rest of register
classes,
* hardcoded LLT scalar types in passes before instruction selection are
corrected -- the goal is to have correct bit width before instruction
selection, and use 64 bits registers for pattern matching in the
instruction selection pass; 32-bit registers remain where they are
described in such terms by SPIR-V specification (like, for example,
creation of virtual registers for scope/mem semantics operands),
* rework virtual register type/class assignment for calls/builtins
lowering,
* a series of minor changes to fix validity of emitted code between
passes:
- ensure that that bitcast changes the type,
- fix the pattern for instruction selection for OpExtInst,
- simplify inline asm operands usage,
- account for arbitrary integer sizes / update legalizer rules;
* add '-verify-machineinstrs' to existed test cases.
See also https://github.com/llvm/llvm-project/issues/88129 that this PR
may resolve.
This PR fixes a great number of issues reported by MachineVerifier and,
as a result, reduces a number of failed test cases for the mode with
expensive checks set on from ~200 to ~57.
Commit: de2b6cb6ab6472a13c68ddcd963aa2f25e298772
https://github.com/llvm/llvm-project/commit/de2b6cb6ab6472a13c68ddcd963aa2f25e298772
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/select-cmp.ll
Log Message:
-----------
[InstCombine] Fold icmp over select of cmp more aggressively (#105536)
When folding an icmp into a select, treat an icmp of a constant with a
one-use ucmp/scmp intrinsic as a simplification. These comparisons will
reduce down to an icmp.
This addresses a regression seen in Rust and also in llvm-opt-benchmark.
Commit: e3389365b5d62bc9781dc9a23b14d72e333018d7
https://github.com/llvm/llvm-project/commit/e3389365b5d62bc9781dc9a23b14d72e333018d7
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M compiler-rt/lib/CMakeLists.txt
Log Message:
-----------
Build SanitizerCommon if ctx_profile enabled (#105495)
ctx_profile has a dependency on SanitizerCommon, so make sure it is
built even if we otherwise disable sanitizers.
Commit: c79d1fa540390f6e37e1ea326153559eeadd0de6
https://github.com/llvm/llvm-project/commit/c79d1fa540390f6e37e1ea326153559eeadd0de6
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/literals.cpp
Log Message:
-----------
[clang][bytecode] Don't discard all void-typed expressions (#105625)
For void-types InitListExprs, we need to diagnose them as invalid. But
only if we are _not_ discarding.
Commit: fab515ca7f3c64b47dd94a92156a4696771ee22a
https://github.com/llvm/llvm-project/commit/fab515ca7f3c64b47dd94a92156a4696771ee22a
Author: Andrei Safronov <safronov at espressif.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.h
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperators.td
A llvm/test/CodeGen/Xtensa/bswap.ll
A llvm/test/CodeGen/Xtensa/ctlz-cttz-ctpop.ll
A llvm/test/CodeGen/Xtensa/div.ll
A llvm/test/CodeGen/Xtensa/mul.ll
A llvm/test/CodeGen/Xtensa/rotl-rotr.ll
A llvm/test/CodeGen/Xtensa/shift.ll
Log Message:
-----------
[Xtensa] Implement lowering Mul/Div/Shift operations. (#99981)
Implement lowering of the Mul/Div operations and also shift parts
operations. Implement lowering of the bit manipulations, like
ROT/SWAP/CTPOP/CTTZ/CTLZ.
Commit: c368a720a0b40bb8fe4aff3971fe9a7009c85aa6
https://github.com/llvm/llvm-project/commit/c368a720a0b40bb8fe4aff3971fe9a7009c85aa6
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
Log Message:
-----------
[clang] Merge lifetimebound and GSL code paths for lifetime analysis (#104906)
In the current lifetime analysis, we have two parallel code paths: one
for lifetimebound and another for GSL. These paths perform the same
logic, both determining whether to continue visiting subexpressions.
This PR merges the two paths into a single code path. As a result, we'll
reduce the overhead by eliminating a redundant visit to subexpressions.
The change is mostly NFC (No Functional Change). The only notable
difference is that when a subexpression is visited due to either
lifetimebound or GSL, we will prioritize the lifetimebound path. This
means the final diagnostic will be -Wdangling (rather than both
`-Wdangling` and `-Wdangling-gsl`)
This might cause a slight change in behavior if the -Wdangling
diagnostic is disabled, but I think this is not a major concern since
both diagnostics are enabled by default.
Fixes #93386
Commit: b4ac5c4b7cefae442fc8365586ff9d2d324380a8
https://github.com/llvm/llvm-project/commit/b4ac5c4b7cefae442fc8365586ff9d2d324380a8
Author: Christian Sigg <csigg at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
R mlir/test/Integration/GPU/CUDA/sm90/asd
Log Message:
-----------
[mlir][cuda] NFC: Remove accidentally committed 'asd' file. (#105491)
Co-authored-by: Christian Sigg <chsigg at users.noreply.github.com>
Commit: 1b664fe2548d4cd5ce7a495cde4a86b5531af123
https://github.com/llvm/llvm-project/commit/1b664fe2548d4cd5ce7a495cde4a86b5531af123
Author: Dhruv Srivastava <dhruv.srivastava at ibm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M lldb/include/lldb/lldb-private-enumerations.h
M lldb/source/Utility/ArchSpec.cpp
Log Message:
-----------
[lldb][AIX] Updating XCOFF,PPC entry in LLDB ArchSpec (#105523)
This PR is in reference to porting LLDB on AIX.
Link to discussions on llvm discourse and github:
1. https://discourse.llvm.org/t/port-lldb-to-ibm-aix/80640
2. #101657
The complete changes for porting are present in this draft PR:
#102601
The changes in this PR are intended to update the Architecture entry for
LLDB with XCOFF,PPC.
1. Added new ArchitectureType `eArchTypeXCOFF`
2. Added a new `ArchDefinitionEntry g_xcoff_arch_entries[]`
3. Added a new case for `XCOFF in ArchSpec::SetArchitecture(..)`
4. Updated `ArchDefinition *g_arch_definitions[]`
Commit: 1e44e7afd799f582171a79355ce353fde134e806
https://github.com/llvm/llvm-project/commit/1e44e7afd799f582171a79355ce353fde134e806
Author: Daniel Cederman <cederman at gaisler.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
A clang/test/Driver/sparc-fix.c
Log Message:
-----------
[Sparc] Add flags to enable errata workaround pass for GR712RC and UT700 (#104742)
This adds the flags -mfix-gr712rc and -mfix-ut700 which enables the
necessary errata workarounds for the GR712RC and UT700 processors. The
functionality enabled by the flags is the same as the functionality
provided by the corresponding GCC flags.
Commit: 00a1a45a7dcdcd8b1f969958a6d927b595567090
https://github.com/llvm/llvm-project/commit/00a1a45a7dcdcd8b1f969958a6d927b595567090
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Target/LLVMIR/llvmir-phi-loc.mlir
Log Message:
-----------
[mlir][llvmir][debug] Correctly generate location for phi nodes. (#105534)
In
[convertBlockImpl](https://github.com/llvm/llvm-project/blob/87eeed1f0ebe57abffde560c25dd9829dc6038f3/mlir/lib/Target/LLVMIR/ModuleTranslation.cpp#L959),
the debug location is set on the builder before the op is processed.
This results in correct location being given to corresponding llvm
instructions. But same is not done when phi nodes are created a few
lines above. This result is phi nodes getting whatever the current debug
location of the builder is. It can be nothing or in worst case a stale
location. Fixed by calling SetCurrentDebugLocation before generating phi
nodes.
Commit: 14c7e4a1844904f3db9b2dc93b722925a8c66b27
https://github.com/llvm/llvm-project/commit/14c7e4a1844904f3db9b2dc93b722925a8c66b27
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/CMakeLists.txt
M llvm/cmake/config-ix.cmake
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/Support/float128.h
M llvm/lib/Analysis/CMakeLists.txt
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Support/APFloat.cpp
Log Message:
-----------
Enable logf128 constant folding for hosts with 128bit long double (#104929)
This is a reland of (#96287). This patch attempts to reduce the reverted
patch's clang compile time by removing #includes of float128.h and
inlining convertToQuad functions instead.
Commit: 15e915a44f0d0bf092214586d3ec86e2bb7636d7
https://github.com/llvm/llvm-project/commit/15e915a44f0d0bf092214586d3ec86e2bb7636d7
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M mlir/include/mlir/Analysis/DataFlow/ConstantPropagationAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/DenseAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/IntegerRangeAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/LivenessAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/SparseAnalysis.h
M mlir/lib/Analysis/DataFlow/ConstantPropagationAnalysis.cpp
M mlir/lib/Analysis/DataFlow/DenseAnalysis.cpp
M mlir/lib/Analysis/DataFlow/IntegerRangeAnalysis.cpp
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/lib/Analysis/DataFlow/SparseAnalysis.cpp
A mlir/test/Analysis/DataFlow/test-last-modified-error.mlir
M mlir/test/lib/Analysis/DataFlow/TestDenseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseDataFlowAnalysis.h
M mlir/test/lib/Analysis/DataFlow/TestDenseForwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestSparseBackwardDataFlowAnalysis.cpp
Log Message:
-----------
[mlir][dataflow] Propagate errors from `visitOperation` (#105448)
Base `DataFlowAnalysis::visit` returns `LogicalResult`, but wrappers's
Sparse/Dense/Forward/Backward `visitOperation` doesn't.
Sometimes it's needed to abort solver early if some unrecoverable
condition detected inside analysis.
Update `visitOperation` to return `LogicalResult` and propagate it to
`solver.initializeAndRun()`. Only `visitOperation` is updated for now,
it's possible to update other hooks like `visitNonControlFlowArguments`,
bit it's not needed immediately and let's keep this PR small.
Hijacked `UnderlyingValueAnalysis` test analysis to test it.
Commit: 378daa6c6fd10d3704be449f2fe9c55df522a6e9
https://github.com/llvm/llvm-project/commit/378daa6c6fd10d3704be449f2fe9c55df522a6e9
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
A llvm/test/Transforms/MemCpyOpt/pr102994.ll
Log Message:
-----------
[MemCpyOpt] Avoid infinite loops in `MemCpyOptPass::processMemCpyMemCpyDependence` (#103218)
Closes https://github.com/llvm/llvm-project/issues/102994.
Commit: ccb2b79655217587accfa592c575f9b7267308b9
https://github.com/llvm/llvm-project/commit/ccb2b79655217587accfa592c575f9b7267308b9
Author: Matt Devereau <matthew.devereau at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/test/Transforms/InstSimplify/ConstProp/logf128.ll
Log Message:
-----------
Fix logf128 tests to allow negative NaNs from (#104929)
Commit: 9ff0468436c957fadcd8926683696a879cbc78a0
https://github.com/llvm/llvm-project/commit/9ff0468436c957fadcd8926683696a879cbc78a0
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
A libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/implicit_ctad.compile.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/implicit_ctad.pass.cpp
A libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/mutex.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/copy_assign.compile.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/copy_ctor.compile.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/default.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/move_assign.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/move_ctor.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_adopt_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_defer_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_duration.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_time_point.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_try_to_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/try_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/try_lock_for.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/try_lock_until.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/unlock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.mod/member_swap.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.mod/nonmember_swap.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.mod/release.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.obs/mutex.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.obs/op_bool.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.obs/owns_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/types.compile.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/types.h
A libcxx/test/support/checking_mutex.h
Log Message:
-----------
[libc++] Refactor the std::unique_lock tests (#102151)
This makes some of the tests not flaky anymore, updates some tests to
also work in C++03 and modernizes them in general.
Commit: 716f7e2d18d03039c13ad90d5b3cb4f65c413b74
https://github.com/llvm/llvm-project/commit/716f7e2d18d03039c13ad90d5b3cb4f65c413b74
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
A llvm/test/Transforms/SimplifyCFG/switch-on-cmp.ll
Log Message:
-----------
[SimplifyCFG] Add tests for switch over cmp intrinsic (NFC)
Commit: 57dc09341e5eef758b1abce78822c51069157869
https://github.com/llvm/llvm-project/commit/57dc09341e5eef758b1abce78822c51069157869
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M cross-project-tests/debuginfo-tests/dexter/dex/utils/Version.py
Log Message:
-----------
[Dexter] Sanitize user details from git repo URL in dexter --version (#105533)
Currently the output of dexter --version contains the raw output of `git
remote get-url origin`, which may contain a username and password. This
patch adds a small change to remove these from the output string. A
similar patch for LLVM's default version string* also removes the git
URL altogether unless opted-in to; it's not clear whether this is a
necessary or desirable step yet, but if so we can trivially remove the
URL from Dexter as well.
*PR here: https://github.com/llvm/llvm-project/pull/105220
Commit: 51ca2354d0a4083b9219df131ceff98bccb622b4
https://github.com/llvm/llvm-project/commit/51ca2354d0a4083b9219df131ceff98bccb622b4
Author: Martin Storsjö <martin at martin.st>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/docs/TestingGuide.rst
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/tests/Inputs/shtest-define/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-define/value-escaped.txt
Log Message:
-----------
[lit] Fix substitutions containing backslashes (#103042)
Substitutions can be added in a couple different ways; they can be added
via the calling python scripts by adding entries to the
config.substitutions dictionary, or via DEFINE lines in the scripts
themselves.
The substitution strings passed to Python's re classes are interpreted
so that backslashes expand to escape sequences, and literal backslashes
need to be escaped.
On Unix, the script defined substitutions don't (usually, so far)
contain backslashes - but on Windows, they often do, due to paths
containing backslashes. This lead to a Windows specific escaping of
backslashes before doing Python re substitutions - since
7c9eab8fef0ed79a5911d21eb97b6b0fa9d39f82. There's nothing inherently
Windows specific about this though - any intended literal backslashes in
the substitution strings need to be escaped; this is how the Python re
API works.
The DEFINE lines were added later, and in order to cope with
backslashes, escaping of backslashes was added in the SubstDirective
class in TestRunner, applying to DEFINE lines in the tests only.
The fact that the escaping right before passing to the Python re API was
done conditionally on Windows led to two inconsistencies:
- DEFINE lines in the tests that contain backslashes got double
backslashes on Windows. (This was visible as a FIXME in
llvm/utils/lit/tests/Inputs/shtest-define/value-escaped.txt.)
- Script provided substitutions containing backslashes did not work on
Unix, but they did work on Windows.
By removing the escaping from SubstDirective and escaping it
unconditionally in the processLine function, before feeding the
substitutions to Python's re classes, we should have consistent
behaviour across platforms, and get rid of the FIXME in the lit test.
This fixes issues with substitutions containing backslashes on Unix
platforms, as encountered in PR #86649.
Commit: f67388232384682fb442d6e5501d9259c41fd714
https://github.com/llvm/llvm-project/commit/f67388232384682fb442d6e5501d9259c41fd714
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/ctlz-codesize.ll
M llvm/test/Analysis/CostModel/X86/ctlz-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/ctlz.ll
M llvm/test/Analysis/CostModel/X86/cttz-codesize.ll
M llvm/test/Analysis/CostModel/X86/cttz-sizelatency.ll
M llvm/test/CodeGen/X86/atomic-bit-test.ll
M llvm/test/CodeGen/X86/bit_ceil.ll
M llvm/test/CodeGen/X86/combine-or.ll
M llvm/test/CodeGen/X86/ctlo.ll
M llvm/test/CodeGen/X86/ctlz.ll
M llvm/test/CodeGen/X86/cttz.ll
M llvm/test/CodeGen/X86/known-never-zero.ll
M llvm/test/CodeGen/X86/lzcnt-cmp.ll
M llvm/test/CodeGen/X86/pr57673.ll
M llvm/test/CodeGen/X86/pr89877.ll
M llvm/test/CodeGen/X86/pr92569.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cttz-ctlz.ll
M llvm/test/Transforms/SLPVectorizer/X86/ctlz.ll
Log Message:
-----------
[X86] Allow speculative BSR/BSF instructions on targets with CMOV (#102885)
Currently targets without LZCNT/TZCNT won't speculate with BSR/BSF instructions in case they have a zero value input, meaning we always insert a test+branch for the zero-input case.
This patch proposes we allow speculation if the target has CMOV, and perform a branchless select instead to handle the zero input case. This will predominately help x86-64 targets where we haven't set any particular cpu target. We already always perform BSR/BSF instructions if we were lowering a CTLZ/CTTZ_ZERO_UNDEF instruction.
Commit: c46b41aaa6eaa787f808738d14c61a2f8b6d839f
https://github.com/llvm/llvm-project/commit/c46b41aaa6eaa787f808738d14c61a2f8b6d839f
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/test/Transforms/LoadStoreVectorizer/AArch64/pr37865.ll
Log Message:
-----------
LSV: forbid load-cycles when vectorizing; fix bug (#104815)
Forbid load-load cycles which would crash LoadStoreVectorizer when
reordering instructions.
Fixes #37865.
Commit: 93a9406af52a190ed37270839678b98f2e86a739
https://github.com/llvm/llvm-project/commit/93a9406af52a190ed37270839678b98f2e86a739
Author: David Green <david.green at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/rem.ll
Log Message:
-----------
[AArch64] Add GISel srem/urem tests of various sizes. NFC
Commit: 02cb7c9ef5aecea3a820bc98b50adf4d7c4c5eb6
https://github.com/llvm/llvm-project/commit/02cb7c9ef5aecea3a820bc98b50adf4d7c4c5eb6
Author: David Green <david.green at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/rem.ll
Log Message:
-----------
[AArch64][GlobalISel] Libcall i128 srem/urem and scalarize more vector types.
This better handles i128 scalar and vector types, and allows some of the other
odd-sized-vectors to successfully lower under GISel.
Commit: 61194617ad7862f144e0f6db34175553e8c34763
https://github.com/llvm/llvm-project/commit/61194617ad7862f144e0f6db34175553e8c34763
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/waitcnt-vmcnt-loop.mir
Log Message:
-----------
[AMDGPU] Add GFX12 test coverage for vmcnt flushing in loop headers (#105548)
Commit: 5506831f7bc8dc04ebe77f4d26940007bfb4ab39
https://github.com/llvm/llvm-project/commit/5506831f7bc8dc04ebe77f4d26940007bfb4ab39
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-vmcnt-loop.mir
Log Message:
-----------
[AMDGPU] GFX12 VMEM loads can write VGPR results out of order (#105549)
Fix SIInsertWaitcnts to account for this by adding extra waits to avoid
WAW dependencies.
Commit: 5bbd5984306ab0bdd89a2e81cd4965e5ae51c3fb
https://github.com/llvm/llvm-project/commit/5bbd5984306ab0bdd89a2e81cd4965e5ae51c3fb
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/cmake/modules/Findzstd.cmake
Log Message:
-----------
[cmake] Include GNUInstallDirs before using variables defined by it. (#83807)
This fixes an odd problem with the regex when `CMAKE_INSTALL_LIBDIR` is
not defined:
`string sub-command REGEX, mode REPLACE: regex "$" matched an empty
string.`
Fixes llvm/llvm-project#83802
Commit: 743e70bb7578276ac331c534547ef0d65600a8c1
https://github.com/llvm/llvm-project/commit/743e70bb7578276ac331c534547ef0d65600a8c1
Author: Matt Davis <mattd at nvidia.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/include/llvm/IR/DebugProgramInstruction.h
Log Message:
-----------
[DebugInfo][NFC] Constify debug DbgVariableRecord::{isDbgValue,isDbgDeclare} (#105570)
Constify debug DbgVariableRecord::{isDbgValue,isDbgDeclare}.
Commit: 7323e7eee3a819e9a2d8ec29f00d362bcad87731
https://github.com/llvm/llvm-project/commit/7323e7eee3a819e9a2d8ec29f00d362bcad87731
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M lldb/bindings/python/python-wrapper.swig
Log Message:
-----------
Revert "[lldb][swig] Use the correct variable in the return statement"
This reverts commit 65281570afd7e35e01533b07c6c2937de410fc52.
I'm reverting https://github.com/llvm/llvm-project/pull/104523
(https://github.com/llvm/llvm-project/commit/f01f80ce6ca7640bb0e267b84b1ed0e89b57e2d9)
and this fixup belongs to the same series of changes.
Commit: aa70f83e660453c006193aab7ba67c94db236948
https://github.com/llvm/llvm-project/commit/aa70f83e660453c006193aab7ba67c94db236948
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
R lldb/test/API/tools/lldb-dap/stackTrace/subtleFrames/Makefile
R lldb/test/API/tools/lldb-dap/stackTrace/subtleFrames/TestDAP_subtleFrames.py
R lldb/test/API/tools/lldb-dap/stackTrace/subtleFrames/main.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
Log Message:
-----------
Revert "[lldb-dap] Mark hidden frames as "subtle" (#105457)"
This reverts commit 6f456024c37424d9c8cc1cea07126a28f246588d, which
depends on https://github.com/llvm/llvm-project/pull/104523, which I'm
reverting.
Commit: 547917aebd1e79a8929b53f0ddf3b5185ee4df74
https://github.com/llvm/llvm-project/commit/547917aebd1e79a8929b53f0ddf3b5185ee4df74
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M lldb/bindings/python/python-wrapper.swig
M lldb/include/lldb/API/SBFrame.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/include/lldb/Target/StackFrameList.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/Target/Thread.h
M lldb/source/API/SBFrame.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/Commands/CommandCompletions.cpp
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/StackFrameList.cpp
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStepOut.cpp
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/commands/frame/recognizer/main.m
M lldb/test/API/commands/frame/recognizer/recognizer.py
R lldb/test/API/lang/cpp/std-function-recognizer/Makefile
R lldb/test/API/lang/cpp/std-function-recognizer/TestStdFunctionRecognizer.py
R lldb/test/API/lang/cpp/std-function-recognizer/main.cpp
Log Message:
-----------
Revert "[lldb] Extend frame recognizers to hide frames from backtraces (#104523)"
This reverts commit f01f80ce6ca7640bb0e267b84b1ed0e89b57e2d9.
This commit introduces an msan violation. See the discussion on https://github.com/llvm/llvm-project/pull/104523.
Commit: 125aa10b3d645bd26523a1bc321bb2e6b1cf04e1
https://github.com/llvm/llvm-project/commit/125aa10b3d645bd26523a1bc321bb2e6b1cf04e1
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Fix void unary * operators (#105640)
Discard the subexpr.
Commit: 6932f47cfdf4734d68759586047aee240861058e
https://github.com/llvm/llvm-project/commit/6932f47cfdf4734d68759586047aee240861058e
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[NFC][VPlan] Correct two typos in comments.
Commit: d7da79f2cd025ab1a526c7011aab062817a656b2
https://github.com/llvm/llvm-project/commit/d7da79f2cd025ab1a526c7011aab062817a656b2
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/utils/TableGen/NeonEmitter.cpp
M llvm/include/llvm/TableGen/SetTheory.h
M llvm/lib/TableGen/SetTheory.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
Log Message:
-----------
[NFC][SetTheory] Refactor to use const pointers and range loops (#105544)
- Refactor SetTheory code to use const pointers when possible.
- Use auto for variables initialized using dyn_cast<>.
- Use range based for loops and early continue.
Commit: c73b14ceaaea9b98d7318b97b70453388e758704
https://github.com/llvm/llvm-project/commit/c73b14ceaaea9b98d7318b97b70453388e758704
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx17.rst
M libcxx/docs/Status/Cxx17Papers.csv
Log Message:
-----------
[libc++] Fix the documentation build
There was a duplicate link target.
Commit: 6d30b67cf0fdd5f417af53b4acd593ded37b2db9
https://github.com/llvm/llvm-project/commit/6d30b67cf0fdd5f417af53b4acd593ded37b2db9
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx17.rst
M libcxx/docs/Status/Cxx20.rst
M libcxx/docs/Status/Cxx23.rst
M libcxx/docs/index.rst
Log Message:
-----------
[libc++] Add link to the Github conformance table from the documentation
Commit: a964635939ed9fadcaf6833b29f4ebeb9a9df4ef
https://github.com/llvm/llvm-project/commit/a964635939ed9fadcaf6833b29f4ebeb9a9df4ef
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[mlir][OpenMP] Add optional alloc region to reduction decl (#102522)
This region is intended to separate alloca operations from reduction
variable initialization. This makes it easier to hoist allocas to the
entry block before control flow and complex code for initialization.
The verifier checks that there is at most one block in the alloc region.
This is not sufficient to avoid control flow in general MLIR, but by the
time we are converting to LLVMIR structured control flow should already
have been lowered to the cf dialect.
1/3
Part 2: https://github.com/llvm/llvm-project/pull/102524
Part 3: https://github.com/llvm/llvm-project/pull/102525
Commit: 2efc81aff4a18a640c585d507c357868162dbd43
https://github.com/llvm/llvm-project/commit/2efc81aff4a18a640c585d507c357868162dbd43
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-private.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-byref.mlir
Log Message:
-----------
[mlir][OpenMP] Convert reduction alloc region to LLVMIR (#102524)
The intention of this change is to ensure that allocas end up in the
entry block not spread out amongst complex reduction variable
initialization code.
The tests we have are quite minimized for readability and
maintainability, making the benefits less obvious. The use case for this
is when there are multiple reduction variables each will multiple blocks
inside of the init region for that reduction.
2/3
Part 1: https://github.com/llvm/llvm-project/pull/102522
Part 3: https://github.com/llvm/llvm-project/pull/102525
Commit: f2027a9388728094d84837fc0fdd2e0325362e51
https://github.com/llvm/llvm-project/commit/f2027a9388728094d84837fc0fdd2e0325362e51
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M flang/lib/Lower/OpenMP/ReductionProcessor.cpp
M flang/test/Lower/OpenMP/delayed-privatization-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-add-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-array-lb.f90
M flang/test/Lower/OpenMP/parallel-reduction-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-array2.f90
M flang/test/Lower/OpenMP/parallel-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/reduction-array-intrinsic.f90
M flang/test/Lower/OpenMP/sections-array-reduction.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add-byref.f90
R flang/test/Lower/OpenMP/wsloop-reduction-add-hlfir-byref.f90
R flang/test/Lower/OpenMP/wsloop-reduction-add-hlfir.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-assumed-shape.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-byref.f90
R flang/test/Lower/OpenMP/wsloop-reduction-max-hlfir-byref.f90
R flang/test/Lower/OpenMP/wsloop-reduction-max-hlfir.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
M flang/test/Lower/OpenMP/wsloop-reduction-pointer.f90
Log Message:
-----------
[flang][OpenMP] use reduction alloc region (#102525)
I removed the `*-hlfir*` tests because they are duplicate now that the
other tests have been updated to use the HLFIR lowering.
3/3
Part 1: https://github.com/llvm/llvm-project/pull/102522
Part 2: https://github.com/llvm/llvm-project/pull/102524
Commit: d163935585cd8d538da8326a8e4e9e7da8aa1755
https://github.com/llvm/llvm-project/commit/d163935585cd8d538da8326a8e4e9e7da8aa1755
Author: Volodymyr Vasylkun <vvmposeydon at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/scmp.ll
Log Message:
-----------
[InstCombine] Fold `scmp(x -nsw y, 0)` to `scmp(x, y)` (#105583)
Proof: https://alive2.llvm.org/ce/z/v6VtXz
Commit: c82f7976ae20a7c76904415eae1964bab78f1a04
https://github.com/llvm/llvm-project/commit/c82f7976ae20a7c76904415eae1964bab78f1a04
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/CXX/temp/temp.decls/temp.mem/p1.cpp
Log Message:
-----------
[Clang][Sema] Rebuild template parameters for out-of-line template definitions and partial specializations (#104030)
We need to rebuild the template parameters of out-of-line
definitions/specializations of member templates in the context of the
current instantiation for the purposes of declaration matching. We
already do this for function templates and class templates, but not
variable templates, partial specializations of variable template, and
partial specializations of class templates. This patch fixes the latter
cases.
Commit: db94852b9b4ca1008ef2889175fe3af51f26a5b0
https://github.com/llvm/llvm-project/commit/db94852b9b4ca1008ef2889175fe3af51f26a5b0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/lib/AST/ByteCode/FunctionPointer.cpp
M clang/lib/AST/ByteCode/FunctionPointer.h
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/CMakeLists.txt
M clang/test/AST/ByteCode/c.c
Log Message:
-----------
[clang][bytecode] Allow adding offsets to function pointers (#105641)
Convert them to Pointers, do the offset calculation and then convert
them back to function pointers.
Commit: 7e3f9dd21f82751ad93a54756f5f098560f31097
https://github.com/llvm/llvm-project/commit/7e3f9dd21f82751ad93a54756f5f098560f31097
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/bit-checks.ll
Log Message:
-----------
[InstCombine] Add more tests for foldLogOpOfMaskedICmps transform (NFC)
Tests for cases that would have been regressed by
https://github.com/llvm/llvm-project/pull/104941.
Commit: dd3b43a455793e79b84171b8d522fc4d86dea61d
https://github.com/llvm/llvm-project/commit/dd3b43a455793e79b84171b8d522fc4d86dea61d
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[mlir][OpenMP][NFC] clean up optional reduction region parsing (#105644)
This can be handled in ODS instead of writing custom parsing/printing
code.
Thanks for the idea @skatrak
Commit: 318b0678e3baac5723a3805d719c04b9cf1d95c3
https://github.com/llvm/llvm-project/commit/318b0678e3baac5723a3805d719c04b9cf1d95c3
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir][LLVM] Add support for constant struct with multiple fields (#102752)
Currently `mlir.llvm.constant` of structure types restricts that the
structure type effectively represents a complex type -- it must have
exactly two fields of the same type and the field type must be either an
integer type or a float type.
This PR relaxes this restriction and it allows the structure type to
have an arbitrary number of fields.
Commit: d46812a7be13cae9a9f4f3491cb60a20c57c8da6
https://github.com/llvm/llvm-project/commit/d46812a7be13cae9a9f4f3491cb60a20c57c8da6
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/different-loops-recs.ll
M llvm/test/Analysis/ScalarEvolution/no-wrap-add-exprs.ll
M llvm/test/Transforms/PhaseOrdering/scev-custom-dl.ll
Log Message:
-----------
[Analysis] Teach ScalarEvolution::getRangeRef about more dereferenceable objects (#104778)
Whilst dealing with review comments on
https://github.com/llvm/llvm-project/pull/96752
I discovered that SCEV does not know about the dereferenceable attribute
on function arguments so I have updated getRangeRef to make use of it
by calling getPointerDereferenceableBytes.
Commit: 327edbe07ab4370ceb20ea7c805f64950871d835
https://github.com/llvm/llvm-project/commit/327edbe07ab4370ceb20ea7c805f64950871d835
Author: Zaara Syeda <syzaara at ca.ibm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
Log Message:
-----------
[PowerPC] Fix mask for __st[d/w/h/b]cx builtins (#104453)
These builtins are currently returning CR0 which will have the format
[0, 0, flag_true_if_saved, XER].
We only want to return flag_true_if_saved. This patch adds a shift to
remove the XER bit before returning.
Commit: 11e1378e56ef78e51e4fe7180511c6f40ae8dc67
https://github.com/llvm/llvm-project/commit/11e1378e56ef78e51e4fe7180511c6f40ae8dc67
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/sve-insert-scalable-vector.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Increase vector.insert test coverage.
Commit: c8f40e7cf546557e885fe06b0349753d78193872
https://github.com/llvm/llvm-project/commit/c8f40e7cf546557e885fe06b0349753d78193872
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/bit-checks.ll
Log Message:
-----------
[InstCombine] Add more test variants with poison elements (NFC)
Commit: 32679e10a9b66405c340213993f65b2edf5a794a
https://github.com/llvm/llvm-project/commit/32679e10a9b66405c340213993f65b2edf5a794a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/bit-checks.ll
Log Message:
-----------
[InstCombine] Handle logical op for and/or of icmp 0/-1
This aligns the transform with what foldLogOpOfMaskedICmp() does.
Commit: 41dcdfbff12a9bc06af25457d603b6ec26b6b45f
https://github.com/llvm/llvm-project/commit/41dcdfbff12a9bc06af25457d603b6ec26b6b45f
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libcxx/CMakeLists.txt
R libcxx/docs/BuildingLibcxx.rst
M libcxx/docs/Contributing.rst
M libcxx/docs/TestingLibcxx.rst
A libcxx/docs/UserDocumentation.rst
R libcxx/docs/UsingLibcxx.rst
A libcxx/docs/VendorDocumentation.rst
M libcxx/docs/index.rst
Log Message:
-----------
[libc++][docs] Major update to the documentation
- Landing page: add link to the libc++ Discord channel
- Landing page: reorder "Getting Involved" above "Design documents"
- Landing page: remove "Notes and Known Issues" which was completely outdated
- Rename "Using Libc++" to "User Documentation" and update contents
- Rename "Building Libc++" to "Vendor Documentation" and update contents
The "BuildingLibcxx" and "UsingLibcxx" pages have basically been used for
vendor and user documentation respectively. However, they were named in
a way that doesn't really make that clear. Renaming the pages now gives
us a location to clearly document what we target at vendors and what we
target at users, and to do that separately.
Commit: 00baa1af0f73f0e4c12edc12f57e62021ada7ccd
https://github.com/llvm/llvm-project/commit/00baa1af0f73f0e4c12edc12f57e62021ada7ccd
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/include/llvm/IR/VPIntrinsics.def
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
Log Message:
-----------
[DAG][RISCV] Use vp_reduce_* when widening illegal types for reductions (#105455)
This allows the use a single wider operation with a restricted EVL
instead of padding the vector with the neutral element.
For RISCV specifically, it's worth noting that an alternate padded
lowering is available when VL is one less than a power of two, and LMUL
<= m1. We could slide the vector operand up by one, and insert the
padding via a vslide1up. We don't currently pattern match this, but we
could. This form would arguably be better iff the surrounding code
wanted VL=4. This patch will force a VL toggle in that case instead.
Basically, it comes down to a question of whether we think odd sized
vectors are going to appear clustered with odd size vector operations,
or mixed in with larger power of two operations.
Note there is a potential downside of using vp nodes; we loose any
generic DAG combines which might have applied to the widened form.
Commit: 26a8a857dcdc219d57e39b495ff58aef7d746fdc
https://github.com/llvm/llvm-project/commit/26a8a857dcdc219d57e39b495ff58aef7d746fdc
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector-shuffle.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-non-power-of-2.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-combine.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/zve32-types.ll
Log Message:
-----------
[RISCV] Introduce local peephole to reduce VLs based on demanded VL (#104689)
This is a fairly narrow transform (at the moment) to reduce the VLs of
instructions feeding a store with a smaller VL. Note that the goal of
this transform isn't really to reduce VL - it's to reduce VL *toggles*.
To our knowledge, small reductions in VL without also changing LMUL are
generally not profitable on existing hardware.
For a single use instruction without side effects, fp exceptions, or a
result dependency on VL, reducing VL is legal if only a subset of
elements are legal. We'd already implemented this logic for vmv.v.v, and
this patch simply applies it to stores as an alternate root.
Longer term, I plan to extend this to other root instructions (i.e.
different kind of stores, reduces, etc..), and add a more general
recursive walkback through operands.
One risk with the dataflow based approach is that we could be reducing
VL of an instruction scheduled in a region with the wider VL (i.e. mixed
mode computations) forcing an additional VL toggle. An example of this
is the @insert_subvector_dag_loop test case, but it doesn't appear to
happen widely. I think this is a risk we should accept.
Commit: 29cb1e6b4fccb99d32eaa4b81af481d94be79242
https://github.com/llvm/llvm-project/commit/29cb1e6b4fccb99d32eaa4b81af481d94be79242
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-no-active-lanes-cmp.ll
Log Message:
-----------
[AArch64] optimise SVE cmp intrinsics with no active lanes (#104779)
This patch extends https://github.com/llvm/llvm-project/pull/73964 and
optimises SVE cmp intrinsics to zero vector when predicate is zero.
Commit: 58ac764b013606a67043cde6a287db3648d87582
https://github.com/llvm/llvm-project/commit/58ac764b013606a67043cde6a287db3648d87582
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M libcxx/docs/ReleaseNotes.rst
R libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/ReleaseNotes/19.rst
R libcxx/docs/Status/Ranges.rst
R libcxx/docs/Status/RangesAlgorithms.csv
R libcxx/docs/Status/RangesMajorFeatures.csv
R libcxx/docs/Status/RangesViews.csv
R libcxx/docs/Status/Spaceship.rst
R libcxx/docs/Status/SpaceshipPapers.csv
R libcxx/docs/Status/SpaceshipProjects.csv
M libcxx/docs/index.rst
Log Message:
-----------
[libc++] Post-LLVM19-release docs cleanup (#99667)
This patch removes obsolete status pages for projects that were
completed: LLVM 18 release, C++20 Ranges and Spaceship support.
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: 4d85285ff68d11fcb8c6b296799a11074e7ff7d7
https://github.com/llvm/llvm-project/commit/4d85285ff68d11fcb8c6b296799a11074e7ff7d7
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/switch-on-cmp.ll
Log Message:
-----------
[SimplifyCFG] Fold switch over ucmp/scmp to icmp and br (#105636)
If we switch over ucmp/scmp and have two switch cases going to the same
destination, we can convert into icmp+br.
Fixes https://github.com/llvm/llvm-project/issues/105632.
Commit: 9402bb090824312882d47c8e52a1b1aeacbcfd3c
https://github.com/llvm/llvm-project/commit/9402bb090824312882d47c8e52a1b1aeacbcfd3c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/same-scalar-in-same-phi-extract.ll
Log Message:
-----------
[SLP]Do not count extractelement costs in unreachable/landing pad blocks.
If the external user of the scalar to be extract is in
unreachable/landing pad block, we can skip counting their cost.
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/105667
Commit: ec5e58519d24010beea937fccf5fc4541db3ec21
https://github.com/llvm/llvm-project/commit/ec5e58519d24010beea937fccf5fc4541db3ec21
Author: Mital Ashok <mital at mitalashok.co.uk>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[NFC] Replace bool <= bool comparison (#102948)
Static analyser tool cppcheck flags ordered comparison with `bool`s.
Replace with equivalent logical operators to prevent this.
Closes #102912
Commit: c4c5fdd933fa2d1f7624d863d05a4fb982b4c074
https://github.com/llvm/llvm-project/commit/c4c5fdd933fa2d1f7624d863d05a4fb982b4c074
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
R llvm/test/CodeGen/AMDGPU/indirect-addressing-si-noopt.ll
R llvm/test/CodeGen/AMDGPU/indirect-addressing-si-pregfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
Log Message:
-----------
[AMDGPU] Generate checks for vector indexing. NFC. (#105668)
This allows combining some test files that were only split because
adding new RUN lines introduced too much churn in the checks.
Commit: 8ba2ae31fa6a386d42aec5dedd685e99747dbf0f
https://github.com/llvm/llvm-project/commit/8ba2ae31fa6a386d42aec5dedd685e99747dbf0f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.h
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
Log Message:
-----------
[RISCV][GISel] Implement canLowerReturn. (#105465)
This allows us to handle return values that are too large to fit in x10
and x11. They will be converted to a sret by passing a pointer to where
to store the return value.
Commit: e76db25832d6ac2d3a36769b26f982d9dee4b346
https://github.com/llvm/llvm-project/commit/e76db25832d6ac2d3a36769b26f982d9dee4b346
Author: Dan Gohman <dev at sunfishcode.online>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/DwarfEHPrepare.cpp
A llvm/test/CodeGen/AArch64/dwarf-eh-prepare-dbg.ll
Log Message:
-----------
[DwarfEhPrepare] Assign dummy debug location for more inserted _Unwind_Resume calls (#105513)
Similar to the fix for #57469, ensure that the other `_Unwind_Resume`
call emitted by DwarfEHPrepare has a debug location if needed.
This fixes https://github.com/nbdd0121/unwinding/issues/34.
Commit: 69332bb8995aef60d830406de12cb79a50390261
https://github.com/llvm/llvm-project/commit/69332bb8995aef60d830406de12cb79a50390261
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/multiple_reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/scalarization-overhead.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/shuffle-vectors-mask-size.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/combined-loads-stored.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll
M llvm/test/Transforms/SLPVectorizer/X86/addsub.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-many-users-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-node-same-as-vect-but-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/inst_size_bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark-partial-loads-vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reused-pointer.ll
M llvm/test/Transforms/SLPVectorizer/X86/schedule_budget_debug_info.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2-unord.ll
M llvm/test/Transforms/SLPVectorizer/X86/tiny-tree.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect-gather-same-nodes.ll
Log Message:
-----------
[SLP]Improve/fix subvectors in gather/buildvector nodes handling
SLP vectorizer has an estimation for gather/buildvector nodes, which
contain some scalar loads. SLP vectorizer performs pretty similar (but
large in SLOCs) estimation, which not always correct. Instead, this
patch implements clustering analysis and actual node allocation with the
full analysis for the vectorized clustered scalars (not only loads, but
also some other instructions) with the correct cost estimation and
vector insert instructions. Improves overall vectorization quality and
simplifies analysis/estimations.
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/104144
Commit: 3c54aa14aa5f92ea2c96b85efbc7945ed55451e4
https://github.com/llvm/llvm-project/commit/3c54aa14aa5f92ea2c96b85efbc7945ed55451e4
Author: Sumanth Gundapaneni <sumanth.gundapaneni at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/IR/Verifier.cpp
Log Message:
-----------
[Verifier] Make lrint and lround intrinsic cases concise. NFC (#105676)
Commit: 9f418057dc73e4e5cb94a7cd671097275ffc29fc
https://github.com/llvm/llvm-project/commit/9f418057dc73e4e5cb94a7cd671097275ffc29fc
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
A lldb/test/Shell/Process/Inputs/a.out.yaml
A lldb/test/Shell/Process/Inputs/corefile.yaml
A lldb/test/Shell/Process/ProcessMachCoreArch.test
Log Message:
-----------
[lldb] Pick the correct architecutre when target and core file disagree (#105576)
In f9f3316, Adrian fixed an issue where LLDB wouldn't update the
target's architecture when the process reported a different triple that
only differed in its sub-architecture.
This unintentionally regressed core file debugging when the core file
reports the base architecture (e.g. armv7) while the main binary knows
the correct CPU subtype (e.g. armv7em). After the aforementioned change,
we update the target architecture from armv7em to armv7. Fix the issue
by trusting the target architecture over the ProcessMachCore process.
rdar://133834304
Commit: fe5d1f901a709bc6a2180b7a77b9d5948c6c3482
https://github.com/llvm/llvm-project/commit/fe5d1f901a709bc6a2180b7a77b9d5948c6c3482
Author: Rodolfo Wottrich <rgwott at users.noreply.github.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/test/MC/ARM/directive-fpu-multiple.s
A llvm/test/MC/ARM/directive-fpu-single-crypto-neon-fp-armv8.s
A llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-d16.s
A llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-sp-d16.s
A llvm/test/MC/ARM/directive-fpu-single-fp-armv8.s
A llvm/test/MC/ARM/directive-fpu-single-fpv4-sp-d16.s
A llvm/test/MC/ARM/directive-fpu-single-fpv5-d16.s
A llvm/test/MC/ARM/directive-fpu-single-fpv5-sp-d16.s
A llvm/test/MC/ARM/directive-fpu-single-neon-fp-armv8.s
A llvm/test/MC/ARM/directive-fpu-single-neon-fp16.s
A llvm/test/MC/ARM/directive-fpu-single-neon-vfpv4.s
A llvm/test/MC/ARM/directive-fpu-single-neon.s
A llvm/test/MC/ARM/directive-fpu-single-none.s
A llvm/test/MC/ARM/directive-fpu-single-vfp.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv2.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3-d16-fp16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3-d16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3-fp16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3xd-fp16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3xd.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv4-d16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv4.s
Log Message:
-----------
[ARM] Fix missing ELF FPU attributes for fp-armv8-fullfp16-d16 (#105677)
An assembly input with
> .fpu fp-armv8-fullfp16-d16
crashes the compiler because the ELF FPU attribute emitter misses the
respective entry. This patch fixes this.
Interestingly, compiling with -mfpu=fp-armv8-fullfp16-d16 does not cause
the crash because FPv5_D16 is an alias in the compiler and
> .fpu fpv5-d16
is emitted instead, which does not crash.
The existing .fpu directive test with multiple FPUs serves the purpose
of verifying that each possible FPU option is defined, but does not
trigger the crash because only the last .fpu directive goes effectively
down the code path. Therefore one test for each FPU is required.
Fixes #105674.
Commit: b21756f9f1038acd889dd3a12fd16f843d07c4a8
https://github.com/llvm/llvm-project/commit/b21756f9f1038acd889dd3a12fd16f843d07c4a8
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M lldb/unittests/Symbol/TestClangASTImporter.cpp
Log Message:
-----------
[lldb][test] Add a unit-test for importRecordLayoutFromOrigin
Commit: 8ab61404e866539f5e28e0f72ba7a510fa51dd3a
https://github.com/llvm/llvm-project/commit/8ab61404e866539f5e28e0f72ba7a510fa51dd3a
Author: David Green <david.green at arm.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll
M llvm/test/CodeGen/AArch64/arm64-neon-across.ll
Log Message:
-----------
[AArch64] Lower aarch64_neon_saddlv via SADDLV nodes. (#103307)
This mirrors what GISel already does, extending the existing lowering of
aarch64_neon_saddlv/aarch64_neon_uaddlv to SADDLV/UADDLV. This allows us
to remove some tablegen patterns, and provides a little nicer codegen in
places as the nodes represent the result being in a vector register
correctly.
Commit: 24740ecfd100907150c5aa2d1c53bf17fb73966c
https://github.com/llvm/llvm-project/commit/24740ecfd100907150c5aa2d1c53bf17fb73966c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/test/CodeGen/X86/ctlz.ll
M llvm/test/CodeGen/X86/cttz.ll
Log Message:
-----------
[X86] Add BSR/BSF tests to check for implicit zero extension
Commit: 8c6f8c29e90666b747fc4b4612647554206a2be5
https://github.com/llvm/llvm-project/commit/8c6f8c29e90666b747fc4b4612647554206a2be5
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M compiler-rt/lib/asan/asan_flags.inc
M compiler-rt/lib/asan/asan_globals.cpp
M compiler-rt/test/asan/TestCases/Linux/initialization-nobug-lld.cpp
M compiler-rt/test/asan/TestCases/Linux/odr_indicator_unregister.cpp
M compiler-rt/test/asan/TestCases/Linux/odr_indicators.cpp
M compiler-rt/test/asan/TestCases/Windows/dll_global_dead_strip.c
M compiler-rt/test/asan/TestCases/Windows/dll_report_globals_symbolization_at_startup.cpp
M compiler-rt/test/asan/TestCases/Windows/global_dead_strip.c
M compiler-rt/test/asan/TestCases/Windows/report_globals_vs_freelibrary.cpp
M compiler-rt/test/asan/TestCases/initialization-nobug.cpp
Log Message:
-----------
Reland "[asan] Remove debug tracing from `report_globals` (#104404)" (#105601)
This reverts commit 2704b804bec50c2b016bf678bd534c330ec655b6
and relands #104404.
The Darwin should not fail after #105599.
Commit: a625435d3ef4c7bbfceb44498b9b5a2cbbed838b
https://github.com/llvm/llvm-project/commit/a625435d3ef4c7bbfceb44498b9b5a2cbbed838b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[Vectorize] Fix warnings
This patch fixes warnings of the form:
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp:9300:23: error: loop
variable '[E, Idx]' creates a copy from type 'const value_type' (aka
'const std::pair<const llvm::slpvectorizer::BoUpSLP::TreeEntry *,
unsigned int>') [-Werror,-Wrange-loop-construct]
Commit: 0bd90ec421da16df6d020d5a21b642a489491c1e
https://github.com/llvm/llvm-project/commit/0bd90ec421da16df6d020d5a21b642a489491c1e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Fix a warning
This patch fixes:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:6102:9: error:
unused variable 'OpVT' [-Werror,-Wunused-variable]
Commit: 46707b0a83b7769965f9b1b3d08b2cc6bd26c469
https://github.com/llvm/llvm-project/commit/46707b0a83b7769965f9b1b3d08b2cc6bd26c469
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
A lld/test/ELF/aarch64-mapsyms-implicit.s
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCTargetOptions.h
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/test/MC/AArch64/mapping-across-sections.s
Log Message:
-----------
[AArch64,ELF] Allow implicit $d/$x at section beginning
The start state of a new section is `EMS_None`, often leading to a
$d/$x at offset 0. Introduce a MCTargetOption/cl::opt
"implicit-mapsyms" to allow an alternative behavior
(https://github.com/ARM-software/abi-aa/issues/274):
* Set the start state to `EMS_Data` or `EMS_A64`.
* For text sections, add an ending $x only if the final data is not instructions.
* For non-text sections, add an ending $d only if the final data is not data commands.
```
.section .text.1,"ax"
nop
// emit $d
.long 42
// emit $x
.section .text.2,"ax"
nop
```
This new behavior decreases the .symtab size significantly:
```
% bloaty a64-2/bin/clang -- a64-0/bin/clang
FILE SIZE VM SIZE
-------------- --------------
-5.4% -1.13Mi [ = ] 0 .strtab
-50.9% -4.09Mi [ = ] 0 .symtab
-4.0% -5.22Mi [ = ] 0 TOTAL
```
---
This scheme works as long as the user can rule out some error scenarios:
* .text.1 assembled using the traditional behavior is combined with .text.2 using the new behavior
* A linker script combining non-text sections and text sections. The
lack of mapping symbols in the non-text sections could make them
treated as code, unless the linker inserts extra mapping symbols.
The above mix-and-match scenarios aren't an issue at all for a
significant portion of users.
A text section may start with data commands in rare cases (e.g.
-fsanitize=function) that many users don't care about. When combing
`(.text.0; .word 0)` and `(.text.1; .word 0)`, the ending $x of .text.0
and the initial $d of .text.1 may have the same address. If both
sections reside in the same file, ensure the ending symbol comes before
the initial $d of .text.1, so that a dumb linker respecting the symbol
order will place the ending $x before the initial $d.
Disassemblers using stable sort will see both symbols at the same
address, and the second will win.
When section ordering mechanisms (e.g. --symbol-ordering-file,
--call-graph-profile-sort, `.text : { second.o(.text) first.o(.text) }`)
are involved, the initial data in a text section following a text
section with trailing data could be misidentified as code, but the issue
is local and the risk could be acceptable.
Pull Request: https://github.com/llvm/llvm-project/pull/99718
Commit: 2012b25420160c3d4e595b29910afffa6c5f3fc2
https://github.com/llvm/llvm-project/commit/2012b25420160c3d4e595b29910afffa6c5f3fc2
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-and.mir
Log Message:
-----------
[AMDGPU][GlobalISel] Disable fixed-point iteration in all Combiners (#105517)
Disable fixed-point iteration in all AMDGPU Combiners after #102163.
This saves around 2% compile time in ad hoc testing on some large
graphics shaders. I did not notice any regressions in the generated
code, just a bunch of harmless differences in instruction selection and
register allocation.
Commit: 09262553fa1874bec04aebb1ecd3fd3386d316d5
https://github.com/llvm/llvm-project/commit/09262553fa1874bec04aebb1ecd3fd3386d316d5
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M lldb/include/lldb/Interpreter/Interfaces/ScriptedInterface.h
Log Message:
-----------
[lldb] Fix typos in ScriptedInterface.h
Commit: 83fc989a227a0cafb945307d4f0d68a4df864dc1
https://github.com/llvm/llvm-project/commit/83fc989a227a0cafb945307d4f0d68a4df864dc1
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
Log Message:
-----------
[CodeGen] Construct SmallVector with iterator ranges (NFC) (#105622)
Commit: 8dda6715ce940cb692d77e60d57a996ee63b5e69
https://github.com/llvm/llvm-project/commit/8dda6715ce940cb692d77e60d57a996ee63b5e69
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-22 (Thu, 22 Aug 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M clang/docs/ReleaseNotes.rst
M clang/docs/StandardCPlusPlusModules.rst
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinsX86.def
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Sema/Sema.h
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/lib/AST/ByteCode/FunctionPointer.cpp
M clang/lib/AST/ByteCode/FunctionPointer.h
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/CMakeLists.txt
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/avx10_2_512convertintrin.h
A clang/lib/Headers/avx10_2convertintrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaAttr.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/lib/StaticAnalyzer/Checkers/Taint.cpp
M clang/test/AST/ByteCode/c.c
M clang/test/AST/ByteCode/invalid.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/Analysis/analyzer-config.c
M clang/test/Analysis/taint-generic.c
M clang/test/CXX/drs/cwg23xx.cpp
M clang/test/CXX/temp/temp.decls/temp.mem/p1.cpp
M clang/test/ClangScanDeps/pr61006.cppm
A clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
A clang/test/CodeGen/X86/avx10_2convert-builtins.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_loads.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_store.c
M clang/test/CodeGen/attr-counted-by.c
A clang/test/CodeGen/bpf-attr-bpf-fastcall-1.c
M clang/test/CodeGen/builtin-cpu-supports.c
A clang/test/CodeGen/ffp-contract-fast-honor-pramga-option.cpp
A clang/test/CodeGen/ffp-contract-fhp-pragma-override.cpp
M clang/test/CodeGen/fp-reassoc-pragma.cpp
M clang/test/CodeGen/fp-reciprocal-pragma.cpp
M clang/test/CodeGen/ms-mixed-ptr-sizes.c
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/kernel-args.cu
R clang/test/CodeGenCoroutines/coro-dwarf-O2.cpp
M clang/test/Driver/coverage.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/program-path-priority.c
M clang/test/Driver/ps5-linker.c
M clang/test/Driver/riscv-cpus.c
A clang/test/Driver/sparc-fix.c
M clang/test/Headers/wasm.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/Misc/target-invalid-cpu-note/riscv.c
A clang/test/Parser/function-parameter-limit.cpp
M clang/test/Preprocessor/riscv-target-features.c
A clang/test/Sema/bpf-attr-bpf-fastcall.c
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/SemaCXX/attr-annotate.cpp
M clang/test/SemaCXX/cxx2a-explicit-bool.cpp
M clang/test/SemaCXX/sugared-auto.cpp
M clang/test/SemaTemplate/concepts-friends.cpp
M clang/tools/clang-format/clang-format-diff.py
M clang/tools/clang-format/clang-format-sublime.py
M clang/tools/clang-format/clang-format.el
M clang/tools/clang-format/clang-format.py
M clang/tools/clang-format/git-clang-format
M clang/utils/TableGen/NeonEmitter.cpp
M clang/www/cxx_dr_status.html
M compiler-rt/lib/CMakeLists.txt
M compiler-rt/lib/fuzzer/FuzzerUtilFuchsia.cpp
M compiler-rt/test/asan/TestCases/Darwin/cstring_section.c
M compiler-rt/test/fuzzer/features_dir.test
M cross-project-tests/debuginfo-tests/dexter/dex/utils/Version.py
M flang/docs/OpenMP-declare-target.md
M flang/docs/OpenMP-descriptor-management.md
M flang/include/flang/Optimizer/CMakeLists.txt
M flang/include/flang/Optimizer/CodeGen/CGPasses.td
M flang/include/flang/Optimizer/CodeGen/CodeGen.h
A flang/include/flang/Optimizer/OpenMP/CMakeLists.txt
A flang/include/flang/Optimizer/OpenMP/Passes.h
A flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CLOptions.inc
M flang/lib/Frontend/CMakeLists.txt
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/ReductionProcessor.cpp
M flang/lib/Optimizer/CMakeLists.txt
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
A flang/lib/Optimizer/OpenMP/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/FunctionFiltering.cpp
A flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
A flang/lib/Optimizer/OpenMP/MarkDeclareTarget.cpp
M flang/lib/Optimizer/Support/InternalNames.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/CompilerGeneratedNames.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.h
R flang/lib/Optimizer/Transforms/OMPFunctionFiltering.cpp
R flang/lib/Optimizer/Transforms/OMPMapInfoFinalization.cpp
R flang/lib/Optimizer/Transforms/OMPMarkDeclareTarget.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/lib/Semantics/runtime-type-info.cpp
M flang/runtime/copy.cpp
M flang/runtime/edit-input.cpp
M flang/runtime/exceptions.cpp
M flang/runtime/numeric.cpp
M flang/runtime/stop.cpp
M flang/test/Driver/fveclib-codegen.f90
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Fir/basic-program.fir
M flang/test/Fir/convert-to-llvm.fir
A flang/test/Fir/convert-type-desc-to-llvm.fir
M flang/test/Fir/polymorphic.fir
M flang/test/Fir/type-descriptor.fir
M flang/test/Integration/debug-fixed-array-type-2.f90
M flang/test/Lower/OpenMP/delayed-privatization-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-add-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-array-lb.f90
M flang/test/Lower/OpenMP/parallel-reduction-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-array2.f90
M flang/test/Lower/OpenMP/parallel-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/reduction-array-intrinsic.f90
M flang/test/Lower/OpenMP/sections-array-reduction.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add-byref.f90
R flang/test/Lower/OpenMP/wsloop-reduction-add-hlfir-byref.f90
R flang/test/Lower/OpenMP/wsloop-reduction-add-hlfir.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-assumed-shape.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-byref.f90
R flang/test/Lower/OpenMP/wsloop-reduction-max-hlfir-byref.f90
R flang/test/Lower/OpenMP/wsloop-reduction-max-hlfir.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
M flang/test/Lower/OpenMP/wsloop-reduction-pointer.f90
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/dense-array-any-rank.f90
M flang/test/Transforms/debug-fixed-array-type.fir
M flang/tools/bbc/CMakeLists.txt
M flang/tools/fir-opt/CMakeLists.txt
M flang/tools/fir-opt/fir-opt.cpp
M flang/tools/tco/CMakeLists.txt
M libc/config/gpu/entrypoints.txt
M libc/docs/build_and_test.rst
M libc/docs/contributing.rst
R libc/docs/dev/api_test.rst
R libc/docs/dev/ground_truth_specification.rst
M libc/docs/dev/header_generation.rst
M libc/docs/dev/index.rst
R libc/docs/dev/mechanics_of_public_api.rst
M libc/docs/dev/source_tree_layout.rst
M libc/docs/full_cross_build.rst
M libc/docs/full_host_build.rst
M libc/docs/fullbuild_mode.rst
M libc/docs/gpu/building.rst
M libc/docs/gpu/support.rst
M libc/docs/index.rst
M libc/docs/overlay_mode.rst
M libc/docs/porting.rst
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/scanf_core/CMakeLists.txt
M libc/src/stdio/scanf_core/vfscanf_internal.h
M libcxx/CMakeLists.txt
A libcxx/cmake/caches/AMDGPU.cmake
A libcxx/cmake/caches/Generic-no-terminal.cmake
A libcxx/cmake/caches/NVPTX.cmake
R libcxx/docs/BuildingLibcxx.rst
M libcxx/docs/Contributing.rst
M libcxx/docs/ReleaseNotes.rst
R libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/ReleaseNotes/19.rst
R libcxx/docs/Status/Cxx14.rst
R libcxx/docs/Status/Cxx14Issues.csv
R libcxx/docs/Status/Cxx14Papers.csv
M libcxx/docs/Status/Cxx17.rst
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx20.rst
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/docs/Status/Cxx23.rst
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx23Papers.csv
R libcxx/docs/Status/Ranges.rst
R libcxx/docs/Status/RangesAlgorithms.csv
R libcxx/docs/Status/RangesMajorFeatures.csv
R libcxx/docs/Status/RangesViews.csv
R libcxx/docs/Status/Spaceship.rst
R libcxx/docs/Status/SpaceshipPapers.csv
R libcxx/docs/Status/SpaceshipProjects.csv
M libcxx/docs/TestingLibcxx.rst
A libcxx/docs/UserDocumentation.rst
R libcxx/docs/UsingLibcxx.rst
A libcxx/docs/VendorDocumentation.rst
M libcxx/docs/index.rst
M libcxx/include/__compare/ordering.h
M libcxx/include/__config_site.in
M libcxx/include/print
A libcxx/test/std/language.support/cmp/cmp.categories.pre/reject-other-than-literal-zero.verify.cpp
R libcxx/test/std/language.support/cmp/cmp.categories.pre/zero_type.verify.cpp
A libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/implicit_ctad.compile.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/implicit_ctad.pass.cpp
A libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/mutex.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/copy_assign.compile.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/copy_ctor.compile.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/default.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/move_assign.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/move_ctor.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_adopt_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_defer_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_duration.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_time_point.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.cons/mutex_try_to_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/try_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/try_lock_for.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/try_lock_until.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.locking/unlock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.mod/member_swap.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.mod/nonmember_swap.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.mod/release.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.obs/mutex.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.obs/op_bool.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/thread.lock.unique.obs/owns_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/types.compile.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.unique/types.h
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.class/assign.compile.fail.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.class/assign.compile.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.class/copy.compile.fail.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.class/ctor.copy.compile.pass.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.class/ctor.default.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.class/default.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.class/lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.class/try_lock.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.recursive/assign.compile.fail.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.recursive/assign.compile.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.recursive/copy.compile.fail.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.recursive/ctor.copy.compile.pass.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.recursive/ctor.default.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.recursive/default.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.recursive/lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.mutex.requirements.mutex/thread.mutex.recursive/try_lock.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/assign.compile.fail.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/assign.compile.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/copy.compile.fail.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/ctor.copy.compile.pass.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/ctor.default.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/default.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/try_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/try_lock_for.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.class/try_lock_until.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/assign.compile.fail.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/assign.compile.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/copy.compile.fail.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/ctor.copy.compile.pass.cpp
A libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/ctor.default.pass.cpp
R libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/default.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/try_lock.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/try_lock_for.pass.cpp
M libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.timedmutex.requirements/thread.timedmutex.recursive/try_lock_until.pass.cpp
A libcxx/test/support/checking_mutex.h
M libcxx/utils/ci/run-buildbot
M libcxx/utils/libcxx/test/features.py
M libcxx/utils/synchronize_csv_status_files.py
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
M lld/ELF/MapFile.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.cpp
M lld/ELF/Target.h
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
M lld/test/ELF/hip-section-layout.s
M lldb/bindings/python/python-wrapper.swig
M lldb/include/lldb/API/SBFrame.h
M lldb/include/lldb/Interpreter/Interfaces/ScriptedInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/include/lldb/Target/StackFrameList.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/lldb-private-enumerations.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/API/SBFrame.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/Commands/CommandCompletions.cpp
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Plugins/Process/minidump/MinidumpParser.cpp
M lldb/source/Plugins/Process/minidump/MinidumpParser.h
M lldb/source/Plugins/Process/minidump/MinidumpTypes.cpp
M lldb/source/Plugins/Process/minidump/MinidumpTypes.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/StackFrameList.cpp
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStepOut.cpp
M lldb/source/Utility/ArchSpec.cpp
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/commands/frame/recognizer/main.m
M lldb/test/API/commands/frame/recognizer/recognizer.py
M lldb/test/API/functionalities/postmortem/minidump-new/TestMiniDumpNew.py
A lldb/test/API/functionalities/postmortem/minidump-new/linux-x86_64_mem64.yaml
R lldb/test/API/lang/cpp/std-function-recognizer/Makefile
R lldb/test/API/lang/cpp/std-function-recognizer/TestStdFunctionRecognizer.py
R lldb/test/API/lang/cpp/std-function-recognizer/main.cpp
A lldb/test/API/tools/lldb-dap/output/Makefile
A lldb/test/API/tools/lldb-dap/output/TestDAP_output.py
A lldb/test/API/tools/lldb-dap/output/main.c
R lldb/test/API/tools/lldb-dap/stackTrace/subtleFrames/Makefile
R lldb/test/API/tools/lldb-dap/stackTrace/subtleFrames/TestDAP_subtleFrames.py
R lldb/test/API/tools/lldb-dap/stackTrace/subtleFrames/main.cpp
M lldb/test/API/tools/lldb-dap/step/TestDAP_step.py
A lldb/test/Shell/Process/Inputs/a.out.yaml
A lldb/test/Shell/Process/Inputs/corefile.yaml
A lldb/test/Shell/Process/ProcessMachCoreArch.test
M lldb/test/Shell/Unwind/trap_frame_sym_ctx.test
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/OutputRedirector.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/unittests/Symbol/TestClangASTImporter.cpp
M llvm/CMakeLists.txt
M llvm/cmake/config-ix.cmake
M llvm/cmake/modules/Findzstd.cmake
M llvm/docs/GettingInvolved.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/docs/TestingGuide.rst
M llvm/docs/_static/LoopOptWG_invite.ics
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/ADT/StringExtras.h
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/DebugInfo/Symbolize/Symbolize.h
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/IR/VPIntrinsics.def
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/include/llvm/Support/ModRef.h
M llvm/include/llvm/Support/float128.h
M llvm/include/llvm/TableGen/SetTheory.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/TargetParser/RISCVISAInfo.h
M llvm/include/llvm/Transforms/IPO/FunctionImport.h
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
A llvm/include/llvm/Transforms/Utils/ControlFlowUtils.h
M llvm/include/llvm/Transforms/Utils/Local.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/CMakeLists.txt
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/CodeGen/DwarfEHPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelperCasts.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/CMakeLists.txt
A llvm/lib/Support/ModRef.cpp
M llvm/lib/TableGen/SetTheory.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
A llvm/lib/Target/AArch64/SMEPeepholeOpt.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/FLATInstructions.td
A llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/BPF/BPFCallingConv.td
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/BPFMIPeephole.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.h
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCCodeEmitter.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVRegisterInfo.td
M llvm/lib/Target/SPIRV/SPIRVSubtarget.h
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.h
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperators.td
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroInternal.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/ControlFlowUtils.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/X86/ctlz-codesize.ll
M llvm/test/Analysis/CostModel/X86/ctlz-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/ctlz.ll
M llvm/test/Analysis/CostModel/X86/cttz-codesize.ll
M llvm/test/Analysis/CostModel/X86/cttz-sizelatency.ll
M llvm/test/Analysis/CtxProfAnalysis/full-cycle.ll
M llvm/test/Analysis/CtxProfAnalysis/load.ll
M llvm/test/Analysis/LoopAccessAnalysis/symbolic-stride.ll
M llvm/test/Analysis/ScalarEvolution/different-loops-recs.ll
M llvm/test/Analysis/ScalarEvolution/no-wrap-add-exprs.ll
M llvm/test/Analysis/ValueTracking/known-power-of-two-urem.ll
M llvm/test/Analysis/ValueTracking/known-power-of-two.ll
M llvm/test/Analysis/ValueTracking/knownbits-and-or-xor-lowbit.ll
M llvm/test/Analysis/ValueTracking/knownbits-bmi-pattern.ll
M llvm/test/Analysis/ValueTracking/phi-known-bits.ll
M llvm/test/Bitcode/amdgcn-atomic.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-cast.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-extract-vec-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-with-flags.mir
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll
M llvm/test/CodeGen/AArch64/abds-neg.ll
M llvm/test/CodeGen/AArch64/abds.ll
M llvm/test/CodeGen/AArch64/abdu-neg.ll
M llvm/test/CodeGen/AArch64/abdu.ll
M llvm/test/CodeGen/AArch64/arm64-neon-across.ll
M llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll
A llvm/test/CodeGen/AArch64/dag-combine-freeze.ll
A llvm/test/CodeGen/AArch64/dwarf-eh-prepare-dbg.ll
M llvm/test/CodeGen/AArch64/neon-extadd.ll
A llvm/test/CodeGen/AArch64/rem.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AArch64/sme-darwin-sve-vg.ll
A llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-streaming-body.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
M llvm/test/CodeGen/AArch64/sme-toggle-pstateza.ll
M llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
M llvm/test/CodeGen/AArch64/streaming-compatible-memory-ops.ll
A llvm/test/CodeGen/AArch64/sve-fixed-length-int-abd.ll
A llvm/test/CodeGen/AArch64/sve-insert-scalable-vector.ll
A llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-abd.ll
M llvm/test/CodeGen/AArch64/vecreduce-add.ll
M llvm/test/CodeGen/AArch64/xtn.ll
M llvm/test/CodeGen/AArch64/zext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-and.mir
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-powr.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/frame-index.mir
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
R llvm/test/CodeGen/AMDGPU/indirect-addressing-si-noopt.ll
R llvm/test/CodeGen/AMDGPU/indirect-addressing-si-pregfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-any.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-disabled.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-enabled.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-vmcnt-loop.mir
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-any.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-disabled.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-enabled.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-1.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-2.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-3.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-regmask-1.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/anyext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/sext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/zext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/abds-neg.ll
M llvm/test/CodeGen/RISCV/abds.ll
M llvm/test/CodeGen/RISCV/abdu-neg.ll
M llvm/test/CodeGen/RISCV/abdu.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector-shuffle.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-non-power-of-2.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-combine.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/zve32-types.ll
A llvm/test/CodeGen/SPIRV/block-ordering.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitchBranches.ll
M llvm/test/CodeGen/SPIRV/branching/Two_OpSwitch_same_register.ll
M llvm/test/CodeGen/SPIRV/branching/if-merging.ll
M llvm/test/CodeGen/SPIRV/branching/if-non-merging.ll
M llvm/test/CodeGen/SPIRV/branching/switch-range-check.ll
M llvm/test/CodeGen/SPIRV/constant/global-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-aggregate-constant.ll
M llvm/test/CodeGen/SPIRV/constant/local-bool-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-float-point-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-integers-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-null-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-vector-matrix-constants.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_arbitrary_precision_integers.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_cache_controls/decorate-prefetch-w-cache-controls.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_two_calls.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_global_variable_fpga_decorations/global-var-decorations.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_global_variable_host_access/global-var-host-access.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_inline_assembly/inline_asm.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_optnone.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/builtin-op-wrappers.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_variable_length_array/builtin_alloca.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_variable_length_array/vararr.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_variable_length_array/vararr_spec_const.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_no_integer_wrap_decoration.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_shader_clock/shader_clock.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_subgroup_rotate/subgroup-rotate.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_uniform_group_instructions/uniform-group-instructions.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions-but-one.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions.ll
M llvm/test/CodeGen/SPIRV/function/alloca-load-store.ll
M llvm/test/CodeGen/SPIRV/function/identity-function.ll
M llvm/test/CodeGen/SPIRV/function/multiple-anonymous-functions.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-definition.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-with-attributes.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-with-call.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_DispatchThreadID.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveGetLaneIndex.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/abs.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/acos.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/atan.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/ceil.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cos.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cosh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/exp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/exp2.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/floor.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmad.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/frac.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/lerp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log10.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log2.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/pow.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/rcp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reversebits.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/round.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/rsqrt.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sinh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/smax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/smin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sqrt.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/tan.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/tanh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/trunc.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/umax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/umin.ll
M llvm/test/CodeGen/SPIRV/image/sampler.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic-ptr.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic_acqrel.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic_seq.ll
M llvm/test/CodeGen/SPIRV/instructions/call-complex-function.ll
M llvm/test/CodeGen/SPIRV/instructions/call-trivial-function.ll
M llvm/test/CodeGen/SPIRV/instructions/fcmp.ll
M llvm/test/CodeGen/SPIRV/instructions/float-casts.ll
M llvm/test/CodeGen/SPIRV/instructions/float-fast-flags.ll
M llvm/test/CodeGen/SPIRV/instructions/icmp.ll
M llvm/test/CodeGen/SPIRV/instructions/intrinsics.ll
M llvm/test/CodeGen/SPIRV/instructions/nested-composites.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-bitwise-operations.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-floating-point-arithmetic.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-integer-arithmetic.ll
M llvm/test/CodeGen/SPIRV/instructions/select-ptr-load.ll
M llvm/test/CodeGen/SPIRV/instructions/select.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-nested-composite-store.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-simple-composite-store.ll
M llvm/test/CodeGen/SPIRV/instructions/unreachable.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-bitwise-operations.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-floating-point-arithmetic.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-integer-arithmetic.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/abs.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/assume.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bswap.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ceil.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctlz.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctpop.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/cttz.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fabs.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-intrinsics.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/invariant.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/lifetime.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/add.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/and.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fadd.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmax.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmaximum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmin.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fminimum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmul.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/mul.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/or.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/smax.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/smin.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/umax.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/umin.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/xor.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/maxnum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/nearbyint.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ptr-annotation.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/satur-arith.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/sqrt.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/umul.with.overflow.ll
M llvm/test/CodeGen/SPIRV/phi-ptrcast-dominate.ll
M llvm/test/CodeGen/SPIRV/pointers/argument-ptr-to-struct.ll
M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-accesschain.ll
M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-load.ll
M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-store.ll
M llvm/test/CodeGen/SPIRV/pointers/complex.ll
M llvm/test/CodeGen/SPIRV/pointers/custom-kernel-arg-type.ll
M llvm/test/CodeGen/SPIRV/pointers/duplicate-type-ptr-def.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-addressspace.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-base-type.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-bitcast-load.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-kernel-arg-char.ll
M llvm/test/CodeGen/SPIRV/pointers/global-ptrtoint.ll
M llvm/test/CodeGen/SPIRV/pointers/global-zeroinitializer.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-builtin-vload-type-discrapency.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-addressspace.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type-deduction-no-bitcast-to-generic.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type-deduction-no-metadata.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-ptr-i8-default-element-type.ll
M llvm/test/CodeGen/SPIRV/pointers/kernel-argument-ptr-no-bitcast.ll
M llvm/test/CodeGen/SPIRV/pointers/load-addressspace.ll
M llvm/test/CodeGen/SPIRV/pointers/nested-struct-opaque-pointers.ll
M llvm/test/CodeGen/SPIRV/pointers/ptr-argument-byref.ll
M llvm/test/CodeGen/SPIRV/pointers/ptr-argument-byval.ll
M llvm/test/CodeGen/SPIRV/pointers/store-kernel-arg-i8-ptr-as-value-operand.ll
M llvm/test/CodeGen/SPIRV/pointers/store-kernel-arg-ptr-as-value-operand.ll
M llvm/test/CodeGen/SPIRV/pointers/store-operand-ptr-to-struct.ll
M llvm/test/CodeGen/SPIRV/pointers/struct-opaque-pointers.ll
M llvm/test/CodeGen/SPIRV/pointers/two-bitcast-or-param-users.ll
M llvm/test/CodeGen/SPIRV/pointers/two-subsequent-bitcasts.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-args-rev.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-args.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call-chain.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call-complex.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call-rev.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-call-no-bitcast.ll
M llvm/test/CodeGen/SPIRV/pointers/typeof-ptr-int.ll
M llvm/test/CodeGen/SPIRV/pointers/variables-storage-class.ll
M llvm/test/CodeGen/SPIRV/scfg-add-pre-headers.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-break.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-convergence-in-break.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-multiple-break.ll
A llvm/test/CodeGen/SPIRV/structurizer/merge-exit-simple-while-identity.ll
R llvm/test/CodeGen/SPIRV/structurizer/merge-exit-simple-white-identity.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_ballot.ll
M llvm/test/CodeGen/X86/abds-neg.ll
M llvm/test/CodeGen/X86/abds.ll
M llvm/test/CodeGen/X86/abdu.ll
M llvm/test/CodeGen/X86/atomic-bit-test.ll
A llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
A llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
R llvm/test/CodeGen/X86/avx512f-large-stack.ll
M llvm/test/CodeGen/X86/bit_ceil.ll
M llvm/test/CodeGen/X86/combine-or.ll
M llvm/test/CodeGen/X86/ctlo.ll
M llvm/test/CodeGen/X86/ctlz.ll
M llvm/test/CodeGen/X86/cttz.ll
M llvm/test/CodeGen/X86/huge-stack.ll
M llvm/test/CodeGen/X86/known-never-zero.ll
M llvm/test/CodeGen/X86/lzcnt-cmp.ll
M llvm/test/CodeGen/X86/pr57673.ll
M llvm/test/CodeGen/X86/pr89877.ll
M llvm/test/CodeGen/X86/pr92569.ll
M llvm/test/CodeGen/X86/win64-stackprobe-overflow.ll
A llvm/test/CodeGen/Xtensa/bswap.ll
A llvm/test/CodeGen/Xtensa/ctlz-cttz-ctpop.ll
A llvm/test/CodeGen/Xtensa/div.ll
A llvm/test/CodeGen/Xtensa/mul.ll
A llvm/test/CodeGen/Xtensa/rotl-rotr.ll
A llvm/test/CodeGen/Xtensa/shift.ll
M llvm/test/DebugInfo/Generic/mem2reg-promote-alloca-1.ll
A llvm/test/DebugInfo/sroa-handle-dbg-value.ll
M llvm/test/Instrumentation/NumericalStabilitySanitizer/basic.ll
M llvm/test/MC/AArch64/arm64-system-encoding.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/test/MC/ARM/directive-fpu-multiple.s
A llvm/test/MC/ARM/directive-fpu-single-crypto-neon-fp-armv8.s
A llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-d16.s
A llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-sp-d16.s
A llvm/test/MC/ARM/directive-fpu-single-fp-armv8.s
A llvm/test/MC/ARM/directive-fpu-single-fpv4-sp-d16.s
A llvm/test/MC/ARM/directive-fpu-single-fpv5-d16.s
A llvm/test/MC/ARM/directive-fpu-single-fpv5-sp-d16.s
A llvm/test/MC/ARM/directive-fpu-single-neon-fp-armv8.s
A llvm/test/MC/ARM/directive-fpu-single-neon-fp16.s
A llvm/test/MC/ARM/directive-fpu-single-neon-vfpv4.s
A llvm/test/MC/ARM/directive-fpu-single-neon.s
A llvm/test/MC/ARM/directive-fpu-single-none.s
A llvm/test/MC/ARM/directive-fpu-single-vfp.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv2.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3-d16-fp16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3-d16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3-fp16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3xd-fp16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv3xd.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv4-d16.s
A llvm/test/MC/ARM/directive-fpu-single-vfpv4.s
M llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
A llvm/test/MC/Disassembler/X86/avx10.2convert-32.txt
A llvm/test/MC/Disassembler/X86/avx10.2convert-64.txt
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/hypervisor-csr-names.s
M llvm/test/MC/RISCV/machine-csr-names.s
A llvm/test/MC/RISCV/smctr-ssctr-valid.s
M llvm/test/MC/RISCV/supervisor-csr-names.s
A llvm/test/MC/X86/avx10.2convert-32-att.s
A llvm/test/MC/X86/avx10.2convert-32-intel.s
A llvm/test/MC/X86/avx10.2convert-64-att.s
A llvm/test/MC/X86/avx10.2convert-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cttz-ctlz.ll
M llvm/test/Transforms/Coroutines/coro-debug-O2.ll
M llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-debug-dbg.values.ll
M llvm/test/Transforms/Coroutines/coro-debug-frame-variable.ll
M llvm/test/Transforms/FixIrreducible/basic.ll
M llvm/test/Transforms/FixIrreducible/bug45623.ll
M llvm/test/Transforms/FixIrreducible/nested.ll
M llvm/test/Transforms/FixIrreducible/switch.ll
M llvm/test/Transforms/FixIrreducible/unreachable.ll
M llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-value.ll
M llvm/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll
M llvm/test/Transforms/InstCombine/2010-11-23-Distributed.ll
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-no-active-lanes-cmp.ll
M llvm/test/Transforms/InstCombine/abs-1.ll
M llvm/test/Transforms/InstCombine/add-mask-neg.ll
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/add2.ll
M llvm/test/Transforms/InstCombine/add_or_sub.ll
M llvm/test/Transforms/InstCombine/and-or-icmp-const-icmp.ll
M llvm/test/Transforms/InstCombine/and-or-icmps.ll
M llvm/test/Transforms/InstCombine/and-or-not.ll
M llvm/test/Transforms/InstCombine/and-or.ll
M llvm/test/Transforms/InstCombine/and-xor-merge.ll
M llvm/test/Transforms/InstCombine/and-xor-or.ll
M llvm/test/Transforms/InstCombine/and.ll
M llvm/test/Transforms/InstCombine/apint-and-xor-merge.ll
M llvm/test/Transforms/InstCombine/apint-or.ll
M llvm/test/Transforms/InstCombine/apint-shift.ll
M llvm/test/Transforms/InstCombine/apint-sub.ll
M llvm/test/Transforms/InstCombine/ashr-lshr.ll
M llvm/test/Transforms/InstCombine/assume-align.ll
M llvm/test/Transforms/InstCombine/assume-separate_storage.ll
M llvm/test/Transforms/InstCombine/avg-lsb.ll
M llvm/test/Transforms/InstCombine/binop-and-shifts.ll
M llvm/test/Transforms/InstCombine/binop-cast.ll
M llvm/test/Transforms/InstCombine/bit-checks.ll
M llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll
M llvm/test/Transforms/InstCombine/bitcast.ll
M llvm/test/Transforms/InstCombine/bitreverse.ll
M llvm/test/Transforms/InstCombine/bswap-fold.ll
M llvm/test/Transforms/InstCombine/call-guard.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-uge-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ult-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v2-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v2-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v3-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v3-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v4-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v4-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/cast-mul-select.ll
M llvm/test/Transforms/InstCombine/cast.ll
M llvm/test/Transforms/InstCombine/cast_phi.ll
M llvm/test/Transforms/InstCombine/cast_ptr.ll
M llvm/test/Transforms/InstCombine/cmp-x-vs-neg-x.ll
M llvm/test/Transforms/InstCombine/conditional-negation.ll
M llvm/test/Transforms/InstCombine/ctpop-cttz.ll
M llvm/test/Transforms/InstCombine/ctpop-pow2.ll
M llvm/test/Transforms/InstCombine/cttz.ll
M llvm/test/Transforms/InstCombine/demorgan.ll
M llvm/test/Transforms/InstCombine/dependent-ivs.ll
M llvm/test/Transforms/InstCombine/fadd-fsub-factor.ll
M llvm/test/Transforms/InstCombine/fadd.ll
M llvm/test/Transforms/InstCombine/fast-basictest.ll
M llvm/test/Transforms/InstCombine/fast-math.ll
M llvm/test/Transforms/InstCombine/fcmp.ll
M llvm/test/Transforms/InstCombine/fdiv-sqrt.ll
M llvm/test/Transforms/InstCombine/fdiv.ll
M llvm/test/Transforms/InstCombine/float-shrink-compare.ll
M llvm/test/Transforms/InstCombine/fmul.ll
M llvm/test/Transforms/InstCombine/fold-ext-eq-c-with-op.ll
M llvm/test/Transforms/InstCombine/fold-inc-of-add-of-not-x-and-y-to-sub-x-from-y.ll
M llvm/test/Transforms/InstCombine/fold-select-fmul-if-zero.ll
M llvm/test/Transforms/InstCombine/fold-signbit-test-power2.ll
M llvm/test/Transforms/InstCombine/fpextend.ll
M llvm/test/Transforms/InstCombine/fptrunc.ll
M llvm/test/Transforms/InstCombine/free-inversion.ll
M llvm/test/Transforms/InstCombine/fsh.ll
M llvm/test/Transforms/InstCombine/fsub.ll
M llvm/test/Transforms/InstCombine/funnel.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/hoist-negation-out-of-bias-calculation.ll
M llvm/test/Transforms/InstCombine/hoist-xor-by-constant-from-xor-by-value.ll
M llvm/test/Transforms/InstCombine/icmp-add.ll
M llvm/test/Transforms/InstCombine/icmp-and-add-sub-xor-p2.ll
M llvm/test/Transforms/InstCombine/icmp-and-lowbit-mask.ll
M llvm/test/Transforms/InstCombine/icmp-and-shift.ll
M llvm/test/Transforms/InstCombine/icmp-custom-dl.ll
M llvm/test/Transforms/InstCombine/icmp-equality-rotate.ll
M llvm/test/Transforms/InstCombine/icmp-equality-xor.ll
M llvm/test/Transforms/InstCombine/icmp-ext-ext.ll
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/icmp-mul-zext.ll
M llvm/test/Transforms/InstCombine/icmp-mul.ll
M llvm/test/Transforms/InstCombine/icmp-of-and-x.ll
M llvm/test/Transforms/InstCombine/icmp-of-or-x.ll
M llvm/test/Transforms/InstCombine/icmp-of-trunc-ext.ll
M llvm/test/Transforms/InstCombine/icmp-of-xor-x.ll
M llvm/test/Transforms/InstCombine/icmp-or-of-select-with-zero.ll
M llvm/test/Transforms/InstCombine/icmp-or.ll
M llvm/test/Transforms/InstCombine/icmp-range.ll
M llvm/test/Transforms/InstCombine/icmp-rotate.ll
M llvm/test/Transforms/InstCombine/icmp-select-implies-common-op.ll
M llvm/test/Transforms/InstCombine/icmp-select.ll
M llvm/test/Transforms/InstCombine/icmp-sub.ll
M llvm/test/Transforms/InstCombine/icmp-uge-of-not-of-shl-allones-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ult-of-not-of-shl-allones-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp.ll
M llvm/test/Transforms/InstCombine/implies.ll
M llvm/test/Transforms/InstCombine/invert-variable-mask-in-masked-merge-scalar.ll
M llvm/test/Transforms/InstCombine/invert-variable-mask-in-masked-merge-vector.ll
M llvm/test/Transforms/InstCombine/ispow2.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
M llvm/test/Transforms/InstCombine/known-never-nan.ll
M llvm/test/Transforms/InstCombine/ldexp-ext.ll
M llvm/test/Transforms/InstCombine/log-pow.ll
M llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll
M llvm/test/Transforms/InstCombine/logical-select.ll
M llvm/test/Transforms/InstCombine/lshr-and-negC-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/lshr.ll
M llvm/test/Transforms/InstCombine/masked-merge-add.ll
M llvm/test/Transforms/InstCombine/masked-merge-and-of-ors.ll
M llvm/test/Transforms/InstCombine/masked-merge-or.ll
M llvm/test/Transforms/InstCombine/masked-merge-xor.ll
M llvm/test/Transforms/InstCombine/minmax-fold.ll
M llvm/test/Transforms/InstCombine/minmax-of-xor-x.ll
M llvm/test/Transforms/InstCombine/mul-masked-bits.ll
M llvm/test/Transforms/InstCombine/mul-pow2.ll
M llvm/test/Transforms/InstCombine/mul.ll
M llvm/test/Transforms/InstCombine/mul_fold.ll
M llvm/test/Transforms/InstCombine/mul_full_64.ll
M llvm/test/Transforms/InstCombine/not-add.ll
M llvm/test/Transforms/InstCombine/not.ll
M llvm/test/Transforms/InstCombine/onehot_merge.ll
M llvm/test/Transforms/InstCombine/or-xor-xor.ll
M llvm/test/Transforms/InstCombine/or-xor.ll
M llvm/test/Transforms/InstCombine/or.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-b.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-b.ll
M llvm/test/Transforms/InstCombine/phi.ll
M llvm/test/Transforms/InstCombine/pr44242.ll
M llvm/test/Transforms/InstCombine/pr49688.ll
M llvm/test/Transforms/InstCombine/pr75369.ll
M llvm/test/Transforms/InstCombine/ptr-int-ptr-icmp.ll
M llvm/test/Transforms/InstCombine/ptrmask.ll
M llvm/test/Transforms/InstCombine/range-check.ll
M llvm/test/Transforms/InstCombine/reassociate-nuw.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-b.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-b.ll
M llvm/test/Transforms/InstCombine/rem.ll
M llvm/test/Transforms/InstCombine/result-of-add-of-negative-is-non-zero-and-no-underflow.ll
M llvm/test/Transforms/InstCombine/result-of-add-of-negative-or-zero-is-non-zero-and-no-underflow.ll
M llvm/test/Transforms/InstCombine/result-of-usub-is-non-zero-and-no-overflow.ll
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
M llvm/test/Transforms/InstCombine/scalarization-inseltpoison.ll
M llvm/test/Transforms/InstCombine/scalarization.ll
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/InstCombine/select-and-or.ll
M llvm/test/Transforms/InstCombine/select-binop-cmp.ll
M llvm/test/Transforms/InstCombine/select-binop-foldable-floating-point.ll
M llvm/test/Transforms/InstCombine/select-cmp-eq-op-fold.ll
M llvm/test/Transforms/InstCombine/select-cmp.ll
M llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll
M llvm/test/Transforms/InstCombine/select-divrem.ll
M llvm/test/Transforms/InstCombine/select-factorize.ll
M llvm/test/Transforms/InstCombine/select-masked_gather.ll
M llvm/test/Transforms/InstCombine/select-masked_load.ll
M llvm/test/Transforms/InstCombine/select-of-bittest.ll
M llvm/test/Transforms/InstCombine/select-safe-transforms.ll
M llvm/test/Transforms/InstCombine/select-with-bitwise-ops.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstCombine/select_meta.ll
M llvm/test/Transforms/InstCombine/set.ll
A llvm/test/Transforms/InstCombine/sext-a-lt-b-plus-zext-a-gt-b-to-uscmp.ll
M llvm/test/Transforms/InstCombine/shift-add.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest-with-truncation-lshr.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest-with-truncation-shl.ll
M llvm/test/Transforms/InstCombine/shift-direction-in-bit-test.ll
M llvm/test/Transforms/InstCombine/shift-logic.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/test/Transforms/InstCombine/shl-bo.ll
M llvm/test/Transforms/InstCombine/shuffle-binop.ll
M llvm/test/Transforms/InstCombine/signed-truncation-check.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
M llvm/test/Transforms/InstCombine/sink-not-into-and.ll
M llvm/test/Transforms/InstCombine/sink-not-into-or.ll
M llvm/test/Transforms/InstCombine/smax-icmp.ll
M llvm/test/Transforms/InstCombine/smin-icmp.ll
M llvm/test/Transforms/InstCombine/sub-ashr-or-to-icmp-select.ll
M llvm/test/Transforms/InstCombine/sub-gep.ll
M llvm/test/Transforms/InstCombine/sub-lshr-or-to-icmp-select.ll
M llvm/test/Transforms/InstCombine/sub-minmax.ll
M llvm/test/Transforms/InstCombine/sub-not.ll
M llvm/test/Transforms/InstCombine/sub-of-negatible-inseltpoison.ll
M llvm/test/Transforms/InstCombine/sub-of-negatible.ll
M llvm/test/Transforms/InstCombine/sub-xor-cmp.ll
M llvm/test/Transforms/InstCombine/sub.ll
M llvm/test/Transforms/InstCombine/trunc-binop-ext.ll
M llvm/test/Transforms/InstCombine/uaddo.ll
M llvm/test/Transforms/InstCombine/umax-icmp.ll
M llvm/test/Transforms/InstCombine/umin-icmp.ll
M llvm/test/Transforms/InstCombine/unordered-compare-and-ordered.ll
M llvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check-via-add.ll
M llvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check-via-xor.ll
M llvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check.ll
M llvm/test/Transforms/InstCombine/unsigned-add-overflow-check-via-add.ll
M llvm/test/Transforms/InstCombine/unsigned-add-overflow-check-via-xor.ll
M llvm/test/Transforms/InstCombine/unsigned-add-overflow-check.ll
M llvm/test/Transforms/InstCombine/unsigned-sub-lack-of-overflow-check.ll
M llvm/test/Transforms/InstCombine/unsigned-sub-overflow-check.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts.ll
M llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_shuffle.ll
M llvm/test/Transforms/InstCombine/vector-reverse.ll
M llvm/test/Transforms/InstCombine/vector-xor.ll
M llvm/test/Transforms/InstCombine/widenable-conditions.ll
M llvm/test/Transforms/InstCombine/xor.ll
M llvm/test/Transforms/InstCombine/xor2.ll
M llvm/test/Transforms/InstCombine/zext-bool-add-sub.ll
M llvm/test/Transforms/InstCombine/zext-or-icmp.ll
M llvm/test/Transforms/InstCombine/zext.ll
M llvm/test/Transforms/InstSimplify/ConstProp/logf128.ll
M llvm/test/Transforms/LoadStoreVectorizer/AArch64/pr37865.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/extract-last-veclane.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/pr36983.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/uniform-args-call-variants.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
A llvm/test/Transforms/MemCpyOpt/pr102994.ll
M llvm/test/Transforms/PGOProfile/chr.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoist-runtime-checks.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/peel-multiple-unreachable-exits-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/quant_4x4.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
M llvm/test/Transforms/PhaseOrdering/X86/hoist-load-of-baseptr.ll
M llvm/test/Transforms/PhaseOrdering/X86/speculation-vs-tbaa.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll
M llvm/test/Transforms/PhaseOrdering/fast-basictest.ll
M llvm/test/Transforms/PhaseOrdering/reassociate-instcombine.ll
M llvm/test/Transforms/PhaseOrdering/runtime-check-removal.ll
M llvm/test/Transforms/PhaseOrdering/scev-custom-dl.ll
M llvm/test/Transforms/Reassociate/fast-ArrayOutOfBounds.ll
M llvm/test/Transforms/Reassociate/fast-SubReassociate.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/multiple_reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/scalarization-overhead.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/shuffle-vectors-mask-size.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/combined-loads-stored.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll
M llvm/test/Transforms/SLPVectorizer/X86/addsub.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp_commute-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp_commute.ll
M llvm/test/Transforms/SLPVectorizer/X86/ctlz.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-many-users-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-node-same-as-vect-but-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/inst_size_bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll
A llvm/test/Transforms/SLPVectorizer/X86/phi-nodes-as-operand-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark-partial-loads-vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-scalar-in-same-phi-extract.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reused-pointer.ll
M llvm/test/Transforms/SLPVectorizer/X86/schedule_budget_debug_info.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2-unord.ll
M llvm/test/Transforms/SLPVectorizer/X86/tiny-tree.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect-gather-same-nodes.ll
M llvm/test/Transforms/SROA/alignment.ll
M llvm/test/Transforms/SROA/vector-promotion.ll
A llvm/test/Transforms/SimplifyCFG/switch-on-cmp.ll
M llvm/test/Transforms/StructurizeCFG/workarounds/needs-unified-loop-exits.ll
M llvm/test/Transforms/UnifyLoopExits/integer_guards.ll
M llvm/test/Transforms/UnifyLoopExits/nested.ll
M llvm/test/Transforms/UnifyLoopExits/restore-ssa.ll
M llvm/test/Transforms/UnifyLoopExits/undef-phis.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/x86-loopvectorize-costmodel.ll.expected
M llvm/test/tools/llvm-cgdata/merge-archive.test
M llvm/test/tools/llvm-cgdata/merge-concat.test
M llvm/test/tools/llvm-cgdata/merge-double.test
M llvm/test/tools/llvm-cgdata/merge-single.test
M llvm/tools/llvm-reduce/deltas/RunIRPasses.cpp
M llvm/unittests/ADT/STLExtrasTest.cpp
M llvm/unittests/ADT/StringExtrasTest.cpp
M llvm/unittests/ADT/StringRefTest.cpp
M llvm/unittests/Analysis/CtxProfAnalysisTest.cpp
M llvm/unittests/Analysis/GraphWriterTest.cpp
M llvm/unittests/CGData/CMakeLists.txt
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/TableGen.cpp
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/tests/Inputs/shtest-define/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-define/value-escaped.txt
M mlir/include/mlir/Analysis/DataFlow/ConstantPropagationAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/DenseAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/IntegerRangeAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/LivenessAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/SparseAnalysis.h
M mlir/include/mlir/Dialect/Func/Extensions/MeshShardingExtensions.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
R mlir/include/mlir/Dialect/Mesh/IR/TensorShardingInterfaceImpl.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
A mlir/include/mlir/Dialect/Tensor/Extensions/AllExtensions.h
A mlir/include/mlir/Dialect/Tensor/Extensions/MeshShardingExtensions.h
A mlir/include/mlir/Dialect/Tensor/IR/ShardingInterfaceImpl.h
M mlir/include/mlir/IR/MLIRContext.h
M mlir/include/mlir/InitAllDialects.h
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Analysis/DataFlow/ConstantPropagationAnalysis.cpp
M mlir/lib/Analysis/DataFlow/DenseAnalysis.cpp
M mlir/lib/Analysis/DataFlow/IntegerRangeAnalysis.cpp
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/lib/Analysis/DataFlow/SparseAnalysis.cpp
M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/Mesh/Interfaces/CMakeLists.txt
R mlir/lib/Dialect/Mesh/Interfaces/TensorShardingInterfaceImpl.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Tensor/CMakeLists.txt
A mlir/lib/Dialect/Tensor/Extensions/AllExtensions.cpp
A mlir/lib/Dialect/Tensor/Extensions/CMakeLists.txt
A mlir/lib/Dialect/Tensor/Extensions/MeshShardingExtensions.cpp
M mlir/lib/TableGen/Operator.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Analysis/DataFlow/test-last-modified-error.mlir
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/Linalg/canonicalize.mlir
M mlir/test/Dialect/Linalg/loops.mlir
M mlir/test/Dialect/MemRef/ops.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
R mlir/test/Integration/GPU/CUDA/sm90/asd
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
A mlir/test/Target/LLVMIR/llvmir-phi-loc.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/openmp-private.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-byref.mlir
M mlir/test/lib/Analysis/DataFlow/TestDenseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseDataFlowAnalysis.h
M mlir/test/lib/Analysis/DataFlow/TestDenseForwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestSparseBackwardDataFlowAnalysis.cpp
M mlir/tools/mlir-lsp-server/CMakeLists.txt
M offload/DeviceRTL/CMakeLists.txt
A offload/DeviceRTL/include/Profiling.h
A offload/DeviceRTL/src/Profiling.cpp
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/plugins-nextgen/common/include/ErrorReporting.h
M offload/plugins-nextgen/common/include/GlobalHandler.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/GlobalHandler.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/test/CMakeLists.txt
M offload/test/lit.cfg
M offload/test/lit.site.cfg.in
A offload/test/offloading/pgo1.c
M offload/test/sanitizer/double_free.c
M offload/test/sanitizer/double_free_racy.c
M offload/test/sanitizer/free_wrong_ptr_kind.c
M offload/test/sanitizer/free_wrong_ptr_kind.cpp
A offload/test/sanitizer/ptr_outside_alloc_1.c
A offload/test/sanitizer/ptr_outside_alloc_2.c
A offload/test/sanitizer/use_after_free_1.c
A offload/test/sanitizer/use_after_free_2.c
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] landed version
Created using spr 1.3.5-bogner
Compare: https://github.com/llvm/llvm-project/compare/4f7a96fc2327...8dda6715ce94
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