[all-commits] [llvm/llvm-project] 8ab614: [AArch64] Lower aarch64_neon_saddlv via SADDLV nod...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8ab61404e866539f5e28e0f72ba7a510fa51dd3a
      https://github.com/llvm/llvm-project/commit/8ab61404e866539f5e28e0f72ba7a510fa51dd3a
  Author: David Green <david.green at arm.com>
  Date:   2024-08-22 (Thu, 22 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll
    M llvm/test/CodeGen/AArch64/arm64-neon-across.ll

  Log Message:
  -----------
  [AArch64] Lower aarch64_neon_saddlv via SADDLV nodes. (#103307)

This mirrors what GISel already does, extending the existing lowering of
aarch64_neon_saddlv/aarch64_neon_uaddlv to SADDLV/UADDLV. This allows us
to remove some tablegen patterns, and provides a little nicer codegen in
places as the nodes represent the result being in a vector register
correctly.



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