[all-commits] [llvm/llvm-project] 2b84fe: RISC-V: Add fminimumnum and fmaximumnum support (#...

[YunQiang Su via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2b84fe6f16bf2beb78e48e40db3752143ded6228
      https://github.com/llvm/llvm-project/commit/2b84fe6f16bf2beb78e48e40db3752143ded6228
  Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
  Date:   2024-08-21 (Wed, 21 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
    M llvm/test/CodeGen/RISCV/double-intrinsics.ll
    M llvm/test/CodeGen/RISCV/float-intrinsics.ll
    M llvm/test/CodeGen/RISCV/half-intrinsics.ll

  Log Message:
  -----------
  RISC-V: Add fminimumnum and fmaximumnum support (#104411)

Since 2.2, `fmin.s/fmax.s` instructions follow the IEEE754-2019, if F
extension is avaiable; and `fmin.d/fmax.d` also follow the IEEE754-2019
if D extension is avaiable.

So, let's mark them as Legal.



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