[all-commits] [llvm/llvm-project] 1e9d00: [RISCV][GISel] Split LoadStoreActions in LoadActio...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1e9d0028d35ae69263aa848b4cb02245f442eb5c
      https://github.com/llvm/llvm-project/commit/1e9d0028d35ae69263aa848b4cb02245f442eb5c
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-20 (Tue, 20 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp

  Log Message:
  -----------
  [RISCV][GISel] Split LoadStoreActions in LoadActions and StoreActions.

Remove widenToNextPow2 from StoreActions.
Reorder clampScalar and lowerIfMemSizeNotByteSizePow2 for StoreActions.

These match AArch64 and got me further on a test case I was playing with
that contained a i129 store.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications