[all-commits] [llvm/llvm-project] f7d94b: [SelectionDAG] Use getAllOnesConstant.
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Mon Aug 19 11:30:44 PDT 2024
Branch: refs/heads/users/vitalybuka/spr/main.reland-asan-catch-initialization-order-fiasco-in-modules-without
Home: https://github.com/llvm/llvm-project
Commit: f7d94b783f62f61cb9085adaa71e1ffa95918bcc
https://github.com/llvm/llvm-project/commit/f7d94b783f62f61cb9085adaa71e1ffa95918bcc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-17 (Sat, 17 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[SelectionDAG] Use getAllOnesConstant.
Commit: efa859cd3e195bc4c377e8acf21d45fa410c63b6
https://github.com/llvm/llvm-project/commit/efa859cd3e195bc4c377e8acf21d45fa410c63b6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-17 (Sat, 17 Aug 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Log Message:
-----------
[ARM] Use SelectonDAG::getSignedConstant.
Commit: 69115cce29d5dbbdacaa05aaedc89810aa58ef0c
https://github.com/llvm/llvm-project/commit/69115cce29d5dbbdacaa05aaedc89810aa58ef0c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-17 (Sat, 17 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
Log Message:
-----------
[AArch64] Use SelectionDAG::getSignedConstant/getAllOnesConstant.
Commit: 27a62ec72aed3faf1388600f485552471b580e3b
https://github.com/llvm/llvm-project/commit/27a62ec72aed3faf1388600f485552471b580e3b
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-08-17 (Sat, 17 Aug 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/TargetPassConfig.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Transforms/Scalar.h
A llvm/include/llvm/Transforms/Scalar/LoopTermFold.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Transforms/Scalar/CMakeLists.txt
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
A llvm/lib/Transforms/Scalar/LoopTermFold.cpp
M llvm/lib/Transforms/Scalar/Scalar.cpp
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-cost-compare.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/term-fold-crash.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold-negative-testcase.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-unreachable-bb-phi-node.ll
Log Message:
-----------
[LSR] Split the -lsr-term-fold transformation into it's own pass (#104234)
This transformation doesn't actually use any of the internal state of
LSR and recomputes all information from SCEV. Splitting it out makes
it easier to test.
Note that long term I would like to write a version of this transform
which *is* integrated with LSR's solver, but if that happens, we'll
just delete the extra pass.
Integration wise, I switched from using TTI to using a pass configuration
variable. This seems slightly more idiomatic, and means we don't run
the extra logic on any target other than RISCV.
Commit: addeb22f109158921bae9d91fb76eda99081fa82
https://github.com/llvm/llvm-project/commit/addeb22f109158921bae9d91fb76eda99081fa82
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn
Log Message:
-----------
[gn build] Port 27a62ec72aed
Commit: f499a3fe5fb6fd816d35b541e67a3761093cfded
https://github.com/llvm/llvm-project/commit/f499a3fe5fb6fd816d35b541e67a3761093cfded
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-17 (Sat, 17 Aug 2024)
Changed paths:
M llvm/lib/Target/VE/VECustomDAG.cpp
M llvm/lib/Target/VE/VEInstrInfo.td
Log Message:
-----------
[VE] Use SelectionDAG::getSignedConstant/getAllOnesConstant.
Commit: c4c9f39ba46b52ea88dffd54217f0205788751c6
https://github.com/llvm/llvm-project/commit/c4c9f39ba46b52ea88dffd54217f0205788751c6
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-firstprivate.mlir
Log Message:
-----------
[MLIR][OpenMP] Fix MLIR->LLVM value matching in privatization logic (#103718)
Fixes #102935
Updates matching logic for finding the LLVM value that corresponds to an
MLIR value. We need that matching to find the delayed privatizer for an
LLVM value being privatized.
The issue occures when there is an "indirect" correspondence between
MLIR and LLVM values: in some cases the values we are trying to match
stem from a pair of load/store ops that point to the same memref. This
PR adds such matching logic.
Commit: 93ab50ab3530d82579062fc471f5e91c42eacdde
https://github.com/llvm/llvm-project/commit/93ab50ab3530d82579062fc471f5e91c42eacdde
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-17 (Sat, 17 Aug 2024)
Changed paths:
M llvm/include/llvm/ADT/APInt.h
Log Message:
-----------
[APInt] Replace enum with static constexpr member variables. NFC
With C++17 we no longer need the enum to prevent ODR use.
Commit: 88f801037338a2c273a8f6dea8ebcb0c48a2cc06
https://github.com/llvm/llvm-project/commit/88f801037338a2c273a8f6dea8ebcb0c48a2cc06
Author: Mike Crowe <mac at mcrowe.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-tidy] Correct typo in ReleaseNotes.rst (#104674)
Commit: e994494a590ea14d4bc9bf14b6cd7b8bc7ce06b6
https://github.com/llvm/llvm-project/commit/e994494a590ea14d4bc9bf14b6cd7b8bc7ce06b6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-17 (Sat, 17 Aug 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Log Message:
-----------
[PowerPC] Use MathExtras helpers to simplify code. NFC (#104691)
Commit: e59c8241fa6a5a9c8f9175b0ed7b0dfdb5c945cf
https://github.com/llvm/llvm-project/commit/e59c8241fa6a5a9c8f9175b0ed7b0dfdb5c945cf
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-17 (Sat, 17 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
Log Message:
-----------
[RISCV] Remove unused tablegen classes from unratified Zbp instructions. NFC
These weren't removed when we removed Zbp.
Commit: 07bd3bb9b7eb34426a81de2b988f53f08611ab35
https://github.com/llvm/llvm-project/commit/07bd3bb9b7eb34426a81de2b988f53f08611ab35
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/Pointer.cpp
Log Message:
-----------
[clang][bytecode][NFC] Improve Pointer::print()
Do not access PointeeStorage.BS.Pointee if we have a non-block pointer
and extend printing to handle function pointers as well.
Commit: dac182990dabe8d15cfb8079aba68df2ded015aa
https://github.com/llvm/llvm-project/commit/dac182990dabe8d15cfb8079aba68df2ded015aa
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
A clang/test/AST/ByteCode/codegen.c
Log Message:
-----------
[clang][bytecode] IntPointer::atOffset() should append (#104686)
... to current offset. This breaks other tests which this commit also
fixes. Namely, getIndex() should return the integer representation for
non-block pointers.
Commit: 11259343593043c77678b59d420159fcd147a858
https://github.com/llvm/llvm-project/commit/11259343593043c77678b59d420159fcd147a858
Author: Mital Ashok <mital at mitalashok.co.uk>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/Analysis/builtin_signbit.cpp
M clang/test/Sema/constant-builtins-2.c
Log Message:
-----------
[Clang] `constexpr` builtin floating point classification / comparison functions (#94118)
As per [P0533R9](https://wg21.link/P0533R9), the corresponding C++
`[c.math.fpclass]` standard library functions for the C macros are now
`constexpr`.
The only classification function that wasn't already `constexpr` was
`__builtin_signbit`.
The floating point comparison functions `__builtin_isgreater`,
`__builtin_isgreaterequal`, `__builtin_isless`, `__builtin_islessequal`,
`__builtin_islessgreater` and `__builtin_isunordered` are now
`constexpr`.
The C23 macro `iseqsig` is not currently supported because
`__bulitin_iseqsig` doesn't exist yet (and C++26 is still currently
based on C18).
This also allows them to be constant folded in C, matching the behaviour
of GCC.
Commit: 10fe531d6c9d46fb9584d33782f26d27887c72fd
https://github.com/llvm/llvm-project/commit/10fe531d6c9d46fb9584d33782f26d27887c72fd
Author: David Green <david.green at arm.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td
Log Message:
-----------
[GlobalISel] Add and use an Opcode variable and update match-table-cxx.td checks. NFC
Commit: c4092d326ae4989f54c5f01d3a077841fd76bc2f
https://github.com/llvm/llvm-project/commit/c4092d326ae4989f54c5f01d3a077841fd76bc2f
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaStmt.cpp
M clang/test/Sema/c2x-nodiscard.c
Log Message:
-----------
[Clang] warn on discarded [[nodiscard]] function results after casting in C (#104677)
Fixes #104391
Commit: 71801707e33c235656b172fa7dfb8662473a95c2
https://github.com/llvm/llvm-project/commit/71801707e33c235656b172fa7dfb8662473a95c2
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M clang/test/Sema/constant-builtins-2.c
Log Message:
-----------
[clang][test] Remove bytecode interpreter RUN line from test
Specifically, from constant-builtins2. This breaks runners using
sanitizers.
See https://github.com/llvm/llvm-project/pull/94118
Commit: e9e3a183d6d8d8729223b7131aa57fd9f02f0440
https://github.com/llvm/llvm-project/commit/e9e3a183d6d8d8729223b7131aa57fd9f02f0440
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
Log Message:
-----------
[LV] Don't cost branches and conditions to empty blocks.
Update the legacy cost model skip branches with successors blocks
that are empty or only contain dead instructions, together with their
conditions. Such branches and conditions won't result in any
generated code and will be cleaned up by VPlan transforms.
This fixes a difference between the legacy and VPlan-based cost model.
When running LV in its usual pipeline position, such dead blocks should
already have been cleaned up, but they might be generated manually or by
fuzzers.
Fixes https://github.com/llvm/llvm-project/issues/100591.
Commit: ff80e1ffe79d893be990cda981526a321697eb9a
https://github.com/llvm/llvm-project/commit/ff80e1ffe79d893be990cda981526a321697eb9a
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstSimplify/saturating-add-sub.ll
Log Message:
-----------
[InstSimplify] Simplify `uadd.sat(X, Y) u>= X + Y` and `usub.sat(X, Y) u<= X, Y` (#104698)
These patterns are found in harfbuzz/typst.
Alive2: https://alive2.llvm.org/ce/z/cxyjYV
Commit: 29811a81f77c22523dbfffbd2d39ac731baea37b
https://github.com/llvm/llvm-project/commit/29811a81f77c22523dbfffbd2d39ac731baea37b
Author: PaulXiCao <paulxicao7 at gmail.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx17.rst
Log Message:
-----------
[libc++][docs] Fixing hyperlink for mathematical special function documentation (#104444)
Inter-documentation link for progress tracking of mathematical special
function is fixed.
Commit: 6ed2a6bf0d26122210c8732d80431529784c4000
https://github.com/llvm/llvm-project/commit/6ed2a6bf0d26122210c8732d80431529784c4000
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M flang/include/flang/Evaluate/integer.h
M flang/lib/Evaluate/integer.cpp
Log Message:
-----------
[Flang]: Use actual endianness for Integer<80> (#103928)
This PR is to use the actual endianness of the platform when instantiate
Integer<80> so that AIX (big-endian) will not get confused.
Commit: d082f1f37d8cb7a0c6875537ba873a631b154d53
https://github.com/llvm/llvm-project/commit/d082f1f37d8cb7a0c6875537ba873a631b154d53
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/Boolean.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
Log Message:
-----------
[clang][bytecode] Only booleans can be inverted
No need to have the Inv() function be templated.
Commit: e05307f6633ca405834a4fd24d858ffb676c9170
https://github.com/llvm/llvm-project/commit/e05307f6633ca405834a4fd24d858ffb676c9170
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
Log Message:
-----------
[clang][OpenMP] Avoid multiple calls to getCurrentDirective in DSAChecker, NFC
Commit: dd40632b52d8da2146a12254afc900315ac3c2e4
https://github.com/llvm/llvm-project/commit/dd40632b52d8da2146a12254afc900315ac3c2e4
Author: c8ef <c8ef at outlook.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
Log Message:
-----------
[clang] fix divide by zero in ComplexExprEvaluator (#104666)
fix: #55390.
---------
Co-authored-by: Sergei Barannikov <barannikov88 at gmail.com>
Commit: bbcb625798514f1cd6ef04818381d38ea26b23e5
https://github.com/llvm/llvm-project/commit/bbcb625798514f1cd6ef04818381d38ea26b23e5
Author: Mike Crowe <mac at mcrowe.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseStdFormatCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStdPrintCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-std-format.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-std-print.rst
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-format-member.cpp
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-print-member.cpp
Log Message:
-----------
[clang-tidy] Support member functions with modernize-use-std-print/format (#104675)
These checks can be made to work on member functions quite easily and
it's not unknown to have at least printf-style functions as members.
Let's remove the restriction.
Commit: de5ea2d122c31e1551654ff506c33df299f351b8
https://github.com/llvm/llvm-project/commit/de5ea2d122c31e1551654ff506c33df299f351b8
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
Log Message:
-----------
[clang][OpenMP] Change /* ParamName */ to /*ParamName=*/, NFC
Change
foo(/* Index */ 0);
to
foo(/*Index=*/0);
There was a mix of these two formats in the source. Clang-format treats
the latter one a bit better, so use that one consistently.
Commit: bcbe9d6c776bc02bfe8f911607240af0d1775d79
https://github.com/llvm/llvm-project/commit/bcbe9d6c776bc02bfe8f911607240af0d1775d79
Author: Mital Ashok <mital at mitalashok.co.uk>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
Log Message:
-----------
[Clang] Do not allow `[[clang::lifetimebound]]` on explicit object member functions (#96113)
Previously, `[[clang::lifetimebound]]` applied to an explicit object
member function did nothing and was silently ignored.
Now issue the error diagnostic `'lifetimebound' attribute cannot be
applied; explicit object member function has no implicit object
parameter`
Commit: 0d150db214e2aa13a825b563c7238e1243d61db1
https://github.com/llvm/llvm-project/commit/0d150db214e2aa13a825b563c7238e1243d61db1
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
R clang/include/clang/Rewrite/Core/DeltaTree.h
M clang/include/clang/Rewrite/Core/HTMLRewrite.h
R clang/include/clang/Rewrite/Core/RewriteBuffer.h
R clang/include/clang/Rewrite/Core/RewriteRope.h
M clang/include/clang/Rewrite/Core/Rewriter.h
M clang/lib/ARCMigrate/ARCMT.cpp
M clang/lib/ARCMigrate/ObjCMT.cpp
M clang/lib/Frontend/Rewrite/FixItRewriter.cpp
M clang/lib/Frontend/Rewrite/HTMLPrint.cpp
M clang/lib/Frontend/Rewrite/RewriteMacros.cpp
M clang/lib/Frontend/Rewrite/RewriteModernObjC.cpp
M clang/lib/Frontend/Rewrite/RewriteObjC.cpp
M clang/lib/Rewrite/CMakeLists.txt
R clang/lib/Rewrite/DeltaTree.cpp
M clang/lib/Rewrite/HTMLRewrite.cpp
R clang/lib/Rewrite/RewriteRope.cpp
M clang/lib/Rewrite/Rewriter.cpp
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
M clang/lib/Tooling/Core/Replacement.cpp
M clang/unittests/Rewrite/CMakeLists.txt
R clang/unittests/Rewrite/RewriteBufferTest.cpp
A llvm/include/llvm/ADT/DeltaTree.h
A llvm/include/llvm/ADT/RewriteBuffer.h
A llvm/include/llvm/ADT/RewriteRope.h
M llvm/lib/Support/CMakeLists.txt
A llvm/lib/Support/DeltaTree.cpp
A llvm/lib/Support/RewriteBuffer.cpp
A llvm/lib/Support/RewriteRope.cpp
M llvm/unittests/ADT/CMakeLists.txt
A llvm/unittests/ADT/RewriteBufferTest.cpp
Log Message:
-----------
[llvm][clang] Move RewriterBuffer to ADT. (#99770)
These classes are not specific to clang and useful for other rewriter
tools (flagged in previous review).
Commit: a28c20244242e6f4faad3e8ac673cb8f972c9d7a
https://github.com/llvm/llvm-project/commit/a28c20244242e6f4faad3e8ac673cb8f972c9d7a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Rewrite/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Rewrite/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
Log Message:
-----------
[gn build] Port 0d150db214e2
Commit: caa1070b1c880627b223dc3884860a64e4b510c7
https://github.com/llvm/llvm-project/commit/caa1070b1c880627b223dc3884860a64e4b510c7
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/test/Driver/hip-toolchain-rdc.hip
Log Message:
-----------
[HIP] search fatbin symbols for libs passed by -l (#104638)
For -fgpu-rdc linking, clang needs to collect undefined fatbin symbols
and resolve them to the embedded fatbin.
This has been done for object files and archive files passed as input
files to clang.
However, the same action is not performed for archive files passed
through -l options, which causes missing symbols.
This patch adds that.
Commit: 5c13f9aea280f1d499be7eca45b85371b0240c48
https://github.com/llvm/llvm-project/commit/5c13f9aea280f1d499be7eca45b85371b0240c48
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M libc/startup/gpu/amdgpu/start.cpp
Log Message:
-----------
[libc] Add single threaded kernel attributes to AMDGPU startup utility (#104651)
Summary:
I fixed the errors here recently so I can actually use these. This
shouldn't impact much, just should hopefully make the code generated
slightly better.
Commit: deb6b45c32687275a6d4e24326ffc9700f8ae52c
https://github.com/llvm/llvm-project/commit/deb6b45c32687275a6d4e24326ffc9700f8ae52c
Author: jameshu15869 <55058507+jameshu15869 at users.noreply.github.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M libc/benchmarks/gpu/LibcGpuBenchmark.cpp
M libc/benchmarks/gpu/LibcGpuBenchmark.h
M libc/benchmarks/gpu/src/math/CMakeLists.txt
A libc/benchmarks/gpu/src/math/atan2_benchmark.cpp
M libc/benchmarks/gpu/timing/amdgpu/timing.h
M libc/benchmarks/gpu/timing/nvptx/timing.h
Log Message:
-----------
[libc][gpu] Add Atan2 Benchmarks (#104708)
This PR adds benchmarking for `atan2()`, `__nv_atan2()`, and
`__ocml_atan2_f64()` using the same setup as `sin()`. This PR also adds
support for throughout bencmarking for functions with 2 inputs.
Commit: 79d021116d8434d28e179660d31f4bd6cdbccd62
https://github.com/llvm/llvm-project/commit/79d021116d8434d28e179660d31f4bd6cdbccd62
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
A llvm/test/MC/ELF/relax-branch.s
Log Message:
-----------
[MC] Add test that requires multiple relaxation steps
This can catch the code size regression
due to the reverted be5a845e4c29aadb513ae6e5e2879dccf37efdbb
("[MC] Compute fragment offsets eagerly").
Commit: bf5cd4220d20d0ee5533d55f463612fbe2980071
https://github.com/llvm/llvm-project/commit/bf5cd4220d20d0ee5533d55f463612fbe2980071
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
Log Message:
-----------
[MIPS] Remove expensive LLVM_DEBUG relocation dump
The input is usually ordered by offset, so inspecting the output is
sufficient. The super expensive relocation dump is not conventional.
Commit: 3496245ed3d0b4d24444260da77dcdb93512fb5a
https://github.com/llvm/llvm-project/commit/3496245ed3d0b4d24444260da77dcdb93512fb5a
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Change GNU style language standard to LS_Latest (#104669)
Fixes #104655.
Commit: 0224d8355d84b3eee2390cd13bb0b749ba40b0db
https://github.com/llvm/llvm-project/commit/0224d8355d84b3eee2390cd13bb0b749ba40b0db
Author: Frederic Cambus <fred at statdns.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M clang/tools/scan-build/man/scan-build.1
Log Message:
-----------
Update Clang version from 19 to 20 in scan-build.1.
Similar to D110763.
Commit: 70f3863b5f30e856278f399b068a30bc4d5d16c2
https://github.com/llvm/llvm-project/commit/70f3863b5f30e856278f399b068a30bc4d5d16c2
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
Log Message:
-----------
[DAG][PatternMatch] Add support for matchers with flags; NFC
Add support for matching with `SDNodeFlags` i.e `add` with `nuw`.
This patch adds helpers for `or disjoint` or `zext nneg` with the same
names as we have in IR/PatternMatch api.
Closes #103060
Commit: c6e16a49ef41261b01aabc27f4b806af6cc81a20
https://github.com/llvm/llvm-project/commit/c6e16a49ef41261b01aabc27f4b806af6cc81a20
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
Log Message:
-----------
[TLI] Add support for inferring attr `cold`/`noreturn` on `std::terminate` and `__cxa_throw`
These functions are both inherently on the error path so `cold` seems
appropriate. `noreturn` is definitional.
Closes #101622
Commit: 1a6bf94407af7962345ffaf6ac9e9a9766fd8913
https://github.com/llvm/llvm-project/commit/1a6bf94407af7962345ffaf6ac9e9a9766fd8913
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M llvm/include/llvm/MC/MCELFObjectWriter.h
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
Log Message:
-----------
[MC] Remove ELFRelocationEntry::OriginalAddend
For MIPS's o32 ABI (REL), https://reviews.llvm.org/D19718 introduced
`OriginalAddend` to find the matching R_MIPS_LO16 relocation for
R_MIPS_GOT16 when STT_SECTION conversion is applicable.
lw $2, %lo(local1)
lui $2, %got(local1)
However, we could just store the original `Addend` in
`ELFRelocationEntry` and remove `OriginalAddend`.
Note: The relocation ordering algorithm in
https://reviews.llvm.org/D19718 is inefficient (#104562), which will be
addressed by another patch.
Commit: f16125a13ce725b1e936468e08257c0fbb80c0fa
https://github.com/llvm/llvm-project/commit/f16125a13ce725b1e936468e08257c0fbb80c0fa
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
A llvm/test/CodeGen/X86/fold-loop-of-urem.ll
A llvm/test/Transforms/CodeGenPrepare/X86/fold-loop-of-urem.ll
Log Message:
-----------
[CodeGenPrepare][X86] Add tests for folding `urem` with loop invariant value; NFC
Commit: c64ce8bf283120fd145a57d0e61f9697f719139d
https://github.com/llvm/llvm-project/commit/c64ce8bf283120fd145a57d0e61f9697f719139d
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/test/CodeGen/X86/fold-loop-of-urem.ll
M llvm/test/Transforms/CodeGenPrepare/X86/fold-loop-of-urem.ll
Log Message:
-----------
[CodeGenPrepare] Folding `urem` with loop invariant value
```
for(i = Start; i < End; ++i)
Rem = (i nuw+ IncrLoopInvariant) u% RemAmtLoopInvariant;
```
->
```
Rem = (Start nuw+ IncrLoopInvariant) % RemAmtLoopInvariant;
for(i = Start; i < End; ++i, ++rem)
Rem = rem == RemAmtLoopInvariant ? 0 : Rem;
```
In its current state, only if `IncrLoopInvariant` and `Start` both
being zero.
Alive2 seemed unable to prove this (see:
https://alive2.llvm.org/ce/z/ATGDp3 which is clearly wrong but still
checks out...) so wrote an exhaustive test here:
https://godbolt.org/z/WYa561388
Closes #96625
Commit: 7d5281a66d5d42c65cfb9d95eaf9aa01afb089fb
https://github.com/llvm/llvm-project/commit/7d5281a66d5d42c65cfb9d95eaf9aa01afb089fb
Author: Austin Kerbow <Austin.Kerbow at amd.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
Log Message:
-----------
[AMDGPU][NFC] Fix preload-kernarg.ll test after attributor move (#98840)
Update was to stale version of the test with missing functions and extra
runlines that had been removed.
Commit: 4eefc8d4cee1808f44710622c8c3b66281feb8a3
https://github.com/llvm/llvm-project/commit/4eefc8d4cee1808f44710622c8c3b66281feb8a3
Author: Bimo <rui.xu at intel.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M mlir/python/mlir/dialects/tensor.py
M mlir/test/python/dialects/linalg/opdsl/emit_matmul.py
M mlir/test/python/dialects/linalg/ops.py
Log Message:
-----------
[MLIR][Python] enhance python api for tensor.empty (#103087)
Since we have extended `EmptyOp`, maybe we should also provide a
corresponding `tensor.empty` method. In the downstream usage, I tend to
use APIs with all lowercase letters to create ops, so having a
`tensor.empty` to replace the extended `tensor.EmptyOp` would keep my
code style consistent.
Commit: 7f87b5bf0e2f0e01735e5abe724d7fe5c69d202e
https://github.com/llvm/llvm-project/commit/7f87b5bf0e2f0e01735e5abe724d7fe5c69d202e
Author: Tianqing Wang <tianqing.wang at intel.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SwitchLoweringUtils.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/unpredictable-brcond.ll
Log Message:
-----------
[SelectionDAG][X86] Preserve unpredictable metadata for conditional branches in SelectionDAG, as well as JCCs generated by X86 backend. (#102101)
This builds on 09515f2c2, which preserves unpredictable metadata in
CodeGen for `select`. This patch does it for conditional branches.
Commit: 731ae694a3d8f4d39e855c9a82c97d4f170fd48a
https://github.com/llvm/llvm-project/commit/731ae694a3d8f4d39e855c9a82c97d4f170fd48a
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/test/CodeGen/X86/fold-loop-of-urem.ll
M llvm/test/Transforms/CodeGenPrepare/X86/fold-loop-of-urem.ll
Log Message:
-----------
Revert "[CodeGenPrepare] Folding `urem` with loop invariant value"
This reverts commit c64ce8bf283120fd145a57d0e61f9697f719139d.
Seems to be causing stage2 failures on buildbots. Reverting while I
investigate.
Commit: a80a90e34b1f26422ebf56e922abe2c193607c81
https://github.com/llvm/llvm-project/commit/a80a90e34b1f26422ebf56e922abe2c193607c81
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/rvv/zvbc.s
A llvm/test/MC/RISCV/rvv/zvkgs.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV][MC] Support experimental extensions Zvbc32e and Zvkgs (#103709)
These two extensions add addtional instructions for carryless
multiplication with 32-bits elements and Vector-Scalar GCM
instructions.
Please see https://github.com/riscv/riscv-isa-manual/pull/1306.
Commit: 82fdfd4aa7f60b1f8e715211b925a7f2bfe57ea9
https://github.com/llvm/llvm-project/commit/82fdfd4aa7f60b1f8e715211b925a7f2bfe57ea9
Author: Akshat Oke <76596238+Akshat-Oke at users.noreply.github.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/TableGen/Error.cpp
Log Message:
-----------
[TableGen] Print Error and not crash on dumping non-string values (#104568)
Co-authored-by: Akshat Oke <Akshat.Oke at amd.com>
Commit: 7faf1a0868cb6a6a05e454044239292c454e0a71
https://github.com/llvm/llvm-project/commit/7faf1a0868cb6a6a05e454044239292c454e0a71
Author: Daniel Cederman <cederman at gaisler.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Target/Sparc/DelaySlotFiller.cpp
M llvm/lib/Target/Sparc/LeonFeatures.td
M llvm/lib/Target/Sparc/LeonPasses.cpp
M llvm/lib/Target/Sparc/LeonPasses.h
M llvm/lib/Target/Sparc/Sparc.h
M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
A llvm/test/CodeGen/SPARC/tn0009.mir
A llvm/test/CodeGen/SPARC/tn0010.mir
A llvm/test/CodeGen/SPARC/tn0011.ll
A llvm/test/CodeGen/SPARC/tn0012.mir
A llvm/test/CodeGen/SPARC/tn0013.mir
Log Message:
-----------
[Sparc] Add errata workaround pass for GR712RC and UT700 (#103843)
This patch adds a pass that provides workarounds for the errata
described in GRLIB-TN-0009, GRLIB-TN-0010, GRLIB-TN-0011, GRLIB-TN-0012,
and GRLIB-TN-0013, that are applicable to the GR712RC and UT700. The
documents are available for download from here:
https://www.gaisler.com/index.php/information/app-tech-notes
The pass will detect certain sensitive instruction sequences and prevent
them from occurring by inserting NOP instruction. Below is an overview
of each of the workarounds. A similar implementation is available in
GCC.
GRLIB-TN-0009:
* Insert NOPs to prevent the sequence (stb/sth/st/stf) -> (single
non-store/load instruction) -> (any store)
* Insert NOPs to prevent the sequence (std/stdf) -> (any store)
GRLIB-TN-0010:
* Insert a NOP between load instruction and atomic instruction (swap and
casa).
* Insert a NOP at branch target if load in delay slot and atomic
instruction at branch target.
* Do not allow functions to begin with atomic instruction.
GRLIB-TN-0011:
* Insert .p2align 4 before atomic instructions (swap and casa).
GRLIB-TN-0012:
* Place a NOP at the branch target of an integer branch if it is a
floating-point operation or a floating-point branch.
GRLIB-TN-0013:
* Prevent (div/sqrt) instructions in the delay slot.
* Insert NOPs to prevent the sequence (div/sqrt) -> (two or three
floating point operations or loads) -> (div/sqrt).
* Do not insert NOPs if any of the floating point operations have a
dependency on the destination register of the first (div/sqrt).
* Do not insert NOPs if one of the floating point operations is a
(div/sqrt).
* Insert NOPs to prevent (div/sqrt) followed by a branch.
Commit: f802c39cea29d587ba4db6f71352e3f11a994a89
https://github.com/llvm/llvm-project/commit/f802c39cea29d587ba4db6f71352e3f11a994a89
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-18 (Sun, 18 Aug 2024)
Changed paths:
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add more tests for RISCVISAInfo::checkDependency(). NFC
Commit: 164d1230f78b32647e1a6e948245e75f557a8068
https://github.com/llvm/llvm-project/commit/164d1230f78b32647e1a6e948245e75f557a8068
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
Log Message:
-----------
[RISCV] Simplify reserse fixed regs (#104736)
Add a macro to simplify some codes.
Commit: d489b7ccb7b43fe54dfb4b2884d7f1eb2cb5806e
https://github.com/llvm/llvm-project/commit/d489b7ccb7b43fe54dfb4b2884d7f1eb2cb5806e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Merge some ISA error reporting together and make some errors more precise.
Loop over the extension names that have the same error message.
Print the name of Zvk* extensions instead of 'zvk*'.
Commit: 10a4f1ef9e1f30729920d2dd22d75d1002e66d0d
https://github.com/llvm/llvm-project/commit/10a4f1ef9e1f30729920d2dd22d75d1002e66d0d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/TargetParser/RISCVISAInfo.cpp
Log Message:
-----------
[RISCV] Add helper functions to exploit similarity of some RISCVISAInfo::checkDependency() error strings. NFC
Commit: 371f936c456bca2b2af52f0d7fb9e7c9d1c0a1b7
https://github.com/llvm/llvm-project/commit/371f936c456bca2b2af52f0d7fb9e7c9d1c0a1b7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Make extension names lower case in RISCVISAInfo::checkDependency() error messages.
Commit: 985d64b03accbed8500a85372d716367d89b61be
https://github.com/llvm/llvm-project/commit/985d64b03accbed8500a85372d716367d89b61be
Author: hev <wangrui at loongson.cn>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchMergeBaseOffset.cpp
M llvm/test/CodeGen/LoongArch/can-not-realign-stack.ll
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf.ll
M llvm/test/CodeGen/LoongArch/lasx/vselect.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf.ll
M llvm/test/CodeGen/LoongArch/lsx/vselect.ll
M llvm/test/CodeGen/LoongArch/merge-base-offset.ll
Log Message:
-----------
[LoongArch] Merge base and offset for LSX/LASX memory accesses (#104452)
Commit: 83879f4f5311af334550c54c8279397a8aa33e7b
https://github.com/llvm/llvm-project/commit/83879f4f5311af334550c54c8279397a8aa33e7b
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/CodeGen/Hexagon/block-addr.ll
M llvm/test/DebugInfo/ARM/single-constant-use-preserves-dbgloc.ll
M llvm/test/Transforms/SimplifyCFG/X86/sink-common-code.ll
M llvm/test/Transforms/SimplifyCFG/sink-and-convert-switch.ll
Log Message:
-----------
[SimplifyCFG] Don't block sinking for allocas if no phi created (#104579)
SimplifyCFG sinking currently does not sink loads/stores of allocas,
because historically SROA was unable to handle the resulting IR. Since
then, SROA both learned to speculate loads/stores over selects and phis,
*and* SimplifyCFG sinking has been deferred to the end of the function
simplification pipeline, which means that SROA happens before it.
As such, I believe that this workaround should no longer be necessary.
Given how sensitive SimplifyCFG sinking seems to be, this patch takes a
very conservative step towards removing this, by allowing sinking if we
don't actually need to form a phi over the pointer argument.
This fixes https://github.com/llvm/llvm-project/issues/104567, where
sinking a store to an escaped alloca allows converting a switch into
arithmetic.
Commit: 5795f9e27390fe5c322853476b3c9ba8376e8541
https://github.com/llvm/llvm-project/commit/5795f9e27390fe5c322853476b3c9ba8376e8541
Author: Matthias Springer <me at m-sp.org>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M mlir/docs/BytecodeFormat.md
Log Message:
-----------
[mlir][docs] Update Bytecode documentation (#99854)
There were some discrepancies between the dialect section documentation
and the implementation.
Commit: cd60d10a10732154d95892219f70f0784f5a2249
https://github.com/llvm/llvm-project/commit/cd60d10a10732154d95892219f70f0784f5a2249
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[VPlan] Move some LoopVectorizationPlanner helpers to VPlan.cpp (NFC).
Members not requiring access to LoopVectorizationLegality or
LoopVectorizationCostModel can safely be moved out of the very large
LoopVectorization.cpp and are more accurately placed in VPlan.cpp
Commit: 5ab65a6c1c38eef2a096a6b9231281fb4876c387
https://github.com/llvm/llvm-project/commit/5ab65a6c1c38eef2a096a6b9231281fb4876c387
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Target/X86/X86ScheduleZnver2.td
M llvm/test/tools/llvm-mca/X86/Znver2/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/Znver2/resources-avx2.s
Log Message:
-----------
[X86] VPERM2*128 instructions aren't microcoded on znver2
This appears to be a copy+paste error from znver1 (which isn't really microcoded either - but it is rather complex!).
Confirmed with Agner + uops.info.
Commit: 9e3e8b5715d01fc7ac6b0bdcd1870f3823f3ab30
https://github.com/llvm/llvm-project/commit/9e3e8b5715d01fc7ac6b0bdcd1870f3823f3ab30
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Target/X86/X86ScheduleZnver1.td
M llvm/test/tools/llvm-mca/X86/Znver1/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/Znver1/resources-avx2.s
Log Message:
-----------
[X86] VPERM2*128 instructions aren't microcoded on znver1
AMD refer to them as microcoded, but not in the same way as LLVM - the uop count and pipe usage is high but predictable
Confirmed with Agner + uops.info.
Commit: 8b1916b7666ae29c3ca2a196f5d1062e2d51f10f
https://github.com/llvm/llvm-project/commit/8b1916b7666ae29c3ca2a196f5d1062e2d51f10f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Cleanup lowerShuffleWithUNPCK/PACK signatures to match (most) other lowerShuffle* methods. NFC.
Commit: 9211977d134d81cbc7a24f13e244334484c31b87
https://github.com/llvm/llvm-project/commit/9211977d134d81cbc7a24f13e244334484c31b87
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
A llvm/test/CodeGen/AArch64/sme-darwin-sve-vg.ll
Log Message:
-----------
[AArch64][SME] Return false from produceCompactUnwindFrame if VG save required. (#104588)
The compact unwind format requires all registers are stored in pairs, so
return false from produceCompactUnwindFrame if we require saving VG.
Commit: 63267ca9016aa334b329aa408716456b4e3799c8
https://github.com/llvm/llvm-project/commit/63267ca9016aa334b329aa408716456b4e3799c8
Author: Weining Lu <luweining at loongson.cn>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/ir-instruction/load-store-atomic.ll
Log Message:
-----------
[LoongArch] Fix the assertion for atomic store with 'ptr' type
Commit: 065d2d9c60da0214c17a8300385b22be1c26dc70
https://github.com/llvm/llvm-project/commit/065d2d9c60da0214c17a8300385b22be1c26dc70
Author: Christian Ulmann <christianulmann at gmail.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M mlir/lib/Dialect/LLVMIR/Transforms/InlinerInterfaceImpl.cpp
M mlir/test/Dialect/LLVMIR/inlining-alias-scopes.mlir
Log Message:
-----------
[MLIR][LLVM] Improve the noalias propagation during inlining (#104750)
This commit changes the LLVM dialect's inliner interface to properly
propagate noalias information to memory accesses that have different
underlying object. By always introducing an SSACopy intrinsic, it's
possible to understand that specific memory operations are using
unrelated pointers. Previously, the backwards slice walk did continue
beyond the boundary of the original function and failed to reason about
the "underlying objects".
Commit: 740f05545150fb01cfca8c16da50c956b4f30959
https://github.com/llvm/llvm-project/commit/740f05545150fb01cfca8c16da50c956b4f30959
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Rename getBestVF -> computeBestVF (NFC).
As suggested in https://github.com/llvm/llvm-project/pull/103033, more
accurately rename to computeBestVF, as it now does not simply return the
best VF, but directly computes it.
Commit: de5deb7b07db39810c4b07870c75ccc8dccc5fe9
https://github.com/llvm/llvm-project/commit/de5deb7b07db39810c4b07870c75ccc8dccc5fe9
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/aarch64-elf-pauthabi.c
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/test/CodeGen/AArch64/note-gnu-property-elf-pauthabi.ll
M llvm/test/tools/llvm-readobj/ELF/AArch64/aarch64-feature-pauth.s
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[PAC][ELF][AArch64] Encode several ptrauth features in PAuth core info (#102508)
For llvm_linux platform, define the following meaning for bits 9, 10,
11:
- bit 9: set if indirect gotos signing is enabled;
- bit 10: set if type info vtable pointer discrimination is enabled;
- bit 11: set if function pointer type discrimination is enabled.
Commit: b6d1df2afd0a464f3f37055f16fb9321a3b2eaaf
https://github.com/llvm/llvm-project/commit/b6d1df2afd0a464f3f37055f16fb9321a3b2eaaf
Author: Qiu Chaofan <qiucofan at cn.ibm.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/flags.c
A llvm/test/CodeGen/PowerPC/noredzone.ll
Log Message:
-----------
[PowerPC] Support -mno-red-zone option (#94581)
Commit: cde806b0e63fddcca013536b4bd55e45607205d1
https://github.com/llvm/llvm-project/commit/cde806b0e63fddcca013536b4bd55e45607205d1
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M lld/MachO/SyntheticSections.cpp
Log Message:
-----------
[lld][MachO] Fix a suspicous assert in SyntheticSections.cpp
This was comparing some .size() (uint64_t) against the sizeof a size_t
which changes with system bitness. This produced a warning that
brought this to my attention.
These tests were failing too on 32 bit Arm only:
lld :: MachO/objc-category-merging-complete-test.s
lld :: MachO/objc-category-merging-minimal.s
The assert I think meant to check the value of target->wordSize,
not the size of its type. Which is a type that changes size between
systems.
Commit: 74a512df2bea0f0d1f314c6b8dc33c97f9086336
https://github.com/llvm/llvm-project/commit/74a512df2bea0f0d1f314c6b8dc33c97f9086336
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
Log Message:
-----------
[mlir][vector] Populate sink patterns in apply_patterns.vector.reduction_to_contract (#104754)
This restores the functionality to before:
https://github.com/llvm/llvm-project/commit/42944da5ba7617bbc02f341e9ef401c325310a73
This fixes a buildbot failure:
https://lab.llvm.org/buildbot/#/builders/143/builds/1487
Commit: 00def06c6e9a0582e85bef5f3a186839c48d1ae2
https://github.com/llvm/llvm-project/commit/00def06c6e9a0582e85bef5f3a186839c48d1ae2
Author: Tim Besard <tim.besard at gmail.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm-c/Transforms/PassBuilder.h
M llvm/lib/Passes/PassBuilderBindings.cpp
M llvm/unittests/Passes/PassBuilderBindings/PassBuilderBindingsTest.cpp
Log Message:
-----------
[LLVM][NewPM] Add C API for running the pipeline on a single function. (#103773)
By adding a new entrypoint, `LLVMRunPassesOnFunction`, as suggested in
https://discourse.llvm.org/t/newpm-c-api-questions/80598.
Also removes erroneous `LLVMConsumeError`s from the pass builder unit
tests as the string conversion already consumes the error, causing an
abort when the test would fail.
Commit: b8dccb7d56c7e32b549c00a094d1b6ac32a01328
https://github.com/llvm/llvm-project/commit/b8dccb7d56c7e32b549c00a094d1b6ac32a01328
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/unsafe-vf-hint-remark.ll
Log Message:
-----------
[VPlan] Emit note when UserVF > MaxUserVF (NFCI).
As suggested in https://github.com/llvm/llvm-project/pull/103033, add a
remark when the UserVF is ignored due to it being larger than MaxUserVF.
Only changes behavior of diagnostic/debug output.
Commit: abf69a167bbc99054871e3f9cc8810bbebcb6747
https://github.com/llvm/llvm-project/commit/abf69a167bbc99054871e3f9cc8810bbebcb6747
Author: Volodymyr Vasylkun <vvmposeydon at gmail.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/InstCombine/select-select.ll
M llvm/test/Transforms/InstCombine/ucmp.ll
M llvm/test/Transforms/PhaseOrdering/partialord-ule.ll
Log Message:
-----------
[InstCombine] Fold `(x < y) ? -1 : zext(x != y)` into `u/scmp(x,y)` (#101049)
This patch adds the aforementioned fold to InstCombine. This pattern is
produced after naive implementations of 3-way comparison in high-level
languages are transformed into LLVM IR and then optimized.
Proofs: https://alive2.llvm.org/ce/z/w4QLq_
Commit: f2fcd9cb97f76f34196233fc5c9170fb0905d844
https://github.com/llvm/llvm-project/commit/f2fcd9cb97f76f34196233fc5c9170fb0905d844
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[VPlan] Rename getBestPlanFor -> getPlanFor (NFC).
As suggested in https://github.com/llvm/llvm-project/pull/103033, more
accurately rename to getPlanFor , as it simplify returns the VPlan for
VF, relying on the fact that there is a single VPlan for each VF at the
moment.
Commit: 816068e462888f31f4bcf71f2f728eb77ff2ea15
https://github.com/llvm/llvm-project/commit/816068e462888f31f4bcf71f2f728eb77ff2ea15
Author: tcwzxx <tcwzxx at gmail.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[NFC][SLP] Remove useless code of the schedule (#104697)
Currently, the SLP schedule has two containers of `ScheduleData`:
`ExtraScheduleDataMap` and `ScheduleDataMap`. However, the
`ScheduleData` in `ExtraScheduleDataMap` is only used to indicate
whether the instruction is processed or not and does not participate in
the schedule, which is useless. `ScheduleDataMap` is sufficient for this
purpose. The `OpValue` member is used only in `ExtraScheduleDataMap`,
which is also useless.
Commit: c6e9493a00d22f2591c5a9c51d9fd34fe5eee5b6
https://github.com/llvm/llvm-project/commit/c6e9493a00d22f2591c5a9c51d9fd34fe5eee5b6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/test/Analysis/CostModel/X86/icmp-codesize.ll
M llvm/test/Analysis/CostModel/X86/icmp-latency.ll
M llvm/test/Analysis/CostModel/X86/icmp-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/icmp.ll
Log Message:
-----------
[CostModel][X86] Add cost tests for scmp/ucmp intrinsics
Commit: 0cc6b464f8adb739e6f9bcc9bda8cff9bb1f1c2a
https://github.com/llvm/llvm-project/commit/0cc6b464f8adb739e6f9bcc9bda8cff9bb1f1c2a
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/docs/ExtendingLLVM.rst
Log Message:
-----------
[docs] Update a filename, fix indentation (#103018)
Commit: b05c55472bf7cadcd0e4cb1a669b3474695b0524
https://github.com/llvm/llvm-project/commit/b05c55472bf7cadcd0e4cb1a669b3474695b0524
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/abds-neg.ll
M llvm/test/CodeGen/X86/abds.ll
M llvm/test/CodeGen/X86/abdu-neg.ll
M llvm/test/CodeGen/X86/abdu.ll
Log Message:
-----------
[X86] LowerABD - simplify i32/i64 to use sub+sub+cmov instead of repeating nodes via abs (#102174)
Using X86ISD::SUB nodes directly allows us to drive the X86ISD::CMOV node with exact flags instead of trying to cleanup the generic codegen via ICMP/SUBO nodes.
Commit: 50daa2397f831f3577cf8f9057f047021867dc88
https://github.com/llvm/llvm-project/commit/50daa2397f831f3577cf8f9057f047021867dc88
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/include/llvm/IR/DataLayout.h
M llvm/lib/IR/DataLayout.cpp
M llvm/test/Transforms/InstCombine/crash.ll
M llvm/test/Transforms/InstCombine/phi.ll
M llvm/unittests/IR/DataLayoutTest.cpp
M mlir/test/Target/LLVMIR/Import/import-failure.ll
Log Message:
-----------
[DataLayout] Refactor parsing of i/f/v/a specifications (#104699)
Split off of #104545 to reduce patch size.
Commit: 3e999bbc2ddfc8be7b2d1a250c9905c905e6ce81
https://github.com/llvm/llvm-project/commit/3e999bbc2ddfc8be7b2d1a250c9905c905e6ce81
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/Program.cpp
M clang/test/Modules/merge-using-decls.cpp
Log Message:
-----------
[clang][bytecode] Use first FieldDecl instead of asserting (#104760)
This assertion fails sometimes. We use the first decl for lookup later,
so let's use the first decl here as well.
Commit: 13865b09c6b0c767a8c3d4f49662e6c503260976
https://github.com/llvm/llvm-project/commit/13865b09c6b0c767a8c3d4f49662e6c503260976
Author: David Green <david.green at arm.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
Log Message:
-----------
[AArch64] Add fneg(fmul) and fmul(fneg) tests. NFC
Commit: c6605a08681309188fa260a409bf5d37400876a0
https://github.com/llvm/llvm-project/commit/c6605a08681309188fa260a409bf5d37400876a0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/MemberPointer.cpp
M clang/test/AST/ByteCode/memberpointers.cpp
Log Message:
-----------
[clang][bytecode] Fix member pointers to IndirectFieldDecls (#104756)
Commit: a567d4598755219e535eb04d21b43c3624526714
https://github.com/llvm/llvm-project/commit/a567d4598755219e535eb04d21b43c3624526714
Author: Hans Wennborg <hans at chromium.org>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M compiler-rt/test/ubsan/TestCases/Integer/bit-int.c
Log Message:
-----------
Require !windows instead of XFAIL'ing ubsan/TestCases/Integer/bit-int.c
The test would unexpectedly pass on Windows when there's 128-bit runtime
routines available. See comment on #104494
Commit: 3188e9b4e0f106abd683829906a21a98655bb794
https://github.com/llvm/llvm-project/commit/3188e9b4e0f106abd683829906a21a98655bb794
Author: Julian Brown <julian.brown at amd.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/loop_collapse_1.c
A clang/test/OpenMP/loop_collapse_2.cpp
Log Message:
-----------
[clang][OpenMP] Diagnose badly-formed collapsed imperfect loop nests (#60678) (#101305)
This patch fixes a couple of cases where Clang aborts with loop nests
that are being collapsed (via the relevant OpenMP clause) into a new,
combined loop.
The problematic cases happen when a variable declared within the loop
nest is used in the (init, condition, iter) statement of a more
deeply-nested loop. I don't think these cases (generally?) fall under
the non-rectangular loop nest rules as defined in OpenMP 5.0+, but I
could be wrong (and anyway, emitting an error is better than crashing).
In terms of implementation: the crash happens because (to a first
approximation) all the loop bounds calculations are pulled out to the
start of the new, combined loop, but variables declared in the loop nest
"haven't been seen yet". I believe there is special handling for
iteration variables declared in "for" init statements, but not for
variables declared elsewhere in the "imperfect" parts of a loop nest.
So, this patch tries to diagnose the troublesome cases before they can
cause a crash. This is slightly awkward because at the point where we
want to do the diagnosis (SemaOpenMP.cpp), we don't have scope
information readily available. Instead we "manually" scan through the
AST of the loop nest looking for var decls (ForVarDeclFinder), then we
ensure we're not using any of those in loop control subexprs
(ForSubExprChecker). All that is only done when we have a "collapse"
clause.
Range-for loops can also cause crashes at present without this patch, so
are handled too.
Commit: 7efa068f7a7ed4f42ba09cce73e8c09bb8b4e8ce
https://github.com/llvm/llvm-project/commit/7efa068f7a7ed4f42ba09cce73e8c09bb8b4e8ce
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/load.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vislide-vx.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vmv.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vreduce.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vrgather.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vshift-vmul.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/zvbb.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/zvbc.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/zvkg.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/zvkned.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/zvknhb.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/zvksed.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/zvksh.s
Log Message:
-----------
[RISCV] Add vector and vector crypto to SiFiveP400 scheduler model (#102155)
The SiFiveP400 scheduler model did not support vector or vector crypto.
With the addition of the sifive-p470 processor, this model needs to support
these extensions.
The processors who use this model but do not have vector or vector
crypto will never produce these instructions, so there is no impact to these
processors.
Co-authored-by: Min Hsu <min.hsu at sifive.com>
Commit: ea28668f8c980c9987b0e2f305b0a8eff9797401
https://github.com/llvm/llvm-project/commit/ea28668f8c980c9987b0e2f305b0a8eff9797401
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul-mixed-types.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-i8i8i32.mlir
Log Message:
-----------
[mlir][ArmSME] Remove XFAILs (#104758)
Buildbots have been updated to QEMU 9.0.2:
https://github.com/llvm/llvm-project/pull/104758#issuecomment-2296592845
Commit: 4f083c0a2cb1d19942406f7e6e97ae47e8ac91b1
https://github.com/llvm/llvm-project/commit/4f083c0a2cb1d19942406f7e6e97ae47e8ac91b1
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/test/DebugInfo/COFF/AArch64/arm64-register-variables.ll
M llvm/test/DebugInfo/COFF/ARMNT/arm-register-variables.ll
Log Message:
-----------
[DebugInfo] Make tests SimplifyCFG-independent (NFC)
Run SimplifyCFG over the test input and disable the SimplifyCFG
run in the backend, so that these tests are not affected by changes
to SimplifyCFG.
Commit: 79f6ae05c139d3d5b6446f8a265a3c6e3f5b18f8
https://github.com/llvm/llvm-project/commit/79f6ae05c139d3d5b6446f8a265a3c6e3f5b18f8
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[Clang][NFC] Fix potential null dereference in encodeTypeForFunctionPointerAuth (#104737)
This patch replaces getAs with castAs in
encodeTypeForFunctionPointerAuth to prevent dereferencing a potential
null pointer, enhancing type safety as reported by static analyzer tool.
Commit: c60da1a271a6bb271e7703b2f7c71fbece67ab78
https://github.com/llvm/llvm-project/commit/c60da1a271a6bb271e7703b2f7c71fbece67ab78
Author: Daniel Grumberg <dgrumberg at apple.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang/include/clang/ExtractAPI/API.h
M clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
M clang/lib/ExtractAPI/API.cpp
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/test/ExtractAPI/anonymous_record_no_typedef.c
Log Message:
-----------
[clang][ExtractAPI] Stop dropping fields of nested anonymous record types when they aren't attached to variable declaration (#104600)
- Introduce primitives for removing records from `APISet` and managing
the record chain of `RecordContext`
- Detect nested anonymous record types and remove them from the `APISet`
after they have been fully traversed and transfer ownership of child
records to the parent context (if any)
Commit: a566635915730e6720e1b341f014c7c62af748bf
https://github.com/llvm/llvm-project/commit/a566635915730e6720e1b341f014c7c62af748bf
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
R llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp
R llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
Log Message:
-----------
[AMDGPU] Move AMDGPUCodeGenPassBuilder into AMDGPUTargetMachine(NFC) (#103720)
This will allow us to reuse the existing flags and the static
functions while building the pipeline for new pass manager.
Commit: 7dd6340bdadf86bd0facdea89d1876a5c36dc33b
https://github.com/llvm/llvm-project/commit/7dd6340bdadf86bd0facdea89d1876a5c36dc33b
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/include/llvm/Support/MathExtras.h
M llvm/unittests/Support/MathExtrasTest.cpp
Log Message:
-----------
MathExtras: template'ize alignToPowerOf2 (#97814)
Follow up on 5627794 (MathExtras: avoid unnecessarily widening types) to
change the overflow behavior of alignToPowerOf2 to only overflow if the
result is not representable in the return type. This allows us to
template'ize it, and avoid unnecessarily widening the types of
arguments.
Commit: b18b4547f1bfaf6da37b29440a96176e807c2e6c
https://github.com/llvm/llvm-project/commit/b18b4547f1bfaf6da37b29440a96176e807c2e6c
Author: Daniel Grumberg <dgrumberg at apple.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang/include/clang/ExtractAPI/API.h
M clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
M clang/lib/ExtractAPI/API.cpp
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/test/ExtractAPI/anonymous_record_no_typedef.c
Log Message:
-----------
Revert "[clang][ExtractAPI] Stop dropping fields of nested anonymous record types when they aren't attached to variable declaration (#104600)"
This reverts commit c60da1a271a6bb271e7703b2f7c71fbece67ab78.
Commit: a449b857241dd29a1164c483d3ee73612e45cbb4
https://github.com/llvm/llvm-project/commit/a449b857241dd29a1164c483d3ee73612e45cbb4
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
R llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.cpp
R llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
M llvm/lib/Target/AMDGPU/R600TargetMachine.h
Log Message:
-----------
[AMDGPU][R600] Move R600CodeGenPassBuilder into R600TargetMachine(NFC). (#103721)
Commit: b64e7e07e544d62ab132fc9f5c4153d4807a5fa3
https://github.com/llvm/llvm-project/commit/b64e7e07e544d62ab132fc9f5c4153d4807a5fa3
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/test/Transforms/SimplifyCFG/hoist-common-code.ll
Log Message:
-----------
[SimplifyCFG] Add tests for hoisting of commutative instructions (NFC)
Commit: b1d75fe48c940ba677614db3d891fbebcb8a41a2
https://github.com/llvm/llvm-project/commit/b1d75fe48c940ba677614db3d891fbebcb8a41a2
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M lldb/unittests/Callback/TestBreakpointSetCallback.cpp
Log Message:
-----------
[lldb][test] Fix cast dropping const warnin in TestBreakpointSetCallback.cpp
When building with gcc I get this warning:
```
<...>TestBreakpointSetCallback.cpp:58:25: warning: cast from type ‘const char*’ to type ‘void*’ casts away qualifiers [-Wcast-qual]
58 | void *baton = (void *)"hello";
| ^~~~~~~
```
Use the address of a mutable global variable instead. All we care about
is that the address passed as the baton is the same one we get later.
Commit: c7a54bfd1d25330199c96dd0a46cef1644b1b1ce
https://github.com/llvm/llvm-project/commit/c7a54bfd1d25330199c96dd0a46cef1644b1b1ce
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/ASTUtils.h
Log Message:
-----------
[lldb][ASTUtils] Remove unused SemaSourceWithPriorities::addSource API
As far as I can tell, this has always been unused. My hunch is that
this was supposed to mimick the `MultiplexExternalSemaSource::AddSource`
API which `SemaSourceWithPriorities` is based on.
Commit: 0abb7791614947bc24931dd851ade31d02496977
https://github.com/llvm/llvm-project/commit/0abb7791614947bc24931dd851ade31d02496977
Author: Wesley Wiser <wwiser at gmail.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
A llvm/test/CodeGen/X86/avx512f-large-stack.ll
M llvm/test/CodeGen/X86/huge-stack.ll
M llvm/test/CodeGen/X86/win64-stackprobe-overflow.ll
Log Message:
-----------
[LLVM] [X86] Fix integer overflows in frame layout for huge frames (#101840)
Fix 32-bit integer overflows in the X86 target frame layout when dealing
with frames larger than 4gb. When this occurs, we'll scavenge a scratch
register to be able to hold the correct stack offset for frame locals.
This completes reapplying #84114.
Fixes #48911
Fixes #75944
Fixes #87154
Commit: 576aa3a50960f02e4dfe2d6ed2c55aa66006adcf
https://github.com/llvm/llvm-project/commit/576aa3a50960f02e4dfe2d6ed2c55aa66006adcf
Author: Akshat Oke <76596238+Akshat-Oke at users.noreply.github.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/TableGen/TGParser.cpp
M llvm/test/TableGen/dump.td
Log Message:
-----------
[TableGen] Resolve References at top level (#104578)
Add a dummy resolver to resolve references outside records. This invokes
Fold() with isFinal to force resolution.
Fixes #102447
Co-authored-by: Akshat Oke <Akshat.Oke at amd.com>
Commit: 08201cb4245b0a03e1af664e00a22ea4db1fc2fb
https://github.com/llvm/llvm-project/commit/08201cb4245b0a03e1af664e00a22ea4db1fc2fb
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M lldb/unittests/Disassembler/x86/TestGetControlFlowKindx86.cpp
Log Message:
-----------
[lldb][test] Fix GCC warnings in TestGetControlFlowKindX86.cpp
```
<...>/TestGetControlFlowKindx86.cpp:148:8: warning: suggest explicit braces to avoid ambiguous ‘else’ [-Wdangling-else]
148 | if (kind == eInstructionControlFlowKindReturn)
| ^
```
Usually llvm is a "no braces for single line body" project but
for whatever reason gcc objects to it here. Perhaps because it's
within a for loop.
Added the newlines just for readability.
Commit: 8d165136ac36a53e51b50c620a12039d6c1e628e
https://github.com/llvm/llvm-project/commit/8d165136ac36a53e51b50c620a12039d6c1e628e
Author: meehatpa <gune30 at gmail.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir
M mlir/test/Conversion/MathToSPIRV/math-to-opencl-spirv.mlir
Log Message:
-----------
[mlir][[spirv] Add support for math.log2 and math.log10 to GLSL/OpenCL SPIRV Backends (#104608)
As log2 and log10 are not available in spirv, realize them as a
decomposition using spirv.CL.log/spirv.GL.Log.
Commit: 7a06ebdeb6440d80fbcaeccd33314c6e039c6795
https://github.com/llvm/llvm-project/commit/7a06ebdeb6440d80fbcaeccd33314c6e039c6795
Author: Fred Grim <fgrim at apple.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M lldb/unittests/Process/elf-core/ThreadElfCoreTest.cpp
Log Message:
-----------
[lldb] PopulatePrpsInfoTest can fail due to hardcoded priority value (#104617)
In implementing this test one of the assertions assumes that the
priority is the default in linux (0) but, evidently, some of the build
runners prioritize the test to, at least, 5. This ensures that
regardless of the priority the test passes by validating that its the
process's priority
```
fgrim at host001 :~/llvm-project/debug_build> nice -n 15 tools/lldb/unittests/Process/elf-core/ProcessElfCoreTests
[==========] Running 2 tests from 1 test suite.
[----------] Global test environment set-up.
[----------] 2 tests from ElfCoreTest
[ RUN ] ElfCoreTest.PopulatePrpsInfoTest
[ OK ] ElfCoreTest.PopulatePrpsInfoTest (4 ms)
[ RUN ] ElfCoreTest.PopulatePrStatusTest
[ OK ] ElfCoreTest.PopulatePrStatusTest (3 ms)
[----------] 2 tests from ElfCoreTest (7 ms total)
[----------] Global test environment tear-down
[==========] 2 tests from 1 test suite ran. (8 ms total)
[ PASSED ] 2 tests.
===(10:03)===
fgrim at host001 :~/llvm-project/debug_build>
```
Commit: d27278a835ba9110b5bf775852b1a407d1c2bc62
https://github.com/llvm/llvm-project/commit/d27278a835ba9110b5bf775852b1a407d1c2bc62
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/codegen.cpp
Log Message:
-----------
[clang][bytecode] Discard NullToPointer cast SubExpr (#104782)
So we still properly abort if they fail.
Commit: fade54ac6608255e9b3c425432871f177236d6e8
https://github.com/llvm/llvm-project/commit/fade54ac6608255e9b3c425432871f177236d6e8
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port a449b857241d
Commit: c6d6186b586f4249e393910b099815e616138cde
https://github.com/llvm/llvm-project/commit/c6d6186b586f4249e393910b099815e616138cde
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port a56663591573
Commit: 0ee0857363aadf9ce0f403e7e0da10f0a9d94887
https://github.com/llvm/llvm-project/commit/0ee0857363aadf9ce0f403e7e0da10f0a9d94887
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M lldb/source/Plugins/ScriptInterpreter/Python/lldb-python.h
Log Message:
-----------
[lldb][Python] Silence GCC warning for modules error workaround
```
lldb-python.h:16:30: warning: ‘g_fcxx_modules_workaround’ defined but not used [-Wunused-variable]
16 | static llvm::Expected<bool> *g_fcxx_modules_workaround;
|
```
Workaround originally added in 36cb29cbbe1b22dcd298ad65e1fabe899b7d7249.
Commit: 42386dc46d8217b2dfed8dfc41afeec366ec2015
https://github.com/llvm/llvm-project/commit/42386dc46d8217b2dfed8dfc41afeec366ec2015
Author: Phil Camp <phil.camp at sony.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
A llvm/test/tools/llvm-mca/JSON/X86/views-bottleneck.s
M llvm/test/tools/llvm-mca/JSON/X86/views-custom-parameters.s
M llvm/test/tools/llvm-mca/JSON/X86/views-multiple-anonymous-regions.s
M llvm/test/tools/llvm-mca/JSON/X86/views-multiple-region.s
M llvm/test/tools/llvm-mca/JSON/X86/views.s
M llvm/tools/llvm-mca/Views/BottleneckAnalysis.cpp
M llvm/tools/llvm-mca/Views/BottleneckAnalysis.h
Log Message:
-----------
[llvm-mca] Add bottle-neck analysis to JSON output. (#90056)
This patch implements the bottle-neck analysis data in the JSON dump
mode.
Commit: f95026dbf66e353128a3a3d7b55f3e52d5985535
https://github.com/llvm/llvm-project/commit/f95026dbf66e353128a3a3d7b55f3e52d5985535
Author: Lei Huang <lei at ca.ibm.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/Targets/PPC.cpp
A clang/test/CodeGen/PowerPC/transparent_union.c
Log Message:
-----------
[PowerPC] Fix codegen for transparent_union function params (#101738)
Update codegen for func param with transparent_union attr to be that of
the first union member.
PPC fix for: https://github.com/llvm/llvm-project/issues/76773
Commit: a3fea0643da544b2e5d5c48f2ea942dad22d01f2
https://github.com/llvm/llvm-project/commit/a3fea0643da544b2e5d5c48f2ea942dad22d01f2
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/include/llvm/ADT/SmallPtrSet.h
M llvm/lib/Support/SmallPtrSet.cpp
Log Message:
-----------
[SmallPtrSet] Optimize find/erase
Port #100517 for DenseMap.
Pull Request: https://github.com/llvm/llvm-project/pull/104740
Commit: e9b2e16dc98345bb1b91b1a6dacb3cec85f49e31
https://github.com/llvm/llvm-project/commit/e9b2e16dc98345bb1b91b1a6dacb3cec85f49e31
Author: eddyz87 <eddyz87 at gmail.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/lib/CodeGen/CGCall.cpp
A clang/test/CodeGen/bpf-attr-bpf-fastcall-1.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
A clang/test/Sema/bpf-attr-bpf-fastcall.c
M llvm/lib/Target/BPF/BPFCallingConv.td
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/BPFMIPeephole.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.h
A llvm/test/CodeGen/BPF/bpf-fastcall-1.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-2.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-3.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-regmask-1.ll
Log Message:
-----------
[BPF] introduce `__attribute__((bpf_fastcall))` (#101228)
This commit introduces attribute bpf_fastcall to declare BPF functions
that do not clobber some of the caller saved registers (R0-R5).
The idea is to generate the code complying with generic BPF ABI, but
allow compatible Linux Kernel to remove unnecessary spills and fills of
non-scratched registers (given some compiler assistance).
For such functions do register allocation as-if caller saved registers
are not clobbered, but later wrap the calls with spill and fill patterns
that are simple to recognize in kernel.
For example for the following C code:
#define __bpf_fastcall __attribute__((bpf_fastcall))
void bar(void) __bpf_fastcall;
void buz(long i, long j, long k);
void foo(long i, long j, long k) {
bar();
buz(i, j, k);
}
First allocate registers as if:
foo:
call bar # note: no spills for i,j,k (r1,r2,r3)
call buz
exit
And later insert spills fills on the peephole phase:
foo:
*(u64 *)(r10 - 8) = r1; # Such call pattern is
*(u64 *)(r10 - 16) = r2; # correct when used with
*(u64 *)(r10 - 24) = r3; # old kernels.
call bar
r3 = *(u64 *)(r10 - 24); # But also allows new
r2 = *(u64 *)(r10 - 16); # kernels to recognize the
r1 = *(u64 *)(r10 - 8); # pattern and remove spills/fills.
call buz
exit
The offsets for generated spills/fills are picked as minimal stack
offsets for the function. Allocated stack slots are not used for any
other purposes, in order to simplify in-kernel analysis.
Corresponding functionality had been merged in Linux Kernel as
[this](https://lore.kernel.org/bpf/172179364482.1919.9590705031832457529.git-patchwork-notify@kernel.org/)
patch set (the patch assumed that `no_caller_saved_regsiters` attribute
would be used by LLVM, naming does not matter for the Kernel).
Commit: 9b65558d2f20463b1a32374165d6fa06696623e9
https://github.com/llvm/llvm-project/commit/9b65558d2f20463b1a32374165d6fa06696623e9
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M lld/ELF/LinkerScript.cpp
M lld/test/ELF/riscv-section-layout.s
M lld/test/ELF/section-name.s
Log Message:
-----------
[lld][ELF] Combine uniqued small data sections (#104485)
RISC-V GCC with `-fdata-sections` will emit `.sbss.<name>`,
`.srodata.<name>`, and `.sdata.<name>` sections for small data items of
different kinds. Clang/LLVM already emits `.srodata.*` sections, and we
intend to emit the other two section name patterns in #87040.
This change ensures that any input sections starting `.sbss` are
combined into one output section called `.sbss`, and the same
respectively for `.srodata` and `.sdata`. This also allows the existing
RISC-V specific code for determining an output order for `.sbss` and
`.sdata` sections to apply to placing the sections.
Commit: 93d0f82272dc230ff4d53d48c43b2f1518754a7b
https://github.com/llvm/llvm-project/commit/93d0f82272dc230ff4d53d48c43b2f1518754a7b
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/docs/CodeReview.rst
Log Message:
-----------
[docs] Add note about "Re-request review" (#104735)
Commit: 7d60f4648b9f794b8965b84a7a5641dfc5e07fae
https://github.com/llvm/llvm-project/commit/7d60f4648b9f794b8965b84a7a5641dfc5e07fae
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
Log Message:
-----------
[DirectX] Differentiate between 0/1 overloads in the OpBuilder. NFC
DXIL operations that only have one signature behave one of two ways - either
they are always suffixed with a type like `dx.op.ThreadId.i32` and hence have
exactly one overload, or they're never suffixed like `dx.op.CreateHandle` and
hence have zero overloads.
Update DXIL.td for operations that have one overload and remove the hack in the
builder that was adjusting names for unoverloaded ops.
Pull Request: https://github.com/llvm/llvm-project/pull/104246
Commit: 6bb5a0b171e22ef0a17ae8bf9bf4a3f7ad682901
https://github.com/llvm/llvm-project/commit/6bb5a0b171e22ef0a17ae8bf9bf4a3f7ad682901
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaTemplate.cpp
A clang/test/SemaTemplate/explicit-instantiation-cxx20.cpp
Log Message:
-----------
[Clang] Check constraints for an explicit instantiation of a member function (#104438)
Because there may be multiple constrained function of the same type, we
need to perform overload resolution to find the best viable function to
specialize.
Fixes #46029
Commit: f357fe371d3f752878abf1fb1d5fb550e2650c8e
https://github.com/llvm/llvm-project/commit/f357fe371d3f752878abf1fb1d5fb550e2650c8e
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/docs/DirectX/DXILOpTableGenDesign.rst
M llvm/include/llvm/Support/DXILABI.h
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILConstants.h
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/utils/TableGen/DXILEmitter.cpp
Log Message:
-----------
[DirectX] Disentangle DXIL.td's op types from LLVMType. NFC
LLVMType is both too broad and too narrow for defining DXIL operations, in
different ways. It's too broad in the sense that we don't need the full set of
MVTs - the set of types DXIL operations work on is much smaller. It's too
narrow in the sense that it's difficult to use it for the various fixed
structure types in DXIL, like `%dx.types.Handle` or `%dx.Types.ResRet.f32`.
Replace the usage of LLVMType in DXIL.td with DXILOpParamType, a simple class
that we can define an enum of types from. Further, use this to replace the
"ParameterKind" enum in DXILABI.h that has nothing to do with DXIL's ABI.
Pull Request: https://github.com/llvm/llvm-project/pull/104247
Commit: 340fb6597116acf026a8ac49edca4d993fb1d7f3
https://github.com/llvm/llvm-project/commit/340fb6597116acf026a8ac49edca4d993fb1d7f3
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/TableGen/TGLexer.cpp
A llvm/test/TableGen/invalid-macro-name-command-line.td
Log Message:
-----------
[TableGen] Detect invalid -D arguments and fail (#102813)
- Detect invalid macro names specified on command line and fail if one
found.
- Specifically, -DXYZ=1 for example, will fail instead is being silently
accepted.
Commit: 2258bc429b6f76ade78059f3c4f6c7c77f93a996
https://github.com/llvm/llvm-project/commit/2258bc429b6f76ade78059f3c4f6c7c77f93a996
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll
Log Message:
-----------
[AMDGPU] Simplify, fix and improve known bits for mbcnt (#104768)
Simplify by using KnownBits::add.
Fix GlobalISel path which was ignoring the known bits of src1.
Improve analysis of mbcnt.hi which adds at most 31 even in wave64.
Commit: 564bd206588d330211914ba2e94bd13caa4e0431
https://github.com/llvm/llvm-project/commit/564bd206588d330211914ba2e94bd13caa4e0431
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
Log Message:
-----------
[AMDGPU][GlobalISel] Save a copy in one case of addrspacecast (#104789)
Refactor legalization of addrspacecast local/private -> flat to avoid
building a copy in the nonnull case.
Commit: 2575ea6e17889e6d83198fc1c80963f81485bfcc
https://github.com/llvm/llvm-project/commit/2575ea6e17889e6d83198fc1c80963f81485bfcc
Author: Samira Bazuzi <bazuzi at google.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/ASTOps.h
M clang/lib/Analysis/FlowSensitive/ASTOps.cpp
M clang/unittests/Analysis/FlowSensitive/ASTOpsTest.cpp
Log Message:
-----------
[clang][dataflow] Collect local variables referenced within a functio… (#104459)
…n/statement.
We don't need these for the same in-tree purposes as the other sets,
i.e. for making sure we model these Decls that are declared outside the
function, but we have an out-of-tree use for these sets that would
benefit from this simple addition and would avoid duplicating so much of
this code.
Commit: 7f968e3aea41264a952692a4bf32e5e2b612d44e
https://github.com/llvm/llvm-project/commit/7f968e3aea41264a952692a4bf32e5e2b612d44e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
Log Message:
-----------
[RISCV] Improve BCLRITwoBitsMaskHigh SDNodeXForm. NFC
Use getZExtValue instead of getSExtValue since we are going to
overwrite the sign extension on RV32. getZExtValue should be cheaper than
getSExtValue.
Use maskLeadingOnes to improve readability.
Commit: 865952bbbb97655410d2c34c21938134059c4076
https://github.com/llvm/llvm-project/commit/865952bbbb97655410d2c34c21938134059c4076
Author: Sergey Kozub <skozub at nvidia.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsNVPTX.def
M clang/test/CodeGen/builtins-nvptx.c
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/convert-sm89.ll
Log Message:
-----------
[NVPTX] Add conversion intrinsics from/to fp8 types (e4m3, e5m2) (#102969)
PTX ISA 8.1 supports FP8 conversions:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt
This PR adds the support for:
- cvt.rn.satfinite{.relu}.f8x2type.f32 d, a, b;
- cvt.rn.satfinite{.relu}.f8x2type.f16x2 d, a;
- cvt.rn.{.relu}.f16x2.f8x2type d, a;
where .f8x2type = { .e4m3x2, .e5m2x2 };
Commit: 4e332bba2f3a51966817088cb4dc4a9188955b64
https://github.com/llvm/llvm-project/commit/4e332bba2f3a51966817088cb4dc4a9188955b64
Author: Thurston Dang <thurston at google.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M compiler-rt/lib/asan/asan_allocator.h
Log Message:
-----------
[asan] Change Apple back to fixed allocator base address (#104818)
This partially reverts https://github.com/llvm/llvm-project/pull/98511
- specifically, the SANITIZER_APPLE case - because of a suspected
breakage for clang on Mac
(https://g-issues.chromium.org/issues/360160858;
https://github.com/llvm/llvm-project/pull/98511#issuecomment-2296749757).
Commit: e306db0ff0d348da49b44bd0bcae3df5bf8f02a9
https://github.com/llvm/llvm-project/commit/e306db0ff0d348da49b44bd0bcae3df5bf8f02a9
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M flang/test/Semantics/kinds04_q16.f90
Log Message:
-----------
[Flang] Fix test case for AIX(big-endian) system for issuing an extra message. (#104792)
The 10-byte FP on big-endian system such as AIX is not represented as a
valid number in FE, so Flang issues an extra WARNING message as
`underflow on REAL(10) to REAL(4) conversion` for `_10` for such a
number.
This PR is to fix the test case.
Commit: d5617ada36705e871f329a7b0efb19ce6e6e2a1f
https://github.com/llvm/llvm-project/commit/d5617ada36705e871f329a7b0efb19ce6e6e2a1f
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
A compiler-rt/test/nsan/stable_sort.cpp
A compiler-rt/test/nsan/swap.cpp
Log Message:
-----------
[compiler-rt][nsan] Add more tests for shadow memory (#100906)
Add more tests for shadow memory.
Commit: 05d17a1c705e1053f95b90aa37d91ce4f94a9287
https://github.com/llvm/llvm-project/commit/05d17a1c705e1053f95b90aa37d91ce4f94a9287
Author: David Green <david.green at arm.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/Target/ARM/ARMCallLowering.cpp
M llvm/lib/Target/ARM/ARMCallLowering.h
A llvm/test/CodeGen/AArch64/GlobalISel/endian_fallback.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll
Log Message:
-----------
[GlobalISel] Bail out early for big-endian (#103310)
If we continue through the function we can currently hit crashes. We can
bail out early and fall back to SDAG.
Fixes #103032
Commit: dde8280ded53f7167dcd2e8f6c50d7c9b5796a10
https://github.com/llvm/llvm-project/commit/dde8280ded53f7167dcd2e8f6c50d7c9b5796a10
Author: Angel Zhang <angel.zhang at amd.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
M mlir/lib/Dialect/SPIRV/IR/GroupOps.cpp
M mlir/test/Dialect/SPIRV/IR/non-uniform-ops.mlir
Log Message:
-----------
[mlir][spirv] Add `GroupNonUniformBallotFindLSB` and `GroupNonUniformBallotFindMSB` ops (#104791)
Commit: 51785856ec5fb6c3f17834b212086d9fc7183868
https://github.com/llvm/llvm-project/commit/51785856ec5fb6c3f17834b212086d9fc7183868
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/include/llvm/Transforms/Instrumentation.h
M llvm/lib/Transforms/Instrumentation/Instrumentation.cpp
Log Message:
-----------
[NFC][Instrumentation] Use `Twine` in `createPrivateGlobalForString` (#104726)
Commit: f76b9b7e9480d1bb116075593495db287f4c668c
https://github.com/llvm/llvm-project/commit/f76b9b7e9480d1bb116075593495db287f4c668c
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M llvm/test/Instrumentation/AddressSanitizer/global_metadata_array.ll
M llvm/test/Instrumentation/AddressSanitizer/global_with_comdat.ll
Log Message:
-----------
[NFC][asan] Don't `cd` after `split-file` (#104727)
Helps with copy-pasting of command line
with error.
Commit: 95cb43da92f101396df986a0c449d586b23a208b
https://github.com/llvm/llvm-project/commit/95cb43da92f101396df986a0c449d586b23a208b
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-19 (Mon, 19 Aug 2024)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseStdFormatCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStdPrintCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-std-format.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-std-print.rst
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-format-member.cpp
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-print-member.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Analysis/FlowSensitive/ASTOps.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsNVPTX.def
M clang/include/clang/Basic/DiagnosticSemaKinds.td
R clang/include/clang/Rewrite/Core/DeltaTree.h
M clang/include/clang/Rewrite/Core/HTMLRewrite.h
R clang/include/clang/Rewrite/Core/RewriteBuffer.h
R clang/include/clang/Rewrite/Core/RewriteRope.h
M clang/include/clang/Rewrite/Core/Rewriter.h
M clang/lib/ARCMigrate/ARCMT.cpp
M clang/lib/ARCMigrate/ObjCMT.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Boolean.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/MemberPointer.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Analysis/FlowSensitive/ASTOps.cpp
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/Targets/PPC.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Frontend/Rewrite/FixItRewriter.cpp
M clang/lib/Frontend/Rewrite/HTMLPrint.cpp
M clang/lib/Frontend/Rewrite/RewriteMacros.cpp
M clang/lib/Frontend/Rewrite/RewriteModernObjC.cpp
M clang/lib/Frontend/Rewrite/RewriteObjC.cpp
M clang/lib/Rewrite/CMakeLists.txt
R clang/lib/Rewrite/DeltaTree.cpp
M clang/lib/Rewrite/HTMLRewrite.cpp
R clang/lib/Rewrite/RewriteRope.cpp
M clang/lib/Rewrite/Rewriter.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
M clang/lib/Tooling/Core/Replacement.cpp
A clang/test/AST/ByteCode/codegen.c
M clang/test/AST/ByteCode/codegen.cpp
M clang/test/AST/ByteCode/memberpointers.cpp
M clang/test/Analysis/builtin_signbit.cpp
A clang/test/CodeGen/PowerPC/transparent_union.c
M clang/test/CodeGen/aarch64-elf-pauthabi.c
A clang/test/CodeGen/bpf-attr-bpf-fastcall-1.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/Driver/flags.c
M clang/test/Driver/hip-toolchain-rdc.hip
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/Modules/merge-using-decls.cpp
A clang/test/OpenMP/loop_collapse_1.c
A clang/test/OpenMP/loop_collapse_2.cpp
M clang/test/Preprocessor/riscv-target-features.c
A clang/test/Sema/bpf-attr-bpf-fastcall.c
M clang/test/Sema/c2x-nodiscard.c
M clang/test/Sema/constant-builtins-2.c
M clang/test/SemaCXX/attr-lifetimebound.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
A clang/test/SemaTemplate/explicit-instantiation-cxx20.cpp
M clang/tools/scan-build/man/scan-build.1
M clang/unittests/Analysis/FlowSensitive/ASTOpsTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Rewrite/CMakeLists.txt
R clang/unittests/Rewrite/RewriteBufferTest.cpp
M compiler-rt/lib/asan/asan_allocator.h
A compiler-rt/test/nsan/stable_sort.cpp
A compiler-rt/test/nsan/swap.cpp
M compiler-rt/test/ubsan/TestCases/Integer/bit-int.c
M flang/include/flang/Evaluate/integer.h
M flang/lib/Evaluate/integer.cpp
M flang/test/Semantics/kinds04_q16.f90
M libc/benchmarks/gpu/LibcGpuBenchmark.cpp
M libc/benchmarks/gpu/LibcGpuBenchmark.h
M libc/benchmarks/gpu/src/math/CMakeLists.txt
A libc/benchmarks/gpu/src/math/atan2_benchmark.cpp
M libc/benchmarks/gpu/timing/amdgpu/timing.h
M libc/benchmarks/gpu/timing/nvptx/timing.h
M libc/startup/gpu/amdgpu/start.cpp
M libcxx/docs/Status/Cxx17.rst
M lld/ELF/LinkerScript.cpp
M lld/MachO/SyntheticSections.cpp
M lld/test/ELF/riscv-section-layout.s
M lld/test/ELF/section-name.s
M lldb/source/Plugins/ExpressionParser/Clang/ASTUtils.h
M lldb/source/Plugins/ScriptInterpreter/Python/lldb-python.h
M lldb/unittests/Callback/TestBreakpointSetCallback.cpp
M lldb/unittests/Disassembler/x86/TestGetControlFlowKindx86.cpp
M lldb/unittests/Process/elf-core/ThreadElfCoreTest.cpp
M llvm/docs/CodeReview.rst
M llvm/docs/DirectX/DXILOpTableGenDesign.rst
M llvm/docs/ExtendingLLVM.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm-c/Transforms/PassBuilder.h
M llvm/include/llvm/ADT/APInt.h
A llvm/include/llvm/ADT/DeltaTree.h
A llvm/include/llvm/ADT/RewriteBuffer.h
A llvm/include/llvm/ADT/RewriteRope.h
M llvm/include/llvm/ADT/SmallPtrSet.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/SwitchLoweringUtils.h
M llvm/include/llvm/CodeGen/TargetPassConfig.h
M llvm/include/llvm/IR/DataLayout.h
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/include/llvm/MC/MCELFObjectWriter.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Support/DXILABI.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/include/llvm/Transforms/Scalar.h
A llvm/include/llvm/Transforms/Scalar/LoopTermFold.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/IR/DataLayout.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderBindings.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Support/CMakeLists.txt
A llvm/lib/Support/DeltaTree.cpp
A llvm/lib/Support/RewriteBuffer.cpp
A llvm/lib/Support/RewriteRope.cpp
M llvm/lib/Support/SmallPtrSet.cpp
M llvm/lib/TableGen/Error.cpp
M llvm/lib/TableGen/TGLexer.cpp
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
R llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp
R llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/CMakeLists.txt
R llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.cpp
R llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
M llvm/lib/Target/AMDGPU/R600TargetMachine.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/ARM/ARMCallLowering.cpp
M llvm/lib/Target/ARM/ARMCallLowering.h
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/BPF/BPFCallingConv.td
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/BPFMIPeephole.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.h
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILConstants.h
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchMergeBaseOffset.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/Sparc/DelaySlotFiller.cpp
M llvm/lib/Target/Sparc/LeonFeatures.td
M llvm/lib/Target/Sparc/LeonPasses.cpp
M llvm/lib/Target/Sparc/LeonPasses.h
M llvm/lib/Target/Sparc/Sparc.h
M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
M llvm/lib/Target/VE/VECustomDAG.cpp
M llvm/lib/Target/VE/VEInstrInfo.td
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
M llvm/lib/Target/X86/X86ScheduleZnver1.td
M llvm/lib/Target/X86/X86ScheduleZnver2.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Scalar/CMakeLists.txt
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
A llvm/lib/Transforms/Scalar/LoopTermFold.cpp
M llvm/lib/Transforms/Scalar/Scalar.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/X86/icmp-codesize.ll
M llvm/test/Analysis/CostModel/X86/icmp-latency.ll
M llvm/test/Analysis/CostModel/X86/icmp-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/icmp.ll
A llvm/test/CodeGen/AArch64/GlobalISel/endian_fallback.ll
M llvm/test/CodeGen/AArch64/note-gnu-property-elf-pauthabi.ll
A llvm/test/CodeGen/AArch64/sme-darwin-sve-vg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-1.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-2.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-3.ll
A llvm/test/CodeGen/BPF/bpf-fastcall-regmask-1.ll
M llvm/test/CodeGen/Hexagon/block-addr.ll
M llvm/test/CodeGen/LoongArch/can-not-realign-stack.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/load-store-atomic.ll
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf.ll
M llvm/test/CodeGen/LoongArch/lasx/vselect.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf.ll
M llvm/test/CodeGen/LoongArch/lsx/vselect.ll
M llvm/test/CodeGen/LoongArch/merge-base-offset.ll
A llvm/test/CodeGen/NVPTX/convert-sm89.ll
A llvm/test/CodeGen/PowerPC/noredzone.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/CodeGen/SPARC/tn0009.mir
A llvm/test/CodeGen/SPARC/tn0010.mir
A llvm/test/CodeGen/SPARC/tn0011.ll
A llvm/test/CodeGen/SPARC/tn0012.mir
A llvm/test/CodeGen/SPARC/tn0013.mir
M llvm/test/CodeGen/X86/abds-neg.ll
M llvm/test/CodeGen/X86/abds.ll
M llvm/test/CodeGen/X86/abdu-neg.ll
M llvm/test/CodeGen/X86/abdu.ll
A llvm/test/CodeGen/X86/avx512f-large-stack.ll
A llvm/test/CodeGen/X86/fold-loop-of-urem.ll
M llvm/test/CodeGen/X86/huge-stack.ll
M llvm/test/CodeGen/X86/unpredictable-brcond.ll
M llvm/test/CodeGen/X86/win64-stackprobe-overflow.ll
M llvm/test/DebugInfo/ARM/single-constant-use-preserves-dbgloc.ll
M llvm/test/DebugInfo/COFF/AArch64/arm64-register-variables.ll
M llvm/test/DebugInfo/COFF/ARMNT/arm-register-variables.ll
A llvm/test/MC/ELF/relax-branch.s
M llvm/test/MC/RISCV/rvv/zvbc.s
A llvm/test/MC/RISCV/rvv/zvkgs.s
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td
M llvm/test/TableGen/dump.td
A llvm/test/TableGen/invalid-macro-name-command-line.td
A llvm/test/Transforms/CodeGenPrepare/X86/fold-loop-of-urem.ll
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
M llvm/test/Transforms/InstCombine/crash.ll
M llvm/test/Transforms/InstCombine/phi.ll
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/InstCombine/select-select.ll
M llvm/test/Transforms/InstCombine/ucmp.ll
M llvm/test/Transforms/InstSimplify/saturating-add-sub.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-cost-compare.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/term-fold-crash.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold-negative-testcase.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-unreachable-bb-phi-node.ll
A llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/unsafe-vf-hint-remark.ll
M llvm/test/Transforms/PhaseOrdering/partialord-ule.ll
M llvm/test/Transforms/SimplifyCFG/X86/sink-common-code.ll
M llvm/test/Transforms/SimplifyCFG/hoist-common-code.ll
M llvm/test/Transforms/SimplifyCFG/sink-and-convert-switch.ll
A llvm/test/tools/llvm-mca/JSON/X86/views-bottleneck.s
M llvm/test/tools/llvm-mca/JSON/X86/views-custom-parameters.s
M llvm/test/tools/llvm-mca/JSON/X86/views-multiple-anonymous-regions.s
M llvm/test/tools/llvm-mca/JSON/X86/views-multiple-region.s
M llvm/test/tools/llvm-mca/JSON/X86/views.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/load.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vislide-vx.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vmv.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vreduce.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vrgather.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vshift-vmul.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/zvbb.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/zvbc.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/zvkg.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/zvkned.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/zvknhb.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/zvksed.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/zvksh.s
M llvm/test/tools/llvm-mca/X86/Znver1/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/Znver1/resources-avx2.s
M llvm/test/tools/llvm-mca/X86/Znver2/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/Znver2/resources-avx2.s
M llvm/test/tools/llvm-readobj/ELF/AArch64/aarch64-feature-pauth.s
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/tools/llvm-mca/Views/BottleneckAnalysis.cpp
M llvm/tools/llvm-mca/Views/BottleneckAnalysis.h
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/unittests/ADT/CMakeLists.txt
A llvm/unittests/ADT/RewriteBufferTest.cpp
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
M llvm/unittests/IR/DataLayoutTest.cpp
M llvm/unittests/Passes/PassBuilderBindings/PassBuilderBindingsTest.cpp
M llvm/unittests/Support/MathExtrasTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/utils/TableGen/DXILEmitter.cpp
M llvm/utils/gn/secondary/clang/lib/Rewrite/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Rewrite/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
M mlir/docs/BytecodeFormat.md
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
M mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/InlinerInterfaceImpl.cpp
M mlir/lib/Dialect/SPIRV/IR/GroupOps.cpp
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/python/mlir/dialects/tensor.py
M mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir
M mlir/test/Conversion/MathToSPIRV/math-to-opencl-spirv.mlir
M mlir/test/Dialect/LLVMIR/inlining-alias-scopes.mlir
M mlir/test/Dialect/SPIRV/IR/non-uniform-ops.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul-mixed-types.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-i8i8i32.mlir
M mlir/test/Target/LLVMIR/Import/import-failure.ll
M mlir/test/Target/LLVMIR/openmp-firstprivate.mlir
M mlir/test/python/dialects/linalg/opdsl/emit_matmul.py
M mlir/test/python/dialects/linalg/ops.py
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.4
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/3c4b949f6d01...95cb43da92f1
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