[all-commits] [llvm/llvm-project] 535b20: [SelectionDAGISel] Use getSignedConstant for OPC_E...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Fri Aug 16 15:42:30 PDT 2024
Branch: refs/heads/users/vitalybuka/spr/asan-catch-initialization-order-fiasco-in-mudules-without-globals
Home: https://github.com/llvm/llvm-project
Commit: 535b209cb3b485a66083d7c4386c16c2df0000a8
https://github.com/llvm/llvm-project/commit/535b209cb3b485a66083d7c4386c16c2df0000a8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Log Message:
-----------
[SelectionDAGISel] Use getSignedConstant for OPC_EmitInteger.
Commit: 51ede55ee2acd3383d990c5fc8882d4b021b87b4
https://github.com/llvm/llvm-project/commit/51ede55ee2acd3383d990c5fc8882d4b021b87b4
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Analysis/DXILResource.cpp
A llvm/test/Analysis/DXILResource/buffer-frombinding.ll
Log Message:
-----------
Re-Apply "[DXIL][Analysis] Implement enough of DXILResourceAnalysis for buffers" (#104517)
Some build configs allow `llvm_unreachable` in a constexpr context, but
not all, so these functions that map a fully covered enum to a string
can't be constexpr. This version fixes that by dropping constexpr from
those functions.
This reverts commit fcc318ff7960d7de8cbac56eb4f32b44b5261677, reapplying
28d577ecefa1557f5dea5566bf33b885c563d14b.
Original message follows:
This implements the DXILResourceAnalysis pass for `dx.TypedBuffer` and
`dx.RawBuffer` types. This should be sufficient to lower
`dx.handle.fromBinding` for this set of types, but it leaves a number of
TODOs around for other resource types.
This also includes a straightforward `print` method in `ResourceInfo` to
make the analysis testable. This is deliberately different than the
printer in `lib/Target/DirectX/DXILResource.cpp`, which attempts to
print bindings in a format compatible with the comments `dxc` prints. We
will eventually want to make that functionality driven by this analysis
pass, but it isn't sufficient for testing so we need both.
Commit: 3e7ca5f1efabb488663caec371e408d74c634d84
https://github.com/llvm/llvm-project/commit/3e7ca5f1efabb488663caec371e408d74c634d84
Author: Kevin McAfee <kmcafee at nvidia.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Log Message:
-----------
[SDAG] Read-only intrinsics must have WillReturn and !Throws attributes to be treated as loads (#99999)
This change avoids deleting `!willReturn` intrinsics for which the
return value is unused when building the SDAG. Currently, calls to
read-only intrinsics not marked with `IntrWillReturn` cannot be deleted
at the LLVM IR level but may be deleted when building the SDAG.
These calls are unsafe to remove from the IR because the functions are
`!willReturn` and should also be unsafe to remove fromthe SDAG for
the same reason. This change aligns the behavior of the SDAG to that
of LLVM IR. This change also requires that intrinsics not have the
`Throws` attribute to be treated as loads for the same reason.
Commit: 3c603f857c26fd979ebff3a469c41ecc24bf548f
https://github.com/llvm/llvm-project/commit/3c603f857c26fd979ebff3a469c41ecc24bf548f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M libcxx/test/support/platform_support.h
Log Message:
-----------
[libcxx][fix] Rename incorrect filename variable
Summary:
This used an old name I forgot to fix, linter didn't catch it because it
was behind `ifdef` and the branch which I tested it on I forgot to
update the one I landed.
Commit: 845461093c6275022e90fb6af15fc330b246b86a
https://github.com/llvm/llvm-project/commit/845461093c6275022e90fb6af15fc330b246b86a
Author: Michael Jones <michaelrj at google.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M libc/include/CMakeLists.txt
Log Message:
-----------
[libc] Fix generated header definitions in cmake (#104628)
Some new headers were not being properly built with
new headergen, since they were using the old "add_gen_header" instead of
the new "add_header_macro". This patch fixes the issue.
Commit: ef56061dcfd162fa3ba9dafd05762707f4c30095
https://github.com/llvm/llvm-project/commit/ef56061dcfd162fa3ba9dafd05762707f4c30095
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
AMDGPU: Rename type helper functions in atomic handling
Requested on #95394
Commit: e6b9f12b0ac0f1e6f7f7145719092c10731e4fe4
https://github.com/llvm/llvm-project/commit/e6b9f12b0ac0f1e6f7f7145719092c10731e4fe4
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M clang/lib/Driver/Types.cpp
M flang/test/Driver/cuda-option.f90
Log Message:
-----------
[flang][cuda][driver] Make sure flang does not switch to cc1 (#104613)
Flang is switch to cc1 when we use `-x cuda`. Make sure we can use fc1
with cuda fortran input.
The current pipeline will fail at MLIR level for the moment.
#104483
Commit: 464fa3b3b047518699689b57c473c87701986593
https://github.com/llvm/llvm-project/commit/464fa3b3b047518699689b57c473c87701986593
Author: Ahmed Bougacha <ahmed at bougacha.org>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/docs/PointerAuth.md
M llvm/lib/Object/MachOObjectFile.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp
A llvm/test/MC/AArch64/arm64e-authenticated-pointer-reloc.s
Log Message:
-----------
[AArch64][MachO] Encode @AUTH to ARM64_RELOC_AUTHENTICATED_POINTER.
This adds MachO support for emission of authenticated pointer
relocations.
We already support AArch64AuthMCExpr, to represent assembly expressions
such as:
.quad <symbol>@AUTH(<key>, <discriminator> [, addr])
For example:
.quad _g3 at AUTH(ib, 1234, addr)
These @AUTH expressions lower to a new kind of MachO relocation:
ARM64_RELOC_AUTHENTICATED_POINTER (11)
The relocation points to the referenced symbol.
The other data, describing the signing scheme and original addend
(only 32 bits instead of 64), is encoded into the addend (in the
relocated location):
|63|62|61-51|50-49| 48 |47 - 32|31 - 0|
| 1| 0| 0 | key | addr | discriminator | addend |
Commit: e315ba185b835c8ee520076b434377cfb7350067
https://github.com/llvm/llvm-project/commit/e315ba185b835c8ee520076b434377cfb7350067
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M clang/lib/Driver/Types.cpp
M flang/test/Driver/cuda-option.f90
Log Message:
-----------
Revert "[flang][cuda][driver] Make sure flang does not switch to cc1" (#104632)
Reverts llvm/llvm-project#104613
Commit: cf721e29c6a3f220bd66475b7d29aff7fe9d56e3
https://github.com/llvm/llvm-project/commit/cf721e29c6a3f220bd66475b7d29aff7fe9d56e3
Author: Amy Kwan <amy.kwan1 at ibm.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCMergeStringPool.cpp
A llvm/test/CodeGen/PowerPC/mergeable-string-pool-tls.ll
Log Message:
-----------
[PowerPC] Do not merge TLS constants within PPCMergeStringPool.cpp (#94059)
This patch prevents thread-local constants to be merged within
PPCMergeStringPool.cpp.
The PPCMergeStringPool pass primarily merges non-thread-local constants
together, and thread-local constants should not be mixed together with
other (non-thread-local) constants. In the event that thread-local and
other non-thread-local constants are pooled together, the
llvm.threadlocal.address intrinsic can fail as it expects its argument
to be a thread-local global value, but the merged string structure
created by the PPCMergeStringPool pass is not thread-local as a whole.
Commit: 1aa8a6f6917edbdcad53afad3b00c7e86aa57ffe
https://github.com/llvm/llvm-project/commit/1aa8a6f6917edbdcad53afad3b00c7e86aa57ffe
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Compute cost for most opcodes in VPWidenRecipe (NFCI). (#98764)
Implement VPWidenRecipe::computeCost for most cases (except
UDiv,SDiv,URem,SRem which require additional logic).
Note that this specializes `::computeCost` instead of `::cost`, as
`VPRecipeBase::cost` is responsible for skipping cost-computations
for pre-computed recipes for now.
The most recent version of the VPlan-based cost model introduction
has been committed on Jul 10 (b841e2eca3b5c8b) and we should
probably give it at least a week in case additional mismatches surface.
PR: https://github.com/llvm/llvm-project/pull/98764
Commit: 71d54faa65f490f2a2825e591c3eb25ff7996221
https://github.com/llvm/llvm-project/commit/71d54faa65f490f2a2825e591c3eb25ff7996221
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.h
Log Message:
-----------
[DirectX] Revert specialized createOp methods part of #101250
In 8cf85653b6f5 "[DirectX] Make DXILOpBuilder's API more useable" we introduced
specialized createOp methods for each DirectX op for convenience, but the API
is buggy and untested. It also isn't actually as useful as I imagined it would
be since we don't have argument names or const-ness represented in DXIL.td
currently. Remove these methods for now and we can reintroduce them if we
actually need them later.
Pull Request: https://github.com/llvm/llvm-project/pull/104245
Commit: 7ff377ba60bf9e615f3efc60268fbd74b75e54c4
https://github.com/llvm/llvm-project/commit/7ff377ba60bf9e615f3efc60268fbd74b75e54c4
Author: Tyler Nowicki <tyler.nowicki at amd.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/include/llvm/Analysis/CFGPrinter.h
M llvm/unittests/Analysis/CMakeLists.txt
A llvm/unittests/Analysis/GraphWriterTest.cpp
Log Message:
-----------
[Analysis] Fix null ptr dereference when using WriteGraph without branch probability info (#104102)
The call to 'CFGInfo->getBPI()->getEdgeProbability(Node, SuccBB);' fails
when BPI is not provided. In this case we can give up and not print any
edge attributes.
---------
Co-authored-by: tnowicki <tnowicki.nowicki at amd.com>
Commit: f5b81aa6ec371c13794aac82eb246a1a92966b43
https://github.com/llvm/llvm-project/commit/f5b81aa6ec371c13794aac82eb246a1a92966b43
Author: gulfemsavrun <gulfem at google.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
A llvm/test/Instrumentation/InstrProfiling/conditional-counter-updates.ll
Log Message:
-----------
[InstrProf] Support conditional counter updates (#102542)
This patch adds support for conditional counter updates in single byte
counters mode to reduce the write contention by first checking whether
the counter is set before overwriting it.
---------
Co-authored-by: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Commit: 0e4f7c7207d26e141e271dc88102905d14815596
https://github.com/llvm/llvm-project/commit/0e4f7c7207d26e141e271dc88102905d14815596
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn
Log Message:
-----------
[gn build] Port 7ff377ba60bf
Commit: 808933f60b574c45087d8255ff113083c4536d85
https://github.com/llvm/llvm-project/commit/808933f60b574c45087d8255ff113083c4536d85
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/tools/llvm-mc/llvm-mc.cpp
Log Message:
-----------
[MC] Drop whitespace padding in AMDGPU combined asm/disasm tests. (#104433)
A follow-up from
<https://github.com/llvm/llvm-project/pull/92895#discussion_r1684390909>.
Commit: af81b4f9f98f6ac89f876637f065d6525e374468
https://github.com/llvm/llvm-project/commit/af81b4f9f98f6ac89f876637f065d6525e374468
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M clang/lib/Driver/Types.cpp
M flang/test/Driver/cuda-option.f90
Log Message:
-----------
Reland "[flang][cuda][driver] Make sure flang does not switch to cc1 (#104613)"
Flang is switch to cc1 when we use `-x cuda`. Make sure we can use fc1
with cuda fortran input.
The current pipeline will fail at MLIR level for the moment.
Commit: 8c5d76ac508ece0b41cfd33247d1f0551c80a9e8
https://github.com/llvm/llvm-project/commit/8c5d76ac508ece0b41cfd33247d1f0551c80a9e8
Author: vporpo <vporpodas at google.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Tracker.cpp
Log Message:
-----------
[SandboxIR][Tracker][NFC] GenericSetterWithIdx (#104615)
This patch adds a generic change tracker class, similar to
GenericSetter, but for getter/setter functions that also take an index
argument. For example: `Foo:get(Idx)` and `Foo::set(Idx, Val)`. These
setter/getter patterns are common enough that using a common
implementation seems beneficial.
Commit: de9338fc625d8d67c18032492b2e743cd53f4b37
https://github.com/llvm/llvm-project/commit/de9338fc625d8d67c18032492b2e743cd53f4b37
Author: Valentin Clement <clementval at gmail.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M clang/lib/Driver/Types.cpp
M flang/test/Driver/cuda-option.f90
Log Message:
-----------
Revert "Reland "[flang][cuda][driver] Make sure flang does not switch to cc1 (#104613)""
This reverts commit af81b4f9f98f6ac89f876637f065d6525e374468.
Commit: 1a8817aebe12b8d4708ee849fb8f792cffb7ae85
https://github.com/llvm/llvm-project/commit/1a8817aebe12b8d4708ee849fb8f792cffb7ae85
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M clang/lib/Driver/Types.cpp
M flang/test/Driver/cuda-option.f90
Log Message:
-----------
Reland "[flang][cuda][driver] Make sure flang does not switch to cc1 (#104613)"
Flang is switch to cc1 when we use `-x cuda`. Make sure we can use fc1
with cuda fortran input.
The current pipeline will fail at MLIR level for the moment.
Commit: fd9aa5e40d903e8411b924d94348c0e348cf50db
https://github.com/llvm/llvm-project/commit/fd9aa5e40d903e8411b924d94348c0e348cf50db
Author: Valentin Clement <clementval at gmail.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M flang/test/Driver/cuda-option.f90
Log Message:
-----------
[flang][cuda] Remove run line
Commit: 13779ec29ed724666407bd60f8c4cc8228107ea5
https://github.com/llvm/llvm-project/commit/13779ec29ed724666407bd60f8c4cc8228107ea5
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/include/llvm/IR/DataLayout.h
M llvm/lib/IR/DataLayout.cpp
R llvm/test/Assembler/getInt.ll
M llvm/unittests/IR/DataLayoutTest.cpp
Log Message:
-----------
[DataLayout] Refactor parsing of "p" specification (#104583)
Split off of #104545 to reduce patch size.
Similar to #104546, this introduces `parseSize` and `parseAlignment`,
which are improved versions of `getInt` tailored for specific needs.
I'm not a GTest guru, so the tests are not ideal.
Commit: 4a0bbbcbcf6ebc87e794e7b86b9f4651bffcd806
https://github.com/llvm/llvm-project/commit/4a0bbbcbcf6ebc87e794e7b86b9f4651bffcd806
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/full-non-schedulable-overlap.ll
Log Message:
-----------
[SLP]Fix PR104637: do not create new nodes for fully overlapped non-schedulable nodes
If the scalars do not require scheduling and were already vectorized,
but in the different order, compiler still tries to create the new node.
It may cause the compiler crash for the gathered operands. Instead need
to consider such nodes as full overlap and just reshuffle vectorized
node.
Fixes https://github.com/llvm/llvm-project/issues/104637
Commit: f33d519cd471b1eec41c8b26f892ddb66bf8144f
https://github.com/llvm/llvm-project/commit/f33d519cd471b1eec41c8b26f892ddb66bf8144f
Author: vporpo <vporpodas at google.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Implement ConstantInt (#104639)
This patch implements a very basic version of sandboxir::ConstantInt. It
is missing most of the factory functions present in llvm::ConstantInt,
but these will be added later.
Commit: 70995a1a3379ed3c21b1c5da6723f04166cb0ae6
https://github.com/llvm/llvm-project/commit/70995a1a3379ed3c21b1c5da6723f04166cb0ae6
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
M llvm/test/CodeGen/X86/bfloat.ll
M llvm/test/CodeGen/X86/shuffle-half.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-load.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-store.ll
Log Message:
-----------
[ScalarizeMaskedMemIntr] Optimize splat non-constant masks (#104537)
In cases (like the ones added in the tests) where the condition of a
masked load or store is a splat but not a constant (that is, a masked
operation is being used to implement patterns like "load if the current
lane is in-bounds, otherwise return 0"), optimize the 'scalarized' code
to perform an aligned vector load/store if the splat constant is true.
Additionally, take a few steps to preserve aliasing information and
names when nothing is scalarized while I'm here.
As motivation, some LLVM IR users will genatate masked load/store in
cases that map to this kind of predicated operation (where either the
vector is loaded/stored or it isn't) in order to take advantage of
hardware primitives, but on AMDGPU, where we don't have a masked load or
store, this pass would scalarize a load or store that was intended to be
- and can be - vectorized while also introducing expensive branches.
Fixes #104520
Pre-commit tests at #104527
Commit: bd9f2c2ba095fa8345bba9f74b279ff20d5ddaab
https://github.com/llvm/llvm-project/commit/bd9f2c2ba095fa8345bba9f74b279ff20d5ddaab
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M libc/config/gpu/entrypoints.txt
Log Message:
-----------
[libc] Add missing math definitions for round and scal for GPU (#104636)
Summary:
These can be enabled
Commit: ebe7265b142f370f0a563fece5db22f57383ba2d
https://github.com/llvm/llvm-project/commit/ebe7265b142f370f0a563fece5db22f57383ba2d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/test/CodeGen/Mips/Fast-ISel/bswap1.ll
Log Message:
-----------
[Mips] Fix fast isel for i16 bswap. (#103398)
We need to mask the SRL result to 8 bits before ORing in the SLL. This
is needed in case bits 23:16 of the input aren't zero. They will have
been shifted into bits 15:8.
We don't need to AND the result with 0xffff. It's ok if the upper 16
bits of the register are garbage.
Fixes #103035.
Commit: e4f3735d5f600b17b8f86956162d41ce82096685
https://github.com/llvm/llvm-project/commit/e4f3735d5f600b17b8f86956162d41ce82096685
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-08-17 (Sat, 17 Aug 2024)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/test/CXX/basic/basic.start/basic.start.main/p3.cpp
Log Message:
-----------
[Clang] fix crash by avoiding invalidation of extern main declaration during strictness checks (#104594)
Fixes #104570
Commit: bfdeceada36c0f14a7bb2e264f0b801e442368a7
https://github.com/llvm/llvm-project/commit/bfdeceada36c0f14a7bb2e264f0b801e442368a7
Author: Dmitry Chestnykh <dm.chestnykh at gmail.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/include/llvm/Demangle/ItaniumDemangle.h
Log Message:
-----------
[NFC][cxxabi] Apply `cp-to-llvm.sh` (#101970)
Commit: 324b676a3d0449add8d4e24047680125f9b9a716
https://github.com/llvm/llvm-project/commit/324b676a3d0449add8d4e24047680125f9b9a716
Author: Thurston Dang <thurston at google.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/test/CodeGen/AArch64/arm64-addrmode.ll
Log Message:
-----------
Revert "[AArch64] Fold more load.x into load.i with large offset"
This reverts commit 43ffe2eed0d9f73789dbe213023733d164999306.
Reason: buildbot breakage starting at https://lab.llvm.org/buildbot/#/builders/85/builds/1102
I manually bisected and found that clang crashed with 43ffe2eed0d9f73789dbe213023733d164999306 but not the immediately preceding commit (33190490c667aaf8b08d5af8b8ce84524f856e80)
Commit: 5ef2456a438578b0783241a2744efc62d47e5ab6
https://github.com/llvm/llvm-project/commit/5ef2456a438578b0783241a2744efc62d47e5ab6
Author: PeterChou1 <peter.chou at mail.utoronto.ca>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.cpp
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/test/clang-doc/enum.cpp
M clang-tools-extra/unittests/clang-doc/HTMLGeneratorTest.cpp
Log Message:
-----------
[clang-doc] add support for enums comments in html generation (#101282)
Part of https://github.com/llvm/llvm-project/issues/101129
This patch adds support for attaching comments to enums for HTML in
clang-doc. It changes the enum generation to table tags where as
perviously we're using lists which is more in line with what other doc
generators are doing. It also gives clang-doc the ability to show user
specified enum values
Commit: 085b04b3a2e941a25cbf713cc3969c1254469289
https://github.com/llvm/llvm-project/commit/085b04b3a2e941a25cbf713cc3969c1254469289
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
A compiler-rt/test/asan/TestCases/initialization-bug-no-global.cpp
A llvm/test/Instrumentation/AddressSanitizer/instrument_initializer_without_global.ll
Log Message:
-----------
[asan] Pre-commit test with global constructor without any global (#104620)
In this test `@initializer()` can access globals
outside of the module, but Asan does nothing to
detect that.
Commit: 7fa3af1f742ee00bd11308af5db068ddf9f7fc17
https://github.com/llvm/llvm-project/commit/7fa3af1f742ee00bd11308af5db068ddf9f7fc17
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-16 (Fri, 16 Aug 2024)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.cpp
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/test/clang-doc/enum.cpp
M clang-tools-extra/unittests/clang-doc/HTMLGeneratorTest.cpp
M clang/lib/Driver/Types.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/test/CXX/basic/basic.start/basic.start.main/p3.cpp
M flang/test/Driver/cuda-option.f90
M libc/config/gpu/entrypoints.txt
M libc/include/CMakeLists.txt
M libcxx/test/support/platform_support.h
M llvm/docs/PointerAuth.md
M llvm/include/llvm/Analysis/CFGPrinter.h
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/include/llvm/IR/DataLayout.h
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/IR/DataLayout.cpp
M llvm/lib/Object/MachOObjectFile.cpp
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.h
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/PowerPC/PPCMergeStringPool.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
A llvm/test/Analysis/DXILResource/buffer-frombinding.ll
R llvm/test/Assembler/getInt.ll
M llvm/test/CodeGen/AArch64/arm64-addrmode.ll
M llvm/test/CodeGen/Mips/Fast-ISel/bswap1.ll
A llvm/test/CodeGen/PowerPC/mergeable-string-pool-tls.ll
M llvm/test/CodeGen/X86/bfloat.ll
M llvm/test/CodeGen/X86/shuffle-half.ll
A llvm/test/Instrumentation/InstrProfiling/conditional-counter-updates.ll
A llvm/test/MC/AArch64/arm64e-authenticated-pointer-reloc.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
A llvm/test/Transforms/SLPVectorizer/X86/full-non-schedulable-overlap.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-load.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-store.ll
M llvm/tools/llvm-mc/llvm-mc.cpp
M llvm/unittests/Analysis/CMakeLists.txt
A llvm/unittests/Analysis/GraphWriterTest.cpp
M llvm/unittests/IR/DataLayoutTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn
Log Message:
-----------
rebase
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/cd1c7448e46a...7fa3af1f742e
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