[all-commits] [llvm/llvm-project] 5e59c6: AMDGPU: Handle folding frame indexes into s_add_i32

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/amdgpu-eliminateframeindex-s-add-i32
  Home:   https://github.com/llvm/llvm-project
  Commit: 5e59c686be29649a412033d9ebc09c72753d4b6a
      https://github.com/llvm/llvm-project/commit/5e59c686be29649a412033d9ebc09c72753d4b6a
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-08-15 (Thu, 15 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
    M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
    M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
    M llvm/test/CodeGen/AMDGPU/frame-index.mir
    M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll

  Log Message:
  -----------
  AMDGPU: Handle folding frame indexes into s_add_i32


  Commit: fb7d39893ef83cd943da0df80279409d2c8c79e2
      https://github.com/llvm/llvm-project/commit/fb7d39893ef83cd943da0df80279409d2c8c79e2
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-08-15 (Thu, 15 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
    M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
    M llvm/test/CodeGen/AMDGPU/flat-scratch.ll

  Log Message:
  -----------
  Fix offset 0 case with different register


  Commit: 2e091a09b663ba2b1bf5c88ba83d44b18aef0792
      https://github.com/llvm/llvm-project/commit/2e091a09b663ba2b1bf5c88ba83d44b18aef0792
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-08-15 (Thu, 15 Aug 2024)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir

  Log Message:
  -----------
  AMDGPU: Add more scalar frame index lowering tests


  Commit: 58097cbd82b719415541584984a56949cb6bd33d
      https://github.com/llvm/llvm-project/commit/58097cbd82b719415541584984a56949cb6bd33d
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-08-15 (Thu, 15 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
    M llvm/test/CodeGen/AMDGPU/frame-index.mir

  Log Message:
  -----------
  Fix clobbering value for reg += fi case


Compare: https://github.com/llvm/llvm-project/compare/9088c5412769...58097cbd82b7

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