[all-commits] [llvm/llvm-project] 8aacbf: [X86] combineEXTRACT_SUBVECTOR - treat oneuse extr...

Simon Pilgrim via All-commits all-commits at lists.llvm.org
Wed Aug 14 10:24:36 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8aacbfcb095bd37b6444a9fa074301d733555374
      https://github.com/llvm/llvm-project/commit/8aacbfcb095bd37b6444a9fa074301d733555374
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-14 (Wed, 14 Aug 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
    M llvm/test/CodeGen/X86/oddshuffles.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-5.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
    M llvm/test/CodeGen/X86/x86-interleaved-access.ll

  Log Message:
  -----------
  [X86] combineEXTRACT_SUBVECTOR - treat oneuse extractions from loads as free

Allows further reductions in instruction vector widths


  Commit: 85c79d63414fbf122551375eb7b9c1b1afabcf14
      https://github.com/llvm/llvm-project/commit/85c79d63414fbf122551375eb7b9c1b1afabcf14
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-14 (Wed, 14 Aug 2024)

  Changed paths:
    M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll

  Log Message:
  -----------
  [X86] Add test coverage for #103564


  Commit: ea9df0982fa8f8049b52bf5b449eed08d4f551e4
      https://github.com/llvm/llvm-project/commit/ea9df0982fa8f8049b52bf5b449eed08d4f551e4
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-14 (Wed, 14 Aug 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
    M llvm/test/CodeGen/X86/vector-pack-512.ll
    M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
    M llvm/test/CodeGen/X86/zero_extend_vector_inreg.ll

  Log Message:
  -----------
  [X86] concat(permv3(x0,m0,y0),permv3(x0,m1,y0)) -> permv3(concat(x0,u),m3,concat(y0,u))

Reference the lowest subvector if higher subvectors match - this often occurs in length changing shuffles.

Fixes #103564


Compare: https://github.com/llvm/llvm-project/compare/0eb1fc88680e...ea9df0982fa8

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