[all-commits] [llvm/llvm-project] c4206f: [RISCV][compiler-rt] Update __init_riscv_feature_b...

[Piyou Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c4206f1ff1d946c495b74738eba9303dafb17e18
      https://github.com/llvm/llvm-project/commit/c4206f1ff1d946c495b74738eba9303dafb17e18
  Author: Piyou Chen <piyou.chen at sifive.com>
  Date:   2024-08-14 (Wed, 14 Aug 2024)

  Changed paths:
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/test/CodeGen/builtin-cpu-supports.c
    M compiler-rt/lib/builtins/cpu_model/riscv.c

  Log Message:
  -----------
  [RISCV][compiler-rt] Update __init_riscv_feature_bits prototype (#101472)

This patch add `void* PlatformArgs` parameter to
`__init_riscv_feature_bits`. `PlatformArgs` allows the platform to
provide pre-computed data and access it without extra effort. For
example, Linux could pass the vDSO object to avoid an extra system call.

```
__init_riscv_feature_bits()

->

__init_riscv_feature_bits(void *PlatformArgs)
```



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications