[all-commits] [llvm/llvm-project] 413459: [lldb] Construct SmallVector with ArrayRef (NFC) (...
Martin Storsjö via All-commits
all-commits at lists.llvm.org
Mon Aug 12 13:55:55 PDT 2024
Branch: refs/heads/users/MaskRay/spr/main.nsan-use-sanitizer-allocator
Home: https://github.com/llvm/llvm-project
Commit: 41345925f9393518be8029cfb1ea80cfeb5631b4
https://github.com/llvm/llvm-project/commit/41345925f9393518be8029cfb1ea80cfeb5631b4
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-11 (Sun, 11 Aug 2024)
Changed paths:
M lldb/include/lldb/Utility/UUID.h
Log Message:
-----------
[lldb] Construct SmallVector with ArrayRef (NFC) (#102793)
Commit: 60680f7181e10f0344a96ed421490bc2cd1798ca
https://github.com/llvm/llvm-project/commit/60680f7181e10f0344a96ed421490bc2cd1798ca
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-11 (Sun, 11 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
A llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
Log Message:
-----------
[LV] Handle SwitchInst in ::isPredicatedInst.
After f0df4fbd0c7b, isPredicatedInst needs to handle SwitchInst as well.
Handle it the same as BranchInst.
This fixes a crash in the newly added test and improves the results for
one of the existing tests in predicate-switch.ll
Should fix https://lab.llvm.org/buildbot/#/builders/113/builds/2099.
Commit: 32973b08d8cb02c213d96df453ff323470304645
https://github.com/llvm/llvm-project/commit/32973b08d8cb02c213d96df453ff323470304645
Author: Steven Wu <stevenwu at apple.com>
Date: 2024-08-11 (Sun, 11 Aug 2024)
Changed paths:
M llvm/unittests/Support/DynamicLibrary/CMakeLists.txt
Log Message:
-----------
[CMake] Followup to #102396 and restore old DynamicLibrary symbols behavior (#102671)
Followup to #102138 and #102396, restore more old behavior to fix
ppc64-aix bot.
Commit: 1753008bbbc317511c07ed30eef21e0494d63de8
https://github.com/llvm/llvm-project/commit/1753008bbbc317511c07ed30eef21e0494d63de8
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-08-11 (Sun, 11 Aug 2024)
Changed paths:
M llvm/include/llvm/CodeGen/BasicBlockSectionsProfileReader.h
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.h
M llvm/lib/CodeGen/SelectionDAG/MatchContext.h
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.h
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.h
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.h
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldCOFFAArch64.h
M llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.h
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/R600ISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/R600MachineScheduler.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendELF.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendWinCOFF.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
M llvm/lib/Target/SystemZ/SystemZMachineScheduler.h
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
M llvm/unittests/CodeGen/MLRegAllocDevelopmentFeatures.cpp
Log Message:
-----------
[NFC] Eliminate top-level "using namespace" from some headers. (#102751)
- Eliminate top-level "using namespace" from some headers.
Commit: 1b71c471c7d0216fa7fc5c0b45b5926d1fabfaf4
https://github.com/llvm/llvm-project/commit/1b71c471c7d0216fa7fc5c0b45b5926d1fabfaf4
Author: David Blaikie <dblaikie at gmail.com>
Date: 2024-08-11 (Sun, 11 Aug 2024)
Changed paths:
M libc/benchmarks/gpu/LibcGpuBenchmarkMain.cpp
M libc/startup/gpu/amdgpu/start.cpp
M libc/startup/gpu/nvptx/start.cpp
M libc/startup/linux/do_start.cpp
M libc/test/IntegrationTest/test.h
M libc/test/UnitTest/LibcTestMain.cpp
M libc/utils/HdrGen/PrototypeTestGen/PrototypeTestGen.cpp
Log Message:
-----------
libc: Remove `extern "C"` from main declarations (#102825)
This is invalid in C++, and clang recently started warning on it as of
#101853
Commit: b7c7dbd473c0857d0d86b228e45ce5a0a68a1a1b
https://github.com/llvm/llvm-project/commit/b7c7dbd473c0857d0d86b228e45ce5a0a68a1a1b
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-08-11 (Sun, 11 Aug 2024)
Changed paths:
M libc/benchmarks/gpu/LibcGpuBenchmarkMain.cpp
M libc/startup/gpu/amdgpu/start.cpp
M libc/startup/gpu/nvptx/start.cpp
M libc/startup/linux/do_start.cpp
M libc/test/IntegrationTest/test.h
M libc/test/UnitTest/LibcTestMain.cpp
M libc/utils/HdrGen/PrototypeTestGen/PrototypeTestGen.cpp
Log Message:
-----------
Revert "libc: Remove `extern "C"` from main declarations" (#102827)
Reverts llvm/llvm-project#102825
Commit: 0a2a319ea6c8dc59fd3f0e284766361b8deca51c
https://github.com/llvm/llvm-project/commit/0a2a319ea6c8dc59fd3f0e284766361b8deca51c
Author: Chris Apple <cja-private at pm.me>
Date: 2024-08-11 (Sun, 11 Aug 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan.h
M compiler-rt/lib/rtsan/rtsan_interceptors.cpp
Log Message:
-----------
[rtsan] Make sure rtsan gets initialized on mac (#100188)
Intermittently on my mac I was getting the same nullptr crash in dlsym.
We need to make sure rtsan gets initialized on mac between when the
binary starts running, and the first intercepted function is called.
Until that point we should use the DlsymAllocator.
Commit: af09dd692232fe6f06650e5b29710206d516fb38
https://github.com/llvm/llvm-project/commit/af09dd692232fe6f06650e5b29710206d516fb38
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2024-08-11 (Sun, 11 Aug 2024)
Changed paths:
M lldb/source/Target/ThreadPlanSingleThreadTimeout.cpp
Log Message:
-----------
[lldb] Silence warning
This fixes:
```
[6831/7617] Building CXX object
tools\lldb\source\Target\CMakeFiles\lldbTarget.dir\ThreadPlanSingleThreadTimeout.cpp.obj
C:\src\git\llvm-project\lldb\source\Target\ThreadPlanSingleThreadTimeout.cpp(66)
: warning C4715:
'lldb_private::ThreadPlanSingleThreadTimeout::StateToString': not all
control paths return a value
```
Commit: 20baa9a9eccda9bd61951f3f97b1d197f8b66dfc
https://github.com/llvm/llvm-project/commit/20baa9a9eccda9bd61951f3f97b1d197f8b66dfc
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2024-08-11 (Sun, 11 Aug 2024)
Changed paths:
M openmp/runtime/src/kmp_affinity.cpp
Log Message:
-----------
[openmp][runtime] Silence warnings
This fixes several of those when building with MSVC on Windows:
```
[3625/7617] Building CXX object
projects\openmp\runtime\src\CMakeFiles\omp.dir\kmp_affinity.cpp.obj
C:\src\git\llvm-project\openmp\runtime\src\kmp_affinity.cpp(2637):
warning C4062: enumerator 'KMP_HW_UNKNOWN' in switch of enum 'kmp_hw_t'
is not handled
C:\src\git\llvm-project\openmp\runtime\src\kmp.h(628): note: see
declaration of 'kmp_hw_t'
```
Commit: 7202fe5829319a70ac05232af7206781a8a5437f
https://github.com/llvm/llvm-project/commit/7202fe5829319a70ac05232af7206781a8a5437f
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2024-08-11 (Sun, 11 Aug 2024)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerUtilWindows.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_win.cpp
Log Message:
-----------
[compiler-rt] Silence warnings
This fixes a few of these warnings, when building with Clang ToT on
Windows:
```
[622/7618] Building CXX object
projects\compiler-rt\lib\sanitizer_common\CMakeFiles\RTSanitizerCommonSymbolizer.x86_64.dir\sanitizer_symbolizer_win.cpp.obj
C:\src\git\llvm-project\compiler-rt\lib\sanitizer_common\sanitizer_symbolizer_win.cpp(74,3):
warning: cast from 'FARPROC' (aka 'long long (*)()') to
'decltype(::StackWalk64) *' (aka 'int (*)(unsigned long, void *, void *,
_tagSTACKFRAME64 *, void *, int (*)(void *, unsigned long long, void *,
unsigned long, unsigned long *), void *(*)(void *, unsigned long long),
unsigned long long (*)(void *, unsigned long long), unsigned long long
(*)(void *, void *, _tagADDRESS64 *))') converts to incompatible
function type [-Wcast-function-type-mismatch]
```
This is similar to https://github.com/llvm/llvm-project/pull/97905
Commit: a819b0e55fafab0c6c4b059fc0132620f43ac38a
https://github.com/llvm/llvm-project/commit/a819b0e55fafab0c6c4b059fc0132620f43ac38a
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2024-08-11 (Sun, 11 Aug 2024)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/TargetThreadWindows.cpp
Log Message:
-----------
[lldb] Silence warning
This fixes the following warning, when building with Clang ToT on
Windows:
```
[6668/7618] Building CXX object
tools\lldb\source\Plugins\Process\Windows\Common\CMakeFiles\lldbPluginProcessWindowsCommon.dir\TargetThreadWindows.cpp.obj
C:\src\git\llvm-project\lldb\source\Plugins\Process\Windows\Common\TargetThreadWindows.cpp(182,22):
warning: cast from 'FARPROC' (aka 'long long (*)()') to
'GetThreadDescriptionFunctionPtr' (aka 'long (*)(void *, wchar_t **)')
converts to incompatible function type [-Wcast-function-type-mismatch]
```
This is similar to: https://github.com/llvm/llvm-project/pull/97905
Commit: e79e6015e9fe47fa2fd17ebe1f018c6e0ab86fb7
https://github.com/llvm/llvm-project/commit/e79e6015e9fe47fa2fd17ebe1f018c6e0ab86fb7
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2024-08-11 (Sun, 11 Aug 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/PECOFF/WindowsMiniDump.cpp
Log Message:
-----------
[lldb] Fix dangling expression
This fixes the following:
```
[6603/7618] Building CXX object
tools\lldb\source\Plugins\ObjectFile\PECOFF\CMakeFiles\lldbPluginObjectFilePECOFF.dir\WindowsMiniDump.cpp.obj
C:\src\git\llvm-project\lldb\source\Plugins\ObjectFile\PECOFF\WindowsMiniDump.cpp(29,25):
warning: object backing the pointer will be destroyed at the end of the
full-expression [-Wdangling-gsl]
29 | const auto &outfile = core_options.GetOutputFile().value();
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
1 warning generated.
```
Commit: e2f9c1853349a5dc86ccd0e85e09af245c418aa8
https://github.com/llvm/llvm-project/commit/e2f9c1853349a5dc86ccd0e85e09af245c418aa8
Author: Brad Smith <brad at comstyle.com>
Date: 2024-08-11 (Sun, 11 Aug 2024)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/aarch64.c
A compiler-rt/lib/builtins/cpu_model/aarch64/fmv/getauxval.inc
R compiler-rt/lib/builtins/cpu_model/aarch64/fmv/sysauxv.inc
A compiler-rt/lib/builtins/cpu_model/aarch64/lse_atomics/getauxval.inc
R compiler-rt/lib/builtins/cpu_model/aarch64/lse_atomics/sysauxv.inc
Log Message:
-----------
[builtins] Rename sysauxv to getauxval to reflect the function called. NFCI (#102796)
Commit: 80ff391190226b57fc3b192f7c941778c4ed2126
https://github.com/llvm/llvm-project/commit/80ff391190226b57fc3b192f7c941778c4ed2126
Author: Ryan Holt <ryanholt at mathworks.com>
Date: 2024-08-11 (Sun, 11 Aug 2024)
Changed paths:
M mlir/unittests/Support/CyclicReplacerCacheTest.cpp
Log Message:
-----------
[mlir] Fix build after ec50f5828f25 (#101021)
This commit fixes what appears to be invalid C++ -- a lambda capturing a
variable before it is declared. The code compiles with GCC and Clang but
not MSVC.
Commit: efc6b50d2d93fa571572ee3ef1d4565c09ad1610
https://github.com/llvm/llvm-project/commit/efc6b50d2d93fa571572ee3ef1d4565c09ad1610
Author: Farzon Lotfi <1802579+farzonl at users.noreply.github.com>
Date: 2024-08-11 (Sun, 11 Aug 2024)
Changed paths:
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
Log Message:
-----------
[LoopVectorize][X86][AMDLibm] Add Missing AMD LibM trig vector intrinsics (#101125)
Adding the following linked to their docs:
-
[amd_vrs16_acosf](https://github.com/amd/aocl-libm-ose/blob/9c0b67293ba01e509a6308247d82a8f1adfbbc67/scripts/libalm.def#L221)
-
[amd_vrd2_cosh](https://github.com/amd/aocl-libm-ose/blob/9c0b67293ba01e509a6308247d82a8f1adfbbc67/scripts/libalm.def#L124)
-
[amd_vrs16_tanhf](https://github.com/amd/aocl-libm-ose/blob/9c0b67293ba01e509a6308247d82a8f1adfbbc67/scripts/libalm.def#L224)
Commit: 4399f2a5ef38df381c2b65052621131890194d59
https://github.com/llvm/llvm-project/commit/4399f2a5ef38df381c2b65052621131890194d59
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
Log Message:
-----------
[NFC] [C++20] [Modules] Adjust the implementation of wasDeclEmitted to make it more clear
The preivous implementation of wasDeclEmitted may be confusing that
why we need to filter the declaration not from modules. Now adjust the
implementations to avoid the problems.
Commit: 435654b3d20e338fa6ca6c8d3b7358839f1db5dc
https://github.com/llvm/llvm-project/commit/435654b3d20e338fa6ca6c8d3b7358839f1db5dc
Author: Steven Wu <stevenwu at apple.com>
Date: 2024-08-11 (Sun, 11 Aug 2024)
Changed paths:
M llvm/unittests/Support/DynamicLibrary/CMakeLists.txt
Log Message:
-----------
Revert "[CMake] Followup to #102396 and restore old DynamicLibrary symbols behavior (#102671)"
This reverts commit 32973b08d8cb02c213d96df453ff323470304645. This fix
doesn't fix the build failure as expected and making few other
configuration broken too.
Commit: 62ced8116ba5274991af0e94cfdf873593c7764d
https://github.com/llvm/llvm-project/commit/62ced8116ba5274991af0e94cfdf873593c7764d
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/test/CodeGenObjC/no-sanitize.m
M llvm/include/llvm/Transforms/Instrumentation.h
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/Instrumentation.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
A llvm/test/Instrumentation/AddressSanitizer/asan-pass-second-run.ll
M llvm/test/Instrumentation/AddressSanitizer/missing_dbg.ll
A llvm/test/Instrumentation/DataFlowSanitizer/dfsan-pass-second-run.ll
A llvm/test/Instrumentation/HWAddressSanitizer/hwasan-pass-second-run.ll
A llvm/test/Instrumentation/MemorySanitizer/msan-pass-second-run.ll
A llvm/test/Instrumentation/ThreadSanitizer/tsan-pass-second-run.ll
Log Message:
-----------
[Sanitizer] Make sanitizer passes idempotent (#99439)
This PR changes the sanitizer passes to be idempotent.
When any sanitizer pass is run after it has already been run before,
double instrumentation is seen in the resulting IR. This happens because
there is no check in the pass, to verify if IR has been instrumented
before.
This PR checks if "nosanitize_*" module flag is already present and if
true, return early without running the pass again.
Commit: 7d4aa1ff6bab27b5442f4765336fa827479d7bbc
https://github.com/llvm/llvm-project/commit/7d4aa1ff6bab27b5442f4765336fa827479d7bbc
Author: Matthias Springer <me at m-sp.org>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/lib/AsmParser/TypeParser.cpp
M mlir/test/IR/invalid-builtin-types.mlir
M mlir/test/python/ir/builtin_types.py
Log Message:
-----------
[mlir][IR] Auto-generate element type verification for VectorType (#102449)
#102326 enables verification of type parameters that are type
constraints. The element type verification for `VectorType` (and maybe
other builtin types in the future) can now be auto-generated.
Also remove redundant error checking in the vector type parser: element
type and dimensions are already checked by the verifier (which is called
from `getChecked`).
Depends on #102326.
Commit: c6062d38f74e600c185c30eec7afaa8d0a007424
https://github.com/llvm/llvm-project/commit/c6062d38f74e600c185c30eec7afaa8d0a007424
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.cpp
Log Message:
-----------
[clang][Interp][NFC] Cleanup CheckActive()
Assert that the given pointer is in a union if it's not active and use a
range-based for loop to find the active field.
Commit: 558d7adaae4871134a87457bd07e21fdbe001c08
https://github.com/llvm/llvm-project/commit/558d7adaae4871134a87457bd07e21fdbe001c08
Author: zhicong zhong <zhiczhong at outlook.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/Dialect/Linalg/generalize-named-ops.mlir
Log Message:
-----------
[mlir][linalg] fix linalg.batch_reduce_matmul auto cast (#102585)
Fix the auto-cast of `linalg.batch_reduce_matmul` from `cast_to_T(A *
cast_to_T(B)) + C` to `cast_to_T(A) * cast_to_T(B) + C`
Commit: 27ed9b47977ff99e182b74f653d4d125d2baa896
https://github.com/llvm/llvm-project/commit/27ed9b47977ff99e182b74f653d4d125d2baa896
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/Compiler.cpp
M clang/lib/AST/Interp/Compiler.h
Log Message:
-----------
[clang][Interp][NFC] Move ctor compilation to compileConstructor
In preparation for having a similar function for destructors.
Commit: cb372bd5e789a7d5f1945b476e643d4abfd18f35
https://github.com/llvm/llvm-project/commit/cb372bd5e789a7d5f1945b476e643d4abfd18f35
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
Log Message:
-----------
Revert "[NFC] [C++20] [Modules] Adjust the implementation of wasDeclEmitted to make it more clear"
This reverts commit 4399f2a5ef38df381c2b65052621131890194d59.
This fails with Modules/aarch64-sme-keywords.cppm
Commit: 7389545d0d7002c5b384ba70d5e38499e9899069
https://github.com/llvm/llvm-project/commit/7389545d0d7002c5b384ba70d5e38499e9899069
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
A llvm/test/CodeGen/AMDGPU/div-rem-by-constant-64.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
A llvm/test/CodeGen/ARM/div-by-constant-to-mul-crash.ll
Log Message:
-----------
Reapply "[AMDGPU] Always lower s/udiv64 by constant to MUL" (#101942)
Reland #100723, fixing the ARM issue at the cost of a small loss of optimization in `test/CodeGen/AMDGPU/fshr.ll`
Solves #100383
Commit: d469794d0cdfd2fea50a6ce0c0e33abb242d744c
https://github.com/llvm/llvm-project/commit/d469794d0cdfd2fea50a6ce0c0e33abb242d744c
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/lib/Sema/SemaDeclCXX.cpp
A clang/test/SemaCXX/gh102293.cpp
Log Message:
-----------
[clang] Avoid triggering vtable instantiation for C++23 constexpr dtor (#102605)
In C++23 anything can be constexpr, including a dtor of a class whose
members and bases don't have constexpr dtors. Avoid early triggering of
vtable instantiation int this case.
Fixes https://github.com/llvm/llvm-project/issues/102293
Commit: f696489e534ef5b04ccba5a78cdba5cb26afb1e9
https://github.com/llvm/llvm-project/commit/f696489e534ef5b04ccba5a78cdba5cb26afb1e9
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[CMake] Don't pass -DBUILD_EXAMPLES to the build (#102838)
The only use in `opt.cpp` was removed in
d291f1fd094538af705541045c0d9c3ceb85e71d.
Commit: 875b652a0b7e28b815b8d20c03bba2b33249ff0a
https://github.com/llvm/llvm-project/commit/875b652a0b7e28b815b8d20c03bba2b33249ff0a
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/include/llvm/IR/DataLayout.h
M llvm/lib/IR/DataLayout.cpp
Log Message:
-----------
[DataLayout] Move `operator=` to cpp file (NFC) (#102849)
`DataLayout` isn't exactly cheap to copy (448 bytes on a 64-bit host).
Move `operator=` to cpp file to improve compilation time. Also move
`operator==` closer to `operator=` and add a couple of FIXMEs.
Commit: 50f4168e40790bd91123824ee338643ac18ccc0b
https://github.com/llvm/llvm-project/commit/50f4168e40790bd91123824ee338643ac18ccc0b
Author: pvanhout <pierre.vanhoutryve at amd.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
Log Message:
-----------
[GlobalISel] Fix implementation of CheckNumOperandsLE/GE
The condition was backwards - it was rejecting when the condition was met.
Fixes #102719
Commit: 5a42a677aa7ef27b4b586465e3bb4257b195834d
https://github.com/llvm/llvm-project/commit/5a42a677aa7ef27b4b586465e3bb4257b195834d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
Log Message:
-----------
[VPlan] Mark VPVectorPointer as only using the first part of the ptr.
VPVectorPointerRecipe only uses the first part of the pointer operand,
so mark it accordingly.
Follow-up suggested as part of
https://github.com/llvm/llvm-project/pull/99808.
Commit: c8b5d30f707757a4fe4d9d0bb01f762665f6942f
https://github.com/llvm/llvm-project/commit/c8b5d30f707757a4fe4d9d0bb01f762665f6942f
Author: DarshanRamakant <darshanbhatsirsi at gmail.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/Utils/IndexingUtils.h
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][Transforms] Add missing check in tosa::transpose::verify() (#102099)
The tosa::transpose::verify() should make sure
that the permutation numbers are within the size of
the input array. Otherwise it will cause a cryptic array
out of bound assertion later.Fix #99513.
Commit: 273e0a4c56b7fa9e7a6f4b94ec9a9c7d71104466
https://github.com/llvm/llvm-project/commit/273e0a4c56b7fa9e7a6f4b94ec9a9c7d71104466
Author: Tim Gymnich <tgymnich at icloud.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.mir
Log Message:
-----------
[AMDGPU] add missing checks in processBaseWithConstOffset (#102310)
fixes https://github.com/llvm/llvm-project/issues/102231 by inserting
missing checks.
Commit: cc14ecc281331be8f44b370a437a7f1eb7f5c7c9
https://github.com/llvm/llvm-project/commit/cc14ecc281331be8f44b370a437a7f1eb7f5c7c9
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/apint-call-cast-target.ll
M llvm/test/Transforms/InstCombine/call-cast-target.ll
M llvm/test/Transforms/InstCombine/call.ll
M llvm/test/Transforms/InstCombine/opaque-ptr.ll
Log Message:
-----------
[InstCombine] Don't change fn signature for calls to declarations (#102596)
transformConstExprCastCall() implements a number of highly dubious
transforms attempting to make a call function type line up with the
function type of the called function. Historically, the main value this
had was to avoid function type mismatches due to pointer type
differences, which is no longer relevant with opaque pointers.
This patch is a step towards reducing the scope of the transform, by
applying it only to definitions, not declarations. For declarations, the
declared signature might not match the actual function signature, e.g.
`void @fn()` is sometimes used as a placeholder for functions with
unknown signature. The implementation already bailed out in some cases
for declarations, but I think it would be safer to disable the transform
entirely.
For the test cases, I've updated some of them to use definitions
instead, so that the test coverage is preserved.
Commit: a07c6d9e3457ec851a9f5dfd8af6fb9cc938e8f3
https://github.com/llvm/llvm-project/commit/a07c6d9e3457ec851a9f5dfd8af6fb9cc938e8f3
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/test/tools/llvm-readobj/ELF/note-core.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[llvm][llvm-readobj] Add NT_ARM_FPMR corefile note type (#102594)
This contains the fpmr register which was added in Armv9.5-a. This
register mainly contains controls for fp8 formats.
It was added to the Linux Kernel in
https://github.com/torvalds/linux/commit/4035c22ef7d43a6c00d6a6584c60e902b95b46af.
Commit: b68086241b2f386fc5cc53af2b3ee90624104dc4
https://github.com/llvm/llvm-project/commit/b68086241b2f386fc5cc53af2b3ee90624104dc4
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
Log Message:
-----------
[analyzer][NFC] Trivial refactoring of region invalidation (#102456)
This commit removes `invalidateRegionsImpl()`, moving its body to
`invalidateRegions(ValueList Values, ...)`, because it was a completely
useless layer of indirection.
Moreover I'm fixing some strange indentation within this function body
and renaming two variables to the proper `UpperCamelCase` format.
Commit: 55d7e59023bc48f97321970cda5e400c07de59fa
https://github.com/llvm/llvm-project/commit/55d7e59023bc48f97321970cda5e400c07de59fa
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/vplan-predicate-switch.ll
Log Message:
-----------
[VPlan] Replace hard-coded value number in test with pattern.
Make test more robust w.r.t. future changes.
Commit: d12250ca7bea22ed12caf44fe80b203d83db75bb
https://github.com/llvm/llvm-project/commit/d12250ca7bea22ed12caf44fe80b203d83db75bb
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/lib/CodeGen/CGCleanup.cpp
Log Message:
-----------
[NFC][Clang] clang-format a function declaration
Commit: 8a1846dbdcc62675b51d245caabfe3c6ec6fd209
https://github.com/llvm/llvm-project/commit/8a1846dbdcc62675b51d245caabfe3c6ec6fd209
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/include/llvm/ObjectYAML/DWARFYAML.h
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
M llvm/lib/ObjectYAML/DWARFYAML.cpp
M llvm/test/tools/yaml2obj/ELF/DWARF/debug-info.yaml
M llvm/tools/obj2yaml/dwarf2yaml.cpp
Log Message:
-----------
[dwarf2yaml] Correctly emit type and split unit headers (#102471)
(DWARFv5) split units have an extra `dwo_id` field in the header. Type
units have `type_signature` and `type_offset`.
Commit: db0603cb7b8534bffdd0459f5eb5a3b98ea962ef
https://github.com/llvm/llvm-project/commit/db0603cb7b8534bffdd0459f5eb5a3b98ea962ef
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/vplan-predicate-switch.ll
Log Message:
-----------
[LV] Only OR unique edges when creating block-in masks.
This removes redundant ORs of matching masks.
Follow-up to f0df4fbd0c7b to reduce the number of redundant ORs for
masks.
Commit: 11ba72e651d5a5a65f18eef0f35e356d828f9d93
https://github.com/llvm/llvm-project/commit/11ba72e651d5a5a65f18eef0f35e356d828f9d93
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/include/llvm/Support/KnownBits.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/unittests/Support/KnownBitsTest.cpp
Log Message:
-----------
[KnownBits] Add KnownBits::add and KnownBits::sub helper wrappers. (#99468)
Commit: e607360fcde2994080bb8cec9d4be3a4091fe9a9
https://github.com/llvm/llvm-project/commit/e607360fcde2994080bb8cec9d4be3a4091fe9a9
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
M clang/test/Analysis/pointer-sub-notes.c
M clang/test/Analysis/pointer-sub.c
Log Message:
-----------
[clang][analyzer] Remove array bounds check from PointerSubChecker (#102580)
At pointer subtraction only pointers are allowed that point into an
array (or one after the end), this fact was checker by the checker. This
check is now removed because it is a special case of array indexing
error that is handled by different checkers (like ArrayBoundsV2).
Commit: 32a62ebdeab0c10d5311cf812e021717636d4514
https://github.com/llvm/llvm-project/commit/32a62ebdeab0c10d5311cf812e021717636d4514
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
A lldb/test/Shell/SymbolFile/DWARF/x86/dwp-hash-collision.s
Log Message:
-----------
[lldb] Tolerate multiple compile units with the same DWO ID (#100577)
I ran into this when LTO completely emptied two compile units, so they
ended up with the same hash (see #100375). Although, ideally, the
compiler would try to ensure we don't end up with a hash collision even
in this case, guaranteeing their absence is practically impossible. This
patch ensures this situation does not bring down lldb.
Commit: ebf530c4e98f09366865dd8c98fff88467e7db72
https://github.com/llvm/llvm-project/commit/ebf530c4e98f09366865dd8c98fff88467e7db72
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M flang/lib/Lower/OpenMP/Decomposer.cpp
M flang/lib/Lower/OpenMP/Decomposer.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
Log Message:
-----------
[Flang][OpenMP] NFC: Use ConstructQueue::const_iterator (#102612)
This patch replaces `ConstructQueue::iterator` arguments with
`ConstructQueue::const_iterator` where it's used as a pointer to an
element inside of a `const ConstructQueue &` passed along with it.
Since these functions don't intend to modify the list or any elements in
it, keeping constness consistent between both makes it simpler to work
with.
Commit: 908c89e04b6019bdb08bb5f1c861af42046db623
https://github.com/llvm/llvm-project/commit/908c89e04b6019bdb08bb5f1c861af42046db623
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/Store.h
Log Message:
-----------
[analyzer][NFC] Improve documentation of `invalidateRegion` methods (#102477)
... within the classes `StoreManager` and `ProgramState` and describe
the connection between the two methods.
Commit: 670d208ffc156b5b8f01aee7439847b01b18d05d
https://github.com/llvm/llvm-project/commit/670d208ffc156b5b8f01aee7439847b01b18d05d
Author: Max Beck-Jones <max.beck-jones at arm.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve2-histcnt.ll
Log Message:
-----------
[AArch64] Implement promotion type legalisation for histogram intrinsic (#101017)
Currently the histogram intrinsic
(llvm.experimental.vector.histogram.add) only allows i32 and i64 types
for the memory locations to be updated, matching the restrictions of the
histcnt instruction. This patch adds support for the legalisation of
smaller types (i8 and i16) via promotion.
Commit: a0241e710fcae9f439e57d3a294b1ace97c6906c
https://github.com/llvm/llvm-project/commit/a0241e710fcae9f439e57d3a294b1ace97c6906c
Author: Giuseppe Rossini <giuseppe.rossini at amd.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M mlir/lib/Transforms/Utils/RegionUtils.cpp
Log Message:
-----------
Fix late comment review for #102038 (#102869)
Commit: 4915fddbb2d79b5d67794b88c23da8d296968d0e
https://github.com/llvm/llvm-project/commit/4915fddbb2d79b5d67794b88c23da8d296968d0e
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/include/clang/Frontend/MultiplexConsumer.h
M clang/include/clang/Serialization/ASTDeserializationListener.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Frontend/MultiplexConsumer.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/Modules/pr102684.cppm
Log Message:
-----------
[Serialization] Add a callback to register new created predefined decls for DeserializationListener (#102855)
Close https://github.com/llvm/llvm-project/issues/102684
The root cause of the issue is, it is possible that the predefined decl
is not registered at the beginning of writing a module file but got
created during the process of writing from reading.
This is incorrect. The predefined decls should always be predefined
decls.
Another deep thought about the issue is, we shouldn't read any new
things after we start to write the module file. But this is another
deeper question.
Commit: 89492902d06f40bda54c38bb26cf1e5f6015c726
https://github.com/llvm/llvm-project/commit/89492902d06f40bda54c38bb26cf1e5f6015c726
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-half-conversions.ll
Log Message:
-----------
[X86] SimplifyDemandedVectorEltsForTargetNode - reduce width of X86ISD::BLENDV nodes when upper elements are not demanded.
Prep work for #83402
Commit: 70feafdb27b45018f5f72e8f1359fdf9889c3f2a
https://github.com/llvm/llvm-project/commit/70feafdb27b45018f5f72e8f1359fdf9889c3f2a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
A llvm/test/Bitcode/amdgpu-unsafe-fp-atomics-upgrade.ll
Log Message:
-----------
IR/AMDGPU: Autoupgrade amdgpu-unsafe-fp-atomics attribute (#101698)
Delete the attribute and annotate any atomicrmw instructions in the
function with new metadata.
Commit: 2ad3bcded84be3bdbddca9698afe2614a4d7916b
https://github.com/llvm/llvm-project/commit/2ad3bcded84be3bdbddca9698afe2614a4d7916b
Author: Rolf Morel <rolf.morel at intel.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/DLTI/CMakeLists.txt
M mlir/include/mlir/Dialect/DLTI/DLTI.h
A mlir/include/mlir/Dialect/DLTI/TransformOps/CMakeLists.txt
A mlir/include/mlir/Dialect/DLTI/TransformOps/DLTITransformOps.h
A mlir/include/mlir/Dialect/DLTI/TransformOps/DLTITransformOps.td
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Dialect/DLTI/CMakeLists.txt
M mlir/lib/Dialect/DLTI/DLTI.cpp
A mlir/lib/Dialect/DLTI/TransformOps/CMakeLists.txt
A mlir/lib/Dialect/DLTI/TransformOps/DLTITransformOps.cpp
A mlir/test/Dialect/DLTI/query.mlir
Log Message:
-----------
[MLIR][DLTI][Transform] Introduce transform.dlti.query - 2nd attempt (#102652)
This transform op makes it possible to query attributes associated to IR
by means of the DLTI dialect.
The op takes both a `key` and a target `op` to perform the query at.
Facility functions automatically find the closest ancestor op which
defines the appropriate DLTI interface or has an attribute implementing
a DLTI interface. By default the lookup uses the data layout interfaces
of DLTI. If the optional `device` parameter is provided, the lookup
happens with respect to the interfaces for TargetSystemSpec and
TargetDeviceSpec.
This op uses new free-standing functions in the `dlti` namespace to not
only look up specifications via the `DataLayoutSpecOpInterface` and on
`ModuleOp`s but also on any ancestor op that has an appropriate DLTI
attribute.
Commit: 1c764b952a1c9aa6c832cfc27aff09fc067304f2
https://github.com/llvm/llvm-project/commit/1c764b952a1c9aa6c832cfc27aff09fc067304f2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
Log Message:
-----------
AMDGPU: Use GCNTargetMachine in AMDGPUCodeGenPassBuilder (#102805)
R600 has a separate CodeGenPassBuilder anyway.
Commit: afe019ca93a72a5969d82cfff5018f3dd79dc75a
https://github.com/llvm/llvm-project/commit/afe019ca93a72a5969d82cfff5018f3dd79dc75a
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M lldb/test/API/commands/register/register/register_command/TestRegisters.py
Log Message:
-----------
[lldb][test][AArch64] Regex match field values in register test
As these are flags they can be set or not depending on what the system
libraries did prior to loading the program.
Commit: 05b75e006bf20638aa56cd7bc282d44512aa915e
https://github.com/llvm/llvm-project/commit/05b75e006bf20638aa56cd7bc282d44512aa915e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll
Log Message:
-----------
AMDGPU/NewPM: Port AMDGPULateCodeGenPrepare to new pass manager (#102806)
Commit: f86da4cb7d6433dab10a91e33b4c24e87ec799d8
https://github.com/llvm/llvm-project/commit/f86da4cb7d6433dab10a91e33b4c24e87ec799d8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/StructurizeCFG.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
M llvm/test/Transforms/StructurizeCFG/AMDGPU/uniform-regions.ll
Log Message:
-----------
StructurizeCFG: Add SkipUniformRegions pass parameter to new PM version (#102812)
Keep respecting the old cl::opt for now.
Commit: 0ea9cdbf50b6dbd31686c2fefd66e3348eb4a9d6
https://github.com/llvm/llvm-project/commit/0ea9cdbf50b6dbd31686c2fefd66e3348eb4a9d6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-half-conversions.ll
Log Message:
-----------
[X86] Fold extract_subvector(fp_to_uint(x)) case to match existing fp_to_sint fold (necessary to fix #83402 on AVX512 targets).
Prep work for #83402
Commit: baabcb28983edf8f20e39b89e2b1745412073b44
https://github.com/llvm/llvm-project/commit/baabcb28983edf8f20e39b89e2b1745412073b44
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/Mesh/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Mesh/IR/MeshBase.td
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
A mlir/include/mlir/Dialect/Mesh/IR/TensorShardingInterfaceImpl.h
M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.h
M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.td
M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterfaceImpl.h
M mlir/include/mlir/InitAllDialects.h
M mlir/include/mlir/Interfaces/InferTypeOpInterface.h
M mlir/lib/Dialect/Linalg/Transforms/MeshShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Interfaces/CMakeLists.txt
M mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp
A mlir/lib/Dialect/Mesh/Interfaces/TensorShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Mesh/Transforms/ShardingPropagation.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/test/Dialect/Linalg/mesh-sharding-propagation.mlir
M mlir/test/Dialect/Linalg/mesh-spmdization.mlir
M mlir/test/Dialect/Mesh/canonicalization.mlir
M mlir/test/Dialect/Mesh/invalid.mlir
M mlir/test/Dialect/Mesh/ops.mlir
M mlir/test/Dialect/Mesh/resharding-spmdization.mlir
M mlir/test/Dialect/Mesh/sharding-propagation.mlir
M mlir/test/Dialect/Mesh/simplifications.mlir
M mlir/test/Dialect/Mesh/spmdization.mlir
A mlir/test/Dialect/Tensor/mesh-spmdization.mlir
M mlir/test/lib/Dialect/Mesh/TestReshardingSpmdization.cpp
Log Message:
-----------
[mlir][mesh] Shardingcontrol (#102598)
This is a fixed copy of #98145 (necessary after it got reverted).
@sogartar @yaochengji
This PR adds the following to #98145:
- `UpdateHaloOp` accepts a `memref` (instead of a tensor) and not
returning a result to clarify its inplace-semantics
- `UpdateHaloOp` accepts `split_axis` to allow multiple mesh-axes per
tensor/memref-axis (similar to `mesh.sharding`)
- The implementation of `Shardinginterface` for tensor operation
(`tensor.empty` for now) moved from the tensor library to the mesh
interface library. `spmdize` uses features from `mesh` dialect.
@rengolin agreed that `tensor` should not depend on `mesh` so this
functionality cannot live in a `tensor`s lib. The unfulfilled dependency
caused the issues leading to reverting #98145. Such cases are generally
possible and might lead to re-considering the current structure (like
for tosa ops).
- rebased onto latest main
--------------------------
Replacing `#mesh.sharding` attribute with operation `mesh.sharding`
- extended semantics now allow providing optional `halo_sizes` and
`sharded_dims_sizes`
- internally a sharding is represented as a non-IR class
`mesh::MeshSharding`
What previously was
```mlir
%sharded0 = mesh.shard %arg0 <@mesh0, [[0]]> : tensor<4x8xf32>
%sharded1 = mesh.shard %arg1 <@mesh0, [[0]]> annotate_for_users : tensor<16x8xf32>
```
is now
```mlir
%sharding = mesh.sharding @mesh0, [[0]] : !mesh.sharding
%0 = mesh.shard %arg0 to %sharding : tensor<4x8xf32>
%1 = mesh.shard %arg1 to %sharding annotate_for_users : tensor<16x8xf32>
```
and allows additional annotations to control the shard sizes:
```mlir
mesh.mesh @mesh0 (shape = 4)
%sharding0 = mesh.sharding @mesh0, [[0]] halo_sizes = [1, 2] : !mesh.sharding
%0 = mesh.shard %arg0 to %sharding0 : tensor<4x8xf32>
%sharding1 = mesh.sharding @mesh0, [[0]] sharded_dims_sizes = [3, 5, 5, 3] : !mesh.sharding
%1 = mesh.shard %arg1 to %sharding1 annotate_for_users : tensor<16x8xf32>
```
- `mesh.shard` op accepts additional optional attribute `force`, useful
for halo updates
- Some initial spmdization support for the new semantics
- Support for `tensor.empty` reacting on `sharded_dims_sizes` and
`halo_sizes` in the sharding
- New collective operation `mesh.update_halo` as a spmdized target for
shardings with `halo_sizes`
---------
Co-authored-by: frank.schlimbach <fschlimb at smtp.igk.intel.com>
Co-authored-by: Jie Fu <jiefu at tencent.com>
Commit: 6ca678074ba58e3db50a764400f6137782d338cf
https://github.com/llvm/llvm-project/commit/6ca678074ba58e3db50a764400f6137782d338cf
Author: Bjorn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/TypedPointerType.cpp
Log Message:
-----------
Clean up after transition into opaque pointers. NFC (#102631)
LegacyPointerTypes is not used any longer and can be removed from
the LLVM context.
Also remove a copy-pasted code comment in TypedPointerType that
doesn't make sense (since there is no special case for address space
zero in the TypedPointerType::get implementation).
Commit: 1ff06c54b70dd4c1971bf07a5d3a5467c16cca65
https://github.com/llvm/llvm-project/commit/1ff06c54b70dd4c1971bf07a5d3a5467c16cca65
Author: Bjorn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/include/llvm/IR/GlobalIFunc.h
M llvm/lib/IR/Verifier.cpp
Log Message:
-----------
[verifier] Get rid of getResolverFunctionType. NFC (#102631)
With opaque pointers we can just get the pointer type for the
resolver function by using PointerType::get, making the
GlobalIFunc::getResolverFunctionType function obsolete.
Commit: 145aff6d924714b625de1d83247583df2ab73763
https://github.com/llvm/llvm-project/commit/145aff6d924714b625de1d83247583df2ab73763
Author: Bjorn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/examples/BrainF/BrainFDriver.cpp
M llvm/examples/ExceptionDemo/ExceptionDemo.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Scalar/NaryReassociate.cpp
M llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp
Log Message:
-----------
Clean up pointer casts etc after opaque pointers transition. NFC (#102631)
Commit: 7fe486acfa9ca58a82c1ef42e1baf479d4ad7102
https://github.com/llvm/llvm-project/commit/7fe486acfa9ca58a82c1ef42e1baf479d4ad7102
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/include/llvm/Target/TargetMachine.h
M llvm/lib/Target/TargetMachine.cpp
Log Message:
-----------
TargetMachine: Move trivial setter/getter to header
The others are already inline here.
Commit: c7107ca7f899e300a507f24ac6ce2dc1ff43977e
https://github.com/llvm/llvm-project/commit/c7107ca7f899e300a507f24ac6ce2dc1ff43977e
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
Log Message:
-----------
[AMDGPU][NFCI] Mark AGPRs and VGPRs with different flags in HWEncoding. (#102650)
Simplifies checks for AGPRs and VGPRs and makes them more explicit and
less fragile.
Commit: 772785311eadeec2a0c0b7686e93578cf7131b50
https://github.com/llvm/llvm-project/commit/772785311eadeec2a0c0b7686e93578cf7131b50
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/test/MC/AMDGPU/expressions.s
M llvm/test/MC/AMDGPU/flat-scratch.s
M llvm/test/MC/AMDGPU/gfx10_err_pos.s
M llvm/test/MC/AMDGPU/gfx11_asm_operands.s
M llvm/test/MC/AMDGPU/literals.s
M llvm/test/MC/AMDGPU/out-of-range-registers.s
M llvm/test/MC/AMDGPU/reg-syntax-err.s
M llvm/test/MC/AMDGPU/reg-syntax-extra.s
M llvm/test/MC/AMDGPU/smem.s
M llvm/test/MC/AMDGPU/smrd-err.s
M llvm/test/MC/AMDGPU/smrd.s
M llvm/test/MC/AMDGPU/sop1-err.s
M llvm/test/MC/AMDGPU/sop1.s
M llvm/test/MC/AMDGPU/sop2.s
M llvm/test/MC/AMDGPU/trap.s
M llvm/test/MC/AMDGPU/vop_sdwa.s
M llvm/test/MC/AMDGPU/xnack-mask.s
Log Message:
-----------
[AMDGPU][AsmParser] Eliminate validateExeczVcczOperands(). (#102600)
Mention the names of unavailable registers in error messages to not make
the diagnostics for execz/vccz less rich than it was.
Clean up unnecessary name qualifications while there.
Part of <https://github.com/llvm/llvm-project/issues/62629>.
Commit: 21ef272ec1974244710fc639f98674eae3f8b02c
https://github.com/llvm/llvm-project/commit/21ef272ec1974244710fc639f98674eae3f8b02c
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DebugNamesDWARFIndex.cpp
A lldb/test/Shell/SymbolFile/DWARF/x86/mixed-debug-names-complete-type-search.test
Log Message:
-----------
[lldb/DWARF] Search fallback to the manual index in GetFullyQualified… (#102123)
…Type
This is needed to ensure we find a type if its definition is in a CU
that wasn't indexed. This can happen if the definition is in some
precompiled code (e.g. the c++ standard library) which was built with
different flags than the rest of the binary.
Commit: f2991bd93146162bcc30bc5e8da8707074f3fdef
https://github.com/llvm/llvm-project/commit/f2991bd93146162bcc30bc5e8da8707074f3fdef
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M lldb/unittests/Host/linux/SupportTest.cpp
Log Message:
-----------
[lldb][test] Disable procfile by thread ID test when LLVM_ENABLE_THREADS is not defined
When LLVM_ENABLE_THREADS is not defined, llvm::get_threadid returns 0 which
makes this test case fail.
This is a pretty niche setting, Linaro uses it to stop lld crashing our 32 bit
containers. So the test will get plenty of runs elsewhere.
In lldb's code it's not getting the current thread ID anyway, it's using
a value it got from ptrace. So even if that copy of lldb was built with
LLVM_ENABLE_THREADS off, it should still be able to debug threads.
Commit: aa86e5beffec33c84289e2a103c6de0311865be5
https://github.com/llvm/llvm-project/commit/aa86e5beffec33c84289e2a103c6de0311865be5
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/lib/Sema/TreeTransform.h
M clang/test/OpenMP/target_teams_ast_print.cpp
Log Message:
-----------
[Clang][OpenMP] Fix the wrong transform of `num_teams` claused introduced in #99732 (#102716)
Commit: 895ca18a1c5a93ebc2b9bcc4673c138a908827a2
https://github.com/llvm/llvm-project/commit/895ca18a1c5a93ebc2b9bcc4673c138a908827a2
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps4-linker.c
M clang/test/Driver/ps4-pic.c
M clang/test/Driver/ps5-linker.c
M clang/test/Driver/ps5-pic.c
Log Message:
-----------
[PS4/PS5][Driver] Allow -static in PlayStation drivers (#102020)
On PlayStation, allow users to supply -static to the linker, via the
driver.
An initial step. Later changes will have the PS5 driver supply
additional options to the linker, if and when -static is passed.
SIE tracker: TOOLCHAIN-16704
Commit: c876761f7ed8de0d30b65b5618bc9dbb8526bb68
https://github.com/llvm/llvm-project/commit/c876761f7ed8de0d30b65b5618bc9dbb8526bb68
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
A llvm/test/Transforms/IndVarSimplify/pr102597.ll
Log Message:
-----------
[IndVars] Add test for #102597 (NFC)
Commit: 513c3726ebc0a324f7e5a11d25617bb9557324d6
https://github.com/llvm/llvm-project/commit/513c3726ebc0a324f7e5a11d25617bb9557324d6
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/concurrent_base.py
Log Message:
-----------
[lldb][test] Break early when walking backtrace in concurrent tests
We only need to see that 1 frame of the stack is in user code. No need
to carry on looking.
Doing so actually caused a test failure on Armv8 Ubuntu Jammy where
a libc function does not have a display name. I'm sure I'm going to
get stung by this elsewhere, but for this test, breaking early
sidesteps the problem.
Commit: 3512bcc2e9ab06b0ae2cab78744550b515e54184
https://github.com/llvm/llvm-project/commit/3512bcc2e9ab06b0ae2cab78744550b515e54184
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Transforms/IndVarSimplify/pr102597.ll
Log Message:
-----------
[SCEV] Fix incorrect extension in computeConstantDifference()
The Mul factor was zero-extended here, resulting in incorrect
results for integers larger than 64-bit.
As we currently only multiply by 1 or -1, just split this into
two cases -- there's no need for a full multiplication here.
Fixes https://github.com/llvm/llvm-project/issues/102597.
Commit: 1b936e4812ab395328203f65cacd4ffe02bb318e
https://github.com/llvm/llvm-project/commit/1b936e4812ab395328203f65cacd4ffe02bb318e
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/include/clang/Basic/arm_sme.td
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/test/CodeGen/AArch64/sme2-intrinsics-add-sub-za16.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-fmlas16.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-mopa.ll
M llvm/test/MC/AArch64/SME2/bfadd-diagnostics.s
M llvm/test/MC/AArch64/SME2/bfadd.s
M llvm/test/MC/AArch64/SME2/bfmla-diagnostics.s
M llvm/test/MC/AArch64/SME2/bfmla.s
M llvm/test/MC/AArch64/SME2/bfmls-diagnostics.s
M llvm/test/MC/AArch64/SME2/bfmls.s
M llvm/test/MC/AArch64/SME2/bfmopa-diagnostics.s
M llvm/test/MC/AArch64/SME2/bfmopa.s
M llvm/test/MC/AArch64/SME2/bfmops-diagnostics.s
M llvm/test/MC/AArch64/SME2/bfmops.s
M llvm/test/MC/AArch64/SME2/bfsub-diagnostics.s
M llvm/test/MC/AArch64/SME2/bfsub.s
M llvm/test/MC/AArch64/SME2p1/directive-arch-negative.s
M llvm/test/MC/AArch64/SME2p1/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SME2p1/directive-arch_extension.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64] Add FEAT_SME_B16B16 and remove FEAT_B16B16 (#102501)
Implement FEAT_SME_B16B16 to enable ZA-targeting non-widening SME
BFloat16 instructions. Remove the now redundant FEAT_B16B16 which has
been replaced by FEAT_SVE_B16B16 and FEAT_SME_B16B16 (this commit), see
https://github.com/llvm/llvm-project/pull/101480/ for the details and
reasoning of this change to LLVM.
FEAT_SME_B16B16 is documented under the latest Armv9.4 feature
documentation:
https://developer.arm.com/documentation/109697/0100/Feature-descriptions/The-Armv9-4-architecture-extensio
- Changes to Clang AArch64 frontend
- Change target guard of SME2 ZA-targeting non-widening BFloat16
intrinsics to 'sme-b16b16'
- Changes to LLVM AArch64 backend
- llvm/lib/Target/AArch64/AArch64Features.td
- Create FeatureSMEB16B16, which implies FeatureSME2 and
FeatureSVEB16B16
- Remove FeatureB16B16
- Fix description of FeatureSVEB16B16
- llvm/lib/Target/AArch64/AArch64InstrInfo.td
- Create HasSMEB16B16 predicate
- llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
- Change predictication of SME2 ZA-targeting non-widening BFloat16
instructions to new HasSMEB16B16
- llvm/lib/Target/AArch64/AArch64.td
- Add HasSMEB16B16 to SME2Unsupported (FEAT_SME_B16B16 implies
FEAT_SME2)
- llvm/lib/AArch64/AsmParser/AArch64AsmParser.cpp
- Remove flag 'b16b16' mapping to removed FeatureB16B16
- Add flag 'sme-b16b16' mapping to new FeatureSMEB16B16
- Changes to LLVM unit tests
- llvm/unittests/TargetParser/TargetParserTest.cpp
- Add new sme-b16b16 flag to existing target parser tests
- Add tests for the sme-b16b16 dependencies:
- 'sme-b16b16' should enable 'sme2', 'sve-b16b16'. - Remove 'b16b16'
from bf16 dependency test
- Added MC tests
- llvm/test/MC/AArch64/SME2p1
- To ensure that ZA-targeting multi-vector non-widening BFloat16
instructions are enabled by +sme-b16b16, and that this feature is
removed by +nosme-b61b6.
- Modidified tests
- All CodeGen, Semantic, and MC tests that are effected by the removal
of 'b16b16', have been modified to supply and/or expect 'sme-b16b16'
where appropriate.
Commit: cd08fadd03904806fa26a1f117879ddae34fbf67
https://github.com/llvm/llvm-project/commit/cd08fadd03904806fa26a1f117879ddae34fbf67
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
Log Message:
-----------
[LV] Include chains feeding inductions in cost precomputation.
Include chain of ops feeding inductions in cost precomputation for
inductions, not just the induction increment. In VPlan, those
instructions will be cleaned up, as both phi and increment are generated
by VPWidenIntOrFpInductionRecipe independently.
Fixes https://github.com/llvm/llvm-project/issues/101337.
Commit: 281f59fdf9c4142a6d6b2e7b4bde2663ec3d313f
https://github.com/llvm/llvm-project/commit/281f59fdf9c4142a6d6b2e7b4bde2663ec3d313f
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/lifetime.ll
Log Message:
-----------
[SPIR-V] Emit valid Lifestart/Lifestop instructions (#98475)
This PR fixes emission of valid OpLifestart/OpLifestop instructions.
According to
https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpLifetimeStart:
"Size must be 0 if Pointer is a pointer to a non-void type or the
Addresses
[capability](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Capability)
is not declared.". The `Size` argument is set the corresponding
intrinsics arguments, so Size is not zero we must ensure that Pointer
has the required type by inserting a bitcast if needed.
Commit: f9c98068c852c1bb1ec029c2c8df8ace9605f16f
https://github.com/llvm/llvm-project/commit/f9c98068c852c1bb1ec029c2c8df8ace9605f16f
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCCodeEmitter.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVRegisterBanks.td
M llvm/lib/Target/SPIRV/SPIRVRegisterInfo.td
M llvm/test/CodeGen/SPIRV/SampledImageRetType.ll
M llvm/test/CodeGen/SPIRV/atomicrmw.ll
M llvm/test/CodeGen/SPIRV/basic_int_types.ll
M llvm/test/CodeGen/SPIRV/empty.ll
M llvm/test/CodeGen/SPIRV/event-zero-const.ll
M llvm/test/CodeGen/SPIRV/expect.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_double.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_float.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_half.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_double.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_float.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_half.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_cache_controls/basic-load-store.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/all.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/any.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/imad.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic.ll
M llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll
M llvm/test/CodeGen/SPIRV/instructions/ptrcmp.ll
M llvm/test/CodeGen/SPIRV/linkage/link-attribute.ll
M llvm/test/CodeGen/SPIRV/literals.ll
M llvm/test/CodeGen/SPIRV/lshr-constexpr.ll
M llvm/test/CodeGen/SPIRV/opencl/image.ll
M llvm/test/CodeGen/SPIRV/pointers/irtrans-added-int-const-32-64.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-global-dup.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpImageSampleExplicitLod.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpImageWrite.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpVectorInsertDynamic_i16.ll
M llvm/test/CodeGen/SPIRV/transcoding/SampledImage.ll
M llvm/test/CodeGen/SPIRV/transcoding/cl-types.ll
M llvm/test/CodeGen/SPIRV/transcoding/fadd.ll
M llvm/test/CodeGen/SPIRV/transcoding/group_ops.ll
M llvm/test/CodeGen/SPIRV/transcoding/image_with_access_qualifiers.ll
M llvm/test/CodeGen/SPIRV/transcoding/non32.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-private-array-initialization.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-types.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_extended_types.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_shuffle.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_shuffle_relative.ll
M llvm/test/CodeGen/SPIRV/types/or-i1.ll
M llvm/test/CodeGen/SPIRV/unnamed-global.ll
M llvm/test/CodeGen/SPIRV/var-uniform-const.ll
Log Message:
-----------
[SPIR-V] Rework usage of virtual registers' types and classes (#101732)
This PR contains changes in virtual register processing aimed to improve
correctness of emitted MIR between passes from the perspective of
MachineVerifier. This potentially helps to detect previously missed
flaws in code emission and harden the test suite. As a measure of
correctness and usefulness of this PR we may use a mode with expensive
checks set on, and MachineVerifier reports problems in the test suite.
In order to satisfy Machine Verifier requirements to MIR correctness not
only a rework of usage of virtual registers' types and classes is
required, but also corrections into pre-legalizer and instruction
selection logics. Namely, the following changes are introduced:
* scalar virtual registers have proper bit width,
* detect register class by SPIR-V type,
* add a superclass for id virtual register classes,
* fix Tablegen rules used for instruction selection,
* fixes of minor existed issues (missed flag for proper representation
of a null constant for OpenCL vs. HLSL, wrong usage of integer virtual
registers as a synonym of any non-type virtual register).
Commit: 34514ce09a0cbcfd948a1c6b97a3e8674551add1
https://github.com/llvm/llvm-project/commit/34514ce09a0cbcfd948a1c6b97a3e8674551add1
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Use local getShuffleCost function across the code, NFC.
Commit: b10ecfa914dd1bc2013584917d0505ba5f15f75c
https://github.com/llvm/llvm-project/commit/b10ecfa914dd1bc2013584917d0505ba5f15f75c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/external-non-inst-use.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/multiple_reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/scalarization-overhead.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/shuffle-vectors-mask-size.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/transpose.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorize-free-extracts-inserts.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/mixed-extracts-types.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-indices.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-unsupported-type.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR32086.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35628_1.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR40310.ll
M llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_vectorizeTree.ll
M llvm/test/Transforms/SLPVectorizer/X86/cse_extractelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/diamond.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-user-instruction-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-many-users-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-subvector-long-input.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-vectorized-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract_in_tree_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-multi-register-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-single-use-many-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-vector-ops-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/extracts-with-undefs.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-delayed-nodes-with-reused-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gep-with-extractelement-many-users.ll
M llvm/test/Transforms/SLPVectorizer/X86/geps-non-pow-2.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/insertelement-uses-vectorized-index.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-drop-wrapping-flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/ordering-bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr27163.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-value-replace-extractelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-value-in-tree.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reordering-single-phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/replaced-external-in-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-scalar-in-same-phi-extract.ll
M llvm/test/Transforms/SLPVectorizer/X86/scalarization-overhead.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-throttle.ll
Log Message:
-----------
[SLP]Represent externally used values as original scalars, if profitable.
Currently SLP vectorizer tries to keep only GEPs as scalar, if they are
vectorized but used externally. Same approach can be used for all scalar
values. This patch tries to keep original scalars if all its operands
remain scalar or externally used, the cost of the original scalar is
lower than the cost of the extractelement instruction, or if the number
of externally used scalars in the same entry is power of 2. Last
criterion allows better revectorization for multiply used scalars.
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/100904
Commit: c7a44ec031c2b6b86f389fb382060620a8b4a0ce
https://github.com/llvm/llvm-project/commit/c7a44ec031c2b6b86f389fb382060620a8b4a0ce
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
Log Message:
-----------
[VPlan] Check successors in VPlan to check if scalar epi required (NFC)
Now that the branches to the scalar epilogue are modeled in VPlan
directly, check the VPlan to see if a scalar epilogue is required.
Preparation for https://github.com/llvm/llvm-project/pull/100658.
Commit: d3723615164cb3a4ff09267c56ae0c4129bddbd7
https://github.com/llvm/llvm-project/commit/d3723615164cb3a4ff09267c56ae0c4129bddbd7
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
Log Message:
-----------
[MLIR][OpenMP] Add a new ComposableOpInterface to check/set a composite unitAttr. (#102340)
Adds a new ComposableOpInterface for OpenMP operations that can
represent a single leaf of a composite OpenMP construct.
This is patch 1/2 in a series of patches. Patch 2 - #102341.
Commit: f2f41937f31e643471e4e37ef9d7c4eda806adc8
https://github.com/llvm/llvm-project/commit/f2f41937f31e643471e4e37ef9d7c4eda806adc8
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[OpenMP][MLIR] Set omp.composite attr for composite loop wrappers and add verifier checks (#102341)
This patch sets the omp.composite unit attr for composite wrapper ops
and also add appropriate checks to the verifiers of supported ops for
the presence/absence of the attribute.
This is patch 2/2 in a series of patches. Patch 1 - #102340.
Commit: db3c3fc90a7c35dec504a454328ab619aa70830f
https://github.com/llvm/llvm-project/commit/db3c3fc90a7c35dec504a454328ab619aa70830f
Author: Temperatureblock <102174059+Temperature-block at users.noreply.github.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/pr59305.ll
Log Message:
-----------
Simple check to ignore Inline asm fwait insertion (#101686)
Just a simple check to ignore Inline asm fwait insertion
Fixes #101613
Commit: dc831e8422cb0762e33fb41ffbdff8a6100e7d34
https://github.com/llvm/llvm-project/commit/dc831e8422cb0762e33fb41ffbdff8a6100e7d34
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OMPIRBuilder] Use getAllOnesValue()
Split out from https://github.com/llvm/llvm-project/pull/80309.
Commit: 246c236ff9761920f5098878aba651e2112618bf
https://github.com/llvm/llvm-project/commit/246c236ff9761920f5098878aba651e2112618bf
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
Log Message:
-----------
[ConstantFolding] Use getSigned()
Split out from https://github.com/llvm/llvm-project/pull/80309.
Commit: 3b27fce960e965097c9d597b1bd35e8593121d25
https://github.com/llvm/llvm-project/commit/3b27fce960e965097c9d597b1bd35e8593121d25
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
Log Message:
-----------
[CGP] Use getAllOnesValue()
Split out from https://github.com/llvm/llvm-project/pull/80309.
Commit: 06f64e84738a6d6a55283ff5eef60c7ea9a92dac
https://github.com/llvm/llvm-project/commit/06f64e84738a6d6a55283ff5eef60c7ea9a92dac
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/ExpandMemCmp.cpp
Log Message:
-----------
[ExpandMemCmp] Use getAllOnesValue()
Split out from https://github.com/llvm/llvm-project/pull/80309.
Commit: 73d835cceca0638b7080ecf310594398e50e5206
https://github.com/llvm/llvm-project/commit/73d835cceca0638b7080ecf310594398e50e5206
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
Log Message:
-----------
[ConstraintElimination] Use getAllOnesValue()
Split out from https://github.com/llvm/llvm-project/pull/80309.
Commit: 82ee31f75ac1316006fa9e21dddfddec37cf7072
https://github.com/llvm/llvm-project/commit/82ee31f75ac1316006fa9e21dddfddec37cf7072
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M lldb/tools/lldb-server/lldb-platform.cpp
Log Message:
-----------
[lldb] Updated lldb-server to spawn the child process and share socket (#101283)
`lldb-server platform --server` works on Windows now w/o multithreading.
The rest functionality remains unchanged.
Fixes #90923, fixes #56346.
This is the part 1 of the replacement of #100670.
In the part 2 I plan to switch `lldb-server gdbserver` to use `--fd` and
listen a common gdb port for all gdbserver connections. Then we can
remove gdb port mapping to fiх #97537.
Commit: 49777d7ffe82f1dcace318e51c9d785994f8c32a
https://github.com/llvm/llvm-project/commit/49777d7ffe82f1dcace318e51c9d785994f8c32a
Author: meehatpa <gune30 at gmail.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir
M mlir/test/Conversion/MathToSPIRV/math-to-opencl-spirv.mlir
Log Message:
-----------
[mlir][spirv] Add atan and atan2 pattern to MathToSPIRV Conversion pass (#102633)
Add missing math.atan to spirv.CL.atan and math.atan2 to spirv.CL.atan2
in MathToSPIRV.
Add math.atan to spirv.GL.atan too.
Commit: 7027cc6a073cb5ae7a0ce04fa4a2dbe714615da9
https://github.com/llvm/llvm-project/commit/7027cc6a073cb5ae7a0ce04fa4a2dbe714615da9
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M lldb/test/Shell/SymbolFile/DWARF/x86/dwp-hash-collision.s
Log Message:
-----------
[lldb][test] Diable dwp hash collision test on Windows
This has been flaky on our Windows on Arm bot:
https://lab.llvm.org/buildbot/#/builders/141/builds/1497
Despite passing when first landed.
Commit: 3825a7c542f362ace2e943f4fc3ec8538750db3c
https://github.com/llvm/llvm-project/commit/3825a7c542f362ace2e943f4fc3ec8538750db3c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/test/AST/Interp/unions.cpp
Log Message:
-----------
[clang][Interp] Fix diagnosing uninitialized nested union fields (#102824)
We were calling initialize() unconditionally when copying the union.
Commit: 23c72e93a5af2213d616755103415bb638731203
https://github.com/llvm/llvm-project/commit/23c72e93a5af2213d616755103415bb638731203
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/test/CodeGen/SPIRV/transcoding/OpGroupAllAny.ll
Log Message:
-----------
[SPIR-V] Allow non-const arguments in a Group builtin that requires a boolean argument (#102902)
This PR resolves a TODO in `generateGroupInst()`
(`lib/Target/SPIRV/SPIRVBuiltins.cpp`) and Issues
https://github.com/llvm/llvm-project/issues/97311 and
https://github.com/llvm/llvm-project/issues/97312 by implementing
support for non-const arguments in a Group builtin that requires a
boolean argument.
Commit: 27a713f5b042bbcd88491c991877d0806aa66913
https://github.com/llvm/llvm-project/commit/27a713f5b042bbcd88491c991877d0806aa66913
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Conversion/VectorToSCF/VectorToSCF.h
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/test/Conversion/VectorToSCF/tensor-transfer-ops.mlir
M mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir
Log Message:
-----------
[mlir][vector] Add scalable lowering for `transfer_write(transpose)` (#101353)
This specifically handles the case of a transpose from a vector type
like `vector<8x[4]xf32>` to `vector<[4]x8xf32>`. Such transposes occur
fairly frequently when scalably vectorizing `linalg.generic`s. There is
no direct lowering for these (as types like `vector<[4]x8xf32>` cannot
be represented in LLVM-IR). However, if the only use of the transpose is
a write, then it is possible to lower the `transfer_write(transpose)` as
a VLA loop.
Example:
```mlir
%transpose = vector.transpose %vec, [1, 0]
: vector<4x[4]xf32> to vector<[4]x4xf32>
vector.transfer_write %transpose, %dest[%i, %j] {in_bounds = [true, true]}
: vector<[4]x4xf32>, memref<?x?xf32>
```
Becomes:
```mlir
%c1 = arith.constant 1 : index
%c4 = arith.constant 4 : index
%c0 = arith.constant 0 : index
%0 = vector.extract %arg0[0] : vector<[4]xf32> from vector<4x[4]xf32>
%1 = vector.extract %arg0[1] : vector<[4]xf32> from vector<4x[4]xf32>
%2 = vector.extract %arg0[2] : vector<[4]xf32> from vector<4x[4]xf32>
%3 = vector.extract %arg0[3] : vector<[4]xf32> from vector<4x[4]xf32>
%vscale = vector.vscale
%c4_vscale = arith.muli %vscale, %c4 : index
scf.for %idx = %c0 to %c4_vscale step %c1 {
%4 = vector.extract %0[%idx] : f32 from vector<[4]xf32>
%5 = vector.extract %1[%idx] : f32 from vector<[4]xf32>
%6 = vector.extract %2[%idx] : f32 from vector<[4]xf32>
%7 = vector.extract %3[%idx] : f32 from vector<[4]xf32>
%slice_i = affine.apply #map(%idx)[%i]
%slice = vector.from_elements %4, %5, %6, %7 : vector<4xf32>
vector.transfer_write %slice, %arg1[%slice_i, %j] {in_bounds = [true]}
: vector<4xf32>, memref<?x?xf32>
}
```
Commit: 05d85ecad707573cde0258cbab579ed764c61e51
https://github.com/llvm/llvm-project/commit/05d85ecad707573cde0258cbab579ed764c61e51
Author: Akash Banerjee <Akash.Banerjee at amd.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[OpenMP][MLIR] Add test missed by #102341
Add small test that I missed adding to #102341.
Commit: dab7e3c30dd690e50858450b658f32a1d1e9cf86
https://github.com/llvm/llvm-project/commit/dab7e3c30dd690e50858450b658f32a1d1e9cf86
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M flang/include/flang/Optimizer/CodeGen/FIROpPatterns.h
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/FIROpPatterns.cpp
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/rebox.fir
M flang/test/Fir/tbaa-codegen2.fir
M flang/test/Fir/tbaa.fir
Log Message:
-----------
[flang] Read the extra field from the in box when doing reboxing (#102686)
The extra field in the descriptor carries multiple information and
cannot be deducted anymore when doing a reboxing. This patch updates the
codegen to retrieve the extra field value from the inboc and set it in
the new box.
Commit: 7c4c72b52038810a8997938a2b3485363cd6be3a
https://github.com/llvm/llvm-project/commit/7c4c72b52038810a8997938a2b3485363cd6be3a
Author: J. Ryan Stinnett <jryans at gmail.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFExpression.cpp
Log Message:
-----------
[DebugInfo][NFC] Sort DWARF op descriptions, fix versions (#102773)
This sorts DWARF op descriptions in `DWARFExpression.cpp` by opcode and version, packing the standardised ops together. A few ops also had the wrong version listed, so this fixes those versions as well. (The version does not appear to actually be used currently.)
Commit: 3176f255c9dd43e8bacad0f9e56cf4f9f8816009
https://github.com/llvm/llvm-project/commit/3176f255c9dd43e8bacad0f9e56cf4f9f8816009
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/test/Transforms/InterleavedAccess/AArch64/fixed-deinterleave-intrinsics.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/scalable-deinterleave-intrinsics.ll
A llvm/test/Transforms/InterleavedAccess/AArch64/sve-deinterleave4.ll
A llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleave4.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleaved-accesses.ll
Log Message:
-----------
[IA][AArch64]: Construct (de)interleave4 out of (de)interleave2 (#89276)
- [AArch64]: TargetLowering is updated to spot load/store (de)interleave4 like sequences using PatternMatch,
and emit equivalent sve.ld4 and sve.st4 intrinsics.
Commit: fbf81e300489f0489edab20493f1db02e2a3bc74
https://github.com/llvm/llvm-project/commit/fbf81e300489f0489edab20493f1db02e2a3bc74
Author: xiaoleis-nv <99947620+xiaoleis-nv at users.noreply.github.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/test/Conversion/SCFToControlFlow/convert-to-cfg.mlir
Log Message:
-----------
Enable attaching LLVM loop annotations to scf.for (#102562)
We recently discovered that the loop with a dynamic upper bound is
unexpectedly unrolled during the NVVM to PTX process. By attaching the
`llvm.loop_annotation`, we can control the unrolling behavior precisely.
This PR enables the `cf.cond_br` to retain the loop annotation of
`scf.for` after the `convert-scf-to-cf` pass. This change allows users
to have precise control over the loop behavior during backend
transformation.
---------
Co-authored-by: Xiaolei Shi <xiaoleis at nvidia.com>
Commit: 8b6e9de3dd114db28fde892c67960a87d9870637
https://github.com/llvm/llvm-project/commit/8b6e9de3dd114db28fde892c67960a87d9870637
Author: RolandF77 <55763885+RolandF77 at users.noreply.github.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll
M llvm/test/CodeGen/PowerPC/build-vector-from-load-and-zeros.ll
M llvm/test/CodeGen/PowerPC/load-and-splat.ll
M llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
M llvm/test/CodeGen/PowerPC/test-vector-insert.ll
M llvm/test/CodeGen/PowerPC/vec-trunc2.ll
M llvm/test/CodeGen/PowerPC/vsx.ll
M llvm/test/CodeGen/PowerPC/widen-vec-correctly-be.ll
Log Message:
-----------
[PowerPC] improve P10 store forwarding on P7 scalar to vector (#102330)
Try to make P7 code with scalar to vector operations that use store/re-load to run smoother on P10 by supplying enough store width to cover the load and allow hardware store forwarding.
Commit: 654d1f83e3fa191d7b1724cdaf0eafbca0cf408a
https://github.com/llvm/llvm-project/commit/654d1f83e3fa191d7b1724cdaf0eafbca0cf408a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
M llvm/lib/Target/RISCV/RISCVInstrInfoM.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
Log Message:
-----------
[RISCV][GISel] Move i32 patterns that aren't used by SelectionDAG to RISCVGISel.td. NFC (#102685)
Reduces RISCVGenDAGISel.inc by ~6000 bytes.
Commit: 8fd1484e301421c572f2a30a29164a9ba784f52a
https://github.com/llvm/llvm-project/commit/8fd1484e301421c572f2a30a29164a9ba784f52a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/uadd_sat_plus.ll
Log Message:
-----------
[LegalizeTypes][RISCV] Use signed promotion for UADDSAT if that's what the target prefers. (#102842)
As noted in #102781 we can promote UADDSAT if we use sign extend instead
of zero extend.
The custom handler for RISC-V was using SIGN_EXTEND when the Zbb
extension was enabled. With this change we no longer need the custom
code.
Commit: 8fc9b4efd25287d6ef87e4e25ea40789401ecf7f
https://github.com/llvm/llvm-project/commit/8fc9b4efd25287d6ef87e4e25ea40789401ecf7f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M flang/include/flang/Optimizer/CodeGen/FIROpPatterns.h
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/FIROpPatterns.cpp
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/rebox.fir
M flang/test/Fir/tbaa-codegen2.fir
M flang/test/Fir/tbaa.fir
Log Message:
-----------
Revert "[flang] Read the extra field from the in box when doing reboxing" (#102931)
Reverts llvm/llvm-project#102686 as it might be the source of buildbot
failures https://lab.llvm.org/buildbot/#/builders/143/builds/1392.
Commit: 38b67c54ed858f60c0caebcfba4b61f9326684ca
https://github.com/llvm/llvm-project/commit/38b67c54ed858f60c0caebcfba4b61f9326684ca
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DebugNamesDWARFIndex.cpp
M lldb/test/Shell/SymbolFile/DWARF/x86/dwp-hash-collision.s
R lldb/test/Shell/SymbolFile/DWARF/x86/mixed-debug-names-complete-type-search.test
Log Message:
-----------
Revert "[lldb/DWARF] Search fallback to the manual index in GetFullyQualified… (#102123)"
The test appears to be flaky. Revert it while I investigate.
This reverts commits 7027cc6a073cb5ae7a0ce04fa4a2dbe714615da9 and
21ef272ec1974244710fc639f98674eae3f8b02c.
Commit: b3ed1d92112e0f455f8ef0888ef4c5d0ca29096d
https://github.com/llvm/llvm-project/commit/b3ed1d92112e0f455f8ef0888ef4c5d0ca29096d
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DebugNamesDWARFIndex.cpp
M lldb/test/Shell/SymbolFile/DWARF/x86/dwp-hash-collision.s
A lldb/test/Shell/SymbolFile/DWARF/x86/mixed-debug-names-complete-type-search.test
Log Message:
-----------
Reapply "[lldb/DWARF] Search fallback to the manual index in GetFullyQualified… (#102123)"
This reverts commit 38b67c54ed858f60c0caebcfba4b61f9326684ca.
I reverted the wrong patch -- sorry :(
Commit: a0c57a0f3c6b44ce8f2c7222d0932df85883cf06
https://github.com/llvm/llvm-project/commit/a0c57a0f3c6b44ce8f2c7222d0932df85883cf06
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
R lldb/test/Shell/SymbolFile/DWARF/x86/dwp-hash-collision.s
Log Message:
-----------
Revert "[lldb] Tolerate multiple compile units with the same DWO ID (#100577)"
The test appears to be flaky. Revert it while I investigate.
This reverts commits 32a62ebdeab0c10d5311cf812e021717636d4514 and
7027cc6a073cb5ae7a0ce04fa4a2dbe714615da9.
Commit: 1cbd25f882d10de1a23bb0287a70cde5037ebf42
https://github.com/llvm/llvm-project/commit/1cbd25f882d10de1a23bb0287a70cde5037ebf42
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M libc/src/__support/str_to_float.h
M libc/test/src/stdlib/strtof_test.cpp
Log Message:
-----------
[NFC][libc] Clarifies underscores in n-char-sequence. (#102193)
The C standard specifies
n-char-sequence:
digit
nondigit
n-char-sequence digit
n-char-sequence nondigit
nondigit is specified as one of:
_ a b c d e f g h i j k l m
n o p q r s t u v w x y z
A B C D E F G H I J K L M
N O P Q R S T U V W X Y Z
This means nondigit includes the underscore character. This patch
clarifies this status in the comments and the test.
Note C17 specifies n-char-sequence for NaN() as optional, and an empty
sequence is not a valid n-char-sequence. However the current comment has
the same effect as using the pedantic wording. So I left that part
unchanged.
Commit: c4724f60384917ef0f0e8cc32702fe02c3b3b1c9
https://github.com/llvm/llvm-project/commit/c4724f60384917ef0f0e8cc32702fe02c3b3b1c9
Author: Daniel M. Katz <katzdm at gmail.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateDeduction.cpp
A clang/test/SemaCXX/PR98671.cpp
Log Message:
-----------
Fix assertion failure during conversion function overload resolution. (#98671)
When clang is built with assertions, an otherwise silent (and seemingly
innocuous) assertion failure from `SemaConcept.cpp` is triggered by the
following program:
```cpp
struct S {
operator int();
template <typename T> operator T();
};
constexpr auto r = &S::operator int;
```
The function in question compares the "constrained-ness" of `S::operator
int` and `S::operator T<int>`; the template kind of the former is
`TK_NonTemplate`, whereas the template kind of the later is
`TK_FunctionTemplateSpecialization`. The later kind is not "expected" by
the function, thus the assertion-failure.
Commit: 5629249575f56f6135fb63e2f0d4ca9a7375167c
https://github.com/llvm/llvm-project/commit/5629249575f56f6135fb63e2f0d4ca9a7375167c
Author: Artem Belevich <tra at google.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/include/clang/AST/ASTContext.h
A clang/test/CodeGenCUDA/host-used-extern-determinism.cu
Log Message:
-----------
[CUDA] Emit used function list in deterministic order. (#102661)
Fixes https://github.com/llvm/llvm-project/issues/101560
Commit: 8470cdd499904093ba4faeff870fee12a3e80ff3
https://github.com/llvm/llvm-project/commit/8470cdd499904093ba4faeff870fee12a3e80ff3
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/ConstantArgumentGlobalisation.cpp
M flang/lib/Semantics/data-to-inits.cpp
M flang/lib/Semantics/rewrite-directives.cpp
M flang/lib/Semantics/symbol.cpp
Log Message:
-----------
[flang] Use llvm::any_of and llvm::none_of (NFC) (#102797)
Commit: 0801a37115ec54b7621ee63998c27ab919460a43
https://github.com/llvm/llvm-project/commit/0801a37115ec54b7621ee63998c27ab919460a43
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M mlir/tools/mlir-tblgen/OmpOpGen.cpp
Log Message:
-----------
[mlir-tblgen] Use llvm::any_of (NFC) (#102795)
Commit: 4afa2de59a4e45365c59ed97abdeea86f612d7ca
https://github.com/llvm/llvm-project/commit/4afa2de59a4e45365c59ed97abdeea86f612d7ca
Author: Florian Mayer <fmayer at google.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M compiler-rt/lib/hwasan/scripts/hwasan_symbolize
A compiler-rt/test/hwasan/TestCases/hwasan_symbolize_stack_overflow.cpp
Log Message:
-----------
[HWASan] symbolize stack overflows (#95308)
Commit: fe7d2841cf67ba4c8b9780ea09557a558b2501a8
https://github.com/llvm/llvm-project/commit/fe7d2841cf67ba4c8b9780ea09557a558b2501a8
Author: Artem Belevich <tra at google.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/test/CodeGen/NVPTX/extractelement.ll
Log Message:
-----------
[NVPTX] unbreak extract_elt lowering (#102688)
LLVM has started using `freeze` instruction, and that unintentionally
broke the lowering of some vector operations in NVPTX.
Commit: d9caea18f946390e0b458471cdc3e3252099c1cf
https://github.com/llvm/llvm-project/commit/d9caea18f946390e0b458471cdc3e3252099c1cf
Author: Xiaoyang Liu <siujoeng.lau at gmail.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/include/__ranges/transform_view.h
M libcxx/test/std/ranges/range.adaptors/range.transform/iterator/types.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.transform/types.h
Log Message:
-----------
[libc++][ranges] LWG3564: `transform_view::iterator<true>::value_type` and `iterator_category` should use `const F&` (#91816)
## Introduction
This patch implements LWG3564:
`transform_view::iterator<true>::value_type` and `iterator_category`
should use `const F&`.
`transform_view`'s iterator currently obtained from a `const
transform_view` invoke the transformation function as `const`, but the
`value_type` and `iterator_category` determination uses non-`const`
`F&`.
## Reference
-
[[range.transform.iterator]](https://eel.is/c++draft/range.transform.iterator)
- [LWG3564](https://cplusplus.github.io/LWG/issue3564)
Commit: 11aa31f595325d6b2dede3364e4b86d78fffe635
https://github.com/llvm/llvm-project/commit/11aa31f595325d6b2dede3364e4b86d78fffe635
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
Revert "[MemProf] Reduce cloning overhead by sharing nodes when possible" (#102932)
Reverts llvm/llvm-project#99832
This caused a couple failures in wider testing, reverting for now and
will recommit once they are addressed
Commit: 862f5040fb854b5ca0aba2d3088396201bf7db9a
https://github.com/llvm/llvm-project/commit/862f5040fb854b5ca0aba2d3088396201bf7db9a
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
A llvm/test/CodeGen/AMDGPU/print-pipeline-passes.ll
Log Message:
-----------
[AMDGPU] Enable AMDGPUAttributorPass in full LTO (#102673)
This is basically same as
https://github.com/llvm/llvm-project/pull/102086 but reverts some test
case changes that are no longer needed.
Commit: e40915b7407eda4b370658da5c9606e310b55d19
https://github.com/llvm/llvm-project/commit/e40915b7407eda4b370658da5c9606e310b55d19
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
Log Message:
-----------
[AMDGPU] Use llvm::any_of and llvm::none_of (NFC) (#102794)
Commit: 03e6675fc78783d0d0b0a784eccbd5ff19de23a2
https://github.com/llvm/llvm-project/commit/03e6675fc78783d0d0b0a784eccbd5ff19de23a2
Author: S. Bharadwaj Yadavalli <Bharadwaj.Yadavalli at microsoft.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
A llvm/include/llvm/Analysis/DXILMetadataAnalysis.h
M llvm/include/llvm/InitializePasses.h
M llvm/lib/Analysis/CMakeLists.txt
A llvm/lib/Analysis/DXILMetadataAnalysis.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/test/CodeGen/DirectX/Metadata/dxilVer-1.0.ll
M llvm/test/CodeGen/DirectX/Metadata/dxilVer-1.8.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-as.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-cs-val-ver-0.0.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-cs.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-gs.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-hs.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-lib.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-ms.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-ps.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-vs.ll
Log Message:
-----------
[DXIL][Analysis] Add DXILMetadataAnalysis pass (#102079)
DXIL Metadata Analysis passes (one for legacy PM and one for new PM)
that collect following DXIL module metadata information in a structure
are added.
1. Shader Model version
2. DXIL version
3. Shader Stage
Information collected using the legacy pass is verified by adding
additional test commands to existing metadata test sources.
Commit: 90aac06c7f49dd275a49b843b5fd91cb00d549b4
https://github.com/llvm/llvm-project/commit/90aac06c7f49dd275a49b843b5fd91cb00d549b4
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
A flang/test/Lower/ident.f90
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Target/LLVMIR/Import/ident.ll
A mlir/test/Target/LLVMIR/ident.mlir
Log Message:
-----------
[flang][mlir] Add llvm.ident metadata when compiling with flang
This brings the behavior of flang in line with clang which also adds
this metadata unconditionally.
Co-authored-by: Tarun Prabhu <tarun.prabhu at gmail.com>
Commit: f1e2886261281e788e4faae406c24e787c1dbdd0
https://github.com/llvm/llvm-project/commit/f1e2886261281e788e4faae406c24e787c1dbdd0
Author: Greg Clayton <gclayton at fb.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M lldb/include/lldb/Symbol/ObjectFile.h
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
M lldb/source/Symbol/ObjectFile.cpp
A lldb/test/Shell/ObjectFile/ELF/Inputs/memory-elf.cpp
A lldb/test/Shell/ObjectFile/ELF/elf-dynamic-no-shdrs.yaml
A lldb/test/Shell/ObjectFile/ELF/elf-memory.test
Log Message:
-----------
[LLDB] Impove ObjectFileELF's .dynamic parsing and usage. (#102570)
This patch improves the ability of a ObjectFileELF instance to read the
.dynamic section. It adds the ability to read the .dynamic section from
the PT_DYNAMIC program header which is useful for ELF files that have no
section headers and for ELF files that are read from memory. It cleans
up the usage of the .dynamic entries so that
ObjectFileELF::ParseDynamicSymbols() is the only code that parses
.dynamic entries, teaches that function the read and store the string
values for each .dynamic entry. We now dump the .dynamic entries in the
output of "image dump objfile". It also cleans up the code that gets the
dynamic string table so that it can grab it from the DT_STRTAB and
DT_STRSZ .dynamic entries for when we have a ELF file with no section
headers or we are reading it from memory.
Commit: e4e938f3cdf11d7d62c558ed7ee0b6097ded338d
https://github.com/llvm/llvm-project/commit/e4e938f3cdf11d7d62c558ed7ee0b6097ded338d
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/length.ll
Log Message:
-----------
[HLSL] Lower Length to SPIR-V backend (#102243)
This PR finishes #99134 by lowering the length function to the SPIR-V
backend. A test was added to verify that the generated SPIR-V is
correct.
Fixes #99134
Commit: d5849af68e0cb2436d317ea0c5171e8da85fd846
https://github.com/llvm/llvm-project/commit/d5849af68e0cb2436d317ea0c5171e8da85fd846
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
Log Message:
-----------
[gn build] Port 03e6675fc787
Commit: dc2f39e96c48dac450a535c412d0928d458590de
https://github.com/llvm/llvm-project/commit/dc2f39e96c48dac450a535c412d0928d458590de
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M libc/config/gpu/entrypoints.txt
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/daddl.cpp
M libc/src/math/generic/dsubl.cpp
Log Message:
-----------
[libc] Enable all supported math functions on the GPU (#102563)
Summary:
Simply copies the x64 versions to the GPU directory. Ignoring f128 for
now, but adding long double entrypoints which are identical to `double`
on the target.
Commit: ee5d572718f7bb07f89b69df393b28a89033a5ca
https://github.com/llvm/llvm-project/commit/ee5d572718f7bb07f89b69df393b28a89033a5ca
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/daddl.cpp
M libc/src/math/generic/dsubl.cpp
Log Message:
-----------
[libc] Undo accidental changes to `dsubl` that were leftoever
Commit: dc21cb5cc74fdff18418092570230cd980cafa27
https://github.com/llvm/llvm-project/commit/dc21cb5cc74fdff18418092570230cd980cafa27
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
A lld/test/ELF/linkerscript/phdrs-no-tls.test
Log Message:
-----------
[ELF,test] Test STT_TLS and relocation without PT_TLS
Commit: c6428162c13b330b26b1916a9d6c45ee41ff4a1e
https://github.com/llvm/llvm-project/commit/c6428162c13b330b26b1916a9d6c45ee41ff4a1e
Author: Mital Ashok <mital at mitalashok.co.uk>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticASTKinds.td
Log Message:
-----------
[NFC] Deduplicate clang::AccessKinds to diagnostic strings (#102030)
Commit: d4f6fcf5aaa0911a91317c0b06779f13077d6b58
https://github.com/llvm/llvm-project/commit/d4f6fcf5aaa0911a91317c0b06779f13077d6b58
Author: Florian Mayer <fmayer at google.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M compiler-rt/lib/hwasan/scripts/hwasan_symbolize
R compiler-rt/test/hwasan/TestCases/hwasan_symbolize_stack_overflow.cpp
Log Message:
-----------
Revert "[HWASan] symbolize stack overflows" (#102951)
Reverts llvm/llvm-project#95308
Broke buildbot https://lab.llvm.org/buildbot/#/builders/51/builds/2364
Commit: b812e57ac301c7f88171cc73e213b70078727b16
https://github.com/llvm/llvm-project/commit/b812e57ac301c7f88171cc73e213b70078727b16
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/trip-count-implied-addrec.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-scalable-stride.ll
Log Message:
-----------
[SCEV] Consolidate code for proving wrap flags of controlling finite IVs (#101404)
The canAssumeNoSelfWrap routine in howManyLessThans was doing two subtly
inter-related things. First, it was proving no-self-wrap. This exactly
duplicates the existing logic in the caller. Second, it was establishing
the precondition for the nw->nsw/nuw inference. Specifically, we need to
know that *this* exit must be taken for the inference to be sound.
Otherwise, another (possible abnormal) exit could be taken in the
iteration where this IV would become poison.
This change moves all of that logic into the caller, and caches the
resulting nuw/nsw flags in the AddRec. This centralizes the logic in one
place, and makes it clear that it all depends on controlling the sole
exit.
We do loose a couple cases with SCEV predication. Specifically, if SCEV
predication was able to convert e.g. zext(addrec) into an addrec(zext)
using predication, but didn't record the nuw fact on the new addrec,
then the consuming code can no longer fix this up. I don't think this
case particularly matters.
---------
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: e26b42c70d37cbea47016984e1d2bfc347fb8818
https://github.com/llvm/llvm-project/commit/e26b42c70d37cbea47016984e1d2bfc347fb8818
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M lldb/source/Expression/IRInterpreter.cpp
M lldb/source/Plugins/ExpressionParser/Clang/IRDynamicChecks.cpp
M lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
M lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.h
Log Message:
-----------
[lldb] Avoid calling DataLayout constructor accepting Module pointer (NFC) (#102839)
The constructor initializes `*this` with a copy of `M->getDataLayout()`,
which can just be spelled as `DataLayout DL = M->getDataLayout()`. In
all places where the constructor is used, Module outlives DataLayout, so
store a reference to it instead of cloning.
Pull Request: https://github.com/llvm/llvm-project/pull/102839
Commit: b6448a03d887a1615fdffd1016109f9f24bea275
https://github.com/llvm/llvm-project/commit/b6448a03d887a1615fdffd1016109f9f24bea275
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/ELF/Symbols.cpp
M lld/test/ELF/invalid/tls-symbol.s
M lld/test/ELF/linkerscript/phdrs-no-tls.test
Log Message:
-----------
[ELF] Change "no PT_TLS" error to use errorOrWarn
so that --noinhibit-exec downgrades the error to a warning, which helps
debugging when `PHDRS` is specified without `PT_TLS`. Also update the
message to make it accurate: STT_TLS may exist in the absence of PT_TLS.
In addition, invoking `exitLld(1)` (through `fatal`) is problematic
(#66974): When a thread is `exitLld(1)`, triggering `llvm_shutdown`,
another thread may be at `relocateAlloc`, accessing `sec.relocs()` which
got destroyed(tampered?), leading to
incorrect `llvm_unreachable("invalid expression")`.
Commit: b4bc7b182c696c540f40bc887d7d20a95a0a5cde
https://github.com/llvm/llvm-project/commit/b4bc7b182c696c540f40bc887d7d20a95a0a5cde
Author: PeterChou1 <peter.chou at mail.utoronto.ca>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/test/clang-doc/basic-project.test
M clang-tools-extra/unittests/clang-doc/HTMLGeneratorTest.cpp
Log Message:
-----------
[clang-doc] add support for comments for members in HTML output (#101255)
currently the HTML output does not support comments attached to class
members, this patch modifies the HTMLGenerator to add comments for the
output.
Commit: 290f7eacb9691feb7695848c98bcc155fd446f62
https://github.com/llvm/llvm-project/commit/290f7eacb9691feb7695848c98bcc155fd446f62
Author: quanwanandy <quanwanandy at google.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Fix bazel build (#102960)
Commit: 15aa4ef057438df5bae8aaf7ff07b31dfcc1ef77
https://github.com/llvm/llvm-project/commit/15aa4ef057438df5bae8aaf7ff07b31dfcc1ef77
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Add the ExtractElementInst class (#102706)
Commit: 8ea8f1f2fe501e0be5d0142d79651f490fb2ae2c
https://github.com/llvm/llvm-project/commit/8ea8f1f2fe501e0be5d0142d79651f490fb2ae2c
Author: ChiaHungDuan <chiahungduan at google.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M compiler-rt/lib/scudo/standalone/list.h
M compiler-rt/lib/scudo/standalone/tests/list_test.cpp
Log Message:
-----------
[scudo] Support linking with index in IntrusiveList (#101262)
The nodes of list may be managed in an array. Instead of managing them
with pointers, using the array index will save some memory in some
cases.
When using the list linked with index, remember to call init() to set up
the base address of the array and a `EndOfListVal` which is nil of the
list.
Commit: 123b6fcc70af17d81c903b839ffb55afc9a9728f
https://github.com/llvm/llvm-project/commit/123b6fcc70af17d81c903b839ffb55afc9a9728f
Author: Qiongsi Wu <274595+qiongsiwu at users.noreply.github.com>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/PreprocessorOptions.h
M clang/include/clang/Parse/Parser.h
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Parse/ParsePragma.cpp
R clang/test/Preprocessor/pragma_mc_func.c
Log Message:
-----------
[AIX] Revert `#pragma mc_func` check (#102919)
https://github.com/llvm/llvm-project/pull/99888 added a specific
diagnostic for `#pragma mc_func` on AIX. There are some disagreements
on:
1. If the check should be on by default. Leaving the check off by
default is dangerous, since it is difficult to be aware of such a check.
Turning it on by default at the moment causes build failures on AIX. See
https://github.com/llvm/llvm-project/pull/101336 for more details.
2. If the check can be made more general. See
https://github.com/llvm/llvm-project/pull/101336#issuecomment-2269283906.
This PR reverts this check from `main` so we can flush out these
disagreements.
Commit: a2acea5c380534430a01843698d4bf46b018110f
https://github.com/llvm/llvm-project/commit/a2acea5c380534430a01843698d4bf46b018110f
Author: Martin Storsjö <martin at martin.st>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M libcxx/test/libcxx/gdb/gdb_pretty_printer_test.sh.cpp
Log Message:
-----------
[libcxx] [test] Mark gdb_pretty_printer_test.sh.cpp as unsupported on Windows (#102891)
In practice, this test hasn't been run by any of the Windows
configurations so far, because it has been excluded by the "UNSUPPORTED:
clang-18, clang-19" line - but it does end up failing if running with
e.g. clang-20 on Windows.
As the test fails on more fundamental issues on Windows, mark it
outright unsupported on this platform; this fixes testing libcxx with a
recent nightly version of Clang from git main.
Commit: f1ead021fb81e2877a5be0877e3a3e7abacf0d51
https://github.com/llvm/llvm-project/commit/f1ead021fb81e2877a5be0877e3a3e7abacf0d51
Author: Martin Storsjö <martin at martin.st>
Date: 2024-08-12 (Mon, 12 Aug 2024)
Changed paths:
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/test/clang-doc/basic-project.test
M clang-tools-extra/unittests/clang-doc/HTMLGeneratorTest.cpp
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/checkers.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/arm_sme.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/MultiplexConsumer.h
M clang/include/clang/Lex/PreprocessorOptions.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Serialization/ASTDeserializationListener.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/Store.h
M clang/lib/AST/Interp/Compiler.cpp
M clang/lib/AST/Interp/Compiler.h
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Frontend/MultiplexConsumer.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
M clang/test/AST/Interp/unions.cpp
M clang/test/Analysis/pointer-sub-notes.c
M clang/test/Analysis/pointer-sub.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
A clang/test/CodeGenCUDA/host-used-extern-determinism.cu
M clang/test/CodeGenObjC/no-sanitize.m
M clang/test/Driver/print-supported-extensions-aarch64.c
M clang/test/Driver/ps4-linker.c
M clang/test/Driver/ps4-pic.c
M clang/test/Driver/ps5-linker.c
M clang/test/Driver/ps5-pic.c
A clang/test/Modules/pr102684.cppm
M clang/test/OpenMP/target_teams_ast_print.cpp
R clang/test/Preprocessor/pragma_mc_func.c
M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
A clang/test/SemaCXX/PR98671.cpp
A clang/test/SemaCXX/gh102293.cpp
M compiler-rt/lib/builtins/cpu_model/aarch64.c
A compiler-rt/lib/builtins/cpu_model/aarch64/fmv/getauxval.inc
R compiler-rt/lib/builtins/cpu_model/aarch64/fmv/sysauxv.inc
A compiler-rt/lib/builtins/cpu_model/aarch64/lse_atomics/getauxval.inc
R compiler-rt/lib/builtins/cpu_model/aarch64/lse_atomics/sysauxv.inc
M compiler-rt/lib/fuzzer/FuzzerUtilWindows.cpp
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan.h
M compiler-rt/lib/rtsan/rtsan_interceptors.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_win.cpp
M compiler-rt/lib/scudo/standalone/list.h
M compiler-rt/lib/scudo/standalone/tests/list_test.cpp
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/Decomposer.cpp
M flang/lib/Lower/OpenMP/Decomposer.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
M flang/lib/Optimizer/Transforms/ConstantArgumentGlobalisation.cpp
M flang/lib/Semantics/data-to-inits.cpp
M flang/lib/Semantics/rewrite-directives.cpp
M flang/lib/Semantics/symbol.cpp
A flang/test/Lower/ident.f90
M libc/config/gpu/entrypoints.txt
M libc/src/__support/str_to_float.h
M libc/test/src/stdlib/strtof_test.cpp
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/include/__ranges/transform_view.h
M libcxx/test/libcxx/gdb/gdb_pretty_printer_test.sh.cpp
M libcxx/test/std/ranges/range.adaptors/range.transform/iterator/types.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.transform/types.h
M lld/ELF/InputSection.cpp
M lld/ELF/Symbols.cpp
M lld/test/ELF/invalid/tls-symbol.s
A lld/test/ELF/linkerscript/phdrs-no-tls.test
M lldb/include/lldb/Symbol/ObjectFile.h
M lldb/include/lldb/Utility/UUID.h
M lldb/packages/Python/lldbsuite/test/concurrent_base.py
M lldb/source/Expression/IRInterpreter.cpp
M lldb/source/Plugins/ExpressionParser/Clang/IRDynamicChecks.cpp
M lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
M lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.h
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
M lldb/source/Plugins/ObjectFile/PECOFF/WindowsMiniDump.cpp
M lldb/source/Plugins/Process/Windows/Common/TargetThreadWindows.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DebugNamesDWARFIndex.cpp
M lldb/source/Symbol/ObjectFile.cpp
M lldb/source/Target/ThreadPlanSingleThreadTimeout.cpp
M lldb/test/API/commands/register/register/register_command/TestRegisters.py
A lldb/test/Shell/ObjectFile/ELF/Inputs/memory-elf.cpp
A lldb/test/Shell/ObjectFile/ELF/elf-dynamic-no-shdrs.yaml
A lldb/test/Shell/ObjectFile/ELF/elf-memory.test
A lldb/test/Shell/SymbolFile/DWARF/x86/mixed-debug-names-complete-type-search.test
M lldb/tools/lldb-server/lldb-platform.cpp
M lldb/unittests/Host/linux/SupportTest.cpp
M llvm/CMakeLists.txt
M llvm/examples/BrainF/BrainFDriver.cpp
M llvm/examples/ExceptionDemo/ExceptionDemo.cpp
A llvm/include/llvm/Analysis/DXILMetadataAnalysis.h
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/CodeGen/BasicBlockSectionsProfileReader.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/DataLayout.h
M llvm/include/llvm/IR/GlobalIFunc.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/ObjectYAML/DWARFYAML.h
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/include/llvm/Support/KnownBits.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Transforms/Instrumentation.h
M llvm/include/llvm/Transforms/Scalar/StructurizeCFG.h
M llvm/lib/Analysis/CMakeLists.txt
M llvm/lib/Analysis/ConstantFolding.cpp
A llvm/lib/Analysis/DXILMetadataAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/ExpandMemCmp.cpp
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/MatchContext.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/DebugInfo/DWARF/DWARFExpression.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.h
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.h
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.h
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldCOFFAArch64.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DataLayout.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/TypedPointerType.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
M llvm/lib/ObjectYAML/DWARFYAML.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h
M llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.h
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/R600ISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/R600MachineScheduler.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendELF.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendWinCOFF.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
M llvm/lib/Target/RISCV/RISCVInstrInfoM.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCCodeEmitter.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVRegisterBanks.td
M llvm/lib/Target/SPIRV/SPIRVRegisterInfo.td
M llvm/lib/Target/SystemZ/SystemZMachineScheduler.h
M llvm/lib/Target/TargetMachine.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombineInternal.h
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/Instrumentation.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/NaryReassociate.cpp
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/test/Analysis/ScalarEvolution/trip-count-implied-addrec.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-scalable-stride.ll
A llvm/test/Bitcode/amdgpu-unsafe-fp-atomics-upgrade.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-add-sub-za16.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-fmlas16.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-mopa.ll
M llvm/test/CodeGen/AArch64/sve2-histcnt.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll
A llvm/test/CodeGen/AMDGPU/div-rem-by-constant-64.ll
A llvm/test/CodeGen/AMDGPU/print-pipeline-passes.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.mir
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
A llvm/test/CodeGen/ARM/div-by-constant-to-mul-crash.ll
M llvm/test/CodeGen/DirectX/Metadata/dxilVer-1.0.ll
M llvm/test/CodeGen/DirectX/Metadata/dxilVer-1.8.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-as.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-cs-val-ver-0.0.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-cs.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-gs.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-hs.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-lib.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-ms.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-ps.ll
M llvm/test/CodeGen/DirectX/Metadata/shaderModel-vs.ll
M llvm/test/CodeGen/NVPTX/extractelement.ll
M llvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll
M llvm/test/CodeGen/PowerPC/build-vector-from-load-and-zeros.ll
M llvm/test/CodeGen/PowerPC/load-and-splat.ll
M llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
M llvm/test/CodeGen/PowerPC/test-vector-insert.ll
M llvm/test/CodeGen/PowerPC/vec-trunc2.ll
M llvm/test/CodeGen/PowerPC/vsx.ll
M llvm/test/CodeGen/PowerPC/widen-vec-correctly-be.ll
M llvm/test/CodeGen/RISCV/uadd_sat_plus.ll
M llvm/test/CodeGen/SPIRV/SampledImageRetType.ll
M llvm/test/CodeGen/SPIRV/atomicrmw.ll
M llvm/test/CodeGen/SPIRV/basic_int_types.ll
M llvm/test/CodeGen/SPIRV/empty.ll
M llvm/test/CodeGen/SPIRV/event-zero-const.ll
M llvm/test/CodeGen/SPIRV/expect.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_double.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_float.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_half.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_double.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_float.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_half.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_cache_controls/basic-load-store.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/all.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/any.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/imad.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/length.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic.ll
M llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll
M llvm/test/CodeGen/SPIRV/instructions/ptrcmp.ll
M llvm/test/CodeGen/SPIRV/linkage/link-attribute.ll
M llvm/test/CodeGen/SPIRV/literals.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/lifetime.ll
M llvm/test/CodeGen/SPIRV/lshr-constexpr.ll
M llvm/test/CodeGen/SPIRV/opencl/image.ll
M llvm/test/CodeGen/SPIRV/pointers/irtrans-added-int-const-32-64.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-global-dup.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpGroupAllAny.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpImageSampleExplicitLod.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpImageWrite.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpVectorInsertDynamic_i16.ll
M llvm/test/CodeGen/SPIRV/transcoding/SampledImage.ll
M llvm/test/CodeGen/SPIRV/transcoding/cl-types.ll
M llvm/test/CodeGen/SPIRV/transcoding/fadd.ll
M llvm/test/CodeGen/SPIRV/transcoding/group_ops.ll
M llvm/test/CodeGen/SPIRV/transcoding/image_with_access_qualifiers.ll
M llvm/test/CodeGen/SPIRV/transcoding/non32.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-private-array-initialization.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-types.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_extended_types.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_shuffle.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_shuffle_relative.ll
M llvm/test/CodeGen/SPIRV/types/or-i1.ll
M llvm/test/CodeGen/SPIRV/unnamed-global.ll
M llvm/test/CodeGen/SPIRV/var-uniform-const.ll
M llvm/test/CodeGen/X86/pr59305.ll
M llvm/test/CodeGen/X86/vector-half-conversions.ll
A llvm/test/Instrumentation/AddressSanitizer/asan-pass-second-run.ll
M llvm/test/Instrumentation/AddressSanitizer/missing_dbg.ll
A llvm/test/Instrumentation/DataFlowSanitizer/dfsan-pass-second-run.ll
A llvm/test/Instrumentation/HWAddressSanitizer/hwasan-pass-second-run.ll
A llvm/test/Instrumentation/MemorySanitizer/msan-pass-second-run.ll
A llvm/test/Instrumentation/ThreadSanitizer/tsan-pass-second-run.ll
M llvm/test/MC/AArch64/SME2/bfadd-diagnostics.s
M llvm/test/MC/AArch64/SME2/bfadd.s
M llvm/test/MC/AArch64/SME2/bfmla-diagnostics.s
M llvm/test/MC/AArch64/SME2/bfmla.s
M llvm/test/MC/AArch64/SME2/bfmls-diagnostics.s
M llvm/test/MC/AArch64/SME2/bfmls.s
M llvm/test/MC/AArch64/SME2/bfmopa-diagnostics.s
M llvm/test/MC/AArch64/SME2/bfmopa.s
M llvm/test/MC/AArch64/SME2/bfmops-diagnostics.s
M llvm/test/MC/AArch64/SME2/bfmops.s
M llvm/test/MC/AArch64/SME2/bfsub-diagnostics.s
M llvm/test/MC/AArch64/SME2/bfsub.s
M llvm/test/MC/AArch64/SME2p1/directive-arch-negative.s
M llvm/test/MC/AArch64/SME2p1/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SME2p1/directive-arch_extension.s
M llvm/test/MC/AMDGPU/expressions.s
M llvm/test/MC/AMDGPU/flat-scratch.s
M llvm/test/MC/AMDGPU/gfx10_err_pos.s
M llvm/test/MC/AMDGPU/gfx11_asm_operands.s
M llvm/test/MC/AMDGPU/literals.s
M llvm/test/MC/AMDGPU/out-of-range-registers.s
M llvm/test/MC/AMDGPU/reg-syntax-err.s
M llvm/test/MC/AMDGPU/reg-syntax-extra.s
M llvm/test/MC/AMDGPU/smem.s
M llvm/test/MC/AMDGPU/smrd-err.s
M llvm/test/MC/AMDGPU/smrd.s
M llvm/test/MC/AMDGPU/sop1-err.s
M llvm/test/MC/AMDGPU/sop1.s
M llvm/test/MC/AMDGPU/sop2.s
M llvm/test/MC/AMDGPU/trap.s
M llvm/test/MC/AMDGPU/vop_sdwa.s
M llvm/test/MC/AMDGPU/xnack-mask.s
A llvm/test/Transforms/IndVarSimplify/pr102597.ll
M llvm/test/Transforms/InstCombine/apint-call-cast-target.ll
M llvm/test/Transforms/InstCombine/call-cast-target.ll
M llvm/test/Transforms/InstCombine/call.ll
M llvm/test/Transforms/InstCombine/opaque-ptr.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/fixed-deinterleave-intrinsics.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/scalable-deinterleave-intrinsics.ll
A llvm/test/Transforms/InterleavedAccess/AArch64/sve-deinterleave4.ll
A llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleave4.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
A llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/vplan-predicate-switch.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/external-non-inst-use.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/multiple_reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/scalarization-overhead.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/shuffle-vectors-mask-size.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/transpose.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorize-free-extracts-inserts.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/mixed-extracts-types.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-indices.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-unsupported-type.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR32086.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35628_1.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR40310.ll
M llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_vectorizeTree.ll
M llvm/test/Transforms/SLPVectorizer/X86/cse_extractelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/diamond.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-user-instruction-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-many-users-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-subvector-long-input.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-vectorized-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract_in_tree_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-multi-register-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-single-use-many-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-vector-ops-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/extracts-with-undefs.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-delayed-nodes-with-reused-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gep-with-extractelement-many-users.ll
M llvm/test/Transforms/SLPVectorizer/X86/geps-non-pow-2.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/insertelement-uses-vectorized-index.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-drop-wrapping-flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/ordering-bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr27163.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-value-replace-extractelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-value-in-tree.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reordering-single-phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/replaced-external-in-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-scalar-in-same-phi-extract.ll
M llvm/test/Transforms/SLPVectorizer/X86/scalarization-overhead.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-throttle.ll
M llvm/test/Transforms/StructurizeCFG/AMDGPU/uniform-regions.ll
M llvm/test/tools/llvm-readobj/ELF/note-core.test
M llvm/test/tools/yaml2obj/ELF/DWARF/debug-info.yaml
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/obj2yaml/dwarf2yaml.cpp
M llvm/unittests/CodeGen/MLRegAllocDevelopmentFeatures.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/Support/KnownBitsTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp
M llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Conversion/VectorToSCF/VectorToSCF.h
M mlir/include/mlir/Dialect/DLTI/CMakeLists.txt
M mlir/include/mlir/Dialect/DLTI/DLTI.h
A mlir/include/mlir/Dialect/DLTI/TransformOps/CMakeLists.txt
A mlir/include/mlir/Dialect/DLTI/TransformOps/DLTITransformOps.h
A mlir/include/mlir/Dialect/DLTI/TransformOps/DLTITransformOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/include/mlir/Dialect/Mesh/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Mesh/IR/MeshBase.td
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
A mlir/include/mlir/Dialect/Mesh/IR/TensorShardingInterfaceImpl.h
M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.h
M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.td
M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterfaceImpl.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/include/mlir/Dialect/Utils/IndexingUtils.h
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/include/mlir/InitAllDialects.h
M mlir/include/mlir/InitAllExtensions.h
M mlir/include/mlir/Interfaces/InferTypeOpInterface.h
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/AsmParser/TypeParser.cpp
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Dialect/DLTI/CMakeLists.txt
M mlir/lib/Dialect/DLTI/DLTI.cpp
A mlir/lib/Dialect/DLTI/TransformOps/CMakeLists.txt
A mlir/lib/Dialect/DLTI/TransformOps/DLTITransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/MeshShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Interfaces/CMakeLists.txt
M mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp
A mlir/lib/Dialect/Mesh/Interfaces/TensorShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Mesh/Transforms/ShardingPropagation.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Transforms/Utils/RegionUtils.cpp
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir
M mlir/test/Conversion/MathToSPIRV/math-to-opencl-spirv.mlir
M mlir/test/Conversion/SCFToControlFlow/convert-to-cfg.mlir
M mlir/test/Conversion/VectorToSCF/tensor-transfer-ops.mlir
M mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir
A mlir/test/Dialect/DLTI/query.mlir
M mlir/test/Dialect/Linalg/generalize-named-ops.mlir
M mlir/test/Dialect/Linalg/mesh-sharding-propagation.mlir
M mlir/test/Dialect/Linalg/mesh-spmdization.mlir
M mlir/test/Dialect/Mesh/canonicalization.mlir
M mlir/test/Dialect/Mesh/invalid.mlir
M mlir/test/Dialect/Mesh/ops.mlir
M mlir/test/Dialect/Mesh/resharding-spmdization.mlir
M mlir/test/Dialect/Mesh/sharding-propagation.mlir
M mlir/test/Dialect/Mesh/simplifications.mlir
M mlir/test/Dialect/Mesh/spmdization.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
A mlir/test/Dialect/Tensor/mesh-spmdization.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/IR/invalid-builtin-types.mlir
A mlir/test/Target/LLVMIR/Import/ident.ll
A mlir/test/Target/LLVMIR/ident.mlir
M mlir/test/lib/Dialect/Mesh/TestReshardingSpmdization.cpp
M mlir/test/python/ir/builtin_types.py
M mlir/tools/mlir-tblgen/OmpOpGen.cpp
M mlir/unittests/Support/CyclicReplacerCacheTest.cpp
M openmp/runtime/src/kmp_affinity.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.5-bogner
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/f9e30aa4b58b...f1ead021fb81
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