[all-commits] [llvm/llvm-project] ca7ad3: [RISCV] Remove riscv-experimental-rv64-legal-i32. ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ca7ad38ca0d241658da04bcfa63598b5519026f2
      https://github.com/llvm/llvm-project/commit/ca7ad38ca0d241658da04bcfa63598b5519026f2
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-09 (Fri, 09 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/alu32.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/condops.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/div.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/imm.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/mem.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/mem64.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/rem.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64xtheadbb.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zba.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbb-intrinsic.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbb-zbkb.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbb.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbc-intrinsic.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbc-zbkc-intrinsic.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbkb-intrinsic.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbkb.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbs.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/sadd_sat.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/sadd_sat_plus.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/ssub_sat.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/ssub_sat_plus.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/uadd_sat.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/uadd_sat_plus.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/usub_sat.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/usub_sat_plus.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/vararg.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/xaluo.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/xtheadmac.ll
    R llvm/test/CodeGen/RISCV/rv64-legal-i32/xtheadmemidx.ll
    M llvm/test/CodeGen/RISCV/shl-cttz.ll

  Log Message:
  -----------
  [RISCV] Remove riscv-experimental-rv64-legal-i32. (#102509)

This has received no development work in a while and is slowly bit
rotting as new extensions are added.

At the moment, I don't think this is viable without adding a new
invariant that 32 bit values are always in sign extended form like
Mips64 does. We are very dependent on computeKnownBits and
ComputeNumSignBits in SelectionDAG to remove sign extends created for
ABI reasons. If we can't propagate sign bit information through 64-bit
values in SelectionDAG, we can't effectively clean up those extends.



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