[all-commits] [llvm/llvm-project] 7b03fd: [X86] Add basic computeKnownBits support for X86IS...
Simon Pilgrim via All-commits
all-commits at lists.llvm.org
Fri Aug 9 01:33:20 PDT 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 7b03fdbd560ca10bc7873a4887eda3cc6738d186
https://github.com/llvm/llvm-project/commit/7b03fdbd560ca10bc7873a4887eda3cc6738d186
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-09 (Fri, 09 Aug 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-sub.ll
M llvm/test/CodeGen/X86/ctlo.ll
M llvm/test/CodeGen/X86/ctlz.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/lzcnt-cmp.ll
M llvm/test/CodeGen/X86/pr38539.ll
M llvm/test/CodeGen/X86/pr40090.ll
M llvm/test/CodeGen/X86/scheduler-backtracking.ll
Log Message:
-----------
[X86] Add basic computeKnownBits support for X86ISD::BSR (#102474)
Resurrect https://reviews.llvm.org/D89214 (by @topperc)
The behaviour is undefined for an input of 0, otherwise the result is the position of the most significant set bit which must be in the range [0, bitwidth-1]. So any bits above log2 of bitwidth must be 0.
Fixes #74101
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