[all-commits] [llvm/llvm-project] 50a2b3: [ARM] Be more precise about conditions for indirec...

[Oliver Stannard via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 50a2b31800a554b35367a5f3bcebb640703a48e1
      https://github.com/llvm/llvm-project/commit/50a2b31800a554b35367a5f3bcebb640703a48e1
  Author: Oliver Stannard <oliver.stannard at arm.com>
  Date:   2024-08-09 (Fri, 09 Aug 2024)

  Changed paths:
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    A llvm/test/CodeGen/Thumb2/indirect-tail-call-free-registers.ll

  Log Message:
  -----------
  [ARM] Be more precise about conditions for indirect tail-calls (#102451)

This code was trying to predict the conditions in which an indirect
tail call will have a free register to hold the target address, and
falling back to a non-tail call if all non-callee-saved registers are
used for arguments or return address authentication.

However, it was only taking the number of arguments into account, not
which registers they are allocated to, so floating-point arguments could
cause this to give the wrong result, causing either a later error due to
the lack of a free register, or a missed optimisation of not doing the
tail call.

The assignments of arguments to registers is available at this point in
the code, so we can calculate exactly which registers will be available
for the tail-call.



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