[all-commits] [llvm/llvm-project] 7a51dd: InferAddressSpaces: Improve handling of instructio...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7a51dde4e67396967eccbf093cb6a0237d0fcb76
      https://github.com/llvm/llvm-project/commit/7a51dde4e67396967eccbf093cb6a0237d0fcb76
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-08-08 (Thu, 08 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
    M llvm/test/Transforms/InferAddressSpaces/AMDGPU/store-pointer-to-self.ll

  Log Message:
  -----------
  InferAddressSpaces: Improve handling of instructions with multiple pointer uses (#101922)

The use list iteration worked correctly for the load and store case. The atomic
instructions happen to have the pointer value as the last visited operand, but we
rejected the instruction as simple after the first encountered use.

Ignore the use list for the recognized load/store/atomic instructions, and just
try to directly replace the known pointer use.



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