[all-commits] [llvm/llvm-project] 82f52d: [RISCV] Support new groupid/bitmask for cpu_model ...
Piyou Chen via All-commits
all-commits at lists.llvm.org
Wed Aug 7 23:43:02 PDT 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 82f52d9c42d926e23955b42128abff064825d6c8
https://github.com/llvm/llvm-project/commit/82f52d9c42d926e23955b42128abff064825d6c8
Author: Piyou Chen <piyou.chen at sifive.com>
Date: 2024-08-08 (Thu, 08 Aug 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/builtin-cpu-supports.c
M compiler-rt/lib/builtins/cpu_model/riscv.c
M llvm/include/llvm/TargetParser/RISCVISAInfo.h
M llvm/lib/TargetParser/RISCVISAInfo.cpp
Log Message:
-----------
[RISCV] Support new groupid/bitmask for cpu_model (#101632)
The spec can be found at
https://github.com/riscv-non-isa/riscv-c-api-doc/pull/74.
1. Add the new extension GroupID/Bitmask with latest hwprobe key.
2. Update the `initRISCVFeature `
3. Update `EmitRISCVCpuSupports` due to not only group0 now.
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