[all-commits] [llvm/llvm-project] f838fa: New ThreadPlanSingleThreadTimeout to resolve poten...

Florian Mayer via All-commits all-commits at lists.llvm.org
Wed Aug 7 14:01:30 PDT 2024


  Branch: refs/heads/users/fmayer/spr/main.compiler-rt-memprof-leave-bufferedstacktrace-uninit
  Home:   https://github.com/llvm/llvm-project
  Commit: f838fa820f9271008617c345c477122d9e29a05c
      https://github.com/llvm/llvm-project/commit/f838fa820f9271008617c345c477122d9e29a05c
  Author: jeffreytan81 <jeffreytan at meta.com>
  Date:   2024-08-05 (Mon, 05 Aug 2024)

  Changed paths:
    M lldb/include/lldb/Target/Process.h
    M lldb/include/lldb/Target/StopInfo.h
    M lldb/include/lldb/Target/Thread.h
    M lldb/include/lldb/Target/ThreadPlan.h
    A lldb/include/lldb/Target/ThreadPlanSingleThreadTimeout.h
    M lldb/include/lldb/Target/ThreadPlanStepOut.h
    M lldb/include/lldb/Target/ThreadPlanStepOverRange.h
    M lldb/include/lldb/Target/ThreadPlanStepRange.h
    A lldb/include/lldb/Target/TimeoutResumeAll.h
    M lldb/include/lldb/lldb-enumerations.h
    M lldb/source/API/SBThread.cpp
    M lldb/source/Interpreter/CommandInterpreter.cpp
    M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
    M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
    M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
    M lldb/source/Target/CMakeLists.txt
    M lldb/source/Target/Process.cpp
    M lldb/source/Target/StopInfo.cpp
    M lldb/source/Target/TargetProperties.td
    M lldb/source/Target/Thread.cpp
    M lldb/source/Target/ThreadPlan.cpp
    A lldb/source/Target/ThreadPlanSingleThreadTimeout.cpp
    M lldb/source/Target/ThreadPlanStepInRange.cpp
    M lldb/source/Target/ThreadPlanStepOverRange.cpp
    M lldb/source/Target/ThreadPlanStepRange.cpp
    A lldb/test/API/functionalities/single-thread-step/Makefile
    A lldb/test/API/functionalities/single-thread-step/TestSingleThreadStepTimeout.py
    A lldb/test/API/functionalities/single-thread-step/main.cpp
    M lldb/tools/lldb-dap/JSONUtils.cpp
    M lldb/tools/lldb-dap/LLDBUtils.cpp

  Log Message:
  -----------
  New ThreadPlanSingleThreadTimeout to resolve potential deadlock in single thread stepping (#90930)

This PR introduces a new `ThreadPlanSingleThreadTimeout` that will be
used to address potential deadlock during single-thread stepping.

While debugging a target with a non-trivial number of threads (around
5000 threads in one example target), we noticed that a simple step over
can take as long as 10 seconds. Enabling single-thread stepping mode
significantly reduces the stepping time to around 3 seconds. However,
this can introduce deadlock if we try to step over a method that depends
on other threads to release a lock.

To address this issue, we introduce a new
`ThreadPlanSingleThreadTimeout` that can be controlled by the
`target.process.thread.single-thread-plan-timeout` setting during
single-thread stepping mode. The concept involves counting the elapsed
time since the last internal stop to detect overall stepping progress.
Once a timeout occurs, we assume the target is not making progress due
to a potential deadlock, as mentioned above. We then send a new async
interrupt, resume all threads, and `ThreadPlanSingleThreadTimeout`
completes its task.

To support this design, the major changes made in this PR are:
1. `ThreadPlanSingleThreadTimeout` is popped during every internal stop
and reset (re-pushed) to the top of the stack (as a leaf node) during
resume. This is achieved by always returning `true` from
`ThreadPlanSingleThreadTimeout::DoPlanExplainsStop()` and
`ThreadPlanSingleThreadTimeout::MischiefManaged()`.
2. A new thread-specific async interrupt stop is introduced, which can
be detected/consumed by `ThreadPlanSingleThreadTimeout`.
3. The clearing of branch breakpoints in the range thread plan has been
moved from `DoPlanExplainsStop()` to `ShouldStop()`, as it is not
guaranteed that it will be called.

The detailed design is discussed in the RFC below:

[https://discourse.llvm.org/t/improve-single-thread-stepping/74599](https://discourse.llvm.org/t/improve-single-thread-stepping/74599)

---------

Co-authored-by: jeffreytan81 <jeffreytan at fb.com>


  Commit: d1d3e22b688f01cfbe401be1e161373572b68ae8
      https://github.com/llvm/llvm-project/commit/d1d3e22b688f01cfbe401be1e161373572b68ae8
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/utils/gn/secondary/lldb/source/Target/BUILD.gn

  Log Message:
  -----------
  [gn build] Port f838fa820f92


  Commit: 8ec3049e67a830cd35b46d4a33e8305569c5312f
      https://github.com/llvm/llvm-project/commit/8ec3049e67a830cd35b46d4a33e8305569c5312f
  Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
  Date:   2024-08-05 (Mon, 05 Aug 2024)

  Changed paths:
    M compiler-rt/lib/scudo/standalone/CMakeLists.txt
    R compiler-rt/lib/scudo/standalone/benchmarks/CMakeLists.txt
    R compiler-rt/lib/scudo/standalone/benchmarks/malloc_benchmark.cpp

  Log Message:
  -----------
  [scudo] Remove benchmarks file. (#102077)

The benchmarks have never been used, and don't really provide much
useful information. So remove them completely.


  Commit: f30188797453fc9bccb0ba9e8bdb8fd47369dfa7
      https://github.com/llvm/llvm-project/commit/f30188797453fc9bccb0ba9e8bdb8fd47369dfa7
  Author: Freddy Ye <freddy.ye at intel.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
    M llvm/lib/Target/X86/X86DomainReassignment.cpp
    M llvm/lib/Target/X86/X86RegisterInfo.cpp
    M llvm/test/CodeGen/X86/apx/and.ll
    M llvm/test/CodeGen/X86/apx/cmov.ll
    M llvm/test/CodeGen/X86/apx/mul-i1024.ll
    M llvm/test/CodeGen/X86/apx/or.ll
    M llvm/test/CodeGen/X86/apx/shift-eflags.ll
    M llvm/test/CodeGen/X86/apx/sub.ll
    M llvm/test/CodeGen/X86/apx/xor.ll
    M llvm/test/CodeGen/X86/cmp.ll
    M llvm/test/CodeGen/X86/popcnt.ll
    M llvm/test/CodeGen/X86/select_const_i128.ll
    M llvm/utils/TableGen/RegisterInfoEmitter.cpp

  Log Message:
  -----------
  [X86][RA] Add two address hints for compressible NDD instructions. (#98603)

To address @topperc 's comment at
https://discourse.llvm.org/t/rfc-design-for-apx-feature-egpr-and-ndd-support/73031/5?u=kanrobert


  Commit: 5e1a5ffc2a464bc472ad92852e90de2f75c90eed
      https://github.com/llvm/llvm-project/commit/5e1a5ffc2a464bc472ad92852e90de2f75c90eed
  Author: Fangrui Song <i at maskray.me>
  Date:   2024-08-05 (Mon, 05 Aug 2024)

  Changed paths:
    M llvm/include/llvm/MC/MCELFObjectWriter.h
    M llvm/lib/MC/ELFObjectWriter.cpp
    M llvm/lib/MC/MCELFObjectTargetWriter.cpp
    M llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
    M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp

  Log Message:
  -----------
  [MC,ARM] Move SHF_ARM_PUECODE change for .text to ARMTargetELFStreamer::finish

and remove MCELFObjectWriter::addTargetSectionFlags.


  Commit: 7f76287ed1a0da3e586696befe0ad77310ceb15b
      https://github.com/llvm/llvm-project/commit/7f76287ed1a0da3e586696befe0ad77310ceb15b
  Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
  Date:   2024-08-05 (Mon, 05 Aug 2024)

  Changed paths:
    M libc/newhdrgen/yaml_to_classes.py

  Log Message:
  -----------
  [libc] undo execution bit change (#102083)

CI seems to stop running after the execution bit is set. Undo the change
to see if it recovers CI.


  Commit: 5c56b46a32a8856a022a54291bc9294068f7ddbd
      https://github.com/llvm/llvm-project/commit/5c56b46a32a8856a022a54291bc9294068f7ddbd
  Author: Steven Wu <stevenwu at apple.com>
  Date:   2024-08-05 (Mon, 05 Aug 2024)

  Changed paths:
    M clang-tools-extra/clang-tidy/tool/CMakeLists.txt
    M clang/tools/clang-linker-wrapper/CMakeLists.txt
    M clang/tools/clang-repl/CMakeLists.txt
    M clang/tools/driver/CMakeLists.txt
    M clang/unittests/Interpreter/CMakeLists.txt
    M clang/unittests/Interpreter/ExceptionTests/CMakeLists.txt
    M flang/tools/flang-driver/CMakeLists.txt
    M lld/tools/lld/CMakeLists.txt
    M llvm/CMakeLists.txt
    M llvm/cmake/modules/AddLLVM.cmake
    M llvm/examples/ExceptionDemo/CMakeLists.txt
    M llvm/examples/HowToUseLLJIT/CMakeLists.txt
    M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter1/CMakeLists.txt
    M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter2/CMakeLists.txt
    M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter3/CMakeLists.txt
    M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter4/CMakeLists.txt
    M llvm/examples/Kaleidoscope/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter4/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter5/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter6/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter7/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter8/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter9/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITDumpObjects/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITRemovableCode/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithCustomObjectLinkingLayer/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithGDBRegistrationListener/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithInitializers/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithLazyReexports/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithObjectCache/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithObjectLinkingLayerPlugin/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithOptimizingIRTransform/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithThinLTOSummaries/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsAddObjectFile/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsBasicUsage/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsDumpObjects/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsIRTransforms/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsLazy/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsRemovableCode/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsVeryLazy/CMakeLists.txt
    M llvm/tools/bugpoint/CMakeLists.txt
    M llvm/tools/llc/CMakeLists.txt
    M llvm/tools/lli/CMakeLists.txt
    M llvm/tools/lli/ChildTarget/CMakeLists.txt
    M llvm/tools/llvm-jitlink/CMakeLists.txt
    M llvm/tools/llvm-jitlink/llvm-jitlink-executor/CMakeLists.txt
    M llvm/tools/llvm-lto2/CMakeLists.txt
    M llvm/tools/opt/CMakeLists.txt
    M llvm/unittests/Analysis/CMakeLists.txt
    M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
    M llvm/unittests/Passes/Plugins/CMakeLists.txt
    M llvm/unittests/Support/DynamicLibrary/CMakeLists.txt
    M mlir/tools/mlir-cpu-runner/CMakeLists.txt
    M mlir/tools/mlir-opt/CMakeLists.txt

  Log Message:
  -----------
  [CMake] Fold export_executable_symbols_* into function args. (#101741)

`LLVM_ENABLE_EXPORTED_SYMBOLS_IN_EXECUTABLES` is not completely
compatible with `export_executable_symbols` as the later will be ignored
if the previous is set to NO.

 Fix the issue by passing if symbols need to be exported to
`llvm_add_exectuable` so the link flag can be determined directly
without calling `export_executable_symbols_*` later.


  Commit: fbee8d5a65defae402f98794d778fe724d24cc51
      https://github.com/llvm/llvm-project/commit/fbee8d5a65defae402f98794d778fe724d24cc51
  Author: Ivan R. Ivanov <ivanov.i.aa at m.titech.ac.jp>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
    M mlir/lib/Target/LLVMIR/ModuleImport.cpp
    M mlir/test/Target/LLVMIR/Import/global-variables.ll

  Log Message:
  -----------
  [MLIR][LLVM] Allow importing of nameless globals (#101918)

LLVM allows nameless globals for private global variables whereas in
MLIR globals must be addressed using symbols. We attach symbols to
nameless globals in order to enable their import.

---------

Co-authored-by: Christian Ulmann <christianulmann at gmail.com>


  Commit: c41da1457051f239b153b798017938ce8e3d2405
      https://github.com/llvm/llvm-project/commit/c41da1457051f239b153b798017938ce8e3d2405
  Author: zhongyunde 00443407 <zhongyunde at huawei.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    A llvm/test/Transforms/InstSimplify/select-icmp.ll

  Log Message:
  -----------
  [tests] precommit tests for ValueTracking

x-y+1 is positive when x > y, so abs (x-y+1) --> x-y+1

Fixes https://github.com/llvm/llvm-project/issues/54735


  Commit: 30237130145d33be18ffa85b2145110c09d6cb1f
      https://github.com/llvm/llvm-project/commit/30237130145d33be18ffa85b2145110c09d6cb1f
  Author: zhongyunde 00443407 <zhongyunde at huawei.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/test/Transforms/InstSimplify/select-icmp.ll

  Log Message:
  -----------
  [ValueTracking] Infer relationship for the select with ICmp

x -nsw y < -C is false when x > y and C >= 0
Alive2 proof for sgt, sge : https://alive2.llvm.org/ce/z/tupvfi
Note: It only really makes sense in the context of signed comparison for
      "X - Y must be positive if X >= Y and no overflow".

Fixes https://github.com/llvm/llvm-project/issues/54735


  Commit: 2bd568feccff9760938849e79289af67c3e6c231
      https://github.com/llvm/llvm-project/commit/2bd568feccff9760938849e79289af67c3e6c231
  Author: zhongyunde 00443407 <zhongyunde at huawei.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/test/Transforms/InstSimplify/select-icmp.ll

  Log Message:
  -----------
  [ValueTracking] Infer relationship for the select with SLT


  Commit: 7a0d5bd6df332f08faea64f0ee621eae4e791419
      https://github.com/llvm/llvm-project/commit/7a0d5bd6df332f08faea64f0ee621eae4e791419
  Author: NAKAMURA Takumi <geek4civic at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M compiler-rt/lib/asan/asan_errors.cpp

  Log Message:
  -----------
  asan: Fix warnings in #94103 [-Wunused-variable]


  Commit: 33fc322696f438901d4b9a8717317bccfbd37040
      https://github.com/llvm/llvm-project/commit/33fc322696f438901d4b9a8717317bccfbd37040
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/SelectionDAG.h
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/test/CodeGen/AArch64/srem-seteq-vec-splat.ll
    A llvm/test/CodeGen/RISCV/rvv/vp-select.ll
    M llvm/test/CodeGen/X86/combine-srem.ll
    M llvm/test/CodeGen/X86/srem-seteq-vec-splat.ll

  Log Message:
  -----------
  [SelectionDAG] Simplify vselect true, T, F -> T (#100992)

This addresses a TODO where we can fold a vselect to it's true operand
if the boolean is known to be all trues, by factoring out the logic from
extractBooleanFlip which checks TLI.getBooleanContents.


  Commit: 874067a22f0f483dbe210d8547c06d564bfa7848
      https://github.com/llvm/llvm-project/commit/874067a22f0f483dbe210d8547c06d564bfa7848
  Author: Younan Zhang <zyn7109 at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Sema/SemaLambda.cpp
    M clang/lib/Sema/SemaTemplateInstantiate.cpp
    M clang/lib/Sema/TreeTransform.h
    A clang/test/SemaCXX/fold_lambda_with_variadics.cpp

  Log Message:
  -----------
  [Sema] Preserve ContainsUnexpandedParameterPack in TransformLambdaExpr (#86265)

The lambda `ContainsUnexpandedParameterPack` flag is used for the
expressions' dependency computing and is therefore essential for pack
expansion. We previously lost the flag's preservation during the
lambda's transform, which caused some issues, e.g. a fold expression
couldn't properly expand inside a template.

This patch alleviates the issue by retaining the flag in more scenarios.
Note that we still have problems with constraints involving packs
regarding lambdas, and dealing with that would take more effort, and
we'd like to fix them in the future.

Fixes https://github.com/llvm/llvm-project/issues/56852
Fixes https://github.com/llvm/llvm-project/issues/85667
Mitigates https://github.com/llvm/llvm-project/issues/99877 because the
attributes were not handled in this patch.

---------

Co-authored-by: Ilya Biryukov <809452+ilya-biryukov at users.noreply.github.com>
Co-authored-by: cor3ntin <corentinjabot at gmail.com>


  Commit: 396343f17b1182ff8ed698beac3f9b93b1d9dabd
      https://github.com/llvm/llvm-project/commit/396343f17b1182ff8ed698beac3f9b93b1d9dabd
  Author: Chen Zheng <czhengsz at cn.ibm.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/utils/extract_symbols.py

  Log Message:
  -----------
  [AIX]export function descriptor symbols related to template functions. (#101920)

This fixes regressions caused by
https://github.com/llvm/llvm-project/pull/97526

After that patch, all undefined references to DS symbol are removed.
This makes DS symbols(for template functions) have no reference in some
cases. So extract_symbols.py does not export these DS symbols for these
cases.

On AIX, exporting the function descriptor depends on references to the
function descriptor itself and the function entry symbol.

Without this fix, on AIX, we get:
```
rtld: 0712-001 Symbol _ZN4llvm15SmallVectorBaseIjE13mallocForGrowEPvmmRm was referenced
      from module llvm-project/build/unittests/Passes/Plugins/TestPlugin.so(), but a runtime definition
            of the symbol was not found. 
```


  Commit: 265fbfa063d0b31b57e7945f5be061b2a4f5baff
      https://github.com/llvm/llvm-project/commit/265fbfa063d0b31b57e7945f5be061b2a4f5baff
  Author: Ahmed Bougacha <ahmed at bougacha.org>
  Date:   2024-08-05 (Mon, 05 Aug 2024)

  Changed paths:
    M clang/test/Driver/print-enabled-extensions/aarch64-apple-a15.c
    M clang/test/Driver/print-enabled-extensions/aarch64-apple-a16.c
    M clang/test/Driver/print-enabled-extensions/aarch64-apple-a17.c
    M clang/test/Driver/print-enabled-extensions/aarch64-apple-m4.c
    M llvm/lib/Target/AArch64/AArch64Features.td
    M llvm/lib/Target/AArch64/AArch64Processors.td
    M llvm/unittests/TargetParser/TargetParserTest.cpp

  Log Message:
  -----------
  [AArch64] Add FPAC to apple- processors that have it. (#102072)

We added FPAC recently in d7e8a7487cd7 to allow ptrauth codegen to rely
on the cpu auth failure checks rather than emitting its own auth failure
check/brk sequence.

Add it to the Apple processors that do have it: A15, A16, A17, M4.

While there, tweak the description to refer to Armv8.3-A rather than
v8.3-A, matching the other features.


  Commit: 421c3fe54b56608bc6b23716d1cac96c8b3c38c5
      https://github.com/llvm/llvm-project/commit/421c3fe54b56608bc6b23716d1cac96c8b3c38c5
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/lib/AST/Interp/Interp.cpp
    M clang/test/AST/Interp/cxx20.cpp

  Log Message:
  -----------
  [clang][Interp] Point 'declared here' note of invalid fns to definition (#102031)


  Commit: 1745c8e08dde9f32d0f0b701d3a6a271697458eb
      https://github.com/llvm/llvm-project/commit/1745c8e08dde9f32d0f0b701d3a6a271697458eb
  Author: Ryotaro KASUGA <kasuga.ryotaro at fujitsu.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/MachinePipeliner.cpp
    A llvm/test/CodeGen/AArch64/sms-order-physreg-deps.mir

  Log Message:
  -----------
  [MachinePipeliner] Fix instruction order with physical register (#99264)

dependencies in same cycle

Dependency checks were insufficient when reordering instructions with
physical register dependencies (i.e. Anti/Output dependencies). This
could result in generating incorrect code.


  Commit: 6e45fa95be9db5318ac7037c673c9b18a48ac5b1
      https://github.com/llvm/llvm-project/commit/6e45fa95be9db5318ac7037c673c9b18a48ac5b1
  Author: Daniil Kovalev <dkovalev at accesssoftek.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/include/clang/Basic/Features.def
    M clang/include/clang/Basic/LangOptions.def
    M clang/include/clang/Basic/PointerAuthOptions.h
    M clang/include/clang/Driver/Options.td
    M clang/lib/CodeGen/CodeGenModule.cpp
    M clang/lib/Driver/ToolChains/Clang.cpp
    M clang/lib/Frontend/CompilerInvocation.cpp
    M clang/lib/Headers/ptrauth.h
    M clang/test/CodeGen/aarch64-elf-pauthabi.c
    A clang/test/CodeGen/ptrauth-init-fini.c
    M clang/test/Driver/aarch64-ptrauth.c
    M clang/test/Preprocessor/ptrauth_feature.c
    M compiler-rt/lib/builtins/crtbegin.c
    M llvm/include/llvm/BinaryFormat/ELF.h
    M llvm/include/llvm/IR/Constants.h
    M llvm/lib/IR/Constants.cpp
    M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
    M llvm/test/CodeGen/AArch64/note-gnu-property-elf-pauthabi.ll
    A llvm/test/CodeGen/AArch64/ptrauth-init-fini.ll
    M llvm/test/tools/llvm-readobj/ELF/AArch64/aarch64-feature-pauth.s
    M llvm/tools/llvm-readobj/ELFDumper.cpp

  Log Message:
  -----------
  [PAC][AArch64] Support init/fini array signing (#96478)

If both `-fptrauth-init-fini` and `-fptrauth-calls` are passed, sign
function pointers in `llvm.global_ctors` and `llvm.global_dtors` with
constant discriminator 0xD9D4
(`ptrauth_string_discriminator("init_fini")`). Additionally, if
`-fptrauth-init-fini-address-discrimination` is passed, address
discrimination is used for signing (otherwise, just constant
discriminator is used).

For address discrimination, we use it's special form since uses of
`llvm.global_{c|d}tors` are disallowed (see
`Verifier::visitGlobalVariable`) and we can't emit `getelementptr`
expressions referencing these special arrays. A signed ctor/dtor pointer
with special address discrimination applied looks like the following:

```
ptr ptrauth (ptr @foo, i32 0, i64 55764, ptr inttoptr (i64 1 to ptr))
```


  Commit: c10b736931a376b86b5344cf79a148a9d1900561
      https://github.com/llvm/llvm-project/commit/c10b736931a376b86b5344cf79a148a9d1900561
  Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/merge-sbuffer-load.mir

  Log Message:
  -----------
  [AMDGPU] Auto-generate lit pattern for test CodeGen/AMDGPU/merge-sbuffer-load.mir. (#101618)


  Commit: 19f379420b7ca5870931c10dd692aa5191878038
      https://github.com/llvm/llvm-project/commit/19f379420b7ca5870931c10dd692aa5191878038
  Author: Harini0924 <79345568+Harini0924 at users.noreply.github.com>
  Date:   2024-08-05 (Mon, 05 Aug 2024)

  Changed paths:
    M lld/test/MachO/lto-object-path.ll

  Log Message:
  -----------
  [llvm-lit] Fix LLD Test when using lit internal shell (#102063)

Resolved the issue in MachO/lto-object-path.ll test where
'ZERO_AR_DATE=0' was not recognized as a command. Changed the test
command to set the environment variable correctly using 'env'. This
allows that the environment variable is set properly, allowing the test
to pass.


  Commit: 37d7b06da03a46e7bbd700e3d247fdb70e97f933
      https://github.com/llvm/llvm-project/commit/37d7b06da03a46e7bbd700e3d247fdb70e97f933
  Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/merge-sbuffer-load.mir

  Log Message:
  -----------
  [AMDGPU][SILoadStoreOptimizer] Include constrained buffer load variants (#101619)

Use the constrained buffer load opcodes while combining under-aligned
loads for XNACK enabled subtargets.


  Commit: 6e4c58052aa79048a8b18099315c7e7c8b1ca46a
      https://github.com/llvm/llvm-project/commit/6e4c58052aa79048a8b18099315c7e7c8b1ca46a
  Author: David Green <david.green at arm.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/abds.ll
    M llvm/test/CodeGen/AArch64/abdu.ll

  Log Message:
  -----------
  [AArch64] Guard against non-vector abd long nodes. (#102026)

This fixes a problem if abd nodes are generated more readily (#92576).
The folding of abd nodes into abdl needs to check that the inputs are
the correct form of vector. The added test requires vector legalization
to occur in order to hit the combine at the wrong time.


  Commit: 3a226dbe27ac7c7d935bc0968e84e31798a01207
      https://github.com/llvm/llvm-project/commit/3a226dbe27ac7c7d935bc0968e84e31798a01207
  Author: Rainer Orth <ro at gcc.gnu.org>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/unittests/BinaryFormat/MachOTest.cpp

  Log Message:
  -----------
  [BinaryFormat] Disable MachOTest.UnalignedLC on SPARC (#100086)

As discussed in Issue #86793, the `MachOTest.UnalignedLC` test dies with
`SIGBUS` on SPARC, a strict-alignment target. It simply cannot work
there. Besides, the test invokes undefined behaviour on big-endian
targets, so this patch disables it on all of those.

Tested on `sparcv9-sun-solaris2.11` and `amd64-pc-solaris2.11`.


  Commit: 41b83ca559c402d238e303c0ac233180d60dcd57
      https://github.com/llvm/llvm-project/commit/41b83ca559c402d238e303c0ac233180d60dcd57
  Author: Kazu Hirata <kazu at google.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M compiler-rt/lib/builtins/crtbegin.c

  Log Message:
  -----------
  [compiler-rt] Fix build errors with gcc

This patch fixes:

  compiler-rt/lib/builtins/crtbegin.c:11:18: error: missing binary
  operator before token "("

  compiler-rt/lib/builtins/crtbegin.c:53:18: error: missing binary
  operator before token "("

  compiler-rt/lib/builtins/crtbegin.c:124:18: error: missing binary
  operator before token "("


  Commit: c2f92fa3ab496a5a8edfe73297ad4f593413af27
      https://github.com/llvm/llvm-project/commit/c2f92fa3ab496a5a8edfe73297ad4f593413af27
  Author: Alexis Engelke <engelke at in.tum.de>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/ADT/GraphTraits.h
    M llvm/include/llvm/Support/GenericDomTree.h
    M llvm/include/llvm/Support/GenericDomTreeConstruction.h
    M llvm/unittests/Support/CMakeLists.txt
    A llvm/unittests/Support/GenericDomTreeTest.cpp

  Log Message:
  -----------
  [Support] Store dominator tree nodes in a vector (#101705)

Use basic block numbers to store dominator tree nodes in a vector. This
avoids frequent map lookups. Use block number epochs to validate that no
renumbering occured since the tree was created; after a renumbering, the
dominator tree can be updated with updateBlockNumbers().

Block numbers, block number epoch, and max block number are fetched via
newly added GraphTraits methods. Graphs which do not implement
getNumber() for blocks will use a DenseMap for an ad-hoc numbering.


  Commit: fa92d51f9e609270bf14c4bc16eb42a98183d27f
      https://github.com/llvm/llvm-project/commit/fa92d51f9e609270bf14c4bc16eb42a98183d27f
  Author: Alexis Engelke <engelke at in.tum.de>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/ExpandVectorPredication.h
    M llvm/include/llvm/CodeGen/Passes.h
    M llvm/include/llvm/LinkAllPasses.h
    M llvm/include/llvm/Passes/MachinePassRegistry.def
    M llvm/lib/CodeGen/ExpandVectorPredication.cpp
    M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
    M llvm/lib/CodeGen/TargetPassConfig.cpp
    M llvm/test/CodeGen/AArch64/O0-pipeline.ll
    M llvm/test/CodeGen/AArch64/O3-pipeline.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
    M llvm/test/CodeGen/ARM/O3-pipeline.ll
    R llvm/test/CodeGen/Generic/expand-vp-fp-intrinsics.ll
    R llvm/test/CodeGen/Generic/expand-vp-gather-scatter.ll
    R llvm/test/CodeGen/Generic/expand-vp-load-store.ll
    R llvm/test/CodeGen/Generic/expand-vp.ll
    M llvm/test/CodeGen/LoongArch/O0-pipeline.ll
    M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
    M llvm/test/CodeGen/PowerPC/O0-pipeline.ll
    M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
    M llvm/test/CodeGen/RISCV/O0-pipeline.ll
    M llvm/test/CodeGen/RISCV/O3-pipeline.ll
    M llvm/test/CodeGen/X86/O0-pipeline.ll
    M llvm/test/CodeGen/X86/opt-pipeline.ll
    A llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-fp-intrinsics.ll
    A llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-gather-scatter.ll
    A llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-load-store.ll
    A llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp.ll
    M llvm/tools/llc/llc.cpp
    M llvm/tools/opt/optdriver.cpp

  Log Message:
  -----------
  [VP] Merge ExpandVP pass into PreISelIntrinsicLowering (#101652)

Similar to #97727; avoid an extra pass over the entire IR by performing
the lowering as part of the pre-isel-intrinsic-lowering pass.


  Commit: d337f5aa59fecd2413b076ed9573e378c57c1307
      https://github.com/llvm/llvm-project/commit/d337f5aa59fecd2413b076ed9573e378c57c1307
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn

  Log Message:
  -----------
  [gn build] Port c2f92fa3ab49


  Commit: b7730a23efb222944b732bbdb3a7b965b7bffd98
      https://github.com/llvm/llvm-project/commit/b7730a23efb222944b732bbdb3a7b965b7bffd98
  Author: Karl-Johan Karlsson <karl-johan.karlsson at ericsson.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/test/SemaHLSL/BuiltIns/length-errors.hlsl

  Log Message:
  -----------
  [test] Avoid writing to a potentially write-protected dir (#102073)

The test length-errors.hlsl don't check the output written to the
current directory. The current directory may be write protected e.g. in
a sandboxed environment.

This patch simply remove the -emit-llvm option as this testcase don't
care about the outputed llvm IR.

Co-authored-by: Chris B <cbieneman at microsoft.com>


  Commit: 37e75cdf9f432940cfbdcab3a3d8d93eba15bca4
      https://github.com/llvm/llvm-project/commit/37e75cdf9f432940cfbdcab3a3d8d93eba15bca4
  Author: Alexis Engelke <engelke at in.tum.de>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
    M llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

  Log Message:
  -----------
  [CodeGen] Use BasicBlock numbers to map to MBBs (#101883)

Now that basic blocks have numbers, we can replace the BB-to-MBB maps
and the visited set during ISel with vectors for faster lookup.


  Commit: 4c23c1b93d8a1e9f7c0eb848d2fe4680650ad999
      https://github.com/llvm/llvm-project/commit/4c23c1b93d8a1e9f7c0eb848d2fe4680650ad999
  Author: Alexis Engelke <engelke at in.tum.de>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/Analysis/RegionInfoImpl.h
    M llvm/include/llvm/CodeGen/MachineBasicBlock.h
    M llvm/lib/CodeGen/MIRSampleProfile.cpp
    M llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp

  Log Message:
  -----------
  [CodeGen] Use SmallVector for MBB preds/succs (#101948)

Avoid extra heap allocations for typical predecessor/successor counts.


  Commit: f57a3a0d9d4817d2ca7c3152dda331a796bebe13
      https://github.com/llvm/llvm-project/commit/f57a3a0d9d4817d2ca7c3152dda331a796bebe13
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M mlir/docs/DefiningDialects/AttributesAndTypes.md

  Log Message:
  -----------
  [mlir][docs] Fix return type in Type/Attr printer docs (#101958)

These return `void`, not `Type` or `Attribute` respectively.


  Commit: 1b8593545316971ac3f922dcb7178623b5820003
      https://github.com/llvm/llvm-project/commit/1b8593545316971ac3f922dcb7178623b5820003
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

  Log Message:
  -----------
  Fix MSVC "not all control paths return a value" warning. NFC.


  Commit: bb59f04e7e75dcbe39f1bf952304a157f0035314
      https://github.com/llvm/llvm-project/commit/bb59f04e7e75dcbe39f1bf952304a157f0035314
  Author: Sam James <sam at gentoo.org>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M lldb/include/lldb/Utility/AddressableBits.h

  Log Message:
  -----------
  [LLDB] Add `<cstdint>` to AddressableBits (#102110)


  Commit: b1234ddbe2652aa7948242a57107ca7ab12fd2f8
      https://github.com/llvm/llvm-project/commit/b1234ddbe2652aa7948242a57107ca7ab12fd2f8
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/AArch64/abds-neg.ll
    M llvm/test/CodeGen/AArch64/abds.ll
    M llvm/test/CodeGen/AArch64/abdu-neg.ll
    M llvm/test/CodeGen/AArch64/abdu.ll
    M llvm/test/CodeGen/AArch64/arm64-vabs.ll
    M llvm/test/CodeGen/AArch64/neon-abd.ll
    M llvm/test/CodeGen/AArch64/sve-aba.ll
    M llvm/test/CodeGen/AArch64/sve-abd.ll
    M llvm/test/CodeGen/AMDGPU/sad.ll
    M llvm/test/CodeGen/ARM/neon_vabd.ll
    M llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
    M llvm/test/CodeGen/PowerPC/vec-zext-abdu.ll
    M llvm/test/CodeGen/RISCV/abds-neg.ll
    M llvm/test/CodeGen/RISCV/abds.ll
    M llvm/test/CodeGen/RISCV/abdu-neg.ll
    M llvm/test/CodeGen/RISCV/abdu.ll
    M llvm/test/CodeGen/RISCV/rvv/abd.ll
    M llvm/test/CodeGen/Thumb2/mve-vabdus.ll
    M llvm/test/CodeGen/X86/abds-neg.ll
    M llvm/test/CodeGen/X86/abds.ll
    M llvm/test/CodeGen/X86/abdu-neg.ll
    M llvm/test/CodeGen/X86/abdu.ll

  Log Message:
  -----------
  [DAG] Add legalization handling for ABDS/ABDU (#92576)

Always match ABD patterns pre-legalization, and use TargetLowering::expandABD to expand again during legalization.

abdu(lhs, rhs) -> sub(xor(sub(lhs, rhs), usub_overflow(lhs, rhs)), usub_overflow(lhs, rhs))
Alive2: https://alive2.llvm.org/ce/z/dVdMyv


  Commit: 8868c02cda875d1efe1646affa01656ef268ffed
      https://github.com/llvm/llvm-project/commit/8868c02cda875d1efe1646affa01656ef268ffed
  Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
    M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir

  Log Message:
  -----------
  [mlir][linalg] Relax tensor.extract vectorization (#99299)

Simplifies the vectorization of tensor.extract so that:
* all cases that read into a genuinely multi-dim vector (*) are
  considered a gather load,
* all other cases are considered as potential contiguous loads.

This change means that the following extraction from a "column" tensor
will be correctly identified as a scalar load followed by a broadcast (rather
than a gather load).

```mlir
func.func @vectorize_scalar_broadcast_column_tensor(%in: tensor<1x1x4xi32>) -> tensor<1x1x4xi32> {
  %c4 = arith.constant 4 : index
  %c0 = arith.constant 0 : index
  %cst = arith.constant dense<[...]> : tensor<15x1xi32>

  %out = linalg.generic {
    indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d1, d2)>],
    iterator_types = ["parallel", "parallel", "parallel"]}
    outs(%in : tensor<1x1x4xi32>) {

  ^bb0(%out: i32):
    %idx_0 = linalg.index 0 : index
    %extracted = tensor.extract %cst[%idx_0, %c0] : tensor<15x1xi32>
    linalg.yield %extracted : i32
  } -> tensor<1x1x4xi32>

  return %out:tensor<1x1x4xi32>
}
```

(*) `vector<1x4x1xf32>` is considered as 1D vector in this context.


  Commit: 3027688a77b5511447b3f060aaecbf30e4b9e63e
      https://github.com/llvm/llvm-project/commit/3027688a77b5511447b3f060aaecbf30e4b9e63e
  Author: Brandon Wu <brandon.wu at sifive.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/include/clang/Basic/riscv_vector.td
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmerge.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vmerge.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vmv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmerge.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vmerge.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vmv.c
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

  Log Message:
  -----------
  [RISCV] Support bf16 vmv.v.v and vmerge.vvm intrinsics with `zvfbfmin` (#101611)

These two intrinsics are supported for f16 with `zvfhmin`, also support
them in bf16 to make it aligned to f16.

This resolve:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/349


  Commit: 6a59deafde742e30daf3bf886f98afc37f00d75b
      https://github.com/llvm/llvm-project/commit/6a59deafde742e30daf3bf886f98afc37f00d75b
  Author: Brandon Wu <brandon.wu at sifive.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/include/clang/Basic/riscv_vector.td
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcompress.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrgather.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vcompress.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vrgather.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vcompress.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrgather.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vcompress.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vrgather.c
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/test/CodeGen/RISCV/rvv/vcompress.ll
    M llvm/test/CodeGen/RISCV/rvv/vrgather.ll

  Log Message:
  -----------
  [RISCV] Support `vrgather` and `vcompress` for `zvfhmin` and `zvfbfmin` (#101633)

Support these in both C intrinsics and CodeGen, they can work with other
intrinsics in `zvfhmin` or `zvfbfmin`.

This resolve:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/350


  Commit: 40c2aaf54e9a7b5c560bb68796d444180ad67b5d
      https://github.com/llvm/llvm-project/commit/40c2aaf54e9a7b5c560bb68796d444180ad67b5d
  Author: Brandon Wu <brandon.wu at sifive.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/include/clang/Basic/riscv_vector.td
    M clang/include/clang/Basic/riscv_vector_common.td
    M clang/include/clang/Support/RISCVVIntrinsicUtils.h
    M clang/lib/Sema/SemaRISCV.cpp
    M clang/utils/TableGen/RISCVVEmitter.cpp

  Log Message:
  -----------
  [RISCV][sema] Correct the requirement of `vf[n|w]cvt.x[|u].f` intrinsics (#101811)

Fix https://github.com/llvm/llvm-project/issues/101526

`vf[n|w]cvt.x[|u].f` for f16 needs `zvfh` instead of `zvfhmin`, current
approach
is not able to detect this. Ultimately we need to add `zvfh` to
RequiredFeatures
to check other intrinsics instead, the type check should be done in
checkRVVTypeSupport.


  Commit: a98a0dcf63f54c54c5601a34c9f8c10cde0162d6
      https://github.com/llvm/llvm-project/commit/a98a0dcf63f54c54c5601a34c9f8c10cde0162d6
  Author: Hari Limaye <hari.limaye at arm.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetFrameLowering.h
    M llvm/lib/CodeGen/PrologEpilogInserter.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.h
    A llvm/test/CodeGen/AArch64/ssve-stack-hazard-remarks.ll
    M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll

  Log Message:
  -----------
  [AArch64] Add streaming-mode stack hazard optimization remarks (#101695)

Emit an optimization remark when objects in the stack frame may cause
hazards in a streaming mode function. The analysis requires either the
`aarch64-stack-hazard-size` or `aarch64-stack-hazard-remark-size` flag
to be set by the user, with the former flag taking precedence.


  Commit: 673604a5398dd1732d23bcd8025987dd66b10947
      https://github.com/llvm/llvm-project/commit/673604a5398dd1732d23bcd8025987dd66b10947
  Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M mlir/docs/Dialects/Vector.md
    M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
    M mlir/test/Dialect/LLVMIR/types.mlir
    M mlir/test/Target/LLVMIR/llvmir-types.mlir

  Log Message:
  -----------
  [mlir][vector] Update docs for scalable vectors (#101842)

Adds a few notes on scalable vectors in the docs for the Vector dialect.
This is mostly "repeating" things from LLVM's LangRef. 

Additionally:

* Adds a few basic tests with scalable vectors (those should've been
  added long time ago),
* Updates a comment in "TypeConverter.cpp" (the current comment is
out-of-date),
* Includes small formatting edits in Vector.md.

**NOTE** Depends on #101813 - only review the top commit


  Commit: c3c2370c9a2465f57849861b13c59566b6f26daf
      https://github.com/llvm/llvm-project/commit/c3c2370c9a2465f57849861b13c59566b6f26daf
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/LoopIdiom/basic.ll
    M llvm/test/Transforms/LoopVectorize/induction.ll
    M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
    M llvm/test/Transforms/LoopVectorize/multiple-strides-vectorization.ll

  Log Message:
  -----------
  [Tests] Regenerate test checks (NFC)


  Commit: 59e13666dd2e81e58253488a29635fb2992ed741
      https://github.com/llvm/llvm-project/commit/59e13666dd2e81e58253488a29635fb2992ed741
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/lib/AST/Interp/Compiler.cpp
    M clang/lib/AST/Interp/Interp.h
    M clang/lib/AST/Interp/Pointer.cpp
    M clang/lib/AST/Interp/Pointer.h
    M clang/test/AST/Interp/c.c

  Log Message:
  -----------
  [clang][Interp] Fix getField() for integral pointers (#102120)

Instead of just adding the Record::Field offset, instead get the
FieldDecl offset in the RecordLayout.

Unfortunately, the offset we pass to the ops here is not made to easily
go back to a FieldDecl, so we have to iterate over the parent Record.


  Commit: 80721e0d6c7793eec699b5846dcf5d3ffff331a8
      https://github.com/llvm/llvm-project/commit/80721e0d6c7793eec699b5846dcf5d3ffff331a8
  Author: Freddy Ye <freddy.ye at intel.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsX86.def
    M clang/lib/Headers/CMakeLists.txt
    A clang/lib/Headers/avx10_2_512satcvtintrin.h
    A clang/lib/Headers/avx10_2satcvtintrin.h
    M clang/lib/Headers/immintrin.h
    M clang/lib/Sema/SemaX86.cpp
    A clang/test/CodeGen/X86/avx10_2_512satcvt-builtins-error.c
    A clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c
    A clang/test/CodeGen/X86/avx10_2satcvt-builtins.c
    M llvm/include/llvm/IR/IntrinsicsX86.td
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.h
    M llvm/lib/Target/X86/X86InstrAVX10.td
    M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
    M llvm/lib/Target/X86/X86InstrUtils.td
    M llvm/lib/Target/X86/X86IntrinsicsInfo.h
    A llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
    A llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
    A llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt
    A llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt
    A llvm/test/MC/X86/avx10.2satcvt-32-att.s
    A llvm/test/MC/X86/avx10.2satcvt-32-intel.s
    A llvm/test/MC/X86/avx10.2satcvt-64-att.s
    A llvm/test/MC/X86/avx10.2satcvt-64-intel.s
    M llvm/test/TableGen/x86-fold-tables.inc

  Log Message:
  -----------
  [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (#101599)

Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965


  Commit: d871b2e0d09b872c57139ee0e24f966d58b92d33
      https://github.com/llvm/llvm-project/commit/d871b2e0d09b872c57139ee0e24f966d58b92d33
  Author: Alexis Engelke <engelke at in.tum.de>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineBasicBlock.h
    M llvm/include/llvm/CodeGen/MachineFunction.h
    M llvm/lib/CodeGen/BasicBlockSections.cpp
    M llvm/lib/CodeGen/MIRSampleProfile.cpp
    M llvm/lib/CodeGen/MachineBlockPlacement.cpp
    M llvm/lib/CodeGen/MachineFunction.cpp
    M llvm/lib/CodeGen/UnreachableBlockElim.cpp
    M llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
    M llvm/lib/Target/CSKY/CSKYConstantIslandPass.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp

  Log Message:
  -----------
  [CodeGen] Use optimized domtree for MachineFunction (#102107)

The dominator tree gained an optimization to use block numbers instead
of a DenseMap to store blocks. Given that machine basic blocks already
have numbers, expose these via appropriate GraphTraits. For debugging,
block number epochs are added to MachineFunction -- this greatly helps
in finding uses of block numbers after RenumberBlocks().

In a few cases where dominator trees are preserved across renumberings,
the dominator tree is updated to use the new numbers.


  Commit: aebf0855b627ab0b27b6e1d36d370ff70e72fb4e
      https://github.com/llvm/llvm-project/commit/aebf0855b627ab0b27b6e1d36d370ff70e72fb4e
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    A llvm/test/Transforms/SLPVectorizer/X86/cmp-diff-sized.ll

  Log Message:
  -----------
  [SLP][NFC]Add a test with comparison for different sized integer types, NFC.


  Commit: 3b050e89a21d9de48c06636bf8225988685184bd
      https://github.com/llvm/llvm-project/commit/3b050e89a21d9de48c06636bf8225988685184bd
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 80721e0d6c77


  Commit: d798d3b65e018977d5478685e53af85117027874
      https://github.com/llvm/llvm-project/commit/d798d3b65e018977d5478685e53af85117027874
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M libc/spec/gnu_ext.td

  Log Message:
  -----------
  [libc] Fix incorrect tablegen for lgamma


  Commit: 6e60d549d41f5651e9e0eded978810a170d0e42c
      https://github.com/llvm/llvm-project/commit/6e60d549d41f5651e9e0eded978810a170d0e42c
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

  Log Message:
  -----------
  [DAG] Add foldSelectToABD helper. NFC.

Pull out of visitVSELECT to allow reuse in the future.


  Commit: 617cf8a72d2ab568bf0e84452faf4e35a322b32f
      https://github.com/llvm/llvm-project/commit/617cf8a72d2ab568bf0e84452faf4e35a322b32f
  Author: Aaron Ballman <aaron at aaronballman.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/docs/tools/clang-formatted-files.txt
    M clang/lib/Basic/CMakeLists.txt
    M clang/lib/Basic/Targets.cpp
    R clang/lib/Basic/Targets/Le64.cpp
    R clang/lib/Basic/Targets/Le64.h
    M clang/lib/Basic/Targets/OSTargets.h
    M clang/lib/CodeGen/CodeGenModule.cpp
    M clang/lib/CodeGen/ItaniumCXXABI.cpp
    M clang/lib/Driver/ToolChains/Clang.cpp
    M clang/test/CodeGen/bitfield-access-pad.c
    M clang/test/CodeGen/bitfield-access-unit.c
    M clang/test/CodeGenCXX/bitfield-access-empty.cpp
    M clang/test/CodeGenCXX/bitfield-access-tail.cpp
    M clang/test/Preprocessor/predefined-macros-no-warnings.c
    M llvm/include/llvm/TargetParser/Triple.h
    M llvm/lib/TargetParser/Triple.cpp
    M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn

  Log Message:
  -----------
  Reapply "Finish deleting the le32/le64 targets" (#99079) (#101983)

This reverts commit d3f8105c65046173e20c4c59394b4a7f1bbe7627.

Halide no longer relies on this target:
https://github.com/llvm/llvm-project/pull/98497#issuecomment-2253358685


  Commit: d56d808fdcae06af5d704b42b0c237d93aee3857
      https://github.com/llvm/llvm-project/commit/d56d808fdcae06af5d704b42b0c237d93aee3857
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Analysis/BasicAliasAnalysis.cpp
    M llvm/test/Analysis/BasicAA/struct-geps.ll

  Log Message:
  -----------
  [BasicAA] Check nusw instead of inbounds

For the offset scaling, this is sufficient to guarantee nsw. The
other checks for inbounds in this file do need proper inbounds.


  Commit: 4c6a89710a2580f9784408aae81f73d607d9942d
      https://github.com/llvm/llvm-project/commit/4c6a89710a2580f9784408aae81f73d607d9942d
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll

  Log Message:
  -----------
  [SLP][NFC]Update test checks.


  Commit: 936515c7a5607f83aa0684586c7e34ab4b8387ff
      https://github.com/llvm/llvm-project/commit/936515c7a5607f83aa0684586c7e34ab4b8387ff
  Author: OverMighty <its.overmighty at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M libc/config/linux/x86_64/entrypoints.txt
    M libc/docs/math/index.rst
    M libc/spec/stdc.td
    M libc/src/math/CMakeLists.txt
    A libc/src/math/exp2f16.h
    M libc/src/math/generic/CMakeLists.txt
    A libc/src/math/generic/exp2f16.cpp
    M libc/test/src/math/CMakeLists.txt
    A libc/test/src/math/exp2f16_test.cpp
    M libc/test/src/math/performance_testing/CMakeLists.txt
    A libc/test/src/math/performance_testing/exp2f16_perf.cpp
    M libc/test/src/math/smoke/CMakeLists.txt
    A libc/test/src/math/smoke/exp2f16_test.cpp

  Log Message:
  -----------
  [libc][math][c23] Add exp2f16 C23 math function (#101217)

Part of #95250.


  Commit: df0f31315ec1a14f24746d5fbcea99aa67a4846d
      https://github.com/llvm/llvm-project/commit/df0f31315ec1a14f24746d5fbcea99aa67a4846d
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/SLPVectorizer/X86/PR32086.ll

  Log Message:
  -----------
  [SLP][NFC]Update test checks.


  Commit: 295e4f49aefb2b07501be9f845df598b3ee280f1
      https://github.com/llvm/llvm-project/commit/295e4f49aefb2b07501be9f845df598b3ee280f1
  Author: Aaron Ballman <aaron at aaronballman.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/include/clang/Lex/Preprocessor.h
    M clang/lib/Sema/SemaExpr.cpp

  Log Message:
  -----------
  Correct a comment and update a return type; NFC

These changes were inspired by a post-commit review comment:
https://github.com/llvm/llvm-project/pull/97274#pullrequestreview-2220175564


  Commit: a0fa9a308d20786ceb63b5d021c7f643ea2ef1c2
      https://github.com/llvm/llvm-project/commit/a0fa9a308d20786ceb63b5d021c7f643ea2ef1c2
  Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M lldb/packages/Python/lldbsuite/test/make/Makefile.rules

  Log Message:
  -----------
  [LLDB][test] Update Makefile.rules to support Windows host+Linux target (#99266)

These changes aim to support cross-compilation build on Windows host for
Linux target for API tests execution. They're not final: changes will
follow for refactoring and adjustments to make all tests pass.

Chocolatey make is recommended to be used since it is maintained better
than GnuWin32 mentioned here
https://lldb.llvm.org/resources/build.html#windows (latest GnuWin32
release is dated by 2010) and helps to avoid problems with building
tests (for example, GnuWin32 make doesn't support long paths and there
are some other failures with building for Linux with it).

Co-authored-by: Pavel Labath <pavel at labath.sk>


  Commit: f9b69a378cb1acfedab7252b4d4dc3d0af282d0b
      https://github.com/llvm/llvm-project/commit/f9b69a378cb1acfedab7252b4d4dc3d0af282d0b
  Author: Steven Wu <stevenwu at apple.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang-tools-extra/clang-tidy/tool/CMakeLists.txt
    M clang/tools/clang-linker-wrapper/CMakeLists.txt
    M clang/tools/clang-repl/CMakeLists.txt
    M clang/tools/driver/CMakeLists.txt
    M clang/unittests/Interpreter/CMakeLists.txt
    M clang/unittests/Interpreter/ExceptionTests/CMakeLists.txt
    M flang/tools/flang-driver/CMakeLists.txt
    M lld/tools/lld/CMakeLists.txt
    M llvm/CMakeLists.txt
    M llvm/cmake/modules/AddLLVM.cmake
    M llvm/examples/ExceptionDemo/CMakeLists.txt
    M llvm/examples/HowToUseLLJIT/CMakeLists.txt
    M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter1/CMakeLists.txt
    M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter2/CMakeLists.txt
    M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter3/CMakeLists.txt
    M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter4/CMakeLists.txt
    M llvm/examples/Kaleidoscope/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter4/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter5/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter6/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter7/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter8/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter9/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITDumpObjects/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITRemovableCode/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithCustomObjectLinkingLayer/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithGDBRegistrationListener/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithInitializers/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithLazyReexports/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithObjectCache/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithObjectLinkingLayerPlugin/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithOptimizingIRTransform/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithThinLTOSummaries/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsAddObjectFile/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsBasicUsage/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsDumpObjects/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsIRTransforms/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsLazy/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsRemovableCode/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsVeryLazy/CMakeLists.txt
    M llvm/tools/bugpoint/CMakeLists.txt
    M llvm/tools/llc/CMakeLists.txt
    M llvm/tools/lli/CMakeLists.txt
    M llvm/tools/lli/ChildTarget/CMakeLists.txt
    M llvm/tools/llvm-jitlink/CMakeLists.txt
    M llvm/tools/llvm-jitlink/llvm-jitlink-executor/CMakeLists.txt
    M llvm/tools/llvm-lto2/CMakeLists.txt
    M llvm/tools/opt/CMakeLists.txt
    M llvm/unittests/Analysis/CMakeLists.txt
    M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
    M llvm/unittests/Passes/Plugins/CMakeLists.txt
    M llvm/unittests/Support/DynamicLibrary/CMakeLists.txt
    M mlir/tools/mlir-cpu-runner/CMakeLists.txt
    M mlir/tools/mlir-opt/CMakeLists.txt

  Log Message:
  -----------
  Revert "[CMake] Fold export_executable_symbols_* into function args. (#101741)"

This reverts commit 5c56b46a32a8856a022a54291bc9294068f7ddbd. This break
lld build when using GENERATE_DRIVER.


  Commit: daf4a06e5c5531005b275b72681e04bd08e58fe4
      https://github.com/llvm/llvm-project/commit/daf4a06e5c5531005b275b72681e04bd08e58fe4
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
    M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-use-ptr.ll

  Log Message:
  -----------
  [SLP]Try detect strided loads, if any pointer op require extraction.

If any pointer operand of the non-cosencutive loads is an instructions
with the user, which is not part of the current graph, and, thus,
requires emission of the extractelement instruction, better to try to
detect if the load sequence can be repsented as strided load and
extractelement instructions for pointers are not required.

Reviewers: preames, RKSimon, topperc

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/101668


  Commit: 4f067dc467a1f97a1b6ac420926da8bab5f243bf
      https://github.com/llvm/llvm-project/commit/4f067dc467a1f97a1b6ac420926da8bab5f243bf
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/BasicTTIImpl.h
    M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
    M llvm/test/Analysis/CostModel/ARM/arith-ssat.ll
    M llvm/test/Analysis/CostModel/ARM/arith-usat.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll

  Log Message:
  -----------
  TTI: Fix special casing vectorization costs of saturating add/sub (#97463)


  Commit: 2499978aae8398023363a157185c8021c32ea363
      https://github.com/llvm/llvm-project/commit/2499978aae8398023363a157185c8021c32ea363
  Author: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/IntrinsicLowering.cpp
    M llvm/lib/IR/DebugProgramInstruction.cpp
    M llvm/test/DebugInfo/Generic/assignment-tracking/dse/dse-after-memcpyopt-merge.ll
    M llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten-offset.ll
    M llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten.ll
    M llvm/test/DebugInfo/Generic/assignment-tracking/salvage-value.ll

  Log Message:
  -----------
  Convert a couple of undef placeholders to poison [NFC]


  Commit: 6def5170e80c0909206c87bdffa8c6e9e760f5c5
      https://github.com/llvm/llvm-project/commit/6def5170e80c0909206c87bdffa8c6e9e760f5c5
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
    M llvm/test/Transforms/InstCombine/select-icmp-and.ll

  Log Message:
  -----------
   [InstCombine] Fold `(X & Mask) == 0 ? TC : FC -> TC binop (X & Mask)` (#100437)

Alive2: https://alive2.llvm.org/ce/z/d9wV7N


  Commit: 9fb196b469c9cdc5f44c0621b44289137cdd654a
      https://github.com/llvm/llvm-project/commit/9fb196b469c9cdc5f44c0621b44289137cdd654a
  Author: Yeting Kuo <46629943+yetingk at users.noreply.github.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/CMakeLists.txt
    M llvm/lib/Target/RISCV/RISCV.h
    A llvm/lib/Target/RISCV/RISCVIndirectBranchTracking.cpp
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/test/CodeGen/RISCV/O0-pipeline.ll
    M llvm/test/CodeGen/RISCV/O3-pipeline.ll
    M llvm/test/CodeGen/RISCV/jumptable-swguarded.ll
    A llvm/test/CodeGen/RISCV/lpad.ll

  Log Message:
  -----------
  [RISCV] Insert simple landing pad for taken address labels. (#91855)

This patch implements simple landing pad labels ([pr]). When Zicfilp
enabled, this patch inserts `lpad 0` at the beginning of basic blocks
which are possible to be landed by indirect jumps.
This patch also supports option riscv-landing-pad-label to make users
cpable to set nonzero fixed labels. Using nonzero fixed label force
setting t2 before indirect jumps. It's less portable but more strict
than original implementation.

[pr]: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/417


  Commit: de5081c15a2c48d7824b050c5f9cca6ce8ba7c97
      https://github.com/llvm/llvm-project/commit/de5081c15a2c48d7824b050c5f9cca6ce8ba7c97
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 9fb196b469c9


  Commit: e958456840c1663b496e5ee4a44ce73ae780f50d
      https://github.com/llvm/llvm-project/commit/e958456840c1663b496e5ee4a44ce73ae780f50d
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/lib/AST/Interp/Compiler.cpp
    M clang/test/AST/Interp/objc.mm

  Log Message:
  -----------
  [clang][Interp] Ignore ObjCBoxedExpr subexpr... (#102136)

... if it can't be expressed as a constant initializer.


  Commit: a4837fe3c1b3507254b2ce643f9e74db02a56f4b
      https://github.com/llvm/llvm-project/commit/a4837fe3c1b3507254b2ce643f9e74db02a56f4b
  Author: Alexis Engelke <engelke at in.tum.de>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/PreISelIntrinsicLowering.h
    M llvm/include/llvm/Passes/CodeGenPassBuilder.h
    M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
    M llvm/lib/Passes/PassRegistry.def

  Log Message:
  -----------
  [CodeGen] Allow PreISel lowering to run without TM (#102150)

Fixes #101652 after build bot failures where TM in the opt pass builder
is nullptr.


  Commit: f0178d881ce61e82b49fa63dcd023eed57c0804b
      https://github.com/llvm/llvm-project/commit/f0178d881ce61e82b49fa63dcd023eed57c0804b
  Author: Andrey Timonin <112198242+EtoAndruwa at users.noreply.github.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/ADT/STLExtras.h

  Log Message:
  -----------
  [NFC][stlextras] Delete repetition of are (#101977)


  Commit: cee594cf36dc6c737df61e5417a98e09d807bd06
      https://github.com/llvm/llvm-project/commit/cee594cf36dc6c737df61e5417a98e09d807bd06
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/docs/OpenMPSupport.rst
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/AST/OpenMPClause.h
    M clang/include/clang/AST/RecursiveASTVisitor.h
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/Sema/SemaOpenMP.h
    M clang/lib/AST/OpenMPClause.cpp
    M clang/lib/AST/StmtProfile.cpp
    M clang/lib/CodeGen/CGOpenMPRuntime.cpp
    M clang/lib/CodeGen/CGStmtOpenMP.cpp
    M clang/lib/Parse/ParseOpenMP.cpp
    M clang/lib/Sema/SemaOpenMP.cpp
    M clang/lib/Sema/TreeTransform.h
    M clang/lib/Serialization/ASTReader.cpp
    M clang/lib/Serialization/ASTWriter.cpp
    M clang/test/OpenMP/target_teams_ast_print.cpp
    M clang/test/OpenMP/target_teams_distribute_num_teams_messages.cpp
    M clang/test/OpenMP/target_teams_distribute_parallel_for_num_teams_messages.cpp
    M clang/test/OpenMP/teams_num_teams_messages.cpp
    M clang/tools/libclang/CIndex.cpp

  Log Message:
  -----------
  [Clang][Sema][OpenMP] Allow `num_teams` to accept multiple expressions (#99732)

By the OpenMP standard, `num_teams` clause can only accept one
expression (for now). In this patch, we extend it to allow to accept
multiple expressions when it is used with `target teams ompx_bare`
construct. This will allow to launch a multi-dim grid, same as CUDA/HIP.


  Commit: 3c3ea7e751bc18cc8598955bcd853d3c34ffee2d
      https://github.com/llvm/llvm-project/commit/3c3ea7e751bc18cc8598955bcd853d3c34ffee2d
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/X86/cmp-diff-sized.ll

  Log Message:
  -----------
  [SLP]Better sorting of cmp instructions by comparing type sizes.

Currently SLP vectorizer compares cmp instructions by the type id of the
compared operands, which may failed in case of different integer types,
for example, which have same type id, but different sizes. Patch adds
  comparison by type sizes to fix this.

Reviewers: RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/102132


  Commit: bd576fe34285c4dcd04837bf07a89a9c00e3cd5e
      https://github.com/llvm/llvm-project/commit/bd576fe34285c4dcd04837bf07a89a9c00e3cd5e
  Author: Sharadh Rajaraman <r.sharadh at outlook.sg>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/docs/StandardCPlusPlusModules.rst
    M clang/docs/UsersManual.rst
    M clang/include/clang/Driver/Options.td
    A clang/test/Driver/cl-cxx20-modules.cppm

  Log Message:
  -----------
  [clang][driver][clang-cl] Support `--precompile` and `-fmodule-*` options in Clang-CL (#98761)

This PR is the first step in improving the situation for `clang-cl`
detailed in [this LLVM Discourse
thread](https://discourse.llvm.org/t/clang-cl-exe-support-for-c-modules/72257/28).
There has been some work done in #89772. I believe this is somewhat
orthogonal.

This is a work-in-progress; the functionality has only been tested with
the [basic 'Hello World'
example](https://clang.llvm.org/docs/StandardCPlusPlusModules.html#quick-start),
and proper test cases need to be written. I'd like some thoughts on
this, thanks!

Partially resolves #64118.


  Commit: 92a01683cb6633fa8b0b29128ab5937f022dd17c
      https://github.com/llvm/llvm-project/commit/92a01683cb6633fa8b0b29128ab5937f022dd17c
  Author: Mikhail R. Gadelha <mikhail at igalia.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M libc/config/linux/riscv/entrypoints.txt
    M libc/test/src/math/smoke/SetPayloadTest.h

  Log Message:
  -----------
  [libc] Enable more entrypoints for riscv (#102055)

This patch enables more entrypoints for riscv. The changes to the test cases are introduced to support rv32 which has long double but doesn't have int128


  Commit: 048f35037779763963c4b4478a0884e828ea9538
      https://github.com/llvm/llvm-project/commit/048f35037779763963c4b4478a0884e828ea9538
  Author: Siu Chi Chan <siuchi.chan at amd.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M lld/ELF/Writer.cpp
    A lld/test/ELF/hip-section-layout.s

  Log Message:
  -----------
  Move HIP fatbin sections farther away from .text

This would avoid wasting relocation range to jump over the HIP fatbin
sections and therefore alleviate relocation overflow pressure.


  Commit: b809671a4184fb279abf7ae2f75ee9117c13dd60
      https://github.com/llvm/llvm-project/commit/b809671a4184fb279abf7ae2f75ee9117c13dd60
  Author: Kazu Hirata <kazu at google.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/lib/Serialization/ASTReader.cpp

  Log Message:
  -----------
  [Serialization] Fix a warning

This patch fixes:

  clang/lib/Serialization/ASTReader.cpp:11426:13: error: unused
  variable '_' [-Werror,-Wunused-variable]


  Commit: 9684c87d1402ea9327c1abd7f56bafed8e751f51
      https://github.com/llvm/llvm-project/commit/9684c87d1402ea9327c1abd7f56bafed8e751f51
  Author: Slava Zakharin <szakharin at nvidia.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M flang/runtime/copy.cpp

  Log Message:
  -----------
  [flang][runtime] Fixed performance regression in CopyElement. (#102081)

Polyhedron/capacita,protein and CPU2000/facerec,wupwise showed up to
60% regression on x86 after #101421. The memcpy loops of the toAt and
fromAt arrays that are run to create the initial work item end up
being encoded as 'rep mov', and they add noticeable overhead
comparing to the total amount of work. 'rep mov' is not the best
choise for small size memcpy (e.g. when the array rank is 1 or 2,
it would be quite slow). Moreover, the rest of the stack related
setup is also noticeable for the simple cases.

I added a shortcut for the simple copy case, and also got rid
of the initial toAt/fromAt copies by allowing the CopyDescriptor
to use the external subscript storages.


  Commit: 15d4a84e7977725dc0661995963a12ff8605b03c
      https://github.com/llvm/llvm-project/commit/15d4a84e7977725dc0661995963a12ff8605b03c
  Author: Daniil Kovalev <dkovalev at accesssoftek.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/include/clang/Basic/LangOptions.def
    M clang/lib/CodeGen/CodeGenModule.cpp
    M llvm/include/llvm/BinaryFormat/ELF.h
    M llvm/test/CodeGen/AArch64/note-gnu-property-elf-pauthabi.ll
    M llvm/test/tools/llvm-readobj/ELF/AArch64/aarch64-feature-pauth.s
    M llvm/tools/llvm-readobj/ELFDumper.cpp

  Log Message:
  -----------
  [PAC][ELF][AArch64] Encode signed GOT flag in PAuth core info (#96159)

Treat 8th bit of version value for llvm_linux platform as signed GOT
flag.

- clang: define `PointerAuthELFGOT` LangOption and set 8th bit of
  `aarch64-elf-pauthabi-version` LLVM module flag correspondingly;

- llvm-readobj: print `PointerAuthELFGOT` or `!PointerAuthELFGOT` in
  version description of llvm_linux platform depending on whether the flag
  is set.


  Commit: 6250313291c9541abe74142be86a9bb7c0d30974
      https://github.com/llvm/llvm-project/commit/6250313291c9541abe74142be86a9bb7c0d30974
  Author: Mike Rice <michael.p.rice at intel.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/include/clang/Basic/AttributeCommonInfo.h
    M clang/lib/Basic/Attributes.cpp
    M clang/lib/Parse/ParseDecl.cpp
    M clang/test/TableGen/attrs-parser-string-switches.td
    M clang/utils/TableGen/ClangAttrEmitter.cpp

  Log Message:
  -----------
  [clang] Fix compile-time regression from attribute arg checking change (#101768)

In 2acf77f987331c05520c5bfd849326909ffce983 code was added to use the
'full' name including syntax and scope.

Instead of building up a large string for each name, add syntax and
scope checks to the value expression in tablegen.

There is already code to generate expressions for target specific
attributes. This change refactors and adds to that code to include
syntax and scope checks.

The tablegen avoids generating the complicated expression unless there
are two attributes using the same name, otherwise the case values will
be as simple as before.

Removes the currently unused attributeHasStrictIdentifierArgAtIndex
function and the related tablegen.


  Commit: b9183d0d0e24d164d3b57bf81ae911a22094e897
      https://github.com/llvm/llvm-project/commit/b9183d0d0e24d164d3b57bf81ae911a22094e897
  Author: Krystian Stasiowski <sdkrystian at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Sema/SemaDecl.cpp
    M clang/lib/Sema/SemaTemplate.cpp
    M clang/test/CXX/temp/temp.spec/temp.expl.spec/p14-23.cpp

  Log Message:
  -----------
  [Clang][Sema] Ensure that the selected candidate for a member function explicit specialization is more constrained than all others (#101721)

The selection of the most constrained candidate for member function
explicit specializations introduced in #88963 does not check whether the
selected candidate is more constrained than all other candidates, which
can result in ambiguities being undiagnosed. This patch addresses the
issue.


  Commit: 2f28378317827afed81db1c2ce33c187ee6582a0
      https://github.com/llvm/llvm-project/commit/2f28378317827afed81db1c2ce33c187ee6582a0
  Author: Sirui Mu <msrlancern at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M libc/cmake/modules/LLVMLibCTestRules.cmake
    M libc/config/windows/entrypoints.txt
    M libc/docs/overlay_mode.rst

  Log Message:
  -----------
  [libc] Fix builds on Windows (#102162)

This PR changes several places in the CMake scripts to make libc build
on Windows. It adds the `errno` entrypoint to the Windows target.

A mistake in the overlay build doc is also fixed.

Tests still cannot be built on Windows because of the lack of osutils.


  Commit: 2336ef96b3472982cd5709277375395e45910db1
      https://github.com/llvm/llvm-project/commit/2336ef96b3472982cd5709277375395e45910db1
  Author: Joshua Baehring <98630690+JoshuaMBa at users.noreply.github.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M compiler-rt/lib/scudo/standalone/secondary.h

  Log Message:
  -----------
  [scudo] Refactor store() and retrieve(). (#102024)

store() and retrieve() have been refactored so that the scudo headers
are abstracted away from cache operations.


  Commit: 8c6a6f1a707af5bd1afd79d8aa62570b7091801a
      https://github.com/llvm/llvm-project/commit/8c6a6f1a707af5bd1afd79d8aa62570b7091801a
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M libc/utils/gpu/loader/amdgpu/amdhsa-loader.cpp
    M libc/utils/gpu/loader/nvptx/nvptx-loader.cpp

  Log Message:
  -----------
  [libc] Make RPC malloc implementation return 'nullptr' on alloc failure

Summary:
`malloc` is supposed to return `nullptr` if it fails, not exit with an
error code.


  Commit: f949b036610afe56fddde724ee01f64dd79814d3
      https://github.com/llvm/llvm-project/commit/f949b036610afe56fddde724ee01f64dd79814d3
  Author: Jacek Caban <jacek at codeweavers.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/tools/llvm-readobj/ObjDumper.cpp

  Log Message:
  -----------
  [llvm-readobj][NFC] Don't use startLine in a middle of a line in ObjDumper. (#102071)


  Commit: 1d2b6d9d4d1074bac4a6ec48dd0ff4253590e34a
      https://github.com/llvm/llvm-project/commit/1d2b6d9d4d1074bac4a6ec48dd0ff4253590e34a
  Author: Alexis Engelke <engelke at in.tum.de>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/ADT/GraphTraits.h
    M llvm/include/llvm/Support/GenericDomTreeConstruction.h

  Log Message:
  -----------
  [Support] Use block numbers for DomTree construction (#101706)

Similar to #101705, do the same optimization for dominator tree
construction.


  Commit: b7cd564fa3ecc2a9ed0fded98c24f68e2dad63ad
      https://github.com/llvm/llvm-project/commit/b7cd564fa3ecc2a9ed0fded98c24f68e2dad63ad
  Author: Alexis Engelke <engelke at in.tum.de>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/IR/Module.h
    M llvm/lib/IR/AutoUpgrade.cpp
    M llvm/lib/IR/Module.cpp

  Log Message:
  -----------
  [IR] Don't verify module flags on every access (#102153)

8b4306ce050bd5 introduced validity checks for every module flag access,
because the auto-upgrader uses named metadata before verifying the
module.

This causes overhead for all other accesses, and the check is, in fact,
only need at that single place. Change the upgrader to be careful when
accessing module flags before the module is verified and remove the
checks on all other occasions.

There are two tangential optimizations included: first, when querying a
specific flag, don't enumerate all other flags into a vector as well.
Second, don't use a Twine for getNamedMetadata(), which has
materialization overhead -- all call sites use simple strings that can
be implicitly converted to a StringRef.


  Commit: 55ea36002bd364518c20b3ce282640c920697bf7
      https://github.com/llvm/llvm-project/commit/55ea36002bd364518c20b3ce282640c920697bf7
  Author: Krystian Stasiowski <sdkrystian at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/include/clang/AST/ExprCXX.h
    M clang/lib/AST/ASTImporter.cpp
    M clang/lib/AST/ExprCXX.cpp
    M clang/lib/Sema/SemaCoroutine.cpp
    M clang/lib/Sema/SemaDecl.cpp
    M clang/lib/Sema/SemaDeclCXX.cpp
    M clang/lib/Sema/SemaExpr.cpp
    M clang/lib/Sema/SemaExprMember.cpp
    M clang/lib/Sema/SemaOpenMP.cpp
    M clang/lib/Sema/SemaOverload.cpp
    M clang/lib/Sema/SemaTemplate.cpp
    M clang/lib/Sema/TreeTransform.h
    M clang/test/SemaCXX/decltype.cpp

  Log Message:
  -----------
  [Clang][Sema] Make UnresolvedLookupExprs in class scope explicit specializations instantiation dependent (#100392)

A class member named by an expression in a member function that may instantiate to a static _or_ non-static member is represented by a `UnresolvedLookupExpr` in order to defer the implicit transformation to a class member access expression until instantiation. Since `ASTContext::getDecltypeType` only creates a `DecltypeType` that has a `DependentDecltypeType` as its canonical type when the operand is instantiation dependent, and since we do not transform types unless they are instantiation dependent, we need to mark the `UnresolvedLookupExpr` as instantiation dependent in order to correctly build a `DecltypeType` using the expression as its operand with a `DependentDecltypeType` canonical type. Fixes #99873.


  Commit: 0c2ded670652c73cb0245b2a8ec065cd1b4f0c6f
      https://github.com/llvm/llvm-project/commit/0c2ded670652c73cb0245b2a8ec065cd1b4f0c6f
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/lib/Parse/ParseOpenMP.cpp
    M clang/lib/Serialization/ASTReader.cpp

  Log Message:
  -----------
  [NFC] Fix compile warning introduced in #99732


  Commit: 1119a0805009501691538a28aeb9bb18b3ff911f
      https://github.com/llvm/llvm-project/commit/1119a0805009501691538a28aeb9bb18b3ff911f
  Author: Yeoul Na <yeoul_na at apple.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/include/clang/Sema/Sema.h
    M clang/lib/Sema/SemaBoundsSafety.cpp
    M clang/lib/Sema/SemaDeclAttr.cpp

  Log Message:
  -----------
  [BoundsSafety][NFC] Remove the unused parameter 'Decls' from 'Sema::C… (#102076)

…heckCountedByAttrOnField'

llvm::SmallVectorImpl<TypeCoupledDeclRefInfo> &Decls is a vector of
declarations referred to by the argument of 'counted_by' attributes and
fields. 'BuildCountAttributedArrayOrPointerType' had been made
self-contained to produce the 'Decls' within itself to allow
'TreeTransform' to invoke the function without having to call
'Sema::CheckCountedByAttrOnField' again. Thus, 'Decls' produced by
`Sema::CheckCountedByAttrOnField` is never used.


  Commit: c826c074813a668de87d4aa8bfc95f9f8adf1e5f
      https://github.com/llvm/llvm-project/commit/c826c074813a668de87d4aa8bfc95f9f8adf1e5f
  Author: Steven Wu <stevenwu at apple.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/test/Modules/crash-vfs-include-pch.m

  Log Message:
  -----------
  [Test] Update clang/test/Modules/crash-vfs-include-pch.m (#102080)

Avoid the driver error for mis-using a clang cc1 flag as driver flag in
the crash test.


  Commit: 3e3ea54aada44212b4e273f2fc879a419dea053f
      https://github.com/llvm/llvm-project/commit/3e3ea54aada44212b4e273f2fc879a419dea053f
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
    M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll

  Log Message:
  -----------
  AMDGPU: Add some leaf intrinsics to isAlwaysUniform (#101925)

These would always be uniform anyway, but it shouldn't hurt to
mark them as always uniform. This will help use TTI::isAlwaysUniform
in place of proper uniformity analysis in trivial situations.


  Commit: 0395bf7636bf0d07f662618107724c28b66c674c
      https://github.com/llvm/llvm-project/commit/0395bf7636bf0d07f662618107724c28b66c674c
  Author: aaryanshukla <53713108+aaryanshukla at users.noreply.github.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M libc/config/darwin/arm/entrypoints.txt
    M libc/config/darwin/x86_64/entrypoints.txt
    M libc/config/linux/aarch64/entrypoints.txt
    M libc/config/linux/arm/entrypoints.txt
    M libc/config/linux/riscv/entrypoints.txt
    M libc/config/linux/x86_64/entrypoints.txt
    M libc/config/windows/entrypoints.txt
    M libc/docs/math/index.rst
    M libc/newhdrgen/yaml/math.yaml
    M libc/spec/llvm_libc_ext.td
    M libc/spec/stdc.td
    M libc/src/math/CMakeLists.txt
    A libc/src/math/fdiv.h
    A libc/src/math/fdivf128.h
    A libc/src/math/fdivl.h
    A libc/src/math/ffma.h
    A libc/src/math/ffmaf128.h
    A libc/src/math/ffmal.h
    M libc/src/math/generic/CMakeLists.txt
    A libc/src/math/generic/fdiv.cpp
    A libc/src/math/generic/fdivf128.cpp
    A libc/src/math/generic/fdivl.cpp
    A libc/src/math/generic/ffma.cpp
    A libc/src/math/generic/ffmaf128.cpp
    A libc/src/math/generic/ffmal.cpp
    M libc/test/src/math/CMakeLists.txt
    A libc/test/src/math/fdiv_test.cpp
    A libc/test/src/math/fdivl_test.cpp
    A libc/test/src/math/ffma_test.cpp
    A libc/test/src/math/ffmal_test.cpp
    M libc/test/src/math/smoke/CMakeLists.txt
    M libc/test/src/math/smoke/DivTest.h
    A libc/test/src/math/smoke/fdiv_test.cpp
    A libc/test/src/math/smoke/fdivf128_test.cpp
    A libc/test/src/math/smoke/fdivl_test.cpp
    A libc/test/src/math/smoke/ffma_test.cpp
    A libc/test/src/math/smoke/ffmaf128_test.cpp
    A libc/test/src/math/smoke/ffmal_test.cpp
    M libc/utils/MPFRWrapper/MPFRUtils.cpp

  Log Message:
  -----------
  [libc][math][c23] Add ffma{,l,f128} and fdiv{,l,f128} C23 math functions #101089 (#101253)

- added all variations of ffma and fdiv 
- will add all new headers into yaml  for next patch 
- only fsub is left then all basic operations for float is complete

---------

Co-authored-by: OverMighty <its.overmighty at gmail.com>


  Commit: 31a999c1ad2e24e16b85915b2a47b91627644a9e
      https://github.com/llvm/llvm-project/commit/31a999c1ad2e24e16b85915b2a47b91627644a9e
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/docs/OpenMPSupport.rst

  Log Message:
  -----------
  [Clang][Doc] Fix an error in `OpenMPSupport.rst`


  Commit: 85bf0a6b44b9fd375027f5643fa6698001badcf4
      https://github.com/llvm/llvm-project/commit/85bf0a6b44b9fd375027f5643fa6698001badcf4
  Author: Alexis Engelke <engelke at in.tum.de>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp

  Log Message:
  -----------
  [CodeGen] Fix PreISelLowering not reporting changes (#102184)

expandVectorPredication may change code, even if the intrinsic itself
remains in the code. Report changes whenever such an intrinsic is
encountered, because code could have been changed.

Another follow-up fix for #101652 to fix expensive-checks-only failure.


  Commit: f55abd545d9ec26e14c7a45727c16fc97b46db3c
      https://github.com/llvm/llvm-project/commit/f55abd545d9ec26e14c7a45727c16fc97b46db3c
  Author: gonzalobg <65027571+gonzalobg at users.noreply.github.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
    M llvm/lib/Target/NVPTX/NVPTX.h
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    M llvm/lib/Target/NVPTX/NVPTXUtilities.h
    M llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
    M llvm/test/CodeGen/NVPTX/load-store.ll

  Log Message:
  -----------
  [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (#98551)

This PR Builds on #98022 .
It adds support for Volta's SequentiallyConsistent Load and Store
operations at system scope.


  Commit: 642259a2f21feffb0dc048162b4ce40b1e5a303d
      https://github.com/llvm/llvm-project/commit/642259a2f21feffb0dc048162b4ce40b1e5a303d
  Author: Mark de Wever <koraq at xs4all.nl>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M libcxx/test/std/time/time.cal/time.cal.ymdlast/time.cal.ymdlast.nonmembers/comparisons.pass.cpp

  Log Message:
  -----------
  [libc++][chrono][test] Fixes bogus loops. (#101890)

Changes the loop range to match similar tests and avoids zero
iterations. The original motivation to reduce the number of iterations
was to allow the test to be executed during constant evaluation.

Fixes: https://github.com/llvm/llvm-project/issues/100502


  Commit: 66f4e3f8dbab78d784f776914ac30db09e431b49
      https://github.com/llvm/llvm-project/commit/66f4e3f8dbab78d784f776914ac30db09e431b49
  Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/SandboxIR/SandboxIR.h
    M llvm/lib/SandboxIR/SandboxIR.cpp
    M llvm/unittests/SandboxIR/SandboxIRTest.cpp
    M llvm/unittests/SandboxIR/TrackerTest.cpp

  Log Message:
  -----------
  [SandboxIR] Implement missing PHINode functions (#101734)

replaceIncomingBlockWith and removeIncomingValueIf are both
straightforward and done.

I'll defer copyIncomingBlocks until a couple of other changes that also
handle blocks go in.


  Commit: 4dee6411e0d993fd17099bd7564276474412383e
      https://github.com/llvm/llvm-project/commit/4dee6411e0d993fd17099bd7564276474412383e
  Author: Mark de Wever <koraq at xs4all.nl>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M libcxx/docs/Status/Cxx20Issues.csv
    M libcxx/include/fstream
    M libcxx/include/ios
    M libcxx/include/sstream
    M libcxx/include/string
    M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/default.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/move.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/path.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/pointer.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/string.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/default.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/move.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/path.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/pointer.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/string.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/default.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/move.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/path.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/pointer.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/string.pass.cpp
    M libcxx/test/std/input.output/iostreams.base/ios/basic.ios.members/copyfmt.pass.cpp
    M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/default.pass.cpp
    M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/mode.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/move.pass.cpp
    M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/string-alloc.mode.pass.cpp
    M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/string.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/string.mode.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/string.move.mode.pass.cpp
    M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/string.pass.cpp
    M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/default.pass.cpp
    M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/mode.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/move.pass.cpp
    M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/string-alloc.mode.pass.cpp
    M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/string.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/string.mode.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/string.move.mode.pass.cpp
    M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/string.pass.cpp
    M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/default.pass.cpp
    M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/mode.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/move.pass.cpp
    M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/string-alloc.mode.pass.cpp
    M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/string.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/string.mode.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/string.move.mode.pass.cpp
    M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/string.pass.cpp
    M libcxx/test/std/strings/basic.string/string.cons/move_alloc.pass.cpp
    M libcxx/test/std/strings/basic.string/string.cons/substr_rvalue.pass.cpp
    M libcxx/test/std/strings/basic.string/string.modifiers/string_swap/swap.pass.cpp
    M libcxx/test/support/operator_hijacker.h

  Log Message:
  -----------
  [libc++] Implements LWG3130. (#101889)

This adds addressof at the required places in [input.output]. Some of
the new tests failed since string used operator& internally. These have
been fixed too.

Note the new fstream tests perform output to a basic_string instead of a
double. Using a double requires num_get specialization

num_get<CharT, istreambuf_iterator<CharT,
char_traits_operator_hijacker<CharT>>

This facet is not present in the locale database so the conversion would
fail due to a missing locale facet. Using basic_string avoids using the
locale.

As a drive-by fixes several bugs in the ofstream.cons tests. These
tested ifstream instead of ofstream with an open mode.

Implements:
- LWG3130 [input.output] needs many addressof

Closes #100246.


  Commit: 07b29fc808ca0842d02cf4e973381b974bfdf19f
      https://github.com/llvm/llvm-project/commit/07b29fc808ca0842d02cf4e973381b974bfdf19f
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/IR/ConstantRange.cpp
    M llvm/test/Transforms/CorrelatedValuePropagation/shl.ll
    M llvm/unittests/IR/ConstantRangeTest.cpp

  Log Message:
  -----------
  [ConstantRange] Improve `shlWithNoWrap` (#101800)

Closes https://github.com/dtcxzyw/llvm-tools/issues/22.


  Commit: 5e6d5c01e0ec3a2bc104cba78e9fe8e58360fb6a
      https://github.com/llvm/llvm-project/commit/5e6d5c01e0ec3a2bc104cba78e9fe8e58360fb6a
  Author: Natan-GabrielTiutiuIntel <101411449+Natan-GabrielTiutiuIntel at users.noreply.github.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M mlir/include/mlir/Pass/PassRegistry.h
    M mlir/include/mlir/Tools/mlir-opt/MlirOptMain.h
    M mlir/lib/Pass/PassRegistry.cpp
    M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp

  Log Message:
  -----------
  [mlir] Add --list-passes option to mlir-opt (#100420)

Currently, the only way to see the passes that were registered is by
calling “mlir-opt --help”. However, for compilers with 500+ passes, the
help message becomes too long and sometimes hard to understand. In this
PR I add a new "--list-passes" option to mlir-opt, which can be used for
printing only the registered passes, a feature that would be extremely
useful.


  Commit: 3983bf6040d4a9f477290b1f43fdd1938a4261fe
      https://github.com/llvm/llvm-project/commit/3983bf6040d4a9f477290b1f43fdd1938a4261fe
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M libc/utils/gpu/loader/Loader.h

  Log Message:
  -----------
  [libc] Fix GPU argument vector writing `nullptr` to string

Summary:
The intention behind this code was to null terminate the `envp` string,
but it accidentally went into the string data.


  Commit: e77ac42bccb8c26bbf4b74d8e92eb09e7fa1b218
      https://github.com/llvm/llvm-project/commit/e77ac42bccb8c26bbf4b74d8e92eb09e7fa1b218
  Author: Kevin Frei <freik at meta.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M lldb/include/lldb/Host/Config.h.cmake
    M lldb/packages/Python/lldbsuite/test/decorators.py
    M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
    M lldb/source/API/SBDebugger.cpp
    M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
    M lldb/source/Plugins/SymbolLocator/CMakeLists.txt
    M lldb/source/Plugins/SymbolVendor/ELF/SymbolVendorELF.cpp
    A lldb/test/API/debuginfod/Normal/Makefile
    A lldb/test/API/debuginfod/Normal/TestDebuginfod.py
    A lldb/test/API/debuginfod/Normal/main.c
    A lldb/test/API/debuginfod/SplitDWARF/Makefile
    A lldb/test/API/debuginfod/SplitDWARF/TestDebuginfodDWP.py
    A lldb/test/API/debuginfod/SplitDWARF/main.c

  Log Message:
  -----------
  [lldb][debuginfod] Fix the DebugInfoD PR that caused issues when working with stripped binaries (#99362)

@walter-erquinigo found the the [PR with testing and a fix for
DebugInfoD](https://github.com/llvm/llvm-project/pull/98344) caused an
issue when working with stripped binaries.

The issue is that when you're working with split-dwarf, there are *3*
possible files: The stripped binary the user is debugging, the
"only-keep-debug" *or* unstripped binary, plus the `.dwp` file. The
debuginfod plugin should provide the unstripped/OKD binary. However, if
the debuginfod plugin fails, the default symbol locator plugin will just
return the stripped binary, which doesn't help. So, to address that, the
SymbolVendorELF code checks to see if the SymbolLocator's
ExecutableObjectFile request returned the same file, and bails if that's
the case. You can see the specific diff as the second commit in the PR.

I'm investigating adding a test: I can't quite get a simple repro, and
I'm unwilling to make any additional changes to Makefile.rules to this
diff, for Pavlovian reasons.


  Commit: f133dd92f82238b978d64545302ea753a836f8fb
      https://github.com/llvm/llvm-project/commit/f133dd92f82238b978d64545302ea753a836f8fb
  Author: lntue <35648136+lntue at users.noreply.github.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M libc/src/math/generic/pow.cpp
    M libc/test/src/math/pow_test.cpp

  Log Message:
  -----------
  [libc][math] Improve the error analysis and accuracy for pow function. (#102098)


  Commit: a3ccaed3b9f6a1fe9b7f2ef019259f88072639b2
      https://github.com/llvm/llvm-project/commit/a3ccaed3b9f6a1fe9b7f2ef019259f88072639b2
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    A flang/include/flang/Runtime/CUDA/descriptor.h
    M flang/lib/Optimizer/Transforms/CufOpConversion.cpp
    M flang/runtime/CUDA/CMakeLists.txt
    A flang/runtime/CUDA/descriptor.cpp
    M flang/test/Fir/CUDA/cuda-allocate.fir
    M flang/unittests/Runtime/CUDA/AllocatorCUF.cpp

  Log Message:
  -----------
  [flang][cuda] Allocate local descriptor in managed memory (#102060)

This patch adds entry point in the runtime to be able to allocate
descriptors in managed memory. These entry points currently only call
`CUFAllocManaged` and `CUFFreeManaged` but could be more complicated in
the future.

`cuf.alloc` and `cuf.free` related to local descriptors are converted
into runtime calls.


  Commit: 36f0d64818b39973ef74e1ce49e2f234340ccd1a
      https://github.com/llvm/llvm-project/commit/36f0d64818b39973ef74e1ce49e2f234340ccd1a
  Author: vporpo <vporpodas at google.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/SandboxIR/SandboxIR.h
    M llvm/include/llvm/SandboxIR/SandboxIRValues.def
    M llvm/include/llvm/SandboxIR/Tracker.h
    M llvm/lib/SandboxIR/SandboxIR.cpp
    M llvm/lib/SandboxIR/Tracker.cpp
    M llvm/unittests/SandboxIR/SandboxIRTest.cpp
    M llvm/unittests/SandboxIR/TrackerTest.cpp

  Log Message:
  -----------
  [SandboxIR] Implement AllocaInst (#102027)

This patch implements sandboxir::AllocaInst which mirrors
llvm::AllocaInst.


  Commit: ec1981f4ed86a6f954a5ea0bbfaba1c6cd19d807
      https://github.com/llvm/llvm-project/commit/ec1981f4ed86a6f954a5ea0bbfaba1c6cd19d807
  Author: Andrzej Warzynski <andrzej.warzynski at arm.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M mlir/docs/Dialects/Vector.md

  Log Message:
  -----------
  [mlir][vector] Fix link in docs (nfc)


  Commit: a1af1de4380f9c4fa3b5229e9f4a41af93955c38
      https://github.com/llvm/llvm-project/commit/a1af1de4380f9c4fa3b5229e9f4a41af93955c38
  Author: Michael Liao <michael.hliao at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/test/CodeGen/M68k/pipeline.ll

  Log Message:
  -----------
  [M68k] Fix compilation pipeline check

- After ExpandVP pass is merged into PreISelIntrinsicLowering


  Commit: 2e9f15e1dfd8bc90d0cd91157c8b3b036cee981e
      https://github.com/llvm/llvm-project/commit/2e9f15e1dfd8bc90d0cd91157c8b3b036cee981e
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M libc/utils/gpu/loader/Loader.h

  Log Message:
  -----------
  [libc] Fix index into argument vector


  Commit: a0afcbfb5dd1b65459324aed0a06aed36affa67a
      https://github.com/llvm/llvm-project/commit/a0afcbfb5dd1b65459324aed0a06aed36affa67a
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
    M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
    M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
    M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
    M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll

  Log Message:
  -----------
  [AMDGPU] Enable `AAAddressSpace` in `AMDGPUAttributor` (#101593)


  Commit: 4b6e3e38c46f8fedb92a30b29cc9654450244e2d
      https://github.com/llvm/llvm-project/commit/4b6e3e38c46f8fedb92a30b29cc9654450244e2d
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/IPO/AttributorAttributes.cpp

  Log Message:
  -----------
  [Attributor] Improve debug string of `AAUnderlyingObjects` (#101861)


  Commit: 2601d6f189cf1d4e4e77a7cba83e5d32c87bf079
      https://github.com/llvm/llvm-project/commit/2601d6f189cf1d4e4e77a7cba83e5d32c87bf079
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    A llvm/test/Transforms/SLPVectorizer/X86/extractelement-phi-in-landingpad.ll

  Log Message:
  -----------
  [SLP]Fix PR102187: do not insert extractelement before landingpad instruction.

Landingpad instruction must be the very first instruction after the phi
nodes, so need to inser extractelement/shuffles after this instruction.

Fixes https://github.com/llvm/llvm-project/issues/102187


  Commit: 0371dff99529e93b8650281801e89bc015dc2703
      https://github.com/llvm/llvm-project/commit/0371dff99529e93b8650281801e89bc015dc2703
  Author: Shoaib Meenai <smeenai at fb.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M clang/lib/CodeGen/CGVTables.cpp
    M clang/test/CodeGenCXX/OmitRTTIComponentABI/simple-vtable-definition.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/child-inheritted-from-parent-in-comdat.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-1.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-2.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/diamond-inheritance.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/diamond-virtual-inheritance.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/inheritted-virtual-function.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/inline-virtual-function.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/multiple-inheritance.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/no-alias-when-dso-local.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/override-pure-virtual-method.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/overriden-virtual-function.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/relative-vtables-flag.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/relative-vtables-hwasan.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/simple-vtable-definition.cpp

  Log Message:
  -----------
  [CodeGen] Make non-COMDAT relative vtable internal instead of private (#102056)

When using the relative vtable ABI, if a vtable is not dso_local, it's
given private linkage (if not COMDAT) or hidden visibility (if COMDAT)
to make it dso_local (to place it in rodata instead of data.rel.ro), and
an alias generated with the original linkage and visibility. This alias
could later be removed from the symbol table, e.g. if using a version
script, at which point we lose all symbol information about the vtable.
Use internal linkage instead of private linkage to avoid this.

While I'm here, clarify the comment about why COMDAT vtables can't use
internal (or private) linkage, and associate it with the else block
where hidden visibility is applied instead of internal linkage.


  Commit: 94d53984008bc83083fdc5b2edcd1ea4b8a9b8be
      https://github.com/llvm/llvm-project/commit/94d53984008bc83083fdc5b2edcd1ea4b8a9b8be
  Author: Jacek Caban <jacek at codeweavers.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/BinaryFormat/COFF.h
    M llvm/include/llvm/Object/COFF.h
    M llvm/lib/Object/COFFObjectFile.cpp
    A llvm/test/tools/llvm-readobj/COFF/arm64x-reloc-invalid.yaml
    A llvm/test/tools/llvm-readobj/COFF/arm64x-reloc.yaml
    M llvm/test/tools/yaml2obj/COFF/load-config.yaml
    M llvm/tools/llvm-readobj/COFFDumper.cpp

  Log Message:
  -----------
  [Object][COFF][llvm-readobj] Add support for ARM64X dynamic relocations. (#97229)


  Commit: af80d3a248101d6f5d9d5e229c7899136b8ce0b8
      https://github.com/llvm/llvm-project/commit/af80d3a248101d6f5d9d5e229c7899136b8ce0b8
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll

  Log Message:
  -----------
  [SLP]Better sorting of phi instructions by comparing type sizes (#102188)

Currently SLP vectorizer compares phi instructions by the type id of the
compared instructions, which may failed in case of different integer
types,
with the different sizes. Patch adds comparison by type sizes to fix
this.


  Commit: f9060f1b7ee45ee770d3a7acdeed9f016dcc9931
      https://github.com/llvm/llvm-project/commit/f9060f1b7ee45ee770d3a7acdeed9f016dcc9931
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/Attributor/heap_to_stack_gpu.ll
    M llvm/test/Transforms/Attributor/value-simplify-gpu.ll
    M llvm/test/Transforms/OpenMP/barrier_removal.ll
    M llvm/test/Transforms/PhaseOrdering/varargs.ll

  Log Message:
  -----------
  AMDGPU: Fix using wrong alloca address space in test (#102108)


  Commit: 735edd98d732a492d9c55f137ee50d20e32444d1
      https://github.com/llvm/llvm-project/commit/735edd98d732a492d9c55f137ee50d20e32444d1
  Author: Jacek Caban <jacek at codeweavers.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Object/COFFObjectFile.cpp

  Log Message:
  -----------
  [Object][COFF] Use uintptr_t for getRvaPtr call in Arm64XRelocRef::validate.

Fixes #97229.


  Commit: 0182334e7b9fc472b3f7c9e059c3743301d487d5
      https://github.com/llvm/llvm-project/commit/0182334e7b9fc472b3f7c9e059c3743301d487d5
  Author: Martin Storsjö <martin at martin.st>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
    M llvm/test/MC/ARM/Windows/branch-reloc-offset.s

  Log Message:
  -----------
  [ARM] [Windows] Error out on branch relocations that require a symbol offset (#101906)

This adds the same kind of verification for ARM, as was added for
AArch64 in 1e7f592a890aad860605cf5220530b3744e107ba. This allows
catching issues at assembly time, instead of having the linker
misinterpret the relocations (as the linker ignores the symbol offset).
This verifies that the issue fixed by
8dd065d5bc81b0c8ab57f365bb169a5d92928f25 really is fixed, and points out
explicitly if the same issue appears elsewhere.

Note that the parameter Value in the adjustFixupValue function is offset
by 4 from the value that is stored as immediate in the instructions, so
we compare with 4, when we want to make sure that the written immediate
will be zero.


  Commit: 278c0ad99ef59f227fee3675cdac5bb581e1d6bf
      https://github.com/llvm/llvm-project/commit/278c0ad99ef59f227fee3675cdac5bb581e1d6bf
  Author: Rose Silicon <gfunni234 at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp

  Log Message:
  -----------
  [InstCombine] (NFC) Remove improper TODO for a - UMIN (#101076)

It is already handled in a different method, especially as a - UMIN(a,
b) cannot be handled by a select statement, unless it means something
like: "(c < b) ? b - ((b > c) ? c : b) : 0;" but LLVM handles that case
as well.


  Commit: f9f0ae1bc47fbe76141cce63a6e92e3f3546ec9b
      https://github.com/llvm/llvm-project/commit/f9f0ae1bc47fbe76141cce63a6e92e3f3546ec9b
  Author: Michael Buch <michaelbuch12 at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
    M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.h
    M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.cpp
    M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCDeclVendor.cpp
    M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
    M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
    M lldb/unittests/Symbol/TestClangASTImporter.cpp

  Log Message:
  -----------
  [lldb][TypeSystemClang] Pass ClangASTMetadata around by value (#102161)

This patch changes the return type of `GetMetadata` from a
`ClangASTMetadata*` to a `std::optional<ClangASTMetadata>`. Except for
one call-site (`SetDeclIsForcefullyCompleted`), we never actually make
use of the mutability of the returned metadata. And we never make use of
the pointer-identity. By passing `ClangASTMetadata` by-value (the type
is fairly small, size of 2 64-bit pointers) we'll avoid some questions
surrounding the lifetimes/ownership/mutability of this metadata.

For consistency, we also change the parameter to `SetMetadata` from
`ClangASTMetadata&` to `ClangASTMetadata` (which is an NFC since we copy
the data anyway).

This came up during some changes we plan to make where we [create
redeclaration chains for decls in the LLDB
AST](https://github.com/llvm/llvm-project/pull/95100). We want to avoid
having to dig out the canonical decl of the declaration chain for
retrieving/setting the metadata. It should just be copied across all
decls in the chain. This is easier to guarantee when everything is done
by-value.


  Commit: 10d7805c4f8f2226bee23c4cc021cebc2c56727e
      https://github.com/llvm/llvm-project/commit/10d7805c4f8f2226bee23c4cc021cebc2c56727e
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M flang/include/flang/Runtime/CUDA/allocator.h
    M flang/include/flang/Runtime/CUDA/descriptor.h
    M flang/lib/Optimizer/Transforms/CufOpConversion.cpp
    M flang/runtime/CUDA/allocator.cpp
    M flang/runtime/CUDA/descriptor.cpp
    M flang/unittests/Runtime/CUDA/AllocatorCUF.cpp

  Log Message:
  -----------
  [flang][cuda][NFC] Disambiguate namespace with cuf dialect (#102194)

Rename namespace `Fortran::runtime::cuf` to `Fortran::runtime::cuda` to
avoid embiguity with the namespace `::cuf` that is defined in the CUF
dialect.


  Commit: 388b63243c6846d3bb2e9f4d8cec228756ad1d1b
      https://github.com/llvm/llvm-project/commit/388b63243c6846d3bb2e9f4d8cec228756ad1d1b
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M flang/include/flang/Runtime/CUDA/allocator.h
    M flang/include/flang/Runtime/allocator-registry.h
    M flang/lib/Lower/ConvertVariable.cpp
    M flang/runtime/CUDA/allocator.cpp

  Log Message:
  -----------
  [flang][cuda] Defined allocator for unified data (#102189)

CUDA unified variable where set to use the same allocator than managed
variable. This patch adds a specific allocator for the unified
variables. Currently it will call the managed allocator underneath but
we want to have the flexibility to change that in the future.


  Commit: 28fa83f8d4c0bdd11ba9687a7ffbf50c774a279f
      https://github.com/llvm/llvm-project/commit/28fa83f8d4c0bdd11ba9687a7ffbf50c774a279f
  Author: Han-Chung Wang <hanhan0912 at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
    M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir

  Log Message:
  -----------
  Revert "[mlir][linalg] Relax tensor.extract vectorization" (#102232)

Reverts llvm/llvm-project#99299 because it breaks the lowering. To
repro: `mlir-opt -transform-interpreter ~/repro.mlir`

```mlir
#map = affine_map<(d0, d1) -> (d0)>
#map1 = affine_map<(d0, d1) -> (d1)>
#map2 = affine_map<(d0, d1) -> (d0, d1)>
#map3 = affine_map<(d0, d1) -> (d0 + d1)>
module {
  func.func @foo(%arg0: index, %arg1: tensor<2xf32>, %arg2: tensor<4xf32>, %arg3: tensor<1xf32>) -> tensor<4x1xf32> {
    %c0 = arith.constant 0 : index
    %cst = arith.constant 1.000000e+00 : f32
    %cst_0 = arith.constant 0.000000e+00 : f32
    %0 = tensor.empty() : tensor<4x1xf32>
    %1 = linalg.generic {indexing_maps = [#map, #map1, #map2], iterator_types = ["parallel", "parallel"]} ins(%arg2, %arg3 : tensor<4xf32>, tensor<1xf32>) outs(%0 : tensor<4x1xf32>) {
    ^bb0(%in: f32, %in_1: f32, %out: f32):
      %2 = linalg.index 0 : index
      %3 = linalg.index 1 : index
      %4 = affine.apply #map3(%3, %arg0)
      %extracted = tensor.extract %arg1[%c0] : tensor<2xf32>
      %5 = arith.cmpi eq, %2, %c0 : index
      %6 = arith.cmpi ult, %2, %c0 : index
      %7 = arith.select %5, %cst, %in : f32
      %8 = arith.select %6, %cst_0, %7 : f32
      %9 = arith.cmpi eq, %4, %c0 : index
      %10 = arith.cmpi ult, %4, %c0 : index
      %11 = arith.select %9, %cst, %in_1 : f32
      %12 = arith.select %10, %cst_0, %11 : f32
      %13 = arith.mulf %8, %12 : f32
      %14 = arith.mulf %13, %extracted : f32
      %15 = arith.cmpi eq, %2, %4 : index
      %16 = arith.select %15, %cst, %cst_0 : f32
      %17 = arith.subf %16, %14 : f32
      linalg.yield %17 : f32
    } -> tensor<4x1xf32>
    return %1 : tensor<4x1xf32>
  }
}

module attributes {transform.with_named_sequence} {
  transform.named_sequence @__transform_main(%arg1: !transform.any_op {transform.readonly}) {
    %0 = transform.structured.match ops{["linalg.generic"]} in %arg1 : (!transform.any_op) -> !transform.any_op
    transform.structured.vectorize %0 : !transform.any_op
    transform.yield
  }
}
```


  Commit: 4c97c52fe05bb2fda4584cea4738d59db31329dc
      https://github.com/llvm/llvm-project/commit/4c97c52fe05bb2fda4584cea4738d59db31329dc
  Author: Rahul Joshi <rjoshi at nvidia.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    A llvm/test/TableGen/SubtargetFeatureUniqueNames.td
    M llvm/utils/TableGen/SubtargetEmitter.cpp

  Log Message:
  -----------
  [TableGen] Emit better error message for duplicate Subtarget features. (#102090)

- Keep track of last definition of a feature in a `DenseMap` and use 
  it to report a better error message when a duplicate feature is found.
- Use StringMap instead of a std::map in `EmitStageAndOperandCycleData`
- Add a unit test to check if duplicate names are flagged.


  Commit: 6b47772a4bb5d11f881afcae5f4ef0fd597cd8d8
      https://github.com/llvm/llvm-project/commit/6b47772a4bb5d11f881afcae5f4ef0fd597cd8d8
  Author: Mircea Trofin <mtrofin at google.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
    M llvm/lib/ProfileData/PGOCtxProfReader.cpp
    M llvm/unittests/ProfileData/PGOCtxProfReaderWriterTest.cpp

  Log Message:
  -----------
  [nfc][ctx_prof] Rename `PGOContextualProfile` to `PGOCtxProfContext` (#102209)


  Commit: e7efa323be30dcb604847159817f6c67c657f1a5
      https://github.com/llvm/llvm-project/commit/e7efa323be30dcb604847159817f6c67c657f1a5
  Author: Sam Clegg <sbc at chromium.org>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M lld/test/wasm/lto/stub-library.s
    M lld/wasm/Driver.cpp
    M lld/wasm/InputFiles.cpp

  Log Message:
  -----------
  [lld][WebAssembly] Fix stub library deps causing LTO archive members to be required post-LTO (#101894)

Fixes: https://github.com/emscripten-core/emscripten/issues/16836


  Commit: ce2a3d9042c95630f12b790bf201c4daf8941afb
      https://github.com/llvm/llvm-project/commit/ce2a3d9042c95630f12b790bf201c4daf8941afb
  Author: Kelvin Li <kkwli at users.noreply.github.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M flang/lib/Optimizer/CodeGen/FIROpPatterns.cpp
    M flang/test/Fir/box-typecode.fir
    M flang/test/Fir/convert-to-llvm.fir
    M flang/test/Fir/polymorphic.fir
    M flang/test/Fir/tbaa.fir
    M flang/test/Lower/allocatable-polymorphic.f90

  Log Message:
  -----------
  [flang] Match the type of the element size in the box in getValueFromBox (#100512)

Currently, `%17 = fir.box_elesize %16 :
(!fir.class<!fir.ptr<!fir.type<_QFTt{a:i32,b:i32}>>>) -> i32`
is translated to
```
  %4 = getelementptr { ptr, i64, i32, i8, i8, i8, i8, ptr, [1 x i64] }, ptr %1, i32 0, i32 1
  %5 = load i32, ptr %4, align 4
```
The type of the element size is `i64`. The load essentially truncates
the value and yields incorrect result in the big endian environment. The
problem occurs in the `storage_size` intrinsic on a polymorphic
variable.


  Commit: 0d471b3f64d3116bd57c79d872f7384fff80daa5
      https://github.com/llvm/llvm-project/commit/0d471b3f64d3116bd57c79d872f7384fff80daa5
  Author: weiguozhi <57237827+weiguozhi at users.noreply.github.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetFrameLowering.h
    M llvm/lib/CodeGen/CFIInstrInserter.cpp
    M llvm/lib/CodeGen/PrologEpilogInserter.cpp
    M llvm/lib/Target/X86/X86FrameLowering.cpp
    M llvm/lib/Target/X86/X86FrameLowering.h
    M llvm/test/CodeGen/X86/apx/push2-pop2-vector-register.ll
    M llvm/test/CodeGen/X86/apx/push2-pop2.ll
    M llvm/test/CodeGen/X86/apx/pushp-popp.ll
    M llvm/test/CodeGen/X86/avx512-intel-ocl.ll
    A llvm/test/CodeGen/X86/clobber_base_ptr.ll
    A llvm/test/CodeGen/X86/clobber_frame_ptr.ll
    A llvm/test/CodeGen/X86/clobber_frame_ptr_x32.ll
    M llvm/test/CodeGen/X86/i386-baseptr.ll
    M llvm/test/CodeGen/X86/inline-asm-function-call-pic.ll
    M llvm/test/CodeGen/X86/x86-32-intrcc.ll
    M llvm/test/CodeGen/X86/x86-64-baseptr.ll
    M llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll

  Log Message:
  -----------
  Spill/restore FP/BP around instructions in which they are clobbered (#81048)

This patch fixes https://github.com/llvm/llvm-project/issues/17204.

If a base pointer is used in a function, and it is clobbered by an
instruction (typically an inline asm), current register allocator can't
handle this situation, so BP becomes garbage after those instructions.
It can also occur to FP in theory.

We can spill and reload FP/BP registers around those instructions. But
normal spill/reload instructions also use FP/BP, so we can't spill them
into normal spill slots, instead we spill them into the top of stack by
using SP register.


  Commit: e76028a11fd3195a3170c1b0cb308e62e73a05a3
      https://github.com/llvm/llvm-project/commit/e76028a11fd3195a3170c1b0cb308e62e73a05a3
  Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/test/MC/AMDGPU/gfx10_asm_vop1.s
    M llvm/test/MC/AMDGPU/gfx10_err_pos.s
    M llvm/test/MC/AMDGPU/gfx12_asm_smem.s

  Log Message:
  -----------
  [AMDGPU] Add parseStringOrIntWithPrefix helper in asm parser (#102213)

When we have a modifier with a value (like dst_sel:DWORD for example) we
only accept symbolic values. SP3 allows to use numberic constants as
well. Adding a helper function to allow both.

Besides the compatibility it is easier to use.


  Commit: f83a89c1b1ce78cfac1de1c72a03b234d2a844b6
      https://github.com/llvm/llvm-project/commit/f83a89c1b1ce78cfac1de1c72a03b234d2a844b6
  Author: Amir Ayupov <aaupov at fb.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M bolt/lib/Core/BinaryFunction.cpp

  Log Message:
  -----------
  [BOLT] Turn non-empty CFI StateStack assert into a warning (#102216)

clang-15 can produce binaries with mismatched RememberState/RestoreState
CFIs. This is benign for unwinding, so replace an assert with a warning.


  Commit: 8dfa651a6325760ecd21618c762a1dad9ec79333
      https://github.com/llvm/llvm-project/commit/8dfa651a6325760ecd21618c762a1dad9ec79333
  Author: Sirraide <aeternalmail at gmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Sema/TreeTransform.h
    M clang/test/SemaTemplate/address_space-dependent.cpp

  Log Message:
  -----------
  [Clang] Fix crash when transforming a `DependentAddressSpaceType` (#102206)

We were forgetting to pass the `TypeLocBuilder` along to
`TransformType`, causing us to complain if we then tried to build a
`DependentAddressSpaceTypeLoc` because the inner `TypeLoc` was 
missing from the TLB.

Fixes #101685.


  Commit: 874890c68241f500501c42730c2829a5d51f2100
      https://github.com/llvm/llvm-project/commit/874890c68241f500501c42730c2829a5d51f2100
  Author: Snehasish Kumar <snehasishk at google.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/Analysis/TargetLibraryInfo.def
    M llvm/lib/Analysis/TargetLibraryInfo.cpp
    M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
    M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp

  Log Message:
  -----------
  Add __size_returning_new variant detection to TLI. (#101564)

Add support to detect __size_returning_new variants defined inproposal
P0901R5 to extend to operator new, see
http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p0901r5.html for
details.

This PR matches the declarations exported by tcmalloc in
https://github.com/google/tcmalloc/blob/f2516691d01051defc558679f37720bba88d9862/tcmalloc/malloc_extension.h#L707-L711


  Commit: 128ef9eb533afd00da2d3d2cfeab16de6abf2640
      https://github.com/llvm/llvm-project/commit/128ef9eb533afd00da2d3d2cfeab16de6abf2640
  Author: jeffreytan81 <jeffreytan at meta.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M lldb/include/lldb/Target/ThreadPlanSingleThreadTimeout.h
    M lldb/include/lldb/Target/TimeoutResumeAll.h
    M lldb/source/Target/ThreadPlanSingleThreadTimeout.cpp

  Log Message:
  -----------
  Fix ASAN failure in TestSingleThreadStepTimeout.py (#102208)

This PR fixes the ASAN failure in
https://github.com/llvm/llvm-project/pull/90930.

The original PR made the assumption that parent
`ThreadPlanStepOverRange`'s lifetime will always be longer than
`ThreadPlanSingleThreadTimeout` leaf plan so it passes the
`m_timeout_info` as reference to it.
>From the ASAN failure, it seems that this assumption may not be true
(likely the thread stack is holding a strong reference to the leaf
plan).

This PR fixes this lifetime issue by using shared pointer instead of
passing by reference.

---------

Co-authored-by: jeffreytan81 <jeffreytan at fb.com>


  Commit: 03958680b23dafd961ea0606c77d8e6bc8d80781
      https://github.com/llvm/llvm-project/commit/03958680b23dafd961ea0606c77d8e6bc8d80781
  Author: yonghong-song <yhs at fb.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Object/ELFObjectFile.cpp
    M llvm/test/CodeGen/BPF/objdump_atomics.ll
    M llvm/test/CodeGen/BPF/objdump_cond_op.ll
    M llvm/test/CodeGen/BPF/objdump_imm_hex.ll
    M llvm/test/CodeGen/BPF/objdump_static_var.ll
    M llvm/test/MC/BPF/insn-unit.s
    M llvm/test/MC/BPF/load-store-32.s

  Log Message:
  -----------
  [BPF] Make llvm-objdump disasm default cpu v4 (#102166)

Currently, with the following example,
  $ cat t.c
  void foo(int a, _Atomic int *b)
  {
   *b &= a;
  }
  $ clang --target=bpf -O2 -c -mcpu=v3 t.c
  $ llvm-objdump -d t.o
  t.o:    file format elf64-bpf

  Disassembly of section .text:

  0000000000000000 <foo>:
       0:       c3 12 00 00 51 00 00 00 <unknown>
       1:       95 00 00 00 00 00 00 00 exit

Basically, the default cpu for llvm-objdump is v1 and it won't be able
to decode insn properly.

If we add --mcpu=v3 to llvm-objdump command line, we will have
  $ llvm-objdump -d --mcpu=v3 t.o

  t.o:    file format elf64-bpf

  Disassembly of section .text:

  0000000000000000 <foo>:
0: c3 12 00 00 51 00 00 00 w1 = atomic_fetch_and((u32 *)(r2 + 0x0), w1)
       1:       95 00 00 00 00 00 00 00 exit

The atomic_fetch_and insn can be decoded properly. Using latest cpu
version --mcpu=v4 can also decode properly like the above --mcpu=v3.

To avoid the above '<unknown>' decoding with common 'llvm-objdump -d
t.o', this patch marked the default cpu for llvm-objdump with the
current highest cpu number v4 in ELFObjectFileBase::tryGetCPUName(). The
cpu number in ELFObjectFileBase::tryGetCPUName() will be adjusted in the
future if cpu number is increased e.g. v5 etc. Such an approach also
aligns with gcc-bpf as discussed in [1].

Six bpf unit tests are affected with this change. I changed test output
for three unit tests and added --mcpu=v1 for the other three unit tests,
to demonstrate the default (cpu v4) behavior and explicit --mcpu=v1
behavior.

[1]
https://lore.kernel.org/bpf/6f32c0a1-9de2-4145-92ea-be025362182f@linux.dev/T/#m0f7e63c390bc8f5a5523e7f2f0537becd4205200

Co-authored-by: Yonghong Song <yonghong.song at linux.dev>


  Commit: 53d33d3ba5eedac8fccb9d36576cd667800a4a38
      https://github.com/llvm/llvm-project/commit/53d33d3ba5eedac8fccb9d36576cd667800a4a38
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
    A llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll

  Log Message:
  -----------
  [Attributor] Fix an issue that an access is skipped by mistake (#101862)

When we check if an access can be skipped, there is a case that an
inter-procedural interference access exists after a dominant write.
Currently we
rely on `AAInterFnReachability` to tell if the access can be reachable.
If it is
not, we can safely skip the access. However, it is based on an
assumption that
the AA exists. It is possible that the AA doesn't exist. In this case,
we can't
safely assume the acess can be skipped because we have to assume the
access can
reach. This can happen when `AAInterFnReachability` is not in the
allowed AA
list when creating the attributor, such as AMDGPUAttributor.

Co-authored-by: Mark de Wever <koraq at xs4all.nl>


  Commit: 030ee841a9c9fbbd6e7c001e751737381da01f7b
      https://github.com/llvm/llvm-project/commit/030ee841a9c9fbbd6e7c001e751737381da01f7b
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    R clang/test/Driver/linker-wrapper-passes.c
    M clang/test/lit.cfg.py
    M clang/test/lit.site.cfg.py.in

  Log Message:
  -----------
  Revert "[LinkerWrapper] Extend with usual pass options (#96704)" (#102226)

This reverts commit 90ccf2187332ff900d46a58a27cb0353577d37cb.

Fixes: https://github.com/llvm/llvm-project/issues/100212


  Commit: 5120c5161aaa96fff4a31bef584d4ada55cd789f
      https://github.com/llvm/llvm-project/commit/5120c5161aaa96fff4a31bef584d4ada55cd789f
  Author: Nico Weber <thakis at chromium.org>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/utils/gn/secondary/lldb/include/lldb/Host/BUILD.gn

  Log Message:
  -----------
  [gn] port e77ac42bccb8


  Commit: 47bf996abe4fafa8192c78c472d68c6519349e90
      https://github.com/llvm/llvm-project/commit/47bf996abe4fafa8192c78c472d68c6519349e90
  Author: Nico Weber <thakis at chromium.org>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/utils/gn/secondary/clang/test/BUILD.gn

  Log Message:
  -----------
  Revert "[gn build] Manually port 90ccf21"

This reverts commit 46307f1a84bf832f32938c8ad2dc0605441a5319.
90ccf21 was reverted in 030ee841a9c.


  Commit: 7a68449a82ab1c1ab005caa72c1d986ca5deca36
      https://github.com/llvm/llvm-project/commit/7a68449a82ab1c1ab005caa72c1d986ca5deca36
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/Transforms/IPO/Attributor.h
    M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
    M llvm/lib/Transforms/IPO/Attributor.cpp
    M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
    M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
    M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
    A llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
    M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll

  Log Message:
  -----------
  Reapply "[Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (#100952)"

This reverts commit 874cd100a076f3b98aaae09f90ef224682501538.


  Commit: b64ec3c9faf0adce6e92c69fb48a7c7473c57200
      https://github.com/llvm/llvm-project/commit/b64ec3c9faf0adce6e92c69fb48a7c7473c57200
  Author: tcwzxx <tcwzxx at gmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/X86/stores_mix_sizes.ll

  Log Message:
  -----------
  [SLP] The order of store chains needs to consider the size of the values. (#101810)

When store chains have the same value type ID and pointer type ID, they
may mix different sizes of values, such as i8 and i64. This can lead to
missed vectorization opportunities.


  Commit: 15895daa6862ad15bfac18b03811d066d4550713
      https://github.com/llvm/llvm-project/commit/15895daa6862ad15bfac18b03811d066d4550713
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll

  Log Message:
  -----------
  [RISCV] Limit (and (sra x, c2), c1) -> (srli (srai x, c2-c3), c3) isel in some cases. (#102034)

If x is a shl by 32 and c1 is an simm12, we would prefer to use a
SRAIW+ANDI. This prevents selecting the slli to a separate slli
instruction.

Fixes regression from #101868


  Commit: 5518b46c128e344a6b67c72965f229ab3e625c34
      https://github.com/llvm/llvm-project/commit/5518b46c128e344a6b67c72965f229ab3e625c34
  Author: Ding Fei <fding at feysh.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang/lib/AST/ASTImporter.cpp
    M clang/unittests/AST/ASTImporterTest.cpp

  Log Message:
  -----------
  [clang][ASTImporter] Remove trailing return testing on lambda proto (#101031)

Lambdas without trailing return could also have return type defined
inside its body.

This fixes crashes (infinite recursion) on lambda expr without
parameters (no parentheses).


  Commit: a58f20b5ca41dacd51c2157ac7eec99b93013087
      https://github.com/llvm/llvm-project/commit/a58f20b5ca41dacd51c2157ac7eec99b93013087
  Author: Ding Fei <fding at feysh.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang/lib/AST/ASTImporter.cpp
    M clang/unittests/AST/ASTImporterTest.cpp

  Log Message:
  -----------
  [clang][ASTImporter] support import return with UnaryTransformType (#101517)

This fixes infinite recursion crash on return with UnaryTransformType,
whose underlying type is a SubstTemplateTypeParmType which is
associated with current imported function.


  Commit: ee870e593a82a6478ff1d8b3f1bd8a45aa1bf650
      https://github.com/llvm/llvm-project/commit/ee870e593a82a6478ff1d8b3f1bd8a45aa1bf650
  Author: Florian Mayer <fmayer at google.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M compiler-rt/lib/hwasan/hwasan.h

  Log Message:
  -----------
  [compiler-rt] [HWASan] leave BufferedStackTrace uninit (#102247)

Otherwise we have to memset 2040 bytes (255 * 8) for each call to a
malloc-like function.

This caused noticable slowdown on AOSP.


  Commit: 81d8273978ace8b9a2b8cfd811b94e95f9560ac5
      https://github.com/llvm/llvm-project/commit/81d8273978ace8b9a2b8cfd811b94e95f9560ac5
  Author: Simon Tatham <simon.tatham at arm.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M libc/src/time/mktime.cpp
    M libc/test/src/time/mktime_test.cpp

  Log Message:
  -----------
  [libc] Fix overflow check for 32-bit mktime. (#101993)

The 32-bit time_t rolls over to a value with its high bit set at
2038-01-19 03:14:07. The overflow check for this in mktime() was
checking each individual component of the time: reject if year>2038, or
if month>1, or if day>19, etc. As a result it would reject valid times
before the overflow point, because a low-order component was out of
range even though a higher-order one makes the time as a whole safe. The
earliest failing value is 2145916808 == 2038-01-01 00:00:08, in which
only the seconds field 'overflows'.

Fixed so that if any component is _less_ than its threshold value, we
don't check the lower-order components.


  Commit: 03841e7ab847b279d65be707a8e0f2799fd69f50
      https://github.com/llvm/llvm-project/commit/03841e7ab847b279d65be707a8e0f2799fd69f50
  Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M libc/config/linux/aarch64/entrypoints.txt
    M libc/config/linux/api.td
    M libc/docs/dev/undefined_behavior.rst
    M libc/include/CMakeLists.txt
    M libc/include/llvm-libc-types/CMakeLists.txt
    A libc/include/llvm-libc-types/pthread_spinlock_t.h
    M libc/newhdrgen/yaml/pthread.yaml
    M libc/spec/posix.td
    M libc/src/__support/threads/spin_lock.h
    M libc/src/pthread/CMakeLists.txt
    A libc/src/pthread/pthread_spin_destroy.cpp
    A libc/src/pthread/pthread_spin_destroy.h
    A libc/src/pthread/pthread_spin_init.cpp
    A libc/src/pthread/pthread_spin_init.h
    A libc/src/pthread/pthread_spin_lock.cpp
    A libc/src/pthread/pthread_spin_lock.h
    A libc/src/pthread/pthread_spin_trylock.cpp
    A libc/src/pthread/pthread_spin_trylock.h
    A libc/src/pthread/pthread_spin_unlock.cpp
    A libc/src/pthread/pthread_spin_unlock.h
    M libc/test/integration/src/pthread/CMakeLists.txt
    M libc/test/integration/src/pthread/pthread_rwlock_test.cpp
    A libc/test/integration/src/pthread/pthread_spinlock_test.cpp

  Log Message:
  -----------
  [libc] add spin lock family functions (#100509)

This PR:
- add entrypoints for `pthread_spin_*`
- additionally, the fixes a typo that has been disabling lock related
tests


  Commit: e546430959dfe2bc02685eb1d3601bd3f2e5321c
      https://github.com/llvm/llvm-project/commit/e546430959dfe2bc02685eb1d3601bd3f2e5321c
  Author: Julius Alexandre <juliuswoosebert at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/SandboxIR/SandboxIR.h
    M llvm/include/llvm/SandboxIR/SandboxIRValues.def
    M llvm/lib/SandboxIR/SandboxIR.cpp
    M llvm/unittests/SandboxIR/SandboxIRTest.cpp

  Log Message:
  -----------
  [SandboxIR] Implement UnreachableInst (#101856)

This patch implements the `UnreachableInst` instruction in SandboxIR. Mirroring `llvm::UnreachableInst`.


  Commit: 90e1c292e3745acdd2b89ac9aafdfdaaa7f13f6c
      https://github.com/llvm/llvm-project/commit/90e1c292e3745acdd2b89ac9aafdfdaaa7f13f6c
  Author: Julius Alexandre <juliuswoosebert at gmail.com>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/lib/SandboxIR/SandboxIR.cpp

  Log Message:
  -----------
  [SandboxIR][NFC] Add missing getTopmostLLVMInstruction() (#102266)

`getTopmostLLVMInstruction()` was missing in a couple of places, this patch made sure to add them.


  Commit: 41491c77231e9d389ef18593be1fab4f4e810e88
      https://github.com/llvm/llvm-project/commit/41491c77231e9d389ef18593be1fab4f4e810e88
  Author: Alexis Engelke <engelke at in.tum.de>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
    M llvm/lib/CodeGen/MachineRegisterInfo.cpp
    M llvm/lib/CodeGen/TargetRegisterInfo.cpp
    M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
    M llvm/tools/llvm-reduce/deltas/ReduceVirtualRegisters.cpp

  Log Message:
  -----------
  [CodeGen] Allocate RegAllocHints map lazily (#102186)

This hint map is not required whenever a new register is added, in fact,
at -O0, it is not used at all. Growing this map is quite expensive, as
SmallVectors are not trivially copyable.

Grow this map only when hints are actually added to avoid multiple grows
and grows when no hints are added at all.


  Commit: 89db3bbd27ddc5ec980799c987dafd167c5a4564
      https://github.com/llvm/llvm-project/commit/89db3bbd27ddc5ec980799c987dafd167c5a4564
  Author: cceerczw <chengzhiwei6 at huawei.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuffle-splat.mir

  Log Message:
  -----------
  [AArch64] Fix MatchDup Lane Out Of Range In AArch64 (#101275)

The original code is intended to process pattern which ISEL generated.
The purpose of this pattern is duplicate a scalar value to vector
register which behavior like AArch64's Dup Inst.

See Url https://reviews.llvm.org/D81979 &&
https://reviews.llvm.org/D81221

The current code considers only the preceding situation which just
duplicate from Shuffle's LHS but does not consider the user code. RHS
should be considered.


  Commit: 0564d0665b302d1c7861e03d2995612f46613a0f
      https://github.com/llvm/llvm-project/commit/0564d0665b302d1c7861e03d2995612f46613a0f
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/test/CodeGen/WebAssembly/offset.ll

  Log Message:
  -----------
  [SDAG] Transfer gep nusw/nuw to SDAG

The resulting add is nuw if either the gep was nuw or it was
nusw+nneg. Previously only inbounds+nneg was handled.

Test via wasm load offsets, which seems to most directly expose
these SDAG flags.


  Commit: 734c0488b6e69300adaf568f880f40b113ae02ca
      https://github.com/llvm/llvm-project/commit/734c0488b6e69300adaf568f880f40b113ae02ca
  Author: sinan <sinan.lin at linux.alibaba.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M bolt/lib/Rewrite/RewriteInstance.cpp
    A bolt/test/X86/dynamic-relocs-on-entry.s

  Log Message:
  -----------
  [BOLT] Support map other function entry address (#101466)

Allow BOLT to map the old address to a new binary address if the old
address is the entry of the function.


  Commit: 441b672bbdc68ad88036f3e258759854c8283adb
      https://github.com/llvm/llvm-project/commit/441b672bbdc68ad88036f3e258759854c8283adb
  Author: Giuseppe Rossini <giuseppe.rossini at amd.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M mlir/lib/Dialect/Bufferization/Transforms/BufferDeallocationSimplification.cpp
    M mlir/lib/Transforms/Utils/RegionUtils.cpp
    M mlir/test/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation/dealloc-branchop-interface.mlir
    M mlir/test/Dialect/Linalg/detensorize_entry_block.mlir
    M mlir/test/Dialect/Linalg/detensorize_if.mlir
    M mlir/test/Dialect/Linalg/detensorize_while.mlir
    M mlir/test/Dialect/Linalg/detensorize_while_impure_cf.mlir
    M mlir/test/Dialect/Linalg/detensorize_while_pure_cf.mlir
    M mlir/test/Transforms/canonicalize-block-merge.mlir
    M mlir/test/Transforms/canonicalize-dce.mlir
    M mlir/test/Transforms/make-isolated-from-above.mlir
    A mlir/test/Transforms/test-canonicalize-merge-large-blocks.mlir

  Log Message:
  -----------
  [mlir] Fix block merging (#102038)

With this PR I am trying to address:
https://github.com/llvm/llvm-project/issues/63230.

What changed:
- While merging identical blocks, don't add a block argument if it is
"identical" to another block argument. I.e., if the two block arguments
refer to the same `Value`. The operations operands in the block will
point to the argument we already inserted. This needs to happen to all
the arguments we pass to the different successors of the parent block
- After merged the blocks, get rid of "unnecessary" arguments. I.e., if
all the predecessors pass the same block argument, there is no need to
pass it as an argument.
- This last simplification clashed with
`BufferDeallocationSimplification`. The reason, I think, is that the two
simplifications are clashing. I.e., `BufferDeallocationSimplification`
contains an analysis based on the block structure. If we simplify the
block structure (by merging and/or dropping block arguments) the
analysis is invalid . The solution I found is to do a more prudent
simplification when running that pass.

**Note-1**: I ran all the integration tests
(`-DMLIR_INCLUDE_INTEGRATION_TESTS=ON`) and they passed.
**Note-2**: I fixed a bug found by @Dinistro in #97697 . The issue was
that, when looking for redundant arguments, I was not considering that
the block might have already some arguments. So the index (in the block
args list) of the i-th `newArgument` is `i+numOfOldArguments`.


  Commit: efd71d921396c71adb2362d91fd9cdfbac21abc2
      https://github.com/llvm/llvm-project/commit/efd71d921396c71adb2362d91fd9cdfbac21abc2
  Author: Simon Tatham <simon.tatham at arm.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M libc/config/baremetal/arm/entrypoints.txt
    M libc/config/baremetal/riscv/entrypoints.txt
    M libc/src/time/time_utils.h

  Log Message:
  -----------
  [libc] Allow time conversions to compile on bare metal (#102014)

The `<time.h>` functions `asctime`, `gmtime`, `mktime` and their `_r`
variants are purely computational functions which convert between well
defined time representations and/or strings. There's no reason these
shouldn't be available in bare-metal builds of the library as well as
hosted ones: even if the library has no way to find out the time in
POSIX format, it might still see POSIX-style `time_t` values in input
data (e.g. network protocols) and need to interpret them.

The only obstacle to this was that the `out_of_range()` helper function
set `errno` to `EOVERFLOW`, which fails in a bare-metal build because
the extra POSIX error values aren't defined, including `EOVERFLOW`. So
I've made that assignment conditional on `EOVERFLOW` being defined.

Fixes #85556.


  Commit: 199c400387a5492e021925ef42ea744ccf7812de
      https://github.com/llvm/llvm-project/commit/199c400387a5492e021925ef42ea744ccf7812de
  Author: Vladislav Khmelevsky <och95 at yandex.ru>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
    M llvm/lib/ExecutionEngine/JITLink/ELF_aarch64.cpp
    M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
    M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
    M llvm/test/ExecutionEngine/JITLink/AArch64/ELF_relocations.s

  Log Message:
  -----------
  [JITLink][AArch64] Add LD64_GOTPAGE_LO15 rel support (#100854)

This relocation is used in order to address GOT entries using 15 bit
offset in ldr instruction. The offset is calculated relative to GOT
section page address.


  Commit: eb7da59588c5ea0ee2b3dea9a7b618adaf11a33c
      https://github.com/llvm/llvm-project/commit/eb7da59588c5ea0ee2b3dea9a7b618adaf11a33c
  Author: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Utils/Local.cpp
    M llvm/test/DebugInfo/Generic/sroa-extract-bits.ll
    M llvm/test/Transforms/InstCombine/dbg-scalable-store-fixed-frag.ll
    M llvm/test/Transforms/InstCombine/debuginfo.ll
    M llvm/test/Transforms/Mem2Reg/dbg_declare_to_value_conversions.ll
    M llvm/test/Transforms/Mem2Reg/debug-alloca-vla-2.ll

  Log Message:
  -----------
  [debuginfo] replace usage of undef with poison as placeholder [NFC]


  Commit: 9c51e518034027061050b5c7faefc01900c070d4
      https://github.com/llvm/llvm-project/commit/9c51e518034027061050b5c7faefc01900c070d4
  Author: Ruiling, Song <ruiling.song at amd.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    A llvm/test/Transforms/StructurizeCFG/loop-break-phi.ll

  Log Message:
  -----------
  [Tests] Copy while-break test to StructurizeCFG (#102118)

Copied from AMDGPU tests to show IR changes in later PR.


  Commit: fc157522c5680b0ff982442bc8043c1e8c998161
      https://github.com/llvm/llvm-project/commit/fc157522c5680b0ff982442bc8043c1e8c998161
  Author: Ricardo Jesus <rjj at nvidia.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Scalar/LICM.cpp
    M llvm/test/CodeGen/PowerPC/common-chain.ll
    M llvm/test/Transforms/LICM/hoist-binop.ll

  Log Message:
  -----------
  [LICM] Prevent fold and hoist of binary ops with over 2 uses (#102114)

This limits folding and hoisting associative binary ops to cases where
the intermediate op has at most two uses.

The more uses the intermediate op has, the more new ops we have to
create to potentially reduce the loop's critical path. We keep the limit
to two uses to minimise undesirable increases in code size.


  Commit: 9dae7fcc927de7ae9878d4c32cb15770271fa8e3
      https://github.com/llvm/llvm-project/commit/9dae7fcc927de7ae9878d4c32cb15770271fa8e3
  Author: Daniil Kovalev <dkovalev at accesssoftek.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
    M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
    M llvm/lib/Target/AArch64/AArch64FastISel.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
    M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
    M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
    A llvm/test/CodeGen/AArch64/ptrauth-basic-pic.ll
    A llvm/test/CodeGen/AArch64/ptrauth-elf-globals-pic.ll
    A llvm/test/CodeGen/AArch64/ptrauth-extern-weak.ll
    A llvm/test/CodeGen/AArch64/ptrauth-got-abuse.ll
    A llvm/test/CodeGen/AArch64/ptrauth-tagged-globals-pic.ll
    A llvm/test/MC/AArch64/adrp-auth-relocation.s
    M llvm/test/MC/AArch64/arm64-elf-relocs.s
    M llvm/test/MC/AArch64/ilp32-diagnostics.s

  Log Message:
  -----------
  [PAC][CodeGen][ELF][AArch64] Support signed GOT (#96164)

Depends on #96158 and #96159

Support the following relocations and assembly operators:

- `R_AARCH64_AUTH_ADR_GOT_PAGE` (`:got_auth:` for `adrp`)
- `R_AARCH64_AUTH_LD64_GOT_LO12_NC` (`:got_auth_lo12:` for `ldr`)
- `R_AARCH64_AUTH_GOT_ADD_LO12_NC` (`:got_auth_lo12:` for `add`)

`LOADgotAUTH` pseudo-instruction is introduced which is later expanded
to actual instruction sequence like the following.

```
adrp x16, :got_auth:sym
add x16, x16, :got_auth_lo12:sym
ldr x0, [x16]
autia x0, x16
```

If a resign is requested, like below, `LOADgotPAC` pseudo is used, and
GOT load is lowered similarly to `LOADgotAUTH`.

```
@var = global i32 0
define ptr @resign_globalvar() {
  ret ptr ptrauth (ptr @var, i32 3, i64 43)
}
```

Both SelectionDAG and GlobalISel are suppported. For FastISel, we fall
back to SelectionDAG.

Tests starting with 'ptrauth-' have corresponding variants w/o this
prefix.

See also specification
https://github.com/ARM-software/abi-aa/blob/main/pauthabielf64/pauthabielf64.rst#appendix-signed-got


  Commit: cb89457ff825926f0004711bef3d534df1f5576d
      https://github.com/llvm/llvm-project/commit/cb89457ff825926f0004711bef3d534df1f5576d
  Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
    M mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir

  Log Message:
  -----------
  [nlir][vector] Constrain `ContractionOpToMatmulOpLowering` (#102225)

Disables `ContractionOpToMatmulOpLowering` for scalable vectors. This
pattern is meant to enable lowering to `llvm.matrix.multiply` - I'm not
aware of any use of that in the context of scalable vectors.


  Commit: a1c6467bd90905d52cf8f6162b60907f8e98a704
      https://github.com/llvm/llvm-project/commit/a1c6467bd90905d52cf8f6162b60907f8e98a704
  Author: Oliver Stannard <oliver.stannard at arm.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M lld/ELF/Arch/ARM.cpp
    M lld/ELF/Config.h
    M lld/ELF/InputFiles.cpp
    A lld/test/ELF/arm-mixed-plts.s

  Log Message:
  -----------
  [lld][ARM] Fix assertion when mixing ARM and Thumb objects (#101985)

Previously, we selected the Thumb2 PLT sequences if any input object is
marked as not supporting the ARM ISA, which then causes assertion
failures when calls from ARM code in other objects are seen. I think the
intention here was to only use Thumb PLTs when the target does not have
the ARM ISA available, signalled by no objects being marked as having it
available. To do that we need to track which ISAs we have seen as we
parse the build attributes, and defer the decision about PLTs until all
input objects have been parsed.

This bug was triggered by real code in picolibc, which have some
versions of string.h functions built with Thumb2-only build attributes,
so that they are compatible with v7-A, v7-R and v7-M.

Fixes #99008.


  Commit: 96d824d935d631a4c28133f9f8f1f583eefd040d
      https://github.com/llvm/llvm-project/commit/96d824d935d631a4c28133f9f8f1f583eefd040d
  Author: Oliver Stannard <oliver.stannard at arm.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang/lib/Driver/ToolChain.cpp
    M clang/test/Driver/fsanitize.c

  Log Message:
  -----------
  [ARM] Enable cfi-icall for thumb triples (#102126)

Support for this was added back in 2016
(https://reviews.llvm.org/D27499), but never enabled in the driver.
Since then, it's been possible to enable this with an arm triple and the
-mthumb option, but not with a thumb triple.

This also caused -fsanitise=cfi to enable cfi-icall for arm triple but
not thumb triples, which caused spurious sanitiser failures if mixing
the two ISAs in one program.


  Commit: d06303ffc1f3b2023532fd426734e9435f87d038
      https://github.com/llvm/llvm-project/commit/d06303ffc1f3b2023532fd426734e9435f87d038
  Author: Oliver Stannard <oliver.stannard at arm.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Target/ARM/ARMInstrThumb2.td
    M llvm/test/CodeGen/ARM/setjmp-bti-basic.ll

  Log Message:
  -----------
  [ARM] t2CALL_BTI pseudo-inst clobbers LR (#102117)

The t2CALL_BTI pseudo-instruction expands to a tBL instruction, so needs
the same implicit uses and defs as it.


  Commit: 8fd5dafc748669a8e4116368fa08b0d1facedfd2
      https://github.com/llvm/llvm-project/commit/8fd5dafc748669a8e4116368fa08b0d1facedfd2
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Object/COFFObjectFile.cpp

  Log Message:
  -----------
  Fix MSVC "not all control paths return a value" warning. NFC.


  Commit: c84a936516228cabc08d1ae6da6b9c3830005c64
      https://github.com/llvm/llvm-project/commit/c84a936516228cabc08d1ae6da6b9c3830005c64
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Object/COFFObjectFile.cpp

  Log Message:
  -----------
  Remove unnecessary break to fix static analysis warning.


  Commit: 79daad3479fa4eb9d704ba2e6814c1b74302d740
      https://github.com/llvm/llvm-project/commit/79daad3479fa4eb9d704ba2e6814c1b74302d740
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Object/COFFObjectFile.cpp

  Log Message:
  -----------
  Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFC.


  Commit: 6c8933e1a095028d648a5a26aecee0f569304dd0
      https://github.com/llvm/llvm-project/commit/6c8933e1a095028d648a5a26aecee0f569304dd0
  Author: sinan <sinan.lin at linux.alibaba.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M bolt/lib/Rewrite/RewriteInstance.cpp
    A bolt/test/AArch64/update-weak-reference-symbol.s

  Log Message:
  -----------
  [BOLT] Skip PLT search for zero-value weak reference symbols (#69136)

Take a common weak reference pattern for example
```
    __attribute__((weak)) void undef_weak_fun();
    
      if (&undef_weak_fun)
        undef_weak_fun();
```
    
In this case, an undefined weak symbol `undef_weak_fun` has an address
of zero, and Bolt incorrectly changes the relocation for the
corresponding symbol to symbol at PLT, leading to incorrect runtime
behavior.


  Commit: e8429986c8f2b1e00fdc51187df9d434a093e9b4
      https://github.com/llvm/llvm-project/commit/e8429986c8f2b1e00fdc51187df9d434a093e9b4
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: Add test for fma_mix with source from unmerge (#102129)

When selecting fma_mix with operand that comes from G_UNMERGE_VALUES,
there is a bug where folded register is operand 0 of G_UNMERGE_VALUES.
Source modifiers are correctly selected.
isExtractHiElt returns G_UNMERGE_VALUES that defines source register
but does not specify which operand.


  Commit: 269cefbc02986d460eee44a4e95024261be87656
      https://github.com/llvm/llvm-project/commit/269cefbc02986d460eee44a4e95024261be87656
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: Fix isExtractHiElt when selecting fma_mix (#102130)

isExtractHiElt should return new source register instead of returning
instruction that defines it. Src = MI.getOperand(0).getReg() is not
correct when MI(for example G_UNMERGE_VALUES) defines multiple registers.
Refactor existing code to work with source registers only.


  Commit: 77534291fcbd2c784c54e39a60895e4f60f19742
      https://github.com/llvm/llvm-project/commit/77534291fcbd2c784c54e39a60895e4f60f19742
  Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/AST/ExprConstant.cpp
    M clang/lib/AST/Interp/State.h
    M clang/test/AST/Interp/arrays.cpp
    M clang/test/AST/Interp/builtin-functions.cpp
    M clang/test/AST/Interp/vectors.cpp
    M clang/test/CodeGenCXX/temporaries.cpp
    A clang/test/SemaCXX/constexpr-vectors-access-elements.cpp

  Log Message:
  -----------
  [clang][ExprConst] allow single element access of vector object to be constant expression (#101126)

This is a slightly updated version of https://github.com/llvm/llvm-project/pull/72607,

originally authored by @yuanfang-chen


  Commit: 3c87f66b7e642790cafd877ff6b1fcb8a712c66a
      https://github.com/llvm/llvm-project/commit/3c87f66b7e642790cafd877ff6b1fcb8a712c66a
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Analysis/BasicAliasAnalysis.cpp
    A llvm/test/Analysis/BasicAA/nusw_nuw_nonneg.ll

  Log Message:
  -----------
  [BasicAA] Make use of nusw+nuw -> nneg implication (#102141)

If the GEP is both nuw and inbounds/nusw, the offset is non-negative.
Pass this information to CastedValue and make use of it when determining
the value range.

Proof for nusw+nuw->nneg: https://alive2.llvm.org/ce/z/a_CKAw
Proof for the test case: https://alive2.llvm.org/ce/z/yJ3ymP


  Commit: f7e1efe8bcea14686d1c303e058f687b6ca1c79f
      https://github.com/llvm/llvm-project/commit/f7e1efe8bcea14686d1c303e058f687b6ca1c79f
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/test/CodeGen/AArch64/sve-pred-selectop2.ll
    M llvm/test/CodeGen/AArch64/sve-pred-selectop3.ll

  Log Message:
  -----------
  [LLVM][ISel][SVE] Add patterns for merging reverse subtracts. (#101488)

vselect cond, ([f]sub b, a), a ==> [f]subr cond, a, b


  Commit: 441f94f4bdf6e2b9747ec12194c595098d9c3a5b
      https://github.com/llvm/llvm-project/commit/441f94f4bdf6e2b9747ec12194c595098d9c3a5b
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    A llvm/test/Transforms/SLPVectorizer/X86/reduced-value-replace-extractelement.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reduction-gather-non-scheduled-extracts.ll

  Log Message:
  -----------
  [SLP]Fix PR102279: check the tracked values for extractelements, not the original values

If the reduced value was replaced by the extractelement instruction
during vectorization and we attempt to check if this is so, need to
check the tracked value, not the original (deleted) instruction.
Otherwise, the compiler may crash

Fixes https://github.com/llvm/llvm-project/issues/102279


  Commit: f05e8186a439cf538f383dfbde68eca364a5acec
      https://github.com/llvm/llvm-project/commit/f05e8186a439cf538f383dfbde68eca364a5acec
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang/lib/AST/Interp/Compiler.cpp
    M clang/test/AST/Interp/vectors.cpp

  Log Message:
  -----------
  [clang][Interp] Fix BooleanToSignedIntegral casts for IntAP(S) (#102302)

We were not doing the final Neg here.


  Commit: 3ac5f5e1fc189d0cca169a409199fdaec13112d1
      https://github.com/llvm/llvm-project/commit/3ac5f5e1fc189d0cca169a409199fdaec13112d1
  Author: Michael Buch <michaelbuch12 at gmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
    M lldb/source/Plugins/SymbolFile/NativePDB/PdbAstBuilder.cpp
    M lldb/source/Plugins/SymbolFile/NativePDB/UdtRecordCompleter.cpp
    M lldb/source/Plugins/SymbolFile/PDB/PDBASTParser.cpp
    M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
    M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
    M lldb/unittests/Symbol/TestTypeSystemClang.cpp

  Log Message:
  -----------
  [lldb][TypeSystem] Pass ClangASTMetadata by-value when creating record/objc types (#102296)

This is a follow-up to https://github.com/llvm/llvm-project/pull/102161
where we changed the `GetMetadata`/`SetMetadata` APIs to pass
`ClangASTMetadata` by-value, instead of `ClangASTMetadata *`, which
wasn't a very friendly API.

This patch continues from there and changes
`CreateRecordType`/`CreateObjCClass` to take the metadata by-value as
well.

As a drive-by change, I also changed `DelayedAddObjCClassProperty` to
store the metadata by-value, instead of in a `std::unique_ptr`, which
AFAICT, was done solely due to the TypeSystemClang APIs taking the
metadata by pointer. This meant we could also get rid of the
user-provided copy constructors.


  Commit: b74182edaeeddfb10930e44048bf6b16704c45d9
      https://github.com/llvm/llvm-project/commit/b74182edaeeddfb10930e44048bf6b16704c45d9
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
    M llvm/tools/llvm-reduce/deltas/ReduceInstructionFlags.cpp

  Log Message:
  -----------
  [llvm-reduce] Handle new flags in complexity score

This has gotten out of sync with the actual flag reduction. It's
not particularly important though, as it only seems to be used to
determine whether to do another round of delta reduction.


  Commit: 8a5f33fd12621c8ac0def0481700246a34f4f674
      https://github.com/llvm/llvm-project/commit/8a5f33fd12621c8ac0def0481700246a34f4f674
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
    M mlir/include/mlir/Dialect/ArmSME/Transforms/Passes.td
    M mlir/lib/Dialect/ArmSME/Transforms/CMakeLists.txt
    M mlir/lib/Dialect/ArmSME/Transforms/OuterProductFusion.cpp
    M mlir/test/Dialect/ArmSME/outer-product-fusion.mlir
    M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul-mixed-types.mlir

  Log Message:
  -----------
  [mlir][ArmSME] Update `OuterProductFusion` to account for recent changes (#102125)

- Use vector.interleave rather than the LLVM intrinsic
- Remove dependency on LLVM dialect
- Remove manual outerproduct erases (these are now trivially dead)
- Remove comment explaining issues with previous tile allocator
- Update pipeline in `multi-tile-matmul-mixed-types.mlir`

Recent changes: #90448, #80965


  Commit: 750b12f06badc4cdf767139c70090db62358bb44
      https://github.com/llvm/llvm-project/commit/750b12f06badc4cdf767139c70090db62358bb44
  Author: Vladislav Khmelevsky <och95 at yandex.ru>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M bolt/lib/Rewrite/BinaryPassManager.cpp

  Log Message:
  -----------
  [BOLT] Move ADRRelaxationPass (#101371)

For non-simple functions we need nop instruction to be presented to
transform ADR to ADRP+ADD sequence, so run this pass before remove nops
pass.


  Commit: 25acc16fe29abe9a0310f63149732860b1bd9e07
      https://github.com/llvm/llvm-project/commit/25acc16fe29abe9a0310f63149732860b1bd9e07
  Author: Vladislav Khmelevsky <och95 at yandex.ru>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M bolt/CMakeLists.txt

  Log Message:
  -----------
  [BOLT][RUNTIME][NFC] Fix aarch64 match (#100866)

One of the problems related to #93151 is probably that aarch64 target
might have different names in different env, so extend aarch64 cmake cpu
match with different name aliases.


  Commit: 097ddd3565f830e6cb9d0bb8ca66844b7f3f3cbb
      https://github.com/llvm/llvm-project/commit/097ddd3565f830e6cb9d0bb8ca66844b7f3f3cbb
  Author: Vladislav Khmelevsky <och95 at yandex.ru>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M bolt/lib/Rewrite/RewriteInstance.cpp
    A bolt/test/AArch64/Inputs/build_id.ldscript
    A bolt/test/AArch64/build_id.c
    A bolt/test/X86/Inputs/build_id.yaml
    A bolt/test/X86/build_id.test

  Log Message:
  -----------
  [BOLT] Fix relocations handling (#100890)

After porting BOLT to RISCV some of the relocations were broken on both
AArch64 and X86.
On AArch64 the example of broken relocations would be GOT, during
handling them, we should replace the symbol to __BOLT_got_zero in order
to address GOT entry, not the symbol that addresses this entry. This is
done further in code, so it is too early to add rel here.
On X86 it is a mistake to add relocations without addend. This is the
exact problem that is raised on #97937. Due to different code generation
I had to use gcc-generated yaml test, since with clang I wasn't able to
reproduce problem.
Added tests for both architectures and made the problematic condition
riscV-specific.


  Commit: a4900f0d936f0e86bbd04bd9de4291e1795f1768
      https://github.com/llvm/llvm-project/commit/a4900f0d936f0e86bbd04bd9de4291e1795f1768
  Author: Vladislav Khmelevsky <och95 at yandex.ru>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M bolt/include/bolt/Core/BinaryContext.h
    M bolt/lib/Core/BinaryContext.cpp
    M bolt/lib/Rewrite/RewriteInstance.cpp
    A bolt/test/AArch64/Inputs/got_end_of_section_symbol.lld_script
    A bolt/test/AArch64/got_end_of_section_symbol.s
    M bolt/test/X86/section-end-sym.s

  Log Message:
  -----------
  [BOLT] Abort on out-of-section symbols in GOT (#100801)

This patch aborts BOLT execution if it finds out-of-section (section
end) symbol in GOT table. In order to handle such situations properly in
future, we would need to have an arch-dependent way to analyze
relocations or its sequences, e.g., for ARM it would probably be ADRP +
LDR analysis in order to get GOT entry address. Currently, it is also
challenging because GOT-related relocation symbols are replaced to
__BOLT_got_zero. Anyway, it seems to be quite a rare case, which seems
to be only? related to static binaries. For the most part, it seems that
it should be handled on the linker stage, since static binary should not
have GOT table at all. LLD linker with relaxations enabled would replace
instruction addresses from GOT directly to target symbols, which
eliminates the problem.

Anyway, in order to achieve detection of such cases, this patch fixes a
few things in BOLT:
1. For the end symbols, we're now using the section provided by ELF
binary. Previously it would be tied with a wrong section found by symbol
address.
2. The end symbols would have limited registration we would only
add them in name->data GlobalSymbols map, since using address->data
BinaryDataMap map would likely be impossible due to address duality of
such symbols.
3. The outdated BD->getSection (currently returning refence, not
pointer) check in postProcessSymbolTable is replaced by getSize check in
order to allow zero-sized top-level symbols if they are located in
zero-sized sections. For the most part, such things could only be found
in tests, but I don't see a reason not to handle such cases.
4. Updated section-end-sym test and removed x86_64 requirement since
there is no reason for this (tested on aarch64 linux)

The test was provided by peterwaller-arm (thank you) in #100096 and
slightly modified by me.


  Commit: e3778a5d0ee78f3161f1d060c6db1c0dd0de6c4e
      https://github.com/llvm/llvm-project/commit/e3778a5d0ee78f3161f1d060c6db1c0dd0de6c4e
  Author: Job Henandez Lara <hj93 at protonmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M libc/config/linux/aarch64/entrypoints.txt
    M libc/config/linux/arm/entrypoints.txt
    M libc/config/linux/riscv/entrypoints.txt
    M libc/config/linux/x86_64/entrypoints.txt
    M libc/docs/math/index.rst
    M libc/newhdrgen/yaml/math.yaml
    M libc/spec/stdc.td
    M libc/src/math/CMakeLists.txt
    M libc/src/math/generic/CMakeLists.txt
    A libc/src/math/generic/getpayloadl.cpp
    A libc/src/math/getpayloadl.h
    M libc/test/src/math/smoke/CMakeLists.txt
    M libc/test/src/math/smoke/GetPayloadTest.h
    A libc/test/src/math/smoke/getpayloadl_test.cpp

  Log Message:
  -----------
  [libc][math] Add getpayloadl function. (#102214)


  Commit: 0c25f85e5b88102363c0cd55e1946053d5827e99
      https://github.com/llvm/llvm-project/commit/0c25f85e5b88102363c0cd55e1946053d5827e99
  Author: Michael Maitland <michaeltmaitland at gmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang/test/Driver/riscv-cpus.c
    M clang/test/Misc/target-invalid-cpu-note.c
    M llvm/docs/ReleaseNotes.rst
    M llvm/lib/Target/RISCV/RISCVProcessors.td

  Log Message:
  -----------
  [RISCV] Add sifive-p470 processor (#102022)

This is an OOO core that has a vector unit. For more information see
https://www.sifive.com/cores/performance-p450-470.

Use the existing P400 scheduler model. This model is missing accurate
vector scheduling support, but it will be added in a follow up patch.

Other tunings can come in future patches too.


  Commit: fca69838caf19854769ada21a71da91fcfcbde73
      https://github.com/llvm/llvm-project/commit/fca69838caf19854769ada21a71da91fcfcbde73
  Author: Frank Schlimbach <frank.schlimbach at intel.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/Mesh/IR/CMakeLists.txt
    M mlir/include/mlir/Dialect/Mesh/IR/MeshBase.td
    M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
    M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
    M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.h
    M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.td
    M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterfaceImpl.h
    A mlir/include/mlir/Dialect/Tensor/IR/ShardingInterfaceImpl.h
    M mlir/include/mlir/InitAllDialects.h
    M mlir/include/mlir/Interfaces/InferTypeOpInterface.h
    M mlir/lib/Dialect/Linalg/Transforms/MeshShardingInterfaceImpl.cpp
    M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
    M mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp
    M mlir/lib/Dialect/Mesh/Transforms/ShardingPropagation.cpp
    M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
    M mlir/lib/Dialect/Tensor/IR/CMakeLists.txt
    A mlir/lib/Dialect/Tensor/IR/ShardingInterfaceImpl.cpp
    M mlir/test/Dialect/Linalg/mesh-sharding-propagation.mlir
    M mlir/test/Dialect/Linalg/mesh-spmdization.mlir
    M mlir/test/Dialect/Mesh/canonicalization.mlir
    M mlir/test/Dialect/Mesh/invalid.mlir
    M mlir/test/Dialect/Mesh/ops.mlir
    M mlir/test/Dialect/Mesh/resharding-spmdization.mlir
    M mlir/test/Dialect/Mesh/sharding-propagation.mlir
    M mlir/test/Dialect/Mesh/simplifications.mlir
    M mlir/test/Dialect/Mesh/spmdization.mlir
    A mlir/test/Dialect/Tensor/mesh-spmdization.mlir
    M mlir/test/lib/Dialect/Mesh/TestReshardingSpmdization.cpp

  Log Message:
  -----------
  [mlir][mesh] adding shard-size control (#98145)

- Replacing `#mesh.sharding` attribute with operation `mesh.sharding`
- extended semantics now allow providing optional `halo_sizes` and
`sharded_dims_sizes`
- internally a sharding is represented as a non-IR class
`mesh::MeshSharding`

What previously was
```mlir
%sharded0 = mesh.shard %arg0 <@mesh0, [[0]]> : tensor<4x8xf32>
%sharded1 = mesh.shard %arg1 <@mesh0, [[0]]> annotate_for_users : tensor<16x8xf32>
```
is now
```mlir
%sharding = mesh.sharding @mesh0, [[0]] : !mesh.sharding
%0 = mesh.shard %arg0 to %sharding : tensor<4x8xf32>
%1 = mesh.shard %arg1 to %sharding annotate_for_users : tensor<16x8xf32>
```
and allows additional annotations to control the shard sizes:
```mlir
mesh.mesh @mesh0 (shape = 4)
%sharding0 = mesh.sharding @mesh0, [[0]] halo_sizes = [1, 2] : !mesh.sharding
%0 = mesh.shard %arg0 to %sharding0 : tensor<4x8xf32>
%sharding1 = mesh.sharding @mesh0, [[0]] sharded_dims_sizes = [3, 5, 5, 3] : !mesh.sharding
%1 = mesh.shard %arg1 to %sharding1 annotate_for_users : tensor<16x8xf32>
```
- `mesh.shard` op accepts additional optional attribute `force`, useful
for halo updates
- Some initial spmdization support for the new semantics
- Support for `tensor.empty` reacting on `sharded_dims_sizes` and
`halo_sizes` in the sharding
- New collective operation `mesh.update_halo` as a spmdized target for
shardings with `halo_sizes`

@sogartar @yaochengji


  Commit: f05efd034c0993c7aa606bfbaaf575d94d75b43f
      https://github.com/llvm/llvm-project/commit/f05efd034c0993c7aa606bfbaaf575d94d75b43f
  Author: Michael Buch <michaelbuch12 at gmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp

  Log Message:
  -----------
  [lldb][ClangExpressionParser][NFC] Remove unused local vars

These got removed in `d6cbcf93b227befaad00957a56acd63c837c26ff` but
mistakenly added back when rebasing `12e3a06cb7615fbd91031420f3dec2a85d7877d6`


  Commit: 30a4e9e5bec9ea88bd63d5b69d90218b45b5fd65
      https://github.com/llvm/llvm-project/commit/30a4e9e5bec9ea88bd63d5b69d90218b45b5fd65
  Author: Rahul Joshi <rjoshi at nvidia.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/test/TableGen/SubtargetFeatureUniqueNames.td

  Log Message:
  -----------
  [NFC] Temporarily disable failing TableGen unit test. (#102308)

- This test was reported as failing in ASAN builds, with
non-deterministic order of the error message and note expected.
- This is due to llvm::sort() being unstable.
- Temporarily disable the test while its been fixed.


  Commit: baf77036f6244ee23f77e61f986f083dd2334b6a
      https://github.com/llvm/llvm-project/commit/baf77036f6244ee23f77e61f986f083dd2334b6a
  Author: Chinmay Deshpande <cddeshpa at uci.edu>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/include/llvm/MCA/Stages/InOrderIssueStage.h
    M llvm/lib/MCA/Stages/InOrderIssueStage.cpp

  Log Message:
  -----------
  `InOrderIssueStage` for llvm-mca should be generic over LSUnitBase (#101534)

Other HardwareUnits (such as the
[Scheduler](https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/MCA/HardwareUnits/Scheduler.h#L71))
and Stages (such as
[RetireStage](https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/MCA/Stages/RetireStage.h#L32))
are generic over `LSUnitBase` rather than the specialized `LSUnit`.


  Commit: fc66eaa24f8c594c340410847bc3e4a4b9c1f994
      https://github.com/llvm/llvm-project/commit/fc66eaa24f8c594c340410847bc3e4a4b9c1f994
  Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang/lib/Basic/IdentifierTable.cpp

  Log Message:
  -----------
  [NFC] Format TokenKey enum (#101700)

This is to fix the white-space formatting of the TokenKey enum


  Commit: b209eda621bc53e58509d05fa392cb724fa6bd6e
      https://github.com/llvm/llvm-project/commit/b209eda621bc53e58509d05fa392cb724fa6bd6e
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M libc/include/llvm-libc-macros/limits-macros.h

  Log Message:
  -----------
  [libc] Define `MB_LEN_MAX` in `limits.h` (#102246)

Summary:
This is supposed to define the maximum bytes required to store a char in
any locale. There's some question about what this should be set to. I
believe because the proposed solution for `locale.h` is to only support
the default locale, we should do what `musl` does and set it to `4`
which covers up to UTF-32.

Fixes https://github.com/llvm/llvm-project/issues/79358


  Commit: 6b6abf0556d73ba55526cf084f81246d8aa4d56b
      https://github.com/llvm/llvm-project/commit/6b6abf0556d73ba55526cf084f81246d8aa4d56b
  Author: Michael Maitland <michaeltmaitland at gmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/SDPatternMatch.h

  Log Message:
  -----------
  [DAG][NFC] Remove unnecessary default arguments (#100737)


  Commit: 3c391a640dae1c9884cb564ef9d73d367ea4bf48
      https://github.com/llvm/llvm-project/commit/3c391a640dae1c9884cb564ef9d73d367ea4bf48
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M libc/include/llvm-libc-macros/float-macros.h

  Log Message:
  -----------
  [libc] Add `*_HAS_SUBNORM` to `float.h` (#102182)

Summary:
These should be defined, since we provide `float.h` it will override the
Clang resource dir and not provide it.


  Commit: 3645ca58f4529bf7d0aefb6e6872f0e9cbe22fa4
      https://github.com/llvm/llvm-project/commit/3645ca58f4529bf7d0aefb6e6872f0e9cbe22fa4
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M libc/config/gpu/entrypoints.txt

  Log Message:
  -----------
  [libc] Enable quick_exit routines on the GPU (#102242)

Summary:
We should be able to use these on the GPU just like exit.


  Commit: f343fee8c5c9526b3cf62ee6d450c44b69a47e87
      https://github.com/llvm/llvm-project/commit/f343fee8c5c9526b3cf62ee6d450c44b69a47e87
  Author: Zibi Sarbinowski <zibi at ca.ibm.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M libcxx/test/std/numerics/c.math/hermite.pass.cpp

  Log Message:
  -----------
  [libcxx][test][z/OS] Fix hermite.pass.cpp for HEX float (#101019)

The HEX float on z/OS does not have infinity nor NaN. In addition, the
limits are smaller before the overflow occurs in mathematical
calculations. This PR accounts for this.

FYI, this LIT test was recently added in PR
[89982](https://github.com/llvm/llvm-project/pull/89982)


  Commit: 36467bfe89f231458eafda3edb916c028f1f0619
      https://github.com/llvm/llvm-project/commit/36467bfe89f231458eafda3edb916c028f1f0619
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/include/llvm/Transforms/IPO/Attributor.h
    M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
    M llvm/lib/Transforms/IPO/Attributor.cpp
    M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
    M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
    M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
    R llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
    M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll

  Log Message:
  -----------
  Revert "Reapply "[Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (#100952)""

This reverts commit 7a68449a82ab1c1ab005caa72c1d986ca5deca36.

https://lab.llvm.org/buildbot/#/builders/123/builds/3205


  Commit: 53609b90815a323c532da244d57feed656178e0b
      https://github.com/llvm/llvm-project/commit/53609b90815a323c532da244d57feed656178e0b
  Author: Donát Nagy <donat.nagy at ericsson.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h

  Log Message:
  -----------
  [analyzer][NFC] Prune a very obsolete comment about CoreEngine (#101173)

Once upon a time, a long time (16 years) ago there were two classes
called `GREngineImpl` and `template <class CHECKER> GrEngine`. As the
years passed, they were merged into a single class that went through
several renames, but this comment still preserved the memory of their
old relationship... until now.


  Commit: fc737368fe6e27d6ecf76e522cb43a32aaca992a
      https://github.com/llvm/llvm-project/commit/fc737368fe6e27d6ecf76e522cb43a32aaca992a
  Author: Jie Fu <jiefu at tencent.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp

  Log Message:
  -----------
  [mlir] Fix -Wunused-variable in MeshOps.cpp (NFC)

/llvm-project/mlir/lib/Dialect/Mesh/IR/MeshOps.cpp:182:16:
error: unused variable 'inAxis' [-Werror,-Wunused-variable]
          auto inAxis = dimSz % inShape.size();
               ^


  Commit: 59338ad8c5154769ec8225db0386956161f99fce
      https://github.com/llvm/llvm-project/commit/59338ad8c5154769ec8225db0386956161f99fce
  Author: OverMighty <its.overmighty at gmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M libc/config/linux/x86_64/entrypoints.txt
    M libc/docs/math/index.rst
    M libc/spec/stdc.td
    M libc/src/math/CMakeLists.txt
    A libc/src/math/exp10f16.h
    M libc/src/math/generic/CMakeLists.txt
    A libc/src/math/generic/exp10f16.cpp
    M libc/src/math/generic/exp2f16.cpp
    A libc/src/math/generic/expxf16.h
    M libc/test/src/math/CMakeLists.txt
    A libc/test/src/math/exp10f16_test.cpp
    M libc/test/src/math/performance_testing/CMakeLists.txt
    A libc/test/src/math/performance_testing/exp10f16_perf.cpp
    M libc/test/src/math/smoke/CMakeLists.txt
    A libc/test/src/math/smoke/exp10f16_test.cpp

  Log Message:
  -----------
  [libc][math][c23] Add exp10f16 C23 math function (#101588)

Part of #95250.


  Commit: d07f106e512c08455b76cc1889ee48318e73c810
      https://github.com/llvm/llvm-project/commit/d07f106e512c08455b76cc1889ee48318e73c810
  Author: Zaara Syeda <syzaara at ca.ibm.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
    M llvm/test/CodeGen/PowerPC/aix-base-pointer.ll

  Log Message:
  -----------
  [PPC][AIX] Save/restore r31 when using base pointer (#100182)

When the base pointer r30 is used to hold the stack pointer, r30 is
spilled in the prologue. On AIX registers are saved from highest to
lowest, so r31 also needs to be saved.

Fixes https://github.com/llvm/llvm-project/issues/96411


  Commit: 3968942f1046d59b4dc4529fddff6d75a5668c2e
      https://github.com/llvm/llvm-project/commit/3968942f1046d59b4dc4529fddff6d75a5668c2e
  Author: Renato Golin <rengolin at systemcall.eu>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/Mesh/IR/CMakeLists.txt
    M mlir/include/mlir/Dialect/Mesh/IR/MeshBase.td
    M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
    M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
    M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.h
    M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.td
    M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterfaceImpl.h
    R mlir/include/mlir/Dialect/Tensor/IR/ShardingInterfaceImpl.h
    M mlir/include/mlir/InitAllDialects.h
    M mlir/include/mlir/Interfaces/InferTypeOpInterface.h
    M mlir/lib/Dialect/Linalg/Transforms/MeshShardingInterfaceImpl.cpp
    M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
    M mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp
    M mlir/lib/Dialect/Mesh/Transforms/ShardingPropagation.cpp
    M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
    M mlir/lib/Dialect/Tensor/IR/CMakeLists.txt
    R mlir/lib/Dialect/Tensor/IR/ShardingInterfaceImpl.cpp
    M mlir/test/Dialect/Linalg/mesh-sharding-propagation.mlir
    M mlir/test/Dialect/Linalg/mesh-spmdization.mlir
    M mlir/test/Dialect/Mesh/canonicalization.mlir
    M mlir/test/Dialect/Mesh/invalid.mlir
    M mlir/test/Dialect/Mesh/ops.mlir
    M mlir/test/Dialect/Mesh/resharding-spmdization.mlir
    M mlir/test/Dialect/Mesh/sharding-propagation.mlir
    M mlir/test/Dialect/Mesh/simplifications.mlir
    M mlir/test/Dialect/Mesh/spmdization.mlir
    R mlir/test/Dialect/Tensor/mesh-spmdization.mlir
    M mlir/test/lib/Dialect/Mesh/TestReshardingSpmdization.cpp

  Log Message:
  -----------
  Revert "[mlir][mesh] adding shard-size control (#98145)"

This reverts commit fca69838caf19854769ada21a71da91fcfcbde73.

Also reverts the fixup: "[mlir] Fix -Wunused-variable in MeshOps.cpp (NFC)"

This reverts commit fc737368fe6e27d6ecf76e522cb43a32aaca992a.


  Commit: beb37e2e22b549b361be7269a52a3715649e956a
      https://github.com/llvm/llvm-project/commit/beb37e2e22b549b361be7269a52a3715649e956a
  Author: Lucas Duarte Prates <lucas.prates at arm.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
    A llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-exchange-fence.ll

  Log Message:
  -----------
  [AArch64] Don't replace dst of SWP instructions with (X|W)ZR (#102139)

This change updates the AArch64DeadRegisterDefinition pass to ensure it
does not replace the destination register of a SWP instruction with the
zero register when its value is unused. This is necessary to ensure that
the ordering of such instructions in relation to DMB.LD barries adheres
to the definitions of the AArch64 Memory Model.

The memory model states the following (ARMARM version DDI 0487K.a
§B2.3.7):
```
Barrier-ordered-before

An effect E1 is Barrier-ordered-before an effect E2 if one of the following applies:
[...]
* All of the following apply:
- E1 is a Memory Read effect.
- E1 is generated by an instruction whose destination register is not WZR or XZR.
- E1 appears in program order before E3.
- E3 is either a DMB LD effect or a DSB LD effect.
- E3 appears in program order before E2.
```

Prior to this change, by replacing the destination register of such SWP
instruction with WZR/XZR, the ordering relation described above was
incorrectly removed from the generated code.

The new behaviour is ensured in this patch by adding the relevant
`SWP[L](B|H|W|X)` instructions to list in the `atomicReadDroppedOnZero`
predicate, which already covered the `LD<Op>` instructions that are
subject to the same effect.

Fixes #68428.


  Commit: 06a808c4f4014edfeb2517bddd0bcb63eb4a260b
      https://github.com/llvm/llvm-project/commit/06a808c4f4014edfeb2517bddd0bcb63eb4a260b
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M libc/utils/gpu/server/CMakeLists.txt

  Log Message:
  -----------
  [libc] Fix bot accidentally picking up conflicting MB_LEN_MAX


  Commit: c31ac810910ac87531de636ea508abec6e29e8ff
      https://github.com/llvm/llvm-project/commit/c31ac810910ac87531de636ea508abec6e29e8ff
  Author: Benjamin Kramer <benny.kra at googlemail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Analysis/InstructionSimplify.cpp
    M llvm/test/Transforms/InstSimplify/insertelement.ll

  Log Message:
  -----------
  [InstSimplify] Fold (insertelement Splat(C), C, X) -> Splat(C) (#102315)

The index doesn't matter here.


  Commit: 999bab711e19b897bb7d86433f72f1b8eeaa4891
      https://github.com/llvm/llvm-project/commit/999bab711e19b897bb7d86433f72f1b8eeaa4891
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/SimplifyCFG/X86/sink-common-code.ll

  Log Message:
  -----------
  [SimplifyCFG] Add tests for sinking of load/store + gep (NFC)


  Commit: bfef7ccf03dc072e5e076500743318b7db5b9a33
      https://github.com/llvm/llvm-project/commit/bfef7ccf03dc072e5e076500743318b7db5b9a33
  Author: Pradeep Kumar <pradeepku at nvidia.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/docs/NVPTXUsage.rst
    M llvm/include/llvm/IR/IntrinsicsNVVM.td
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
    A llvm/test/CodeGen/NVPTX/fence-proxy-tensormap.ll

  Log Message:
  -----------
  [LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (#100748)

This commit adds LLVM Intrinsics and NVPTX codegen support for
`fence.proxy.tensormap` with lit tests under fence-proxy-tensormap.ll.
Also, added Intrinsics documentation in NVPTXUsage.rst

---------

Co-authored-by: gonzalobg <65027571+gonzalobg at users.noreply.github.com>


  Commit: 12fa4b17dcededbd14abfc3ae72f1b798349e847
      https://github.com/llvm/llvm-project/commit/12fa4b17dcededbd14abfc3ae72f1b798349e847
  Author: royitaqi <royitaqi at users.noreply.github.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M lldb/source/Core/Progress.cpp
    M lldb/unittests/Core/ProgressReportTest.cpp

  Log Message:
  -----------
  [lldb] Make sure that a `Progress` "completed" update is always reported at destruction (#102097)

Make all `Progress` destructions to cause `progressEnd` events,
regardless of the value of `m_completed` before the destruction.

Currently, a `Progress` instance with `m_completed != 0 && m_complete !=
m_total` will cause a `progressUpdate` event (not `progressEnd`) at
destruction and. This contradicts with the classdoc: "a progress completed
update is reported even if the user doesn't explicitly cause one to be sent."


  Commit: 7634a96589637186b640a0441c0544a9868d9913
      https://github.com/llvm/llvm-project/commit/7634a96589637186b640a0441c0544a9868d9913
  Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M flang/lib/Lower/DirectivesCommon.h
    M flang/lib/Lower/OpenACC.cpp
    M flang/test/Lower/OpenACC/acc-bounds.f90

  Log Message:
  -----------
  [flang][acc] Improve lowering of Fortran optional in data clause (#102224)

Fortran optional arguments are effectively null references. To deal with
this possibility, flang lowering of OpenACC data clauses creates three
if-else regions when preparing the data pointer for the data clause:
1) Load box value from box reference
2) Load box addr from box value
3) Load box dims from box value

However, this pattern makes it more complicated to find the original box
reference. Effectively, the first if-else region to get the box value is
not needed - since the value can be loaded before the corresponding
`fir.box_addr` and `fir.box_dims` operations. Thus, reduce the number of
if-else regions by deferring the box load to the use sites.

For non-optional cases, the old functionality is left alone - which
preloads the box value.


  Commit: f126bc984ce4d17473f76d507e31c12a91e84b5b
      https://github.com/llvm/llvm-project/commit/f126bc984ce4d17473f76d507e31c12a91e84b5b
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M libc/utils/gpu/server/rpc_server.cpp

  Log Message:
  -----------
  [libc] Fix conflict values from internal `limits.h` when used externally


  Commit: d60008d861d2f5e6a73c4b5d403e1132e41e1704
      https://github.com/llvm/llvm-project/commit/d60008d861d2f5e6a73c4b5d403e1132e41e1704
  Author: Nhat Nguyen <hoangnhat2911 at gmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M mlir/python/requirements.txt

  Log Message:
  -----------
  [mlir] [python] Update PyYAML minimum version to 5.4 and limit ml_dtypes to 0.4.0 (#102178)

PyYAML 5.3.1 has a security vulnerability as described here:
https://nvd.nist.gov/vuln/detail/CVE-2020-14343. Update the minimum
PyYAML version to 5.4. Also limit ml_dtypes version to 0.4.0.


  Commit: 4859c46761f2278e9c4c45596a32bcec8109a3e7
      https://github.com/llvm/llvm-project/commit/4859c46761f2278e9c4c45596a32bcec8109a3e7
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp

  Log Message:
  -----------
  Fix gcc Wparentheses warning. NFC.


  Commit: 8b522992a94b7dd4a027bfc2c462f24aa93edbac
      https://github.com/llvm/llvm-project/commit/8b522992a94b7dd4a027bfc2c462f24aa93edbac
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp

  Log Message:
  -----------
  Fix gcc Wparentheses warning. NFC.


  Commit: 13c61ddc210b8743493d2f1450d0dbea0533b892
      https://github.com/llvm/llvm-project/commit/13c61ddc210b8743493d2f1450d0dbea0533b892
  Author: Mital Ashok <mital at mitalashok.co.uk>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst

  Log Message:
  -----------
  [Clang][NFC] Restore "Non-comprehensive list of changes in this release" in ReleaseNotes (#102134)

This was removed in 10c6d6349e51bb245b9deec4aafca9885971135b


  Commit: 97743b8be86ab96afb26ba93e1876406c1f4d541
      https://github.com/llvm/llvm-project/commit/97743b8be86ab96afb26ba93e1876406c1f4d541
  Author: Han-Kuan Chen <hankuan.chen at sifive.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/revec.ll

  Log Message:
  -----------
  [SLP][REVEC] Make ShuffleCostEstimator and ShuffleInstructionBuilder support vector instructions. (#99499)

1. When REVEC is enabled, we need to expand vector types into scalar
types.
2. When REVEC is enabled, CreateInsertVector (and CreateExtractVector)
is used because the scalar type may be a FixedVectorType.
3. Since the mask indices which are used by processBuildVector expect
the source is scalar type, we need to transform the mask indices into a
form which can be used when REVEC is enabled. The transform is only
called when the mask is really used.


  Commit: e4e96b3e26c0c9752869daea398bfb27af72e22f
      https://github.com/llvm/llvm-project/commit/e4e96b3e26c0c9752869daea398bfb27af72e22f
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/AArch64/abds-neg.ll
    M llvm/test/CodeGen/AArch64/abds.ll
    M llvm/test/CodeGen/AArch64/abdu-neg.ll
    M llvm/test/CodeGen/AArch64/abdu.ll
    M llvm/test/CodeGen/AArch64/arm64-vabs.ll
    M llvm/test/CodeGen/AArch64/neon-abd.ll
    M llvm/test/CodeGen/AArch64/sve-aba.ll
    M llvm/test/CodeGen/AArch64/sve-abd.ll
    M llvm/test/CodeGen/AMDGPU/sad.ll
    M llvm/test/CodeGen/ARM/neon_vabd.ll
    M llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
    M llvm/test/CodeGen/PowerPC/vec-zext-abdu.ll
    M llvm/test/CodeGen/RISCV/abds-neg.ll
    M llvm/test/CodeGen/RISCV/abds.ll
    M llvm/test/CodeGen/RISCV/abdu-neg.ll
    M llvm/test/CodeGen/RISCV/abdu.ll
    M llvm/test/CodeGen/RISCV/rvv/abd.ll
    M llvm/test/CodeGen/Thumb2/mve-vabdus.ll
    M llvm/test/CodeGen/X86/abds-neg.ll
    M llvm/test/CodeGen/X86/abds.ll
    M llvm/test/CodeGen/X86/abdu-neg.ll
    M llvm/test/CodeGen/X86/abdu.ll

  Log Message:
  -----------
  Revert b1234ddbe2652aa7948242a57107ca7ab12fd2f8. "[DAG] Add legalization handling for ABDS/ABDU (#92576)"

Reverting #92576 while we identify a reported regression


  Commit: 01b488faabdfe9402c5b4d1f788038cc439acf90
      https://github.com/llvm/llvm-project/commit/01b488faabdfe9402c5b4d1f788038cc439acf90
  Author: Steven Wu <stevenwu at apple.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang-tools-extra/clang-tidy/tool/CMakeLists.txt
    M clang/cmake/modules/AddClang.cmake
    M clang/tools/clang-linker-wrapper/CMakeLists.txt
    M clang/tools/clang-repl/CMakeLists.txt
    M clang/tools/driver/CMakeLists.txt
    M clang/unittests/Interpreter/CMakeLists.txt
    M clang/unittests/Interpreter/ExceptionTests/CMakeLists.txt
    M flang/tools/flang-driver/CMakeLists.txt
    M lld/cmake/modules/AddLLD.cmake
    M lld/tools/lld/CMakeLists.txt
    M llvm/CMakeLists.txt
    M llvm/cmake/modules/AddLLVM.cmake
    M llvm/examples/ExceptionDemo/CMakeLists.txt
    M llvm/examples/HowToUseLLJIT/CMakeLists.txt
    M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter1/CMakeLists.txt
    M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter2/CMakeLists.txt
    M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter3/CMakeLists.txt
    M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter4/CMakeLists.txt
    M llvm/examples/Kaleidoscope/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter4/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter5/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter6/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter7/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter8/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter9/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITDumpObjects/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITRemovableCode/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithCustomObjectLinkingLayer/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithGDBRegistrationListener/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithInitializers/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithLazyReexports/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithObjectCache/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithObjectLinkingLayerPlugin/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithOptimizingIRTransform/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithThinLTOSummaries/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsAddObjectFile/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsBasicUsage/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsDumpObjects/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsIRTransforms/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsLazy/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsRemovableCode/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsVeryLazy/CMakeLists.txt
    M llvm/tools/bugpoint/CMakeLists.txt
    M llvm/tools/llc/CMakeLists.txt
    M llvm/tools/lli/CMakeLists.txt
    M llvm/tools/lli/ChildTarget/CMakeLists.txt
    M llvm/tools/llvm-jitlink/CMakeLists.txt
    M llvm/tools/llvm-jitlink/llvm-jitlink-executor/CMakeLists.txt
    M llvm/tools/llvm-lto2/CMakeLists.txt
    M llvm/tools/opt/CMakeLists.txt
    M llvm/unittests/Analysis/CMakeLists.txt
    M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
    M llvm/unittests/Passes/Plugins/CMakeLists.txt
    M llvm/unittests/Support/DynamicLibrary/CMakeLists.txt
    M mlir/tools/mlir-cpu-runner/CMakeLists.txt
    M mlir/tools/mlir-opt/CMakeLists.txt

  Log Message:
  -----------
  Reapply "[CMake] Fold export_executable_symbols_* into function args. (#101741)" (#102138)

Fix the builds with LLVM_TOOL_LLVM_DRIVER_BUILD enabled.

LLVM_ENABLE_EXPORTED_SYMBOLS_IN_EXECUTABLES is not completely
compatible with export_executable_symbols as the later will be ignored
if the previous is set to NO.

Fix the issue by passing if symbols need to be exported to
llvm_add_exectuable so the link flag can be determined directly
without calling export_executable_symbols_* later.


  Commit: ad8a2e4ed40ff97e70dec0d044058b47ce90a12f
      https://github.com/llvm/llvm-project/commit/ad8a2e4ed40ff97e70dec0d044058b47ce90a12f
  Author: John McIver <john.mciver.iii at gmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/test/Transforms/SLPVectorizer/X86/addsub.ll
    M llvm/test/Transforms/SLPVectorizer/X86/fmuladd.ll

  Log Message:
  -----------
  [SLP][NFC] Add freeze instruction tests for upcoming support (#102215)


  Commit: a0ed7d6c5fa1438983ee2c1ad25fbb53644d5eba
      https://github.com/llvm/llvm-project/commit/a0ed7d6c5fa1438983ee2c1ad25fbb53644d5eba
  Author: SpencerAbson <Spencer.Abson at arm.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang/include/clang/Basic/arm_sve.td
    M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_clamp.c
    M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_max.c
    M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_maxnm.c
    M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_min.c
    M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_minnm.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfclamp.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmax.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmaxnm.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmin.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfminnm.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla_lane.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls_lane.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul_lane.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfsub.c
    M clang/test/Driver/print-supported-extensions-aarch64.c
    M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_b16b16.cpp
    A clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_b16b16.cpp
    M llvm/lib/Target/AArch64/AArch64Features.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    M llvm/test/CodeGen/AArch64/sme2-intrinsics-max.ll
    M llvm/test/CodeGen/AArch64/sme2-intrinsics-min.ll
    M llvm/test/CodeGen/AArch64/sve2-min-max-clamp.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfadd.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfclamp.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmax.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmaxnm.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmin.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfminnm.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmla.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmla_lane.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmls.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmls_lane.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmul.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmul_lane.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfsub.ll
    M llvm/test/MC/AArch64/SME2/bfclamp-diagnostics.s
    M llvm/test/MC/AArch64/SME2/bfclamp.s
    M llvm/test/MC/AArch64/SME2/bfmax-diagnostics.s
    M llvm/test/MC/AArch64/SME2/bfmax.s
    M llvm/test/MC/AArch64/SME2/bfmaxnm-diagnostics.s
    M llvm/test/MC/AArch64/SME2/bfmaxnm.s
    M llvm/test/MC/AArch64/SME2/bfmin-diagnostics.s
    M llvm/test/MC/AArch64/SME2/bfmin.s
    M llvm/test/MC/AArch64/SME2/bfminnm-diagnostics.s
    M llvm/test/MC/AArch64/SME2/bfminnm.s
    M llvm/test/MC/AArch64/SME2p1/directive-arch-negative.s
    M llvm/test/MC/AArch64/SME2p1/directive-arch.s
    M llvm/test/MC/AArch64/SME2p1/directive-arch_extension-negative.s
    M llvm/test/MC/AArch64/SME2p1/directive-arch_extension.s
    M llvm/test/MC/AArch64/SVE2p1/bfadd-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfadd.s
    M llvm/test/MC/AArch64/SVE2p1/bfclamp-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfclamp.s
    M llvm/test/MC/AArch64/SVE2p1/bfmax-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfmax.s
    M llvm/test/MC/AArch64/SVE2p1/bfmaxnm-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfmaxnm.s
    M llvm/test/MC/AArch64/SVE2p1/bfmin-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfmin.s
    M llvm/test/MC/AArch64/SVE2p1/bfminnm-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfminnm.s
    M llvm/test/MC/AArch64/SVE2p1/bfmla-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfmla.s
    M llvm/test/MC/AArch64/SVE2p1/bfmls-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfmls.s
    M llvm/test/MC/AArch64/SVE2p1/bfmul-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfmul.s
    M llvm/test/MC/AArch64/SVE2p1/bfsub-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfsub.s
    M llvm/test/MC/AArch64/SVE2p1/directive-arch-negative.s
    M llvm/test/MC/AArch64/SVE2p1/directive-arch.s
    M llvm/test/MC/AArch64/SVE2p1/directive-arch_extension-negative.s
    M llvm/test/MC/AArch64/SVE2p1/directive-arch_extension.s
    M llvm/unittests/TargetParser/TargetParserTest.cpp

  Log Message:
  -----------
  [AArch64] Add updated FEAT_SVE_B16B16 and begin replacement of 'b16b16' flag (#101480)

This patch adds FeatureSVEB16B16 to the AArch64 backend in order to
represent the new behavior of FEAT_SVE_B16B16 (as described in the
latest [Armv9.4 extensions
documentation](https://developer.arm.com/documentation/109697/0100/Feature-descriptions/The-Armv9-4-architecture-extension?lang=en#md461-the-armv94-architecture-extension__FEAT_SVE_B16B16))
as well as a 'sve-b16b16' flag to enable it.

The predication of non-widening SVE BFloat16 instructions has changed to
require this feature, instead of the previously required and
soon-to-be-removed FeatureB16B16 which is enabled by the 'b16b16' flag.
Therefore, this change weakens the 'b16b16' flag in favour of
'sve-b16b16'. Existing tests that are effected by this have been
modified to use and/or expect 'sve-b16b16', and new tests have been
added to verify the behavior and implementation of 'sve-b16b16'.

This patch is in response to the response to the following changes.

The architecture features previously enabled by FEAT_SVE_B16B16 have
been relaxed such that it now implements:
      - With FEAT_SVE2 : SVE non-widening BFloat16 instructions in
Non-streaming SVE mode
      - With FEAT_SME2: SVE non-widening BFloat16 instructions when the
PE is in Streaming SVE mode and SME
        Z-targeting multi-vector non-widening BFloat16 instructions.
      - **It no longer implements** SME ZA-targeting non-widening
BFloat16 instructions.   

The SME ZA-targeting non-widening BFloat16 instructions are implemented
by the new FEAT_SME_B16B16, **this patch does not change how this
architecture feature is enabled** ('+b16b16+sme2'). Only those that are
implemented by FEAT_SVE_B16B16 have been changed to require 'sve-b16b16'
instead of 'b16b16'.

New flags must be created to represent FEAT_SVE_B16B16 and
FEAT_SME_B16B16:
      - 'sve-b16b16' enables the updated FEAT_SVE_B16B16 (described
here)
      - 'sme-b16b16' will enable the new FEAT_SME_B16B16
      - **This patch includes 'sve-b16b16' only**
   
A future patch will add 'sme-b16b16', SME ZA-targeting non-widening
BFloat16 instructions would then be guarded by '+sme-b16b16+sme2', and
'b16b16' can be removed.


  Commit: 62e894e0d76369c2a21ecd5aa88cb20bba1712af
      https://github.com/llvm/llvm-project/commit/62e894e0d76369c2a21ecd5aa88cb20bba1712af
  Author: Sayhaan Siddiqui <49014204+sayhaan at users.noreply.github.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M bolt/lib/Core/BinaryContext.cpp
    M bolt/lib/Rewrite/MachORewriteInstance.cpp
    M bolt/lib/Rewrite/RewriteInstance.cpp
    M bolt/unittests/Core/BinaryContext.cpp
    M bolt/unittests/Core/MCPlusBuilder.cpp

  Log Message:
  -----------
  [BOLT][DWARF][NFC] Move Arch assignment out of createBinaryContext (#102054)

Moves the assignment of Arch out of createBinaryContext to prevent data
races when parallelized.


  Commit: 445023f1739d3764f1dae6e6b7b0602328198a1e
      https://github.com/llvm/llvm-project/commit/445023f1739d3764f1dae6e6b7b0602328198a1e
  Author: Vladislav Khmelevsky <och95 at yandex.ru>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M bolt/lib/Rewrite/BinaryPassManager.cpp

  Log Message:
  -----------
  Revert "[BOLT] Move ADRRelaxationPass (#101371)" (#102333)

This reverts commit 750b12f06badc4cdf767139c70090db62358bb44.
The pass should run after splitting phase, but before nop removal


  Commit: 961639962251de7428c3fe93fa17cfa6ab3c561a
      https://github.com/llvm/llvm-project/commit/961639962251de7428c3fe93fa17cfa6ab3c561a
  Author: Ian Anderson <iana at apple.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang/lib/Driver/ToolChains/Darwin.cpp
    A clang/test/Driver/Inputs/DriverKit23.0.sdk/SDKSettings.json
    A clang/test/Driver/Inputs/MacOSX15.0.sdk/SDKSettings.json
    R clang/test/Driver/Inputs/MacOSX99.0.sdk/SDKSettings.json
    M clang/test/Driver/darwin-builtin-modules.c

  Log Message:
  -----------
  [clang][modules] Enable built-in modules for the upcoming Apple releases (#102239)

The upcoming Apple SDK releases will support the clang built-in headers
being in the clang built-in modules: stop passing
-fbuiltin-headers-in-system-modules for those SDK versions.


  Commit: 704f3034b2346ca70cdea1e33366530c82edd607
      https://github.com/llvm/llvm-project/commit/704f3034b2346ca70cdea1e33366530c82edd607
  Author: Jun Wang <jwang86 at yahoo.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir

  Log Message:
  -----------
  [AMDGPU] Set register bank for i1 register copies (#96155)

Set register bank in copies between a physical register and a virtual
register of s1 type.
---------

Co-authored-by: Jun Wang <jun.wang7 at amd.com>


  Commit: 64510c1411aff754e1b92659987846aba3a14d53
      https://github.com/llvm/llvm-project/commit/64510c1411aff754e1b92659987846aba3a14d53
  Author: Lei Huang <lei at ca.ibm.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsPPC.def
    M clang/lib/Basic/Targets/PPC.cpp
    M clang/lib/Sema/SemaPPC.cpp
    A clang/test/CodeGen/PowerPC/builtins-bcd-assist.c
    A clang/test/CodeGen/PowerPC/builtins-ppc-bcd-assist.c
    M llvm/include/llvm/IR/IntrinsicsPowerPC.td
    M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    A llvm/test/CodeGen/PowerPC/builtins-bcd-assist.ll
    A llvm/test/CodeGen/PowerPC/builtins-ppc-bcd-assist.ll

  Log Message:
  -----------
  [PPC] Implement BCD assist builtins (#101390)

Implement BCD assist builtins for XL and GCC compatibility.

GCC compat:
```
unsigned int __builtin_cdtbcd (unsigned int);
unsigned int __builtin_cbcdtd (unsigned int);
unsigned int __builtin_addg6s (unsigned int, unsigned int);
```

64BIT XL compat:
```
long long __cdtbcd (long long); 
long long __cbcdtd (long long); 
long long __addg6s (long long source1, long long source2)
```


  Commit: 6f8e8faa12daaf4dfd80039ccdeccda68e99850b
      https://github.com/llvm/llvm-project/commit/6f8e8faa12daaf4dfd80039ccdeccda68e99850b
  Author: cceerczw <chengzhiwei6 at huawei.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    A llvm/test/CodeGen/AArch64/emutls_alias.ll

  Log Message:
  -----------
  [TargetLowering] Fix the problem of emulated-TLS implementation witho… (#101490)

For a __thread variable x, when emulated TLS is enabled and there is an
access to x, the compiler first looks up the symbol __emutls_v.x within
the module. However, the issue arises with an alias y of x, the compiler
still tries to look up __emutls_v.y instead of __emutls_v.x. As a
result, the lookup returns a nullptr, causing the compiler to crash. The
purpose of this MR (Merge Request) is to ensure that in emulated TLS,
before checking __emutls_v.y, the compiler first identifies which global
value y is an alias of.


  Commit: f7b2c2e49fe524dd7920af0236c9da79fa0cac57
      https://github.com/llvm/llvm-project/commit/f7b2c2e49fe524dd7920af0236c9da79fa0cac57
  Author: arsnyder16 <arsnyder16 at gmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
    M openmp/runtime/src/kmp_os.h
    M openmp/runtime/src/kmp_platform.h
    M openmp/runtime/src/z_Linux_asm.S

  Log Message:
  -----------
  [openmp][WebAssembly] Allow openmp to compile and run under emscripten toolchain  (#95169)

* Separate wasi and emscripten as they have different constraints and
abilities
* Emscripten mimics Linux/POSIX by statically linking the musl runtime.
This allow nearly all KMP_OS_LINUX code paths to work correctly. There
are only a few places that need to be adjusted related to dynamic
linking (dl_open)
* Internally link openmp globals
* With CommonLinkage it is needed to emit them in an assembly file, now
they are defined and used within each compilation unit
* With ExternalLinkage they suffer from duplicate symbols during linking
for unnamed globals like reduction/critical
   * Interestingly this aligns with the TODO comment above this code


  Commit: 04e7eaf91f3e9b6830feb2e08bb5b0ddb14c3174
      https://github.com/llvm/llvm-project/commit/04e7eaf91f3e9b6830feb2e08bb5b0ddb14c3174
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir

  Log Message:
  -----------
  AMDGPU: Add more baseline tests for eliminateFrameIndex


  Commit: 585523750e2bbe374d1cb3bf4ff9d53de29b9593
      https://github.com/llvm/llvm-project/commit/585523750e2bbe374d1cb3bf4ff9d53de29b9593
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M lldb/source/API/SBStructuredData.cpp
    M lldb/test/API/python_api/sbstructureddata/TestStructuredDataAPI.py

  Log Message:
  -----------
  [lldb/API] Fix SBStructuredData support any JSON type (#101929)

This patch loosen the parsing requirement to allow parsing not only
JSON dictionaries but also valid JSON type (integer, float, string,
bool, array, null).

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


  Commit: dbbf0762b6ee9611d80ba94fdbe3968b228b527a
      https://github.com/llvm/llvm-project/commit/dbbf0762b6ee9611d80ba94fdbe3968b228b527a
  Author: Mircea Trofin <mtrofin at google.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    A llvm/include/llvm/Analysis/CtxProfAnalysis.h
    M llvm/lib/Analysis/CMakeLists.txt
    A llvm/lib/Analysis/CtxProfAnalysis.cpp
    M llvm/lib/Passes/PassBuilder.cpp
    M llvm/lib/Passes/PassBuilderPipelines.cpp
    M llvm/lib/Passes/PassRegistry.def
    A llvm/test/Analysis/CtxProfAnalysis/load.ll

  Log Message:
  -----------
  [ctx_prof] CtxProfAnalysis (#102084)

This is an immutable analysis that loads and makes the contextual profile available to other passes. This patch introduces the analysis and an analysis printer pass. Subsequent patches will introduce the APIs that IPO passes will call to modify the profile as result of their changes.


  Commit: fde7715f55eba6142360ca8eb5183dc74850970e
      https://github.com/llvm/llvm-project/commit/fde7715f55eba6142360ca8eb5183dc74850970e
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn

  Log Message:
  -----------
  [gn build] Port dbbf0762b6ee


  Commit: dd741fc1b1a2a809bedc71a704a6d702c3bc7c8a
      https://github.com/llvm/llvm-project/commit/dd741fc1b1a2a809bedc71a704a6d702c3bc7c8a
  Author: ChiaHungDuan <chiahungduan at google.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M compiler-rt/lib/scudo/standalone/combined.h
    M compiler-rt/lib/scudo/standalone/mem_map_base.h
    M compiler-rt/lib/scudo/standalone/primary64.h
    M compiler-rt/lib/scudo/standalone/release.h
    M compiler-rt/lib/scudo/standalone/secondary.h
    M compiler-rt/lib/scudo/standalone/tests/common_test.cpp
    M compiler-rt/lib/scudo/standalone/tests/map_test.cpp
    M compiler-rt/lib/scudo/standalone/tests/memtag_test.cpp
    M compiler-rt/lib/scudo/standalone/tests/strings_test.cpp
    M compiler-rt/lib/scudo/standalone/tests/vector_test.cpp
    M compiler-rt/lib/scudo/standalone/vector.h

  Log Message:
  -----------
  [scudo][NFC] Add a default unmap() to unmap all pages (#102234)


  Commit: 8ccd4208bbea3f53b3335bd19f13fc11cbe3d7ba
      https://github.com/llvm/llvm-project/commit/8ccd4208bbea3f53b3335bd19f13fc11cbe3d7ba
  Author: Mircea Trofin <mtrofin at google.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/test/Analysis/CtxProfAnalysis/load.ll

  Log Message:
  -----------
  Fix post #102084: restrict to linux to avoid formatting diffs.


  Commit: 172ccfeeb4a037f2f5e42aafd597f0f019ad6fc0
      https://github.com/llvm/llvm-project/commit/172ccfeeb4a037f2f5e42aafd597f0f019ad6fc0
  Author: Martin Storsjö <martin at martin.st>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/include/llvm/Support/Windows/WindowsSupport.h

  Log Message:
  -----------
  [Support] [Windows] Stop redefining _WIN32_IE (#102307)

This was added in 181fd8cd89ff97fe654fabbb2032e0ad6607b4d0, where the
shlobj.h header was taken into use. The shlobj.h header does have some
APIs conditionally visible based on the _WIN32_IE define, but none of
the calls added in that commit seem to need any specific version.

fd6cb64c4891301648e5ab814afdafa118977c3d and
6b129bd464831194da957b3462d7ddd27a0b2a08 further bumped the version it
is set to, while the latter also added a FIXME to check whether it still
is needed.

It doesn't seem to be needed currently; the code currently builds fine
without this define, both with mingw-w64 and MSVC.

Additionally, to show that the value of _WIN32_IE doesn't seem to be
relevant to our builds these days - if the current define is changed to
hardcode _WIN32_IE to an ancient value like 0x0400, our code still
builds fine, both with mingw-w64 and MSVC. Therefore, overriding this
define no longer seem to be relevant.


  Commit: bb82c79d3b6b3c062890c2cb01fcb183d4f50d27
      https://github.com/llvm/llvm-project/commit/bb82c79d3b6b3c062890c2cb01fcb183d4f50d27
  Author: John McIver <john.mciver.iii at gmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/X86/addsub.ll
    M llvm/test/Transforms/SLPVectorizer/X86/fmuladd.ll

  Log Message:
  -----------
  [SLP] Enable optimization of freeze instructions (#102217)

Allow SLP optimization to progress in the presence of freeze
instructions. Prior
to this commit, freeze instructions blocked SLP optimization.
    
The following URL shows correctness of the addsub_freeze test:
https://alive2.llvm.org/ce/z/qm38oh


  Commit: ca7368d839c1b067bbb30b4c91dc4d5f79d30bda
      https://github.com/llvm/llvm-project/commit/ca7368d839c1b067bbb30b4c91dc4d5f79d30bda
  Author: Jinsong Ji <jinsong.ji at intel.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/include/llvm/Target/TargetSelectionDAG.td

  Log Message:
  -----------
  TargetSelectionDAG: Add missing atomic fp opd classes (#102269)

The defs are missing after 5c9352eb0258d .


  Commit: 72b73e23b6c36537db730ebea00f92798108a6e5
      https://github.com/llvm/llvm-project/commit/72b73e23b6c36537db730ebea00f92798108a6e5
  Author: Fangrui Song <i at maskray.me>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang/test/Driver/ftime-trace-sections.py
    M llvm/lib/IR/LegacyPassManager.cpp
    M llvm/lib/Passes/CMakeLists.txt
    M llvm/lib/Passes/StandardInstrumentations.cpp
    M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel

  Log Message:
  -----------
  Revert "demangle function names in trace files (#87626)"

This reverts commit 0fa20c55b58deb94090985a5c5ffda4d5ceb3cd1.

Storing raw symbol names is generally preferred in profile files.
Demangling might lose information. Language frontends might use
demangling schemes not supported by LLVMDemangle
(https://github.com/llvm/llvm-project/issues/45901#issuecomment-2008686663).
In addition, calling `demangle` for each function has a significant
performance overhead (#102222).

I believe that even if we decide to provide a producer-side demangling,
it would not be on by default.

Pull Request: https://github.com/llvm/llvm-project/pull/102274


  Commit: 863a2ed440bbeaade37a01c9480eaf9cfbd0a6d2
      https://github.com/llvm/llvm-project/commit/863a2ed440bbeaade37a01c9480eaf9cfbd0a6d2
  Author: Angel Zhang <angel.zhang at amd.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M mlir/lib/Dialect/GPU/CMakeLists.txt
    A mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
    R mlir/lib/Dialect/GPU/Transforms/DecomposeMemrefs.cpp
    A mlir/test/Integration/Dialect/MemRef/cast-runtime-verification.mlir
    A mlir/test/Integration/Dialect/MemRef/load-runtime-verification.mlir
    A mlir/test/Integration/Dialect/MemRef/memref_abi.c
    A mlir/test/Integration/Dialect/MemRef/print-memref.mlir
    A mlir/test/Integration/Dialect/MemRef/reinterpret-cast-runtime-verification.mlir
    A mlir/test/Integration/Dialect/MemRef/subview-runtime-verification.mlir
    A mlir/test/Integration/Dialect/MemRef/verify-memref.mlir
    R mlir/test/Integration/Dialect/Memref/cast-runtime-verification.mlir
    R mlir/test/Integration/Dialect/Memref/load-runtime-verification.mlir
    R mlir/test/Integration/Dialect/Memref/memref_abi.c
    R mlir/test/Integration/Dialect/Memref/print-memref.mlir
    R mlir/test/Integration/Dialect/Memref/reinterpret-cast-runtime-verification.mlir
    R mlir/test/Integration/Dialect/Memref/subview-runtime-verification.mlir
    R mlir/test/Integration/Dialect/Memref/verify-memref.mlir

  Log Message:
  -----------
  [mlir][memref] Rename `MemRef` directories and files. NFC. (#102337)

This PR renames the `MemRef` integration test directory for and the
`DecomposeMemref.s.cpp` so that they can be found when doing a
case-sensitive search on file paths.


  Commit: 5fb20024e2eaef39d631f63fa82200bf55399090
      https://github.com/llvm/llvm-project/commit/5fb20024e2eaef39d631f63fa82200bf55399090
  Author: yingopq <115543042+yingopq at users.noreply.github.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    A llvm/test/CodeGen/Mips/llvm-ir/and-srl.ll

  Log Message:
  -----------
  [Mips] Add test for AND optimization (#102278)

See https://github.com/llvm/llvm-project/issues/42826


  Commit: 07ddf19438d20f0b9c5131288d278a5c786e662d
      https://github.com/llvm/llvm-project/commit/07ddf19438d20f0b9c5131288d278a5c786e662d
  Author: Sam Elliott <quic_aelliott at quicinc.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang/docs/CommandGuide/clang.rst
    M clang/include/clang/Driver/Options.td

  Log Message:
  -----------
  [clang][docs] Update Include Options Help (#101192)

This adds HelpTexts for some clang options that relate to include
directory handling, to sync them up with what's in clang.rst (and
therefore the man page).


  Commit: 2c74237c0fa5b5289b98c17209f4319b24406e08
      https://github.com/llvm/llvm-project/commit/2c74237c0fa5b5289b98c17209f4319b24406e08
  Author: aaryanshukla <53713108+aaryanshukla at users.noreply.github.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M libc/config/darwin/arm/entrypoints.txt
    M libc/config/darwin/x86_64/entrypoints.txt
    M libc/config/linux/aarch64/entrypoints.txt
    M libc/config/linux/arm/entrypoints.txt
    M libc/config/linux/riscv/entrypoints.txt
    M libc/config/linux/x86_64/entrypoints.txt
    M libc/config/windows/entrypoints.txt
    M libc/docs/math/index.rst
    M libc/newhdrgen/yaml/math.yaml
    M libc/spec/llvm_libc_ext.td
    M libc/spec/stdc.td
    M libc/src/math/CMakeLists.txt
    A libc/src/math/fsub.h
    A libc/src/math/fsubf128.h
    A libc/src/math/fsubl.h
    M libc/src/math/generic/CMakeLists.txt
    A libc/src/math/generic/fsub.cpp
    A libc/src/math/generic/fsubf128.cpp
    A libc/src/math/generic/fsubl.cpp
    A libc/src/math/generic/remainderf128.cpp
    A libc/src/math/remainderf128.h
    M libc/test/src/math/CMakeLists.txt
    A libc/test/src/math/fsub_test.cpp
    A libc/test/src/math/fsubl_test.cpp
    M libc/test/src/math/smoke/CMakeLists.txt
    A libc/test/src/math/smoke/fsub_test.cpp
    A libc/test/src/math/smoke/fsubf128_test.cpp
    A libc/test/src/math/smoke/fsubl_test.cpp

  Log Message:
  -----------
  [libc][math][c23] Add fsub{,l,f128} and remainderf128 C23 math functions (#101576)

Co-authored-by: OverMighty <its.overmighty at gmail.com>


  Commit: 0f1361baf650641a59aaa1710d7a0b7b02f2e56d
      https://github.com/llvm/llvm-project/commit/0f1361baf650641a59aaa1710d7a0b7b02f2e56d
  Author: Kazu Hirata <kazu at google.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M clang/lib/Driver/ToolChains/Darwin.cpp

  Log Message:
  -----------
  [Driver] Fix a warning

This patch fixes:

  clang/lib/Driver/ToolChains/Darwin.cpp:2937:3: error: default label
  in switch which covers all enumeration values
  [-Werror,-Wcovered-switch-default]


  Commit: 4974257bad6126264ed0100f4eb1ca9f1e709551
      https://github.com/llvm/llvm-project/commit/4974257bad6126264ed0100f4eb1ca9f1e709551
  Author: aaryanshukla <53713108+aaryanshukla at users.noreply.github.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M libc/spec/stdc.td

  Log Message:
  -----------
  [libc][math] fixing build broke for remainderf128 (#102362)


  Commit: 6a3604ef8592edf39fedd6af8100aefafd6d931d
      https://github.com/llvm/llvm-project/commit/6a3604ef8592edf39fedd6af8100aefafd6d931d
  Author: Peter Rong <peterrong96 at gmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M lld/MachO/Driver.cpp
    M lld/test/MachO/objc-category-conflicts.s
    M lld/test/MachO/objc-category-merging-complete-test.s
    M lld/test/MachO/objc-category-merging-erase-objc-name-test.s
    M lld/test/MachO/objc-category-merging-minimal.s
    M lld/test/MachO/objc-relative-method-lists-simple.s

  Log Message:
  -----------
  [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (#101360)

This patch makes `objc_relative_method_lists` default on MacOS 11+ / iOS
14+. Manual override still work if command line argument is provided.

To test this change, many explicit arguments are removed from the test
files. Some explicit `no_objc_relative...` are also added for tests that
don't support this yet.

Signed-off-by: Peter Rong <PeterRong at meta.com>


  Commit: 596b3da2ae9668c06ce47b75128594c021ef59d9
      https://github.com/llvm/llvm-project/commit/596b3da2ae9668c06ce47b75128594c021ef59d9
  Author: Florian Mayer <fmayer at google.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M bolt/CMakeLists.txt
    M bolt/include/bolt/Core/BinaryContext.h
    M bolt/lib/Core/BinaryContext.cpp
    M bolt/lib/Core/BinaryFunction.cpp
    M bolt/lib/Rewrite/MachORewriteInstance.cpp
    M bolt/lib/Rewrite/RewriteInstance.cpp
    A bolt/test/AArch64/Inputs/build_id.ldscript
    A bolt/test/AArch64/Inputs/got_end_of_section_symbol.lld_script
    A bolt/test/AArch64/build_id.c
    A bolt/test/AArch64/got_end_of_section_symbol.s
    A bolt/test/AArch64/update-weak-reference-symbol.s
    A bolt/test/X86/Inputs/build_id.yaml
    A bolt/test/X86/build_id.test
    A bolt/test/X86/dynamic-relocs-on-entry.s
    M bolt/test/X86/section-end-sym.s
    M bolt/unittests/Core/BinaryContext.cpp
    M bolt/unittests/Core/MCPlusBuilder.cpp
    M clang-tools-extra/clang-tidy/tool/CMakeLists.txt
    M clang/cmake/modules/AddClang.cmake
    M clang/docs/CommandGuide/clang.rst
    M clang/docs/OpenMPSupport.rst
    M clang/docs/ReleaseNotes.rst
    M clang/docs/StandardCPlusPlusModules.rst
    M clang/docs/UsersManual.rst
    M clang/docs/tools/clang-formatted-files.txt
    M clang/include/clang/AST/ExprCXX.h
    M clang/include/clang/AST/OpenMPClause.h
    M clang/include/clang/AST/RecursiveASTVisitor.h
    M clang/include/clang/Basic/AttributeCommonInfo.h
    M clang/include/clang/Basic/BuiltinsPPC.def
    M clang/include/clang/Basic/BuiltinsX86.def
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/Basic/Features.def
    M clang/include/clang/Basic/LangOptions.def
    M clang/include/clang/Basic/PointerAuthOptions.h
    M clang/include/clang/Basic/arm_sve.td
    M clang/include/clang/Basic/riscv_vector.td
    M clang/include/clang/Basic/riscv_vector_common.td
    M clang/include/clang/Driver/Options.td
    M clang/include/clang/Lex/Preprocessor.h
    M clang/include/clang/Sema/Sema.h
    M clang/include/clang/Sema/SemaOpenMP.h
    M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
    M clang/include/clang/Support/RISCVVIntrinsicUtils.h
    M clang/lib/AST/ASTImporter.cpp
    M clang/lib/AST/ExprCXX.cpp
    M clang/lib/AST/ExprConstant.cpp
    M clang/lib/AST/Interp/Compiler.cpp
    M clang/lib/AST/Interp/Interp.cpp
    M clang/lib/AST/Interp/Interp.h
    M clang/lib/AST/Interp/Pointer.cpp
    M clang/lib/AST/Interp/Pointer.h
    M clang/lib/AST/Interp/State.h
    M clang/lib/AST/OpenMPClause.cpp
    M clang/lib/AST/StmtProfile.cpp
    M clang/lib/Basic/Attributes.cpp
    M clang/lib/Basic/CMakeLists.txt
    M clang/lib/Basic/IdentifierTable.cpp
    M clang/lib/Basic/Targets.cpp
    R clang/lib/Basic/Targets/Le64.cpp
    R clang/lib/Basic/Targets/Le64.h
    M clang/lib/Basic/Targets/OSTargets.h
    M clang/lib/Basic/Targets/PPC.cpp
    M clang/lib/CodeGen/CGOpenMPRuntime.cpp
    M clang/lib/CodeGen/CGStmtOpenMP.cpp
    M clang/lib/CodeGen/CGVTables.cpp
    M clang/lib/CodeGen/CodeGenModule.cpp
    M clang/lib/CodeGen/ItaniumCXXABI.cpp
    M clang/lib/Driver/ToolChain.cpp
    M clang/lib/Driver/ToolChains/Clang.cpp
    M clang/lib/Driver/ToolChains/Darwin.cpp
    M clang/lib/Frontend/CompilerInvocation.cpp
    M clang/lib/Headers/CMakeLists.txt
    A clang/lib/Headers/avx10_2_512satcvtintrin.h
    A clang/lib/Headers/avx10_2satcvtintrin.h
    M clang/lib/Headers/immintrin.h
    M clang/lib/Headers/ptrauth.h
    M clang/lib/Parse/ParseDecl.cpp
    M clang/lib/Parse/ParseOpenMP.cpp
    M clang/lib/Sema/SemaBoundsSafety.cpp
    M clang/lib/Sema/SemaCoroutine.cpp
    M clang/lib/Sema/SemaDecl.cpp
    M clang/lib/Sema/SemaDeclAttr.cpp
    M clang/lib/Sema/SemaDeclCXX.cpp
    M clang/lib/Sema/SemaExpr.cpp
    M clang/lib/Sema/SemaExprMember.cpp
    M clang/lib/Sema/SemaLambda.cpp
    M clang/lib/Sema/SemaOpenMP.cpp
    M clang/lib/Sema/SemaOverload.cpp
    M clang/lib/Sema/SemaPPC.cpp
    M clang/lib/Sema/SemaRISCV.cpp
    M clang/lib/Sema/SemaTemplate.cpp
    M clang/lib/Sema/SemaTemplateInstantiate.cpp
    M clang/lib/Sema/SemaX86.cpp
    M clang/lib/Sema/TreeTransform.h
    M clang/lib/Serialization/ASTReader.cpp
    M clang/lib/Serialization/ASTWriter.cpp
    M clang/test/AST/Interp/arrays.cpp
    M clang/test/AST/Interp/builtin-functions.cpp
    M clang/test/AST/Interp/c.c
    M clang/test/AST/Interp/cxx20.cpp
    M clang/test/AST/Interp/objc.mm
    M clang/test/AST/Interp/vectors.cpp
    M clang/test/CXX/temp/temp.spec/temp.expl.spec/p14-23.cpp
    A clang/test/CodeGen/PowerPC/builtins-bcd-assist.c
    A clang/test/CodeGen/PowerPC/builtins-ppc-bcd-assist.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcompress.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmerge.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrgather.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vcompress.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vmerge.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vmv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vrgather.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vcompress.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmerge.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrgather.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vcompress.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vmerge.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vmv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vrgather.c
    A clang/test/CodeGen/X86/avx10_2_512satcvt-builtins-error.c
    A clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c
    A clang/test/CodeGen/X86/avx10_2satcvt-builtins.c
    M clang/test/CodeGen/aarch64-elf-pauthabi.c
    M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_clamp.c
    M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_max.c
    M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_maxnm.c
    M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_min.c
    M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_minnm.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfclamp.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmax.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmaxnm.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmin.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfminnm.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla_lane.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls_lane.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul_lane.c
    M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfsub.c
    M clang/test/CodeGen/bitfield-access-pad.c
    M clang/test/CodeGen/bitfield-access-unit.c
    A clang/test/CodeGen/ptrauth-init-fini.c
    M clang/test/CodeGenCXX/OmitRTTIComponentABI/simple-vtable-definition.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/child-inheritted-from-parent-in-comdat.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-1.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-2.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/diamond-inheritance.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/diamond-virtual-inheritance.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/inheritted-virtual-function.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/inline-virtual-function.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/multiple-inheritance.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/no-alias-when-dso-local.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/override-pure-virtual-method.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/overriden-virtual-function.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/relative-vtables-flag.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/relative-vtables-hwasan.cpp
    M clang/test/CodeGenCXX/RelativeVTablesABI/simple-vtable-definition.cpp
    M clang/test/CodeGenCXX/bitfield-access-empty.cpp
    M clang/test/CodeGenCXX/bitfield-access-tail.cpp
    M clang/test/CodeGenCXX/temporaries.cpp
    A clang/test/Driver/Inputs/DriverKit23.0.sdk/SDKSettings.json
    A clang/test/Driver/Inputs/MacOSX15.0.sdk/SDKSettings.json
    R clang/test/Driver/Inputs/MacOSX99.0.sdk/SDKSettings.json
    M clang/test/Driver/aarch64-ptrauth.c
    A clang/test/Driver/cl-cxx20-modules.cppm
    M clang/test/Driver/darwin-builtin-modules.c
    M clang/test/Driver/fsanitize.c
    M clang/test/Driver/ftime-trace-sections.py
    R clang/test/Driver/linker-wrapper-passes.c
    M clang/test/Driver/print-enabled-extensions/aarch64-apple-a15.c
    M clang/test/Driver/print-enabled-extensions/aarch64-apple-a16.c
    M clang/test/Driver/print-enabled-extensions/aarch64-apple-a17.c
    M clang/test/Driver/print-enabled-extensions/aarch64-apple-m4.c
    M clang/test/Driver/print-supported-extensions-aarch64.c
    M clang/test/Driver/riscv-cpus.c
    M clang/test/Misc/target-invalid-cpu-note.c
    M clang/test/Modules/crash-vfs-include-pch.m
    M clang/test/OpenMP/target_teams_ast_print.cpp
    M clang/test/OpenMP/target_teams_distribute_num_teams_messages.cpp
    M clang/test/OpenMP/target_teams_distribute_parallel_for_num_teams_messages.cpp
    M clang/test/OpenMP/teams_num_teams_messages.cpp
    M clang/test/Preprocessor/predefined-macros-no-warnings.c
    M clang/test/Preprocessor/ptrauth_feature.c
    M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_b16b16.cpp
    A clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_b16b16.cpp
    A clang/test/SemaCXX/constexpr-vectors-access-elements.cpp
    M clang/test/SemaCXX/decltype.cpp
    A clang/test/SemaCXX/fold_lambda_with_variadics.cpp
    M clang/test/SemaHLSL/BuiltIns/length-errors.hlsl
    M clang/test/SemaTemplate/address_space-dependent.cpp
    M clang/test/TableGen/attrs-parser-string-switches.td
    M clang/test/lit.cfg.py
    M clang/test/lit.site.cfg.py.in
    M clang/tools/clang-linker-wrapper/CMakeLists.txt
    M clang/tools/clang-repl/CMakeLists.txt
    M clang/tools/driver/CMakeLists.txt
    M clang/tools/libclang/CIndex.cpp
    M clang/unittests/AST/ASTImporterTest.cpp
    M clang/unittests/Interpreter/CMakeLists.txt
    M clang/unittests/Interpreter/ExceptionTests/CMakeLists.txt
    M clang/utils/TableGen/ClangAttrEmitter.cpp
    M clang/utils/TableGen/RISCVVEmitter.cpp
    M compiler-rt/lib/asan/asan_errors.cpp
    M compiler-rt/lib/builtins/crtbegin.c
    M compiler-rt/lib/scudo/standalone/CMakeLists.txt
    R compiler-rt/lib/scudo/standalone/benchmarks/CMakeLists.txt
    R compiler-rt/lib/scudo/standalone/benchmarks/malloc_benchmark.cpp
    M compiler-rt/lib/scudo/standalone/combined.h
    M compiler-rt/lib/scudo/standalone/mem_map_base.h
    M compiler-rt/lib/scudo/standalone/primary64.h
    M compiler-rt/lib/scudo/standalone/release.h
    M compiler-rt/lib/scudo/standalone/secondary.h
    M compiler-rt/lib/scudo/standalone/tests/common_test.cpp
    M compiler-rt/lib/scudo/standalone/tests/map_test.cpp
    M compiler-rt/lib/scudo/standalone/tests/memtag_test.cpp
    M compiler-rt/lib/scudo/standalone/tests/strings_test.cpp
    M compiler-rt/lib/scudo/standalone/tests/vector_test.cpp
    M compiler-rt/lib/scudo/standalone/vector.h
    M flang/include/flang/Runtime/CUDA/allocator.h
    A flang/include/flang/Runtime/CUDA/descriptor.h
    M flang/include/flang/Runtime/allocator-registry.h
    M flang/lib/Lower/ConvertVariable.cpp
    M flang/lib/Lower/DirectivesCommon.h
    M flang/lib/Lower/OpenACC.cpp
    M flang/lib/Optimizer/CodeGen/FIROpPatterns.cpp
    M flang/lib/Optimizer/Transforms/CufOpConversion.cpp
    M flang/runtime/CUDA/CMakeLists.txt
    M flang/runtime/CUDA/allocator.cpp
    A flang/runtime/CUDA/descriptor.cpp
    M flang/runtime/copy.cpp
    M flang/test/Fir/CUDA/cuda-allocate.fir
    M flang/test/Fir/box-typecode.fir
    M flang/test/Fir/convert-to-llvm.fir
    M flang/test/Fir/polymorphic.fir
    M flang/test/Fir/tbaa.fir
    M flang/test/Lower/OpenACC/acc-bounds.f90
    M flang/test/Lower/allocatable-polymorphic.f90
    M flang/tools/flang-driver/CMakeLists.txt
    M flang/unittests/Runtime/CUDA/AllocatorCUF.cpp
    M libc/cmake/modules/LLVMLibCTestRules.cmake
    M libc/config/baremetal/arm/entrypoints.txt
    M libc/config/baremetal/riscv/entrypoints.txt
    M libc/config/darwin/arm/entrypoints.txt
    M libc/config/darwin/x86_64/entrypoints.txt
    M libc/config/gpu/entrypoints.txt
    M libc/config/linux/aarch64/entrypoints.txt
    M libc/config/linux/api.td
    M libc/config/linux/arm/entrypoints.txt
    M libc/config/linux/riscv/entrypoints.txt
    M libc/config/linux/x86_64/entrypoints.txt
    M libc/config/windows/entrypoints.txt
    M libc/docs/dev/undefined_behavior.rst
    M libc/docs/math/index.rst
    M libc/docs/overlay_mode.rst
    M libc/include/CMakeLists.txt
    M libc/include/llvm-libc-macros/float-macros.h
    M libc/include/llvm-libc-macros/limits-macros.h
    M libc/include/llvm-libc-types/CMakeLists.txt
    A libc/include/llvm-libc-types/pthread_spinlock_t.h
    M libc/newhdrgen/yaml/math.yaml
    M libc/newhdrgen/yaml/pthread.yaml
    M libc/newhdrgen/yaml_to_classes.py
    M libc/spec/gnu_ext.td
    M libc/spec/llvm_libc_ext.td
    M libc/spec/posix.td
    M libc/spec/stdc.td
    M libc/src/__support/threads/spin_lock.h
    M libc/src/math/CMakeLists.txt
    A libc/src/math/exp10f16.h
    A libc/src/math/exp2f16.h
    A libc/src/math/fdiv.h
    A libc/src/math/fdivf128.h
    A libc/src/math/fdivl.h
    A libc/src/math/ffma.h
    A libc/src/math/ffmaf128.h
    A libc/src/math/ffmal.h
    A libc/src/math/fsub.h
    A libc/src/math/fsubf128.h
    A libc/src/math/fsubl.h
    M libc/src/math/generic/CMakeLists.txt
    A libc/src/math/generic/exp10f16.cpp
    A libc/src/math/generic/exp2f16.cpp
    A libc/src/math/generic/expxf16.h
    A libc/src/math/generic/fdiv.cpp
    A libc/src/math/generic/fdivf128.cpp
    A libc/src/math/generic/fdivl.cpp
    A libc/src/math/generic/ffma.cpp
    A libc/src/math/generic/ffmaf128.cpp
    A libc/src/math/generic/ffmal.cpp
    A libc/src/math/generic/fsub.cpp
    A libc/src/math/generic/fsubf128.cpp
    A libc/src/math/generic/fsubl.cpp
    A libc/src/math/generic/getpayloadl.cpp
    M libc/src/math/generic/pow.cpp
    A libc/src/math/generic/remainderf128.cpp
    A libc/src/math/getpayloadl.h
    A libc/src/math/remainderf128.h
    M libc/src/pthread/CMakeLists.txt
    A libc/src/pthread/pthread_spin_destroy.cpp
    A libc/src/pthread/pthread_spin_destroy.h
    A libc/src/pthread/pthread_spin_init.cpp
    A libc/src/pthread/pthread_spin_init.h
    A libc/src/pthread/pthread_spin_lock.cpp
    A libc/src/pthread/pthread_spin_lock.h
    A libc/src/pthread/pthread_spin_trylock.cpp
    A libc/src/pthread/pthread_spin_trylock.h
    A libc/src/pthread/pthread_spin_unlock.cpp
    A libc/src/pthread/pthread_spin_unlock.h
    M libc/src/time/mktime.cpp
    M libc/src/time/time_utils.h
    M libc/test/integration/src/pthread/CMakeLists.txt
    M libc/test/integration/src/pthread/pthread_rwlock_test.cpp
    A libc/test/integration/src/pthread/pthread_spinlock_test.cpp
    M libc/test/src/math/CMakeLists.txt
    A libc/test/src/math/exp10f16_test.cpp
    A libc/test/src/math/exp2f16_test.cpp
    A libc/test/src/math/fdiv_test.cpp
    A libc/test/src/math/fdivl_test.cpp
    A libc/test/src/math/ffma_test.cpp
    A libc/test/src/math/ffmal_test.cpp
    A libc/test/src/math/fsub_test.cpp
    A libc/test/src/math/fsubl_test.cpp
    M libc/test/src/math/performance_testing/CMakeLists.txt
    A libc/test/src/math/performance_testing/exp10f16_perf.cpp
    A libc/test/src/math/performance_testing/exp2f16_perf.cpp
    M libc/test/src/math/pow_test.cpp
    M libc/test/src/math/smoke/CMakeLists.txt
    M libc/test/src/math/smoke/DivTest.h
    M libc/test/src/math/smoke/GetPayloadTest.h
    M libc/test/src/math/smoke/SetPayloadTest.h
    A libc/test/src/math/smoke/exp10f16_test.cpp
    A libc/test/src/math/smoke/exp2f16_test.cpp
    A libc/test/src/math/smoke/fdiv_test.cpp
    A libc/test/src/math/smoke/fdivf128_test.cpp
    A libc/test/src/math/smoke/fdivl_test.cpp
    A libc/test/src/math/smoke/ffma_test.cpp
    A libc/test/src/math/smoke/ffmaf128_test.cpp
    A libc/test/src/math/smoke/ffmal_test.cpp
    A libc/test/src/math/smoke/fsub_test.cpp
    A libc/test/src/math/smoke/fsubf128_test.cpp
    A libc/test/src/math/smoke/fsubl_test.cpp
    A libc/test/src/math/smoke/getpayloadl_test.cpp
    M libc/test/src/time/mktime_test.cpp
    M libc/utils/MPFRWrapper/MPFRUtils.cpp
    M libc/utils/gpu/loader/Loader.h
    M libc/utils/gpu/loader/amdgpu/amdhsa-loader.cpp
    M libc/utils/gpu/loader/nvptx/nvptx-loader.cpp
    M libc/utils/gpu/server/CMakeLists.txt
    M libc/utils/gpu/server/rpc_server.cpp
    M libcxx/docs/Status/Cxx20Issues.csv
    M libcxx/include/fstream
    M libcxx/include/ios
    M libcxx/include/sstream
    M libcxx/include/string
    M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/default.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/move.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/path.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/pointer.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/string.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/default.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/move.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/path.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/pointer.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/string.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/default.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/move.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/path.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/pointer.pass.cpp
    M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/string.pass.cpp
    M libcxx/test/std/input.output/iostreams.base/ios/basic.ios.members/copyfmt.pass.cpp
    M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/default.pass.cpp
    M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/mode.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/move.pass.cpp
    M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/string-alloc.mode.pass.cpp
    M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/string.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/string.mode.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/string.move.mode.pass.cpp
    M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/string.pass.cpp
    M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/default.pass.cpp
    M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/mode.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/move.pass.cpp
    M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/string-alloc.mode.pass.cpp
    M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/string.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/string.mode.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/string.move.mode.pass.cpp
    M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/string.pass.cpp
    M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/default.pass.cpp
    M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/mode.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/move.pass.cpp
    M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/string-alloc.mode.pass.cpp
    M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/string.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/string.mode.alloc.pass.cpp
    M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/string.move.mode.pass.cpp
    M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/string.pass.cpp
    M libcxx/test/std/numerics/c.math/hermite.pass.cpp
    M libcxx/test/std/strings/basic.string/string.cons/move_alloc.pass.cpp
    M libcxx/test/std/strings/basic.string/string.cons/substr_rvalue.pass.cpp
    M libcxx/test/std/strings/basic.string/string.modifiers/string_swap/swap.pass.cpp
    M libcxx/test/std/time/time.cal/time.cal.ymdlast/time.cal.ymdlast.nonmembers/comparisons.pass.cpp
    M libcxx/test/support/operator_hijacker.h
    M lld/ELF/Arch/ARM.cpp
    M lld/ELF/Config.h
    M lld/ELF/InputFiles.cpp
    M lld/ELF/Writer.cpp
    M lld/MachO/Driver.cpp
    M lld/cmake/modules/AddLLD.cmake
    A lld/test/ELF/arm-mixed-plts.s
    A lld/test/ELF/hip-section-layout.s
    M lld/test/MachO/lto-object-path.ll
    M lld/test/MachO/objc-category-conflicts.s
    M lld/test/MachO/objc-category-merging-complete-test.s
    M lld/test/MachO/objc-category-merging-erase-objc-name-test.s
    M lld/test/MachO/objc-category-merging-minimal.s
    M lld/test/MachO/objc-relative-method-lists-simple.s
    M lld/test/wasm/lto/stub-library.s
    M lld/tools/lld/CMakeLists.txt
    M lld/wasm/Driver.cpp
    M lld/wasm/InputFiles.cpp
    M lldb/include/lldb/Host/Config.h.cmake
    M lldb/include/lldb/Target/Process.h
    M lldb/include/lldb/Target/StopInfo.h
    M lldb/include/lldb/Target/Thread.h
    M lldb/include/lldb/Target/ThreadPlan.h
    A lldb/include/lldb/Target/ThreadPlanSingleThreadTimeout.h
    M lldb/include/lldb/Target/ThreadPlanStepOut.h
    M lldb/include/lldb/Target/ThreadPlanStepOverRange.h
    M lldb/include/lldb/Target/ThreadPlanStepRange.h
    A lldb/include/lldb/Target/TimeoutResumeAll.h
    M lldb/include/lldb/Utility/AddressableBits.h
    M lldb/include/lldb/lldb-enumerations.h
    M lldb/packages/Python/lldbsuite/test/decorators.py
    M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
    M lldb/source/API/SBDebugger.cpp
    M lldb/source/API/SBStructuredData.cpp
    M lldb/source/API/SBThread.cpp
    M lldb/source/Core/Progress.cpp
    M lldb/source/Interpreter/CommandInterpreter.cpp
    M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
    M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.h
    M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
    M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.cpp
    M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCDeclVendor.cpp
    M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
    M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
    M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
    M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
    M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
    M lldb/source/Plugins/SymbolFile/NativePDB/PdbAstBuilder.cpp
    M lldb/source/Plugins/SymbolFile/NativePDB/UdtRecordCompleter.cpp
    M lldb/source/Plugins/SymbolFile/PDB/PDBASTParser.cpp
    M lldb/source/Plugins/SymbolLocator/CMakeLists.txt
    M lldb/source/Plugins/SymbolVendor/ELF/SymbolVendorELF.cpp
    M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
    M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
    M lldb/source/Target/CMakeLists.txt
    M lldb/source/Target/Process.cpp
    M lldb/source/Target/StopInfo.cpp
    M lldb/source/Target/TargetProperties.td
    M lldb/source/Target/Thread.cpp
    M lldb/source/Target/ThreadPlan.cpp
    A lldb/source/Target/ThreadPlanSingleThreadTimeout.cpp
    M lldb/source/Target/ThreadPlanStepInRange.cpp
    M lldb/source/Target/ThreadPlanStepOverRange.cpp
    M lldb/source/Target/ThreadPlanStepRange.cpp
    A lldb/test/API/debuginfod/Normal/Makefile
    A lldb/test/API/debuginfod/Normal/TestDebuginfod.py
    A lldb/test/API/debuginfod/Normal/main.c
    A lldb/test/API/debuginfod/SplitDWARF/Makefile
    A lldb/test/API/debuginfod/SplitDWARF/TestDebuginfodDWP.py
    A lldb/test/API/debuginfod/SplitDWARF/main.c
    A lldb/test/API/functionalities/single-thread-step/Makefile
    A lldb/test/API/functionalities/single-thread-step/TestSingleThreadStepTimeout.py
    A lldb/test/API/functionalities/single-thread-step/main.cpp
    M lldb/test/API/python_api/sbstructureddata/TestStructuredDataAPI.py
    M lldb/tools/lldb-dap/JSONUtils.cpp
    M lldb/tools/lldb-dap/LLDBUtils.cpp
    M lldb/unittests/Core/ProgressReportTest.cpp
    M lldb/unittests/Symbol/TestClangASTImporter.cpp
    M lldb/unittests/Symbol/TestTypeSystemClang.cpp
    M llvm/CMakeLists.txt
    M llvm/cmake/modules/AddLLVM.cmake
    M llvm/docs/NVPTXUsage.rst
    M llvm/docs/ReleaseNotes.rst
    M llvm/examples/ExceptionDemo/CMakeLists.txt
    M llvm/examples/HowToUseLLJIT/CMakeLists.txt
    M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter1/CMakeLists.txt
    M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter2/CMakeLists.txt
    M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter3/CMakeLists.txt
    M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter4/CMakeLists.txt
    M llvm/examples/Kaleidoscope/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter4/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter5/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter6/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter7/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter8/CMakeLists.txt
    M llvm/examples/Kaleidoscope/Chapter9/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITDumpObjects/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITRemovableCode/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithCustomObjectLinkingLayer/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithGDBRegistrationListener/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithInitializers/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithLazyReexports/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithObjectCache/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithObjectLinkingLayerPlugin/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithOptimizingIRTransform/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/CMakeLists.txt
    M llvm/examples/OrcV2Examples/LLJITWithThinLTOSummaries/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsAddObjectFile/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsBasicUsage/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsDumpObjects/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsIRTransforms/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsLazy/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsRemovableCode/CMakeLists.txt
    M llvm/examples/OrcV2Examples/OrcV2CBindingsVeryLazy/CMakeLists.txt
    M llvm/include/llvm/ADT/GraphTraits.h
    M llvm/include/llvm/ADT/STLExtras.h
    A llvm/include/llvm/Analysis/CtxProfAnalysis.h
    M llvm/include/llvm/Analysis/RegionInfoImpl.h
    M llvm/include/llvm/Analysis/TargetLibraryInfo.def
    M llvm/include/llvm/BinaryFormat/COFF.h
    M llvm/include/llvm/BinaryFormat/ELF.h
    M llvm/include/llvm/CodeGen/BasicTTIImpl.h
    M llvm/include/llvm/CodeGen/ExpandVectorPredication.h
    M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
    M llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
    M llvm/include/llvm/CodeGen/MachineBasicBlock.h
    M llvm/include/llvm/CodeGen/MachineFunction.h
    M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
    M llvm/include/llvm/CodeGen/Passes.h
    M llvm/include/llvm/CodeGen/PreISelIntrinsicLowering.h
    M llvm/include/llvm/CodeGen/SDPatternMatch.h
    M llvm/include/llvm/CodeGen/SelectionDAG.h
    M llvm/include/llvm/CodeGen/TargetFrameLowering.h
    M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
    M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
    M llvm/include/llvm/IR/Constants.h
    M llvm/include/llvm/IR/IntrinsicsNVVM.td
    M llvm/include/llvm/IR/IntrinsicsPowerPC.td
    M llvm/include/llvm/IR/IntrinsicsX86.td
    M llvm/include/llvm/IR/Module.h
    M llvm/include/llvm/LinkAllPasses.h
    M llvm/include/llvm/MC/MCELFObjectWriter.h
    M llvm/include/llvm/MCA/Stages/InOrderIssueStage.h
    M llvm/include/llvm/Object/COFF.h
    M llvm/include/llvm/Passes/CodeGenPassBuilder.h
    M llvm/include/llvm/Passes/MachinePassRegistry.def
    M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
    M llvm/include/llvm/SandboxIR/SandboxIR.h
    M llvm/include/llvm/SandboxIR/SandboxIRValues.def
    M llvm/include/llvm/SandboxIR/Tracker.h
    M llvm/include/llvm/Support/GenericDomTree.h
    M llvm/include/llvm/Support/GenericDomTreeConstruction.h
    M llvm/include/llvm/Support/Windows/WindowsSupport.h
    M llvm/include/llvm/Target/TargetSelectionDAG.td
    M llvm/include/llvm/TargetParser/Triple.h
    M llvm/lib/Analysis/BasicAliasAnalysis.cpp
    M llvm/lib/Analysis/CMakeLists.txt
    A llvm/lib/Analysis/CtxProfAnalysis.cpp
    M llvm/lib/Analysis/InstructionSimplify.cpp
    M llvm/lib/Analysis/TargetLibraryInfo.cpp
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/lib/CodeGen/BasicBlockSections.cpp
    M llvm/lib/CodeGen/CFIInstrInserter.cpp
    M llvm/lib/CodeGen/ExpandVectorPredication.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/IntrinsicLowering.cpp
    M llvm/lib/CodeGen/MIRSampleProfile.cpp
    M llvm/lib/CodeGen/MachineBlockPlacement.cpp
    M llvm/lib/CodeGen/MachineFunction.cpp
    M llvm/lib/CodeGen/MachinePipeliner.cpp
    M llvm/lib/CodeGen/MachineRegisterInfo.cpp
    M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
    M llvm/lib/CodeGen/PrologEpilogInserter.cpp
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/lib/CodeGen/TargetPassConfig.cpp
    M llvm/lib/CodeGen/TargetRegisterInfo.cpp
    M llvm/lib/CodeGen/UnreachableBlockElim.cpp
    M llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
    M llvm/lib/ExecutionEngine/JITLink/ELF_aarch64.cpp
    M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
    M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
    M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
    M llvm/lib/IR/AutoUpgrade.cpp
    M llvm/lib/IR/ConstantRange.cpp
    M llvm/lib/IR/Constants.cpp
    M llvm/lib/IR/DebugProgramInstruction.cpp
    M llvm/lib/IR/LegacyPassManager.cpp
    M llvm/lib/IR/Module.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/MC/ELFObjectWriter.cpp
    M llvm/lib/MC/MCELFObjectTargetWriter.cpp
    M llvm/lib/MCA/Stages/InOrderIssueStage.cpp
    M llvm/lib/Object/COFFObjectFile.cpp
    M llvm/lib/Object/ELFObjectFile.cpp
    M llvm/lib/Passes/CMakeLists.txt
    M llvm/lib/Passes/PassBuilder.cpp
    M llvm/lib/Passes/PassBuilderPipelines.cpp
    M llvm/lib/Passes/PassRegistry.def
    M llvm/lib/Passes/StandardInstrumentations.cpp
    M llvm/lib/ProfileData/PGOCtxProfReader.cpp
    M llvm/lib/SandboxIR/SandboxIR.cpp
    M llvm/lib/SandboxIR/Tracker.cpp
    M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
    M llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
    M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
    M llvm/lib/Target/AArch64/AArch64FastISel.cpp
    M llvm/lib/Target/AArch64/AArch64Features.td
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.h
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
    M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
    M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
    M llvm/lib/Target/AArch64/AArch64Processors.td
    M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
    M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
    M llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
    M llvm/lib/Target/ARM/ARMInstrThumb2.td
    M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
    M llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
    M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
    M llvm/lib/Target/CSKY/CSKYConstantIslandPass.cpp
    M llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp
    M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
    M llvm/lib/Target/NVPTX/NVPTX.h
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
    M llvm/lib/Target/NVPTX/NVPTXUtilities.h
    M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
    M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    M llvm/lib/Target/RISCV/CMakeLists.txt
    M llvm/lib/Target/RISCV/RISCV.h
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    A llvm/lib/Target/RISCV/RISCVIndirectBranchTracking.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/lib/Target/RISCV/RISCVProcessors.td
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
    M llvm/lib/Target/X86/X86DomainReassignment.cpp
    M llvm/lib/Target/X86/X86FrameLowering.cpp
    M llvm/lib/Target/X86/X86FrameLowering.h
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.h
    M llvm/lib/Target/X86/X86InstrAVX10.td
    M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
    M llvm/lib/Target/X86/X86InstrUtils.td
    M llvm/lib/Target/X86/X86IntrinsicsInfo.h
    M llvm/lib/Target/X86/X86RegisterInfo.cpp
    M llvm/lib/TargetParser/Triple.cpp
    M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
    M llvm/lib/Transforms/Scalar/LICM.cpp
    M llvm/lib/Transforms/Utils/Local.cpp
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    A llvm/test/Analysis/BasicAA/nusw_nuw_nonneg.ll
    M llvm/test/Analysis/BasicAA/struct-geps.ll
    M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
    M llvm/test/Analysis/CostModel/ARM/arith-ssat.ll
    M llvm/test/Analysis/CostModel/ARM/arith-usat.ll
    A llvm/test/Analysis/CtxProfAnalysis/load.ll
    M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
    A llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-exchange-fence.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuffle-splat.mir
    M llvm/test/CodeGen/AArch64/O0-pipeline.ll
    M llvm/test/CodeGen/AArch64/O3-pipeline.ll
    M llvm/test/CodeGen/AArch64/abds.ll
    M llvm/test/CodeGen/AArch64/abdu.ll
    A llvm/test/CodeGen/AArch64/emutls_alias.ll
    M llvm/test/CodeGen/AArch64/note-gnu-property-elf-pauthabi.ll
    A llvm/test/CodeGen/AArch64/ptrauth-basic-pic.ll
    A llvm/test/CodeGen/AArch64/ptrauth-elf-globals-pic.ll
    A llvm/test/CodeGen/AArch64/ptrauth-extern-weak.ll
    A llvm/test/CodeGen/AArch64/ptrauth-got-abuse.ll
    A llvm/test/CodeGen/AArch64/ptrauth-init-fini.ll
    A llvm/test/CodeGen/AArch64/ptrauth-tagged-globals-pic.ll
    M llvm/test/CodeGen/AArch64/sme2-intrinsics-max.ll
    M llvm/test/CodeGen/AArch64/sme2-intrinsics-min.ll
    A llvm/test/CodeGen/AArch64/sms-order-physreg-deps.mir
    M llvm/test/CodeGen/AArch64/srem-seteq-vec-splat.ll
    A llvm/test/CodeGen/AArch64/ssve-stack-hazard-remarks.ll
    M llvm/test/CodeGen/AArch64/sve-pred-selectop2.ll
    M llvm/test/CodeGen/AArch64/sve-pred-selectop3.ll
    M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll
    M llvm/test/CodeGen/AArch64/sve2-min-max-clamp.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfadd.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfclamp.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmax.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmaxnm.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmin.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfminnm.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmla.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmla_lane.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmls.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmls_lane.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmul.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmul_lane.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfsub.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
    M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
    M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
    M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
    A llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/merge-sbuffer-load.mir
    M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
    M llvm/test/CodeGen/ARM/O3-pipeline.ll
    M llvm/test/CodeGen/ARM/setjmp-bti-basic.ll
    M llvm/test/CodeGen/BPF/objdump_atomics.ll
    M llvm/test/CodeGen/BPF/objdump_cond_op.ll
    M llvm/test/CodeGen/BPF/objdump_imm_hex.ll
    M llvm/test/CodeGen/BPF/objdump_static_var.ll
    R llvm/test/CodeGen/Generic/expand-vp-fp-intrinsics.ll
    R llvm/test/CodeGen/Generic/expand-vp-gather-scatter.ll
    R llvm/test/CodeGen/Generic/expand-vp-load-store.ll
    R llvm/test/CodeGen/Generic/expand-vp.ll
    M llvm/test/CodeGen/LoongArch/O0-pipeline.ll
    M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
    M llvm/test/CodeGen/M68k/pipeline.ll
    A llvm/test/CodeGen/Mips/llvm-ir/and-srl.ll
    A llvm/test/CodeGen/NVPTX/fence-proxy-tensormap.ll
    M llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
    M llvm/test/CodeGen/NVPTX/load-store.ll
    M llvm/test/CodeGen/PowerPC/O0-pipeline.ll
    M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
    M llvm/test/CodeGen/PowerPC/aix-base-pointer.ll
    A llvm/test/CodeGen/PowerPC/builtins-bcd-assist.ll
    A llvm/test/CodeGen/PowerPC/builtins-ppc-bcd-assist.ll
    M llvm/test/CodeGen/PowerPC/common-chain.ll
    M llvm/test/CodeGen/RISCV/O0-pipeline.ll
    M llvm/test/CodeGen/RISCV/O3-pipeline.ll
    M llvm/test/CodeGen/RISCV/jumptable-swguarded.ll
    A llvm/test/CodeGen/RISCV/lpad.ll
    M llvm/test/CodeGen/RISCV/rvv/vcompress.ll
    A llvm/test/CodeGen/RISCV/rvv/vp-select.ll
    M llvm/test/CodeGen/RISCV/rvv/vrgather.ll
    M llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll
    M llvm/test/CodeGen/WebAssembly/offset.ll
    M llvm/test/CodeGen/X86/O0-pipeline.ll
    M llvm/test/CodeGen/X86/apx/and.ll
    M llvm/test/CodeGen/X86/apx/cmov.ll
    M llvm/test/CodeGen/X86/apx/mul-i1024.ll
    M llvm/test/CodeGen/X86/apx/or.ll
    M llvm/test/CodeGen/X86/apx/push2-pop2-vector-register.ll
    M llvm/test/CodeGen/X86/apx/push2-pop2.ll
    M llvm/test/CodeGen/X86/apx/pushp-popp.ll
    M llvm/test/CodeGen/X86/apx/shift-eflags.ll
    M llvm/test/CodeGen/X86/apx/sub.ll
    M llvm/test/CodeGen/X86/apx/xor.ll
    A llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
    A llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
    M llvm/test/CodeGen/X86/avx512-intel-ocl.ll
    A llvm/test/CodeGen/X86/clobber_base_ptr.ll
    A llvm/test/CodeGen/X86/clobber_frame_ptr.ll
    A llvm/test/CodeGen/X86/clobber_frame_ptr_x32.ll
    M llvm/test/CodeGen/X86/cmp.ll
    M llvm/test/CodeGen/X86/combine-srem.ll
    M llvm/test/CodeGen/X86/i386-baseptr.ll
    M llvm/test/CodeGen/X86/inline-asm-function-call-pic.ll
    M llvm/test/CodeGen/X86/opt-pipeline.ll
    M llvm/test/CodeGen/X86/popcnt.ll
    M llvm/test/CodeGen/X86/select_const_i128.ll
    M llvm/test/CodeGen/X86/srem-seteq-vec-splat.ll
    M llvm/test/CodeGen/X86/x86-32-intrcc.ll
    M llvm/test/CodeGen/X86/x86-64-baseptr.ll
    M llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll
    M llvm/test/DebugInfo/Generic/assignment-tracking/dse/dse-after-memcpyopt-merge.ll
    M llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten-offset.ll
    M llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten.ll
    M llvm/test/DebugInfo/Generic/assignment-tracking/salvage-value.ll
    M llvm/test/DebugInfo/Generic/sroa-extract-bits.ll
    M llvm/test/ExecutionEngine/JITLink/AArch64/ELF_relocations.s
    M llvm/test/MC/AArch64/SME2/bfclamp-diagnostics.s
    M llvm/test/MC/AArch64/SME2/bfclamp.s
    M llvm/test/MC/AArch64/SME2/bfmax-diagnostics.s
    M llvm/test/MC/AArch64/SME2/bfmax.s
    M llvm/test/MC/AArch64/SME2/bfmaxnm-diagnostics.s
    M llvm/test/MC/AArch64/SME2/bfmaxnm.s
    M llvm/test/MC/AArch64/SME2/bfmin-diagnostics.s
    M llvm/test/MC/AArch64/SME2/bfmin.s
    M llvm/test/MC/AArch64/SME2/bfminnm-diagnostics.s
    M llvm/test/MC/AArch64/SME2/bfminnm.s
    M llvm/test/MC/AArch64/SME2p1/directive-arch-negative.s
    M llvm/test/MC/AArch64/SME2p1/directive-arch.s
    M llvm/test/MC/AArch64/SME2p1/directive-arch_extension-negative.s
    M llvm/test/MC/AArch64/SME2p1/directive-arch_extension.s
    M llvm/test/MC/AArch64/SVE2p1/bfadd-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfadd.s
    M llvm/test/MC/AArch64/SVE2p1/bfclamp-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfclamp.s
    M llvm/test/MC/AArch64/SVE2p1/bfmax-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfmax.s
    M llvm/test/MC/AArch64/SVE2p1/bfmaxnm-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfmaxnm.s
    M llvm/test/MC/AArch64/SVE2p1/bfmin-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfmin.s
    M llvm/test/MC/AArch64/SVE2p1/bfminnm-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfminnm.s
    M llvm/test/MC/AArch64/SVE2p1/bfmla-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfmla.s
    M llvm/test/MC/AArch64/SVE2p1/bfmls-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfmls.s
    M llvm/test/MC/AArch64/SVE2p1/bfmul-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfmul.s
    M llvm/test/MC/AArch64/SVE2p1/bfsub-diagnostics.s
    M llvm/test/MC/AArch64/SVE2p1/bfsub.s
    M llvm/test/MC/AArch64/SVE2p1/directive-arch-negative.s
    M llvm/test/MC/AArch64/SVE2p1/directive-arch.s
    M llvm/test/MC/AArch64/SVE2p1/directive-arch_extension-negative.s
    M llvm/test/MC/AArch64/SVE2p1/directive-arch_extension.s
    A llvm/test/MC/AArch64/adrp-auth-relocation.s
    M llvm/test/MC/AArch64/arm64-elf-relocs.s
    M llvm/test/MC/AArch64/ilp32-diagnostics.s
    M llvm/test/MC/AMDGPU/gfx10_asm_vop1.s
    M llvm/test/MC/AMDGPU/gfx10_err_pos.s
    M llvm/test/MC/AMDGPU/gfx12_asm_smem.s
    M llvm/test/MC/ARM/Windows/branch-reloc-offset.s
    M llvm/test/MC/BPF/insn-unit.s
    M llvm/test/MC/BPF/load-store-32.s
    A llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt
    A llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt
    A llvm/test/MC/X86/avx10.2satcvt-32-att.s
    A llvm/test/MC/X86/avx10.2satcvt-32-intel.s
    A llvm/test/MC/X86/avx10.2satcvt-64-att.s
    A llvm/test/MC/X86/avx10.2satcvt-64-intel.s
    A llvm/test/TableGen/SubtargetFeatureUniqueNames.td
    M llvm/test/TableGen/x86-fold-tables.inc
    M llvm/test/Transforms/Attributor/heap_to_stack_gpu.ll
    M llvm/test/Transforms/Attributor/value-simplify-gpu.ll
    M llvm/test/Transforms/CorrelatedValuePropagation/shl.ll
    M llvm/test/Transforms/InstCombine/dbg-scalable-store-fixed-frag.ll
    M llvm/test/Transforms/InstCombine/debuginfo.ll
    M llvm/test/Transforms/InstCombine/select-icmp-and.ll
    M llvm/test/Transforms/InstSimplify/insertelement.ll
    A llvm/test/Transforms/InstSimplify/select-icmp.ll
    M llvm/test/Transforms/LICM/hoist-binop.ll
    M llvm/test/Transforms/LoopIdiom/basic.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
    M llvm/test/Transforms/LoopVectorize/induction.ll
    M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
    M llvm/test/Transforms/LoopVectorize/multiple-strides-vectorization.ll
    M llvm/test/Transforms/Mem2Reg/dbg_declare_to_value_conversions.ll
    M llvm/test/Transforms/Mem2Reg/debug-alloca-vla-2.ll
    M llvm/test/Transforms/OpenMP/barrier_removal.ll
    M llvm/test/Transforms/PhaseOrdering/varargs.ll
    A llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-fp-intrinsics.ll
    A llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-gather-scatter.ll
    A llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-load-store.ll
    A llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp.ll
    M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
    M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-use-ptr.ll
    M llvm/test/Transforms/SLPVectorizer/X86/PR32086.ll
    M llvm/test/Transforms/SLPVectorizer/X86/addsub.ll
    A llvm/test/Transforms/SLPVectorizer/X86/cmp-diff-sized.ll
    A llvm/test/Transforms/SLPVectorizer/X86/extractelement-phi-in-landingpad.ll
    M llvm/test/Transforms/SLPVectorizer/X86/fmuladd.ll
    M llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll
    A llvm/test/Transforms/SLPVectorizer/X86/reduced-value-replace-extractelement.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reduction-gather-non-scheduled-extracts.ll
    M llvm/test/Transforms/SLPVectorizer/X86/stores_mix_sizes.ll
    M llvm/test/Transforms/SLPVectorizer/revec.ll
    M llvm/test/Transforms/SimplifyCFG/X86/sink-common-code.ll
    A llvm/test/Transforms/StructurizeCFG/loop-break-phi.ll
    A llvm/test/tools/llvm-readobj/COFF/arm64x-reloc-invalid.yaml
    A llvm/test/tools/llvm-readobj/COFF/arm64x-reloc.yaml
    M llvm/test/tools/llvm-readobj/ELF/AArch64/aarch64-feature-pauth.s
    M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
    M llvm/test/tools/yaml2obj/COFF/load-config.yaml
    M llvm/tools/bugpoint/CMakeLists.txt
    M llvm/tools/llc/CMakeLists.txt
    M llvm/tools/llc/llc.cpp
    M llvm/tools/lli/CMakeLists.txt
    M llvm/tools/lli/ChildTarget/CMakeLists.txt
    M llvm/tools/llvm-jitlink/CMakeLists.txt
    M llvm/tools/llvm-jitlink/llvm-jitlink-executor/CMakeLists.txt
    M llvm/tools/llvm-lto2/CMakeLists.txt
    M llvm/tools/llvm-readobj/COFFDumper.cpp
    M llvm/tools/llvm-readobj/ELFDumper.cpp
    M llvm/tools/llvm-readobj/ObjDumper.cpp
    M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
    M llvm/tools/llvm-reduce/deltas/ReduceInstructionFlags.cpp
    M llvm/tools/llvm-reduce/deltas/ReduceVirtualRegisters.cpp
    M llvm/tools/opt/CMakeLists.txt
    M llvm/tools/opt/optdriver.cpp
    M llvm/unittests/Analysis/CMakeLists.txt
    M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
    M llvm/unittests/BinaryFormat/MachOTest.cpp
    M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
    M llvm/unittests/IR/ConstantRangeTest.cpp
    M llvm/unittests/Passes/Plugins/CMakeLists.txt
    M llvm/unittests/ProfileData/PGOCtxProfReaderWriterTest.cpp
    M llvm/unittests/SandboxIR/SandboxIRTest.cpp
    M llvm/unittests/SandboxIR/TrackerTest.cpp
    M llvm/unittests/Support/CMakeLists.txt
    M llvm/unittests/Support/DynamicLibrary/CMakeLists.txt
    A llvm/unittests/Support/GenericDomTreeTest.cpp
    M llvm/unittests/TargetParser/TargetParserTest.cpp
    M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
    M llvm/utils/TableGen/RegisterInfoEmitter.cpp
    M llvm/utils/TableGen/SubtargetEmitter.cpp
    M llvm/utils/extract_symbols.py
    M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
    M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
    M llvm/utils/gn/secondary/clang/test/BUILD.gn
    M llvm/utils/gn/secondary/lldb/include/lldb/Host/BUILD.gn
    M llvm/utils/gn/secondary/lldb/source/Target/BUILD.gn
    M llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
    M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
    M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
    M mlir/docs/DefiningDialects/AttributesAndTypes.md
    M mlir/docs/Dialects/Vector.md
    M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
    M mlir/include/mlir/Dialect/ArmSME/Transforms/Passes.td
    M mlir/include/mlir/Pass/PassRegistry.h
    M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
    M mlir/include/mlir/Tools/mlir-opt/MlirOptMain.h
    M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
    M mlir/lib/Dialect/ArmSME/Transforms/CMakeLists.txt
    M mlir/lib/Dialect/ArmSME/Transforms/OuterProductFusion.cpp
    M mlir/lib/Dialect/Bufferization/Transforms/BufferDeallocationSimplification.cpp
    M mlir/lib/Dialect/GPU/CMakeLists.txt
    A mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
    R mlir/lib/Dialect/GPU/Transforms/DecomposeMemrefs.cpp
    M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
    M mlir/lib/Pass/PassRegistry.cpp
    M mlir/lib/Target/LLVMIR/ModuleImport.cpp
    M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
    M mlir/lib/Transforms/Utils/RegionUtils.cpp
    M mlir/python/requirements.txt
    M mlir/test/Dialect/ArmSME/outer-product-fusion.mlir
    M mlir/test/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation/dealloc-branchop-interface.mlir
    M mlir/test/Dialect/LLVMIR/types.mlir
    M mlir/test/Dialect/Linalg/detensorize_entry_block.mlir
    M mlir/test/Dialect/Linalg/detensorize_if.mlir
    M mlir/test/Dialect/Linalg/detensorize_while.mlir
    M mlir/test/Dialect/Linalg/detensorize_while_impure_cf.mlir
    M mlir/test/Dialect/Linalg/detensorize_while_pure_cf.mlir
    M mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir
    M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul-mixed-types.mlir
    A mlir/test/Integration/Dialect/MemRef/cast-runtime-verification.mlir
    A mlir/test/Integration/Dialect/MemRef/load-runtime-verification.mlir
    A mlir/test/Integration/Dialect/MemRef/memref_abi.c
    A mlir/test/Integration/Dialect/MemRef/print-memref.mlir
    A mlir/test/Integration/Dialect/MemRef/reinterpret-cast-runtime-verification.mlir
    A mlir/test/Integration/Dialect/MemRef/subview-runtime-verification.mlir
    A mlir/test/Integration/Dialect/MemRef/verify-memref.mlir
    R mlir/test/Integration/Dialect/Memref/cast-runtime-verification.mlir
    R mlir/test/Integration/Dialect/Memref/load-runtime-verification.mlir
    R mlir/test/Integration/Dialect/Memref/memref_abi.c
    R mlir/test/Integration/Dialect/Memref/print-memref.mlir
    R mlir/test/Integration/Dialect/Memref/reinterpret-cast-runtime-verification.mlir
    R mlir/test/Integration/Dialect/Memref/subview-runtime-verification.mlir
    R mlir/test/Integration/Dialect/Memref/verify-memref.mlir
    M mlir/test/Target/LLVMIR/Import/global-variables.ll
    M mlir/test/Target/LLVMIR/llvmir-types.mlir
    M mlir/test/Transforms/canonicalize-block-merge.mlir
    M mlir/test/Transforms/canonicalize-dce.mlir
    M mlir/test/Transforms/make-isolated-from-above.mlir
    A mlir/test/Transforms/test-canonicalize-merge-large-blocks.mlir
    M mlir/tools/mlir-cpu-runner/CMakeLists.txt
    M mlir/tools/mlir-opt/CMakeLists.txt
    M openmp/runtime/src/kmp_os.h
    M openmp/runtime/src/kmp_platform.h
    M openmp/runtime/src/z_Linux_asm.S
    M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel

  Log Message:
  -----------
  [𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]


Compare: https://github.com/llvm/llvm-project/compare/72456baaf74e...596b3da2ae96

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