[all-commits] [llvm/llvm-project] 89db3b: [AArch64] Fix MatchDup Lane Out Of Range In AArch6...

[cceerczw via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 89db3bbd27ddc5ec980799c987dafd167c5a4564
      https://github.com/llvm/llvm-project/commit/89db3bbd27ddc5ec980799c987dafd167c5a4564
  Author: cceerczw <chengzhiwei6 at huawei.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuffle-splat.mir

  Log Message:
  -----------
  [AArch64] Fix MatchDup Lane Out Of Range In AArch64 (#101275)

The original code is intended to process pattern which ISEL generated.
The purpose of this pattern is duplicate a scalar value to vector
register which behavior like AArch64's Dup Inst.

See Url https://reviews.llvm.org/D81979 &&
https://reviews.llvm.org/D81221

The current code considers only the preceding situation which just
duplicate from Shuffle's LHS but does not consider the user code. RHS
should be considered.



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