[all-commits] [llvm/llvm-project] fa92d5: [VP] Merge ExpandVP pass into PreISelIntrinsicLowe...

[Alexis Engelke via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fa92d51f9e609270bf14c4bc16eb42a98183d27f
      https://github.com/llvm/llvm-project/commit/fa92d51f9e609270bf14c4bc16eb42a98183d27f
  Author: Alexis Engelke <engelke at in.tum.de>
  Date:   2024-08-06 (Tue, 06 Aug 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/ExpandVectorPredication.h
    M llvm/include/llvm/CodeGen/Passes.h
    M llvm/include/llvm/LinkAllPasses.h
    M llvm/include/llvm/Passes/MachinePassRegistry.def
    M llvm/lib/CodeGen/ExpandVectorPredication.cpp
    M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
    M llvm/lib/CodeGen/TargetPassConfig.cpp
    M llvm/test/CodeGen/AArch64/O0-pipeline.ll
    M llvm/test/CodeGen/AArch64/O3-pipeline.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
    M llvm/test/CodeGen/ARM/O3-pipeline.ll
    R llvm/test/CodeGen/Generic/expand-vp-fp-intrinsics.ll
    R llvm/test/CodeGen/Generic/expand-vp-gather-scatter.ll
    R llvm/test/CodeGen/Generic/expand-vp-load-store.ll
    R llvm/test/CodeGen/Generic/expand-vp.ll
    M llvm/test/CodeGen/LoongArch/O0-pipeline.ll
    M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
    M llvm/test/CodeGen/PowerPC/O0-pipeline.ll
    M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
    M llvm/test/CodeGen/RISCV/O0-pipeline.ll
    M llvm/test/CodeGen/RISCV/O3-pipeline.ll
    M llvm/test/CodeGen/X86/O0-pipeline.ll
    M llvm/test/CodeGen/X86/opt-pipeline.ll
    A llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-fp-intrinsics.ll
    A llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-gather-scatter.ll
    A llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-load-store.ll
    A llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp.ll
    M llvm/tools/llc/llc.cpp
    M llvm/tools/opt/optdriver.cpp

  Log Message:
  -----------
  [VP] Merge ExpandVP pass into PreISelIntrinsicLowering (#101652)

Similar to #97727; avoid an extra pass over the entire IR by performing
the lowering as part of the pre-isel-intrinsic-lowering pass.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications