[all-commits] [llvm/llvm-project] dcd246: [ARM] Add scalar add_sat costs. (#100988)

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: dcd246cbde09feda6b9c81b0520e5911644ec5db
      https://github.com/llvm/llvm-project/commit/dcd246cbde09feda6b9c81b0520e5911644ec5db
  Author: David Green <david.green at arm.com>
  Date:   2024-08-05 (Mon, 05 Aug 2024)

  Changed paths:
    M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/ARM/arith-ssat.ll
    M llvm/test/Analysis/CostModel/ARM/arith-usat.ll
    M llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll

  Log Message:
  -----------
  [ARM] Add scalar add_sat costs. (#100988)

These can usually generate:
 - qadd / qsub for signed i32 scalars
- uqadd16 / qadd16 / uqsub16 / qsub16 with an extend for signed/unsigned
i8/i16
 - Are expanded to an add + cmp + sel otherwise

This can lead to differences in unrolling etc, but should be a better
cost for the instructions.



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