[all-commits] [llvm/llvm-project] 4461b6: [X86_32][C++] fix 0 sized struct case in vaarg. (#...
Fangrui Song via All-commits
all-commits at lists.llvm.org
Mon Aug 5 10:33:33 PDT 2024
Branch: refs/heads/users/MaskRay/spr/suppress-spurious-warnings-due-to-r_riscv_set_uleb128
Home: https://github.com/llvm/llvm-project
Commit: 4461b69022ebd43350f560d4643ba6f373d891b7
https://github.com/llvm/llvm-project/commit/4461b69022ebd43350f560d4643ba6f373d891b7
Author: Longsheng Mou <moulongsheng at huawei.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGenCXX/regparm.cpp
M clang/test/CodeGenCXX/x86_32-vaarg.cpp
Log Message:
-----------
[X86_32][C++] fix 0 sized struct case in vaarg. (#86388)
struct SuperEmpty { struct{ int a[0];} b;};
Such 0 sized structs in c++ mode can not be ignored in i386 for that c++
fields are never empty.But when EmitVAArg, its size is 0, so that
va_list not increase.Maybe we can just Ignore this kind of arguments,
like X86_64 did. Fix #86385.
Commit: 6867324eeec7c4f297c2f787d9c7b4d751a384c7
https://github.com/llvm/llvm-project/commit/6867324eeec7c4f297c2f787d9c7b4d751a384c7
Author: Longsheng Mou <moulongsheng at huawei.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/DropEquivalentBufferResults.cpp
Log Message:
-----------
[mlir][bufferization] Improve performance of DropEquivalentBufferResultsPass (#101281)
By using DenseMap to minimize the traveral time of callOps, and the
efficiency of running this pass has been greatly improved.
Commit: e3d9b01a36afbd8e630a5da2a1d3681055a75069
https://github.com/llvm/llvm-project/commit/e3d9b01a36afbd8e630a5da2a1d3681055a75069
Author: Mel Chen <mel.chen at sifive.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan][NFC] Make VPValue pointer const. (#101334)
Commit: ca26ea28ed10c7fd642bfbdf4f897a4362674460
https://github.com/llvm/llvm-project/commit/ca26ea28ed10c7fd642bfbdf4f897a4362674460
Author: Andrea Faulds <andrea.faulds at amd.com>
Date: 2024-08-01 (Thu, 01 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Target/SPIRV/decorations.mlir
Log Message:
-----------
[mlir][spirv] Add definitions and (de)serialization for FPRoundingMode (#101546)
Commit: 9373a43218ba7d55e2ec5c52147ec39daaf8f177
https://github.com/llvm/llvm-project/commit/9373a43218ba7d55e2ec5c52147ec39daaf8f177
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-08-01 (Thu, 01 Aug 2024)
Changed paths:
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/test/Transforms/Attributor/memory_locations_gpu.ll
Log Message:
-----------
[Attributor] Indicate optimistic fixed point if an instruction already has non-zero address space (#101589)
Commit: 6c375ae7a4d97a9947fdc16be4d86e9eba3dde4c
https://github.com/llvm/llvm-project/commit/6c375ae7a4d97a9947fdc16be4d86e9eba3dde4c
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-08-01 (Thu, 01 Aug 2024)
Changed paths:
M clang/test/CodeGen/attr-nomerge.cpp
Log Message:
-----------
Fix attr-nomerge.cpp with fixed triple
Commit: e7f73c03dfe6c895b2dbe6d8d1d03546b87888c4
https://github.com/llvm/llvm-project/commit/e7f73c03dfe6c895b2dbe6d8d1d03546b87888c4
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-08-01 (Thu, 01 Aug 2024)
Changed paths:
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
Log Message:
-----------
[Attributor] Use `getPointerAddressSpace` to replace a cast followed by a `getAddressSpace`
Commit: 7a134f5ec55d611fb51b50f2a4f32b2b18b44ea1
https://github.com/llvm/llvm-project/commit/7a134f5ec55d611fb51b50f2a4f32b2b18b44ea1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-01 (Thu, 01 Aug 2024)
Changed paths:
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfncvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfncvt_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwcvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwcvt_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmerge.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vreinterpret.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfncvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfncvt_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwcvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwcvt_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vmerge.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vmv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vreinterpret.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfncvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfncvt_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwcvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwcvt_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmerge.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfncvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfncvt_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwcvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwcvt_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vmerge.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vmv.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/zvfhmin.c
Log Message:
-----------
[RISCV] Use Zvhmin instead of Zvfh on RUN lines for some intrinsic tests. NFC (#101540)
Loads/stores/reinterpret/vfncvt.f.f.w/vfwcvt.f.f.v/vmerge/vmv.v.v are
all expected to work for f16 vectors with Zvfhmin.
Remove the handcrafted Zvfhmin test that partially tested this.
Splits the vfwcvt.f.f.v and vfncvt.f.f.w tests into their own file so we
can have a separate RUN line from the float<->int conversions.
Commit: 8b26c02caaa002edc2d70af9e6a8024c4b1343cf
https://github.com/llvm/llvm-project/commit/8b26c02caaa002edc2d70af9e6a8024c4b1343cf
Author: hev <wangrui at loongson.cn>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/test/CodeGen/LoongArch/unaligned-memcpy-inline.ll
Log Message:
-----------
[LoongArch] Align stack objects passed to memory intrinsics (#101309)
Memcpy, and other memory intrinsics, typically try to use wider
load/store if the source and destination addresses are aligned. In
CodeGenPrepare, look for calls to memory intrinsics and, if the object
is on the stack, align it to 4-byte (32-bit) or 8-byte (64-bit)
boundaries if it is large enough that we expect memcpy to use wider
load/store instructions to copy it.
Fixes #101295
Commit: aca971d336d9c7650120fc0fd6dfe58866408216
https://github.com/llvm/llvm-project/commit/aca971d336d9c7650120fc0fd6dfe58866408216
Author: Koakuma <koachan at protonmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcTargetStreamer.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcTargetStreamer.h
M llvm/lib/Target/Sparc/Sparc.td
M llvm/test/MC/Sparc/elf-sparc-machine-type.s
Log Message:
-----------
[SPARC][IAS] Add v8plus feature bit (#101367)
Implement handling for `v8plus` feature bit to allow the user to switch
between V8 and V8+ mode with 32-bit code.
Currently this only sets the appropriate ELF machine type and flags;
codegen changes will be done in future patches.
This is done as a prerequisite for `-mv8plus` flag on clang (#98713).
Commit: 96e6255e8b8b4e9e7bf0846df94dddcb79ced6f5
https://github.com/llvm/llvm-project/commit/96e6255e8b8b4e9e7bf0846df94dddcb79ced6f5
Author: Farzon Lotfi <1802579+farzonl at users.noreply.github.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/Basic/Builtins.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/SemaHLSL/BuiltIns/all-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/any-errors.hlsl
Log Message:
-----------
[HLSL] cleanup builtin names elementwise usage (#101543)
Remove elementwise description for builtins that don't perform
elementwise operations.
Commit: 10bad2c8d7be1bbb726c536dd306da3cae2247b4
https://github.com/llvm/llvm-project/commit/10bad2c8d7be1bbb726c536dd306da3cae2247b4
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsX86.def
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/Driver/ToolChains/Arch/X86.cpp
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/avx10_2_512niintrin.h
A clang/lib/Headers/avx10_2niintrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Sema/SemaX86.cpp
A clang/test/CodeGen/X86/avx10_2_512ni-builtins.c
A clang/test/CodeGen/X86/avx10_2ni-builtins.c
M clang/test/CodeGen/attr-target-x86.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/Driver/x86-target-features.c
M clang/test/Preprocessor/x86_target_features.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
M llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
A llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrFormats.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86InstrInfo.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
A llvm/test/CodeGen/X86/avx10_2_512ni-intrinsics.ll
A llvm/test/CodeGen/X86/avx10_2ni-intrinsics.ll
A llvm/test/MC/Disassembler/X86/avx10_2ni-32.txt
A llvm/test/MC/Disassembler/X86/avx10_2ni-64.txt
A llvm/test/MC/X86/avx10_2ni-32-intel.s
A llvm/test/MC/X86/avx10_2ni-64-att.s
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/utils/TableGen/X86DisassemblerTables.cpp
M llvm/utils/TableGen/X86ManualInstrMapping.def
M llvm/utils/TableGen/X86RecognizableInstr.cpp
M llvm/utils/TableGen/X86RecognizableInstr.h
Log Message:
-----------
[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Commit: 358593ba87a18a8e85dafc0683c5e7af94009135
https://github.com/llvm/llvm-project/commit/358593ba87a18a8e85dafc0683c5e7af94009135
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-01 (Thu, 01 Aug 2024)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenRegisters.h
Log Message:
-----------
[TableGen] Use std::move. NFC
Fixes #101408.
Commit: 8abdf7cc71a72a67ae7b3e60002943e84c8ab218
https://github.com/llvm/llvm-project/commit/8abdf7cc71a72a67ae7b3e60002943e84c8ab218
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-08-01 (Thu, 01 Aug 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Fix a misannotation of PointerOrReference (#101291)
Fixes #101138.
Commit: 2e0588d5e1c9e9a0936846173dbc488f462a6c2d
https://github.com/llvm/llvm-project/commit/2e0588d5e1c9e9a0936846173dbc488f462a6c2d
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsX86.def
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/Driver/ToolChains/Arch/X86.cpp
M clang/lib/Headers/CMakeLists.txt
R clang/lib/Headers/avx10_2_512niintrin.h
R clang/lib/Headers/avx10_2niintrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Sema/SemaX86.cpp
R clang/test/CodeGen/X86/avx10_2_512ni-builtins.c
R clang/test/CodeGen/X86/avx10_2ni-builtins.c
M clang/test/CodeGen/attr-target-x86.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/Driver/x86-target-features.c
M clang/test/Preprocessor/x86_target_features.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
M llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
R llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrFormats.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86InstrInfo.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
R llvm/test/CodeGen/X86/avx10_2_512ni-intrinsics.ll
R llvm/test/CodeGen/X86/avx10_2ni-intrinsics.ll
R llvm/test/MC/Disassembler/X86/avx10_2ni-32.txt
R llvm/test/MC/Disassembler/X86/avx10_2ni-64.txt
R llvm/test/MC/X86/avx10_2ni-32-intel.s
R llvm/test/MC/X86/avx10_2ni-64-att.s
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/utils/TableGen/X86DisassemblerTables.cpp
M llvm/utils/TableGen/X86ManualInstrMapping.def
M llvm/utils/TableGen/X86RecognizableInstr.cpp
M llvm/utils/TableGen/X86RecognizableInstr.h
Log Message:
-----------
Revert "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions" (#101612)
Reverts llvm/llvm-project#101452
There are several buildbot failed. Revert first.
Commit: a2855f51208cd9596b94003e3bf6836b2a7d5971
https://github.com/llvm/llvm-project/commit/a2855f51208cd9596b94003e3bf6836b2a7d5971
Author: Petr Hosek <phosek at google.com>
Date: 2024-08-01 (Thu, 01 Aug 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[CMake][Fuchsia] Use standard spelling for Arm baremetal targets (#101302)
It's more common to use `none` rather than `unknown` for the OS
component in Arm baremetal targets.
Commit: 983869a0365c685049ea9015a2b4d7241b98fd4f
https://github.com/llvm/llvm-project/commit/983869a0365c685049ea9015a2b4d7241b98fd4f
Author: Petr Hosek <phosek at google.com>
Date: 2024-08-01 (Thu, 01 Aug 2024)
Changed paths:
M clang/lib/Driver/ToolChains/BareMetal.cpp
A clang/test/Driver/Inputs/baremetal_arm/lib/crt0.o
A clang/test/Driver/Inputs/basic_baremetal_tree/lib/armv6m-unknown-none-eabi/crt0.o
M clang/test/Driver/baremetal.cpp
Log Message:
-----------
[Driver] Include crt0.o in the baremetal link (#101258)
The common baremetal libc implementations already provide crt0.o and GCC
automatically links it so this improves parity.
Commit: 840ec59a0bbf0f1042d5c4cbc82c82faa6223ebe
https://github.com/llvm/llvm-project/commit/840ec59a0bbf0f1042d5c4cbc82c82faa6223ebe
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-01 (Thu, 01 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Refactor setOperationActions for scalar ISD::ABS. NFC
Commit: 60a7d33106d3cd645d3100a8a935a1e3837f885d
https://github.com/llvm/llvm-project/commit/60a7d33106d3cd645d3100a8a935a1e3837f885d
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Analysis/LazyValueInfo.cpp
Log Message:
-----------
[LVI][NFC] Delete an outdated comment (#101504)
Transitioned from inheritance to has-a relationship in 9db7948e
Commit: 46bc11dd9213e2236e09518d42c6355cb45a320a
https://github.com/llvm/llvm-project/commit/46bc11dd9213e2236e09518d42c6355cb45a320a
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-01 (Thu, 01 Aug 2024)
Changed paths:
M compiler-rt/lib/asan/asan_globals.cpp
Log Message:
-----------
[NFC][asan] Use Thread Safety Analysis in asan_globals.cpp
Reviewers: thurstond, kstoimenov
Reviewed By: kstoimenov
Pull Request: https://github.com/llvm/llvm-project/pull/101574
Commit: 54a940b5ba0e1bc215f4034bd3a2fb8ec5817351
https://github.com/llvm/llvm-project/commit/54a940b5ba0e1bc215f4034bd3a2fb8ec5817351
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-01 (Thu, 01 Aug 2024)
Changed paths:
M compiler-rt/lib/asan/asan_globals.cpp
Log Message:
-----------
[NFC][asan] Switch to IntrusiveList in asan_globals (#101577)
It's preparation for switching to hash table in #101596.
Commit: b33a675e3f5710bd56715e8058b541c21c325de0
https://github.com/llvm/llvm-project/commit/b33a675e3f5710bd56715e8058b541c21c325de0
Author: R <rqou at berkeley.edu>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M libunwind/src/UnwindRegistersRestore.S
M libunwind/src/UnwindRegistersSave.S
Log Message:
-----------
[RISCV] Allow libunwind to build for rv32e (#98855)
Don't try to save x16-x31 when using rv32e ISA
Note that I haven't actually tested yet whether or not unwinding
actually works on rv32e, but the code as-is doesn't even build.
Commit: e9c20b9132c93baaaf78a070fa4cd0a853ca5e65
https://github.com/llvm/llvm-project/commit/e9c20b9132c93baaaf78a070fa4cd0a853ca5e65
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/Linux/odr_indicator_unregister.cpp
Log Message:
-----------
[test][asan] Disabled a new test on Android
Will investigate soon.
The test is from #100923.
Commit: eef1d7e3776a4eb235012076f40b8ecc0723afce
https://github.com/llvm/llvm-project/commit/eef1d7e3776a4eb235012076f40b8ecc0723afce
Author: Alexander Pivovarov <pivovaa at amazon.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M mlir/include/mlir-c/BuiltinTypes.h
M mlir/include/mlir/IR/Builders.h
M mlir/include/mlir/IR/BuiltinTypes.h
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/include/mlir/IR/Types.h
M mlir/lib/AsmParser/TokenKinds.def
M mlir/lib/AsmParser/TypeParser.cpp
M mlir/lib/Bindings/Python/IRTypes.cpp
M mlir/lib/CAPI/IR/BuiltinTypes.cpp
M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/IR/Types.cpp
M mlir/python/mlir/_mlir_libs/_mlir/ir.pyi
M mlir/python/mlir/extras/types.py
M mlir/test/IR/attribute.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/python/ir/builtin_types.py
M mlir/utils/lldb-scripts/mlirDataFormatters.py
M mlir/utils/tree-sitter-mlir/grammar.js
Log Message:
-----------
[MLIR] Add f8E3M4 IEEE 754 type (#101230)
This PR adds `f8E3M4` type to mlir.
`f8E3M4` type follows IEEE 754 convention
```c
f8E3M4 (IEEE 754)
- Exponent bias: 3
- Maximum stored exponent value: 6 (binary 110)
- Maximum unbiased exponent value: 6 - 3 = 3
- Minimum stored exponent value: 1 (binary 001)
- Minimum unbiased exponent value: 1 − 3 = −2
- Precision specifies the total number of bits used for the significand (mantissa),
including implicit leading integer bit = 4 + 1 = 5
- Follows IEEE 754 conventions for representation of special values
- Has Positive and Negative zero
- Has Positive and Negative infinity
- Has NaNs
Additional details:
- Max exp (unbiased): 3
- Min exp (unbiased): -2
- Infinities (+/-): S.111.0000
- Zeros (+/-): S.000.0000
- NaNs: S.111.{0,1}⁴ except S.111.0000
- Max normal number: S.110.1111 = +/-2^(6-3) x (1 + 15/16) = +/-2^3 x 31 x 2^(-4) = +/-15.5
- Min normal number: S.001.0000 = +/-2^(1-3) x (1 + 0) = +/-2^(-2)
- Max subnormal number: S.000.1111 = +/-2^(-2) x 15/16 = +/-2^(-2) x 15 x 2^(-4) = +/-15 x 2^(-6)
- Min subnormal number: S.000.0001 = +/-2^(-2) x 1/16 = +/-2^(-2) x 2^(-4) = +/-2^(-6)
```
Related PRs:
- [PR-99698](https://github.com/llvm/llvm-project/pull/99698) [APFloat]
Add support for f8E3M4 IEEE 754 type
- [PR-97118](https://github.com/llvm/llvm-project/pull/97118) [MLIR] Add
f8E4M3 IEEE 754 type
Commit: 10df3207434e603be5f7e9b3036d821dd5623d3a
https://github.com/llvm/llvm-project/commit/10df3207434e603be5f7e9b3036d821dd5623d3a
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/test/Integration/OpenMP/copyprivate.f90
M flang/test/Lower/OpenMP/Todo/omp-default-clause-inner-loop.f90
M flang/test/Lower/OpenMP/associate.f90
M flang/test/Lower/OpenMP/copyprivate.f90
M flang/test/Lower/OpenMP/copyprivate2.f90
M flang/test/Lower/OpenMP/critical.f90
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/firstprivate-allocatable.f90
M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/parallel-firstprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/parallel-private-clause-str.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
M flang/test/Lower/OpenMP/unstructured.f90
Log Message:
-----------
[flang][OpenMP] Enable delayed privatization for `omp parallel` by default (#90945)
Flips the delayed privatization switch to be on by default. After the
recent fixes related to delayed privatization, the gfortran test suite
runs successfully with delayed privatization turned on by defuault for
`omp parallel`.
Commit: 85c5265feae82d8e26869adf4505b448b3a17534
https://github.com/llvm/llvm-project/commit/85c5265feae82d8e26869adf4505b448b3a17534
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Unify and optimize constant folding (NFC) (#101473)
Add a common constantFoldAndGroupOps() helper that takes care of
constant folding and grouping transforms that are common to all nary
ops. This moves the constant folding prior to grouping, which is more
efficient, and excludes any constant from the sort.
The constant folding has hooks for folding, identity constants and
absorber constants.
This gives a compile-time improvement for SCEV-heavy workloads like
lencod.
Commit: 9fa17fea3c2edb5903250b0da8f67861b81527b3
https://github.com/llvm/llvm-project/commit/9fa17fea3c2edb5903250b0da8f67861b81527b3
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/tools/clang-format/ClangFormat.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/MatchFilePathTest.cpp
Log Message:
-----------
[clang-format] Handle parenthesized list in RemoveParentheses (#100852)
Also, reformat clang-format source to remove redundant parentheses
enclosing single list items.
Fixes #100768.
Commit: e7f9d8e5c3e49e729c69aaa9be3322f7902370b8
https://github.com/llvm/llvm-project/commit/e7f9d8e5c3e49e729c69aaa9be3322f7902370b8
Author: Sam Tebbs <samuel.tebbs at arm.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/whilewr.ll
Log Message:
-----------
[AArch64] Lower alias mask to a whilewr (#100769)
https://github.com/llvm/llvm-project/pull/100579 emits IR that creates a
mask disabling lanes that could alias within a loop iteration, based on
a pair of pointers. This PR lowers that IR to the WHILEWR instruction
for AArch64.
Commit: 3c3851f3ed837aaae7df76e9a4cbb866dbfee3ac
https://github.com/llvm/llvm-project/commit/3c3851f3ed837aaae7df76e9a4cbb866dbfee3ac
Author: Kendal Harland <3987220+kendalharland at users.noreply.github.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M lldb/test/API/functionalities/breakpoint/breakpoint_conditions/TestBreakpointConditions.py
Log Message:
-----------
[lldb][test][x86_64][win] Split assertion in TestBreakpointConditions (#100487)
This PR splits the test assertion that verifies we're on the correct
line and have the correct value of `val` to make the error message more
clear. At present it just shows `Assertion error: True != False`
Co-authored-by: kendal <kendal at thebrowser.company>
Commit: 08decd20a968ddec459376ef64a4987ef74e15dc
https://github.com/llvm/llvm-project/commit/08decd20a968ddec459376ef64a4987ef74e15dc
Author: Sam Parker <sam.parker at arm.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
Log Message:
-----------
[WebAssembly] load_zero to initialise build_vector (#100610)
Instead of splatting a single lane, to initialise a build_vector, lower
to scalar_to_vector which can be selected to load_zero.
Also add load_zero and load_lane patterns for f32x4 and f64x2.
Commit: a6a462f09cce77511de037d9cb61e9fc835d4f4d
https://github.com/llvm/llvm-project/commit/a6a462f09cce77511de037d9cb61e9fc835d4f4d
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
Log Message:
-----------
[MLIR][OpenMP] Add omp.target_triples attribute to the OffloadModuleInterface (#100154)
The `OffloadModuleInterface` holds getter/setter methods to access
OpenMP dialect module-level discardable attributes used to hold general
OpenMP compilation information.
This patch adds the `omp.target_triples` attribute, which is intended to
hold the list of offloading target triples linked to the host module in
which it appears. This attribute should be empty when
`omp.is_target_device=true`.
Commit: fb470db7b3a8ce6853e8bf17d235617a2fa79434
https://github.com/llvm/llvm-project/commit/fb470db7b3a8ce6853e8bf17d235617a2fa79434
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/Inline/AArch64/sme-pstateza-attrs.ll
Log Message:
-----------
[AArch64] Avoid inlining if ZT0 needs preserving. (#101343)
Inlining may result in different behaviour when the callee clobbers ZT0,
because normally the call-site will have code to preserve ZT0. When
inlining the function this code to preserve ZT0 will no longer be
emitted, and so the resulting behaviour of the program is changed.
Commit: 92e18ffd803365c64910760ba20278f875d93681
https://github.com/llvm/llvm-project/commit/92e18ffd803365c64910760ba20278f875d93681
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/Analysis/CostModel/RISCV/int-bit-manip.ll
M llvm/test/CodeGen/ARM/popcnt.ll
M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
M llvm/test/CodeGen/RISCV/pr56457.ll
M llvm/test/CodeGen/RISCV/pr95271.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/sextw-removal.ll
M llvm/test/CodeGen/Thumb2/mve-ctpop.ll
Log Message:
-----------
[SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (#99752)
The main change is adding CTPOP to `RuntimeLibcalls.def` to allow
targets to use LibCall action for CTPOP. DAG legalizers are changed
accordingly.
Commit: 6d2bbba187cd8fdc3e6e46cb753d4d9c6c276103
https://github.com/llvm/llvm-project/commit/6d2bbba187cd8fdc3e6e46cb753d4d9c6c276103
Author: Victor Perez <victor.perez at codeplay.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Target/LLVMIR/LLVMImportInterface.h
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/func.mlir
A mlir/test/Target/LLVMIR/Import/metadata-kernel.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[MLIR][LLVM] Attach kernel metadata representation to `llvm.func` (#101314)
Add optional attributes to `llvm.func` representing LLVM so-called
"kernel" metadata:
-
[`vec_type_hint`](https://clang.llvm.org/docs/AttributeReference.html#vec-type-hint)
-
[`work_group_size_hint`](https://clang.llvm.org/docs/AttributeReference.html#work-group-size-hint)
-
[`reqd_work_group_size`](https://clang.llvm.org/docs/AttributeReference.html#reqd-work-group-size)
-
[`intel_reqd_sub_group_size`](https://clang.llvm.org/docs/AttributeReference.html#intel-reqd-sub-group-size).
---------
Signed-off-by: Victor Perez <victor.perez at codeplay.com>
Commit: 9dadb1f62bb8086a53ba39d188665c4fe3a9c6ec
https://github.com/llvm/llvm-project/commit/9dadb1f62bb8086a53ba39d188665c4fe3a9c6ec
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M flang/include/flang/Frontend/LangOptions.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
A flang/test/Lower/OpenMP/offload-targets.f90
M flang/tools/bbc/bbc.cpp
Log Message:
-----------
[Flang][OpenMP] Add frontend support for -fopenmp-targets (#100155)
This patch adds support for the `-fopenmp-targets` option to the `bbc`
and `flang -fc1` tools. It adds an `OMPTargetTriples` property to the
`LangOptions` structure, which is filled with the triples represented by
the compiler option.
This is used to initialize the `omp.target_triples` module attribute for
later use by lowering stages.
Commit: 92fbc963a51683d32f70d0c7f3783bb13983f08d
https://github.com/llvm/llvm-project/commit/92fbc963a51683d32f70d0c7f3783bb13983f08d
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
A llvm/test/CodeGen/AMDGPU/div-rem-by-constant-64.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
Log Message:
-----------
[AMDGPU] Always lower s/udiv64 by constant to MUL (#100723)
Solves #100383
Commit: 99ae2edc2592e602b0eb5a287f4d003aa3902440
https://github.com/llvm/llvm-project/commit/99ae2edc2592e602b0eb5a287f4d003aa3902440
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
A clang/test/Analysis/block-in-critical-section-inheritance.cpp
Log Message:
-----------
[analyzer] Restore recognition of mutex methods (#101511)
Before commit 705788c the checker alpha.unix.BlockInCriticalSection
"recognized" the methods `std::mutex::lock` and `std::mutex::unlock`
with an extremely trivial check that accepted any function (or method)
named lock/unlock.
To avoid matching unrelated user-defined function, this was refined to a
check that also requires the presence of "std" and "mutex" as distinct
parts of the qualified name.
However, as #99628 reported, there are standard library implementations
where some methods of `std::mutex` are inherited from an implementation
detail base class and the new code wasn't able to recognize these
methods, which led to emitting false positive reports.
As a workaround, this commit partially restores the old behavior by
omitting the check for the class name.
In the future, it would be good to replace this hack with a solution
which ensures that `CallDescription` understands inherited methods.
Commit: 84b1e59580a44ef8a89198aedc6b01fd7d6775fb
https://github.com/llvm/llvm-project/commit/84b1e59580a44ef8a89198aedc6b01fd7d6775fb
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-array-sectioning-host.mlir
M mlir/test/Target/LLVMIR/omptarget-byref-bycopy-generation-host.mlir
A mlir/test/Target/LLVMIR/omptarget-depend-host-only.mlir
M mlir/test/Target/LLVMIR/omptarget-depend.mlir
M mlir/test/Target/LLVMIR/omptarget-fortran-allocatable-types-host.mlir
M mlir/test/Target/LLVMIR/omptarget-fortran-common-block-host.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-record-type-mapping-host.mlir
A mlir/test/Target/LLVMIR/omptarget-region-host-only.mlir
M mlir/test/Target/LLVMIR/omptarget-region-llvm.mlir
Log Message:
-----------
[MLIR][OpenMP][OMPIRBuilder] Add lowering support for omp.target_triples (#100156)
This patch modifies MLIR to LLVM IR lowering of the OpenMP dialect to take into
consideration the contents of the `omp.target_triples` module attribute while
generating code for `omp.target` operations.
It adds the `OpenMPIRBuilderConfig::TargetTriples` field and initializes it
using the `amendOperation` flow of the `OpenMPToLLVMIRTranslation` pass. Some
changes are introduced into the `OpenMPIRBuilder` to allow passing the
information about whether a target region is intended to be offloaded from
outside.
The result of this change is that offloading calls are only generated when the
`--offload-arch` or `-fopenmp-targets` options are given to the compiler.
Otherwise, only the host fallback code is generated. This fixes linker errors
currently triggered by `flang-new` if a source file containing a `target`
construct is compiled without any of the aforementioned options.
Several unit tests impacted by these changes, which are intended to check host
code generated for `omp.target` operations, are updated to contain the new
attribute. Without it, no calls to `__tgt_target_kernel` and associated control
flow operations are generated.
Fixes #100209.
Commit: aa0a33be56f1ef8195eccbca57a103a8e1e302e3
https://github.com/llvm/llvm-project/commit/aa0a33be56f1ef8195eccbca57a103a8e1e302e3
Author: Kai Yan <aklkaiyan at tencent.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/WindowScheduler.cpp
A llvm/test/CodeGen/Hexagon/swp-ws-resource-reserve.mir
Log Message:
-----------
[llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (#100301)
Address the issue of multiple resource reservations in window scheduling
Commit: 79af6892f8eee1d0fb96c243716c8b03936751c9
https://github.com/llvm/llvm-project/commit/79af6892f8eee1d0fb96c243716c8b03936751c9
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
Log Message:
-----------
[SCEV] Handle more adds in computeConstantDifference() (#101339)
Currently it only deals with the case where we're subtracting adds with
at most one non-constant operand. This patch extends it to cancel out
common operands for the subtraction of arbitrary add expressions.
The background here is that I want to replace a getMinusSCEV() call in
LAA with computeConstantDifference():
https://github.com/llvm/llvm-project/blob/93fecc2577ece0329f3bbe2719bbc5b4b9b30010/llvm/lib/Analysis/LoopAccessAnalysis.cpp#L1602-L1603
This particular call is very expensive in some cases (e.g. lencod with
LTO) and computeConstantDifference() could achieve this much more
cheaply, because it does not need to construct new SCEV expressions.
However, the current computeConstantDifference() implementation is too
weak for this and misses many basic cases. This is a step towards making
it more powerful while still keeping it pretty fast.
Commit: adac04ffc90adebbaa0661d642f482dab8440df5
https://github.com/llvm/llvm-project/commit/adac04ffc90adebbaa0661d642f482dab8440df5
Author: Pankaj Dwivedi <divedi.pk.117 at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
Log Message:
-----------
[AMDGPU] Fix using wrong register in frame index shift (#101649)
In case of v_mad we have materialized the offset in vgpr and mad is
performed in wave space, later vgpr have to be shifted back in lane
space. [#99556](https://github.com/llvm/llvm-project/pull/99556)
introduces a bug.
Co-authored-by: Pankajdwivedi-25 <pankajkumar.divedi at amd.com>
Commit: db1375f6d907f1af34c03b5174b7e0432f615d21
https://github.com/llvm/llvm-project/commit/db1375f6d907f1af34c03b5174b7e0432f615d21
Author: ivanaivanovska <iivanovska at google.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/test/SemaCXX/coroutines.cpp
Log Message:
-----------
Surface error for plain return statement in coroutine earlier (#100985)
When a plain return statement was used in a coroutine, the error "return
statement not allowed in coroutine" was surfaced too late (e.g. after
other errors in the return statement). Surfacing it earlier now, to make
the issue more obvious.
Commit: 1525abb9c94e7daa9295323b6649e289e0e91c7a
https://github.com/llvm/llvm-project/commit/1525abb9c94e7daa9295323b6649e289e0e91c7a
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/test/CodeGen/AArch64/fast-isel-branch-uncond-debug.ll
Log Message:
-----------
[FastISel] Don't use sizeWithoutDebug() for debug records (#101648)
sizeWithoutDebug() iterates over the entire block, but all we do is to
check whether the number is not equal to one. In times of debug records,
simply check whether the first and last instructions are equal.
Commit: deb3ecf09fa30391bd22f890d2885c3d4816ca15
https://github.com/llvm/llvm-project/commit/deb3ecf09fa30391bd22f890d2885c3d4816ca15
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
Log Message:
-----------
[SLP][NFC]Add a test with the reduction of strided load, NFC.
Commit: 6c7cb55f8f8dc833fbd3d0e4261a503cf1e41341
https://github.com/llvm/llvm-project/commit/6c7cb55f8f8dc833fbd3d0e4261a503cf1e41341
Author: Andrey Timonin <112198242+EtoAndruwa at users.noreply.github.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
Log Message:
-----------
[mlir][cf] Fix ControlFlow dialect's operations' summary (#101494)
Ensure that the summary of the operation in the TableGen starts with a capital letter.
This is in line with our [guideline](https://mlir.llvm.org/docs/DefiningDialects/Operations/#operation-arguments)
and the current output of the documentation generator which capitalizes the summary.
Commit: 721aa5dbb965f9f720d788726864a33b695d0141
https://github.com/llvm/llvm-project/commit/721aa5dbb965f9f720d788726864a33b695d0141
Author: Andrey Timonin <112198242+EtoAndruwa at users.noreply.github.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
Log Message:
-----------
[mlir][emitc] Fix EmitC dialect's operations' summary (#101515)
Ensure that the summary of the operation in the TableGen starts with a capital letter.
This is in line with our [guideline](https://mlir.llvm.org/docs/DefiningDialects/Operations/#operation-arguments)
and the current output of the documentation generator which capitalizes the summary.
Commit: cb58294f86212aeff45f4a303767fcf4ac7d82ba
https://github.com/llvm/llvm-project/commit/cb58294f86212aeff45f4a303767fcf4ac7d82ba
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
A clang/test/C/C11/n1396.c
M clang/www/c_status.html
Log Message:
-----------
[C11] Claim conformance to WG14 N1396 (#101214)
The crux of this paper is that floating point expressions can be
evaluated in a wider format, but the return statement in a function
should still return a value of the function's return type rather than
the wider format type.
Note, this is an Annex F conformance requirement and we do not currently
claim conformance to Annex F, so technically we conform either way.
Commit: 0fd980e1dbed1018c77e7c7c258a08a5bca61955
https://github.com/llvm/llvm-project/commit/0fd980e1dbed1018c77e7c7c258a08a5bca61955
Author: Dmitry Chestnykh <dm.chestnykh at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
Log Message:
-----------
[NFC][Clang] Remove unused arg (#101650)
`BuiltinID` is not used inside `CheckBuiltinTargetInSupported`
Commit: 48d4d4b641702bf6db03a1bac73b7e13dea28349
https://github.com/llvm/llvm-project/commit/48d4d4b641702bf6db03a1bac73b7e13dea28349
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/docs/CommandGuide/clang.rst
Log Message:
-----------
Ofast deprecation clarifications (#101005)
Following up on the RFC discussion, this is clarifying that the main
purpose and effect of the -Ofast deprecation is to discourage its usage
and that everything else is more or less open for discussion, e.g. there
is no timeline yet for removal.
---------
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 58964c84990cebdff9dcfcd33858647bbbf87ad0
https://github.com/llvm/llvm-project/commit/58964c84990cebdff9dcfcd33858647bbbf87ad0
Author: Kai Yan <aklkaiyan at tencent.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/WindowScheduler.cpp
R llvm/test/CodeGen/Hexagon/swp-ws-resource-reserve.mir
Log Message:
-----------
Revert "[llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (#100301)" (#101658)
This reverts commit aa0a33be56f1ef8195eccbca57a103a8e1e302e3.
Commit: b21df4b1cf718e48259133054caa2ce5966358e9
https://github.com/llvm/llvm-project/commit/b21df4b1cf718e48259133054caa2ce5966358e9
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
M clang/test/Sema/constexpr.c
Log Message:
-----------
[Clang] prevent assertion failure by avoiding required literal type checking in C context (#101426)
Fixes #101304
Commit: a9eb3fd79b96ea6d954b1aa9a3de81d260d712ae
https://github.com/llvm/llvm-project/commit/a9eb3fd79b96ea6d954b1aa9a3de81d260d712ae
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Fix warning (NFC)
Produces -Wrange-loop-construct on some buildbots.
Commit: 423aec6573df4424f90555468128e17073ddc69e
https://github.com/llvm/llvm-project/commit/423aec6573df4424f90555468128e17073ddc69e
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
Log Message:
-----------
[NFC][AMDGPU] Reformat code for creating AA (#101591)
Commit: b6262880b34629e9d7a72b5a42f315a3c9ed8139
https://github.com/llvm/llvm-project/commit/b6262880b34629e9d7a72b5a42f315a3c9ed8139
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx14Issues.csv
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
Log Message:
-----------
[libc++] Consistency fixes for the CSV status files (#101572)
- Make sure we always have the same number of entries. In particular, I
dropped the "Group" entry that was tracked for papers but not for LWG
issues, since I don't think that added much. The group is already
tracked on the paper itself.
- Add "Label" row to all the CSV files.
This is mechanical, but it's necessary if we want to process our CSV
files uniformly, for example to synchronize their state with Github
issues.
Commit: 3ed4a14fe9f14c6e2ec2652899e6be794b2c5e1c
https://github.com/llvm/llvm-project/commit/3ed4a14fe9f14c6e2ec2652899e6be794b2c5e1c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M .git-blame-ignore-revs
Log Message:
-----------
[libc++] Add more status file consistency fixes to git-blame-ignore-revs
Commit: 23609a383c3a0a389339ec6f9784d130bf2f0994
https://github.com/llvm/llvm-project/commit/23609a383c3a0a389339ec6f9784d130bf2f0994
Author: Tim Creech <timothy.m.creech at intel.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
R llvm/test/tools/llvm-profgen/Inputs/cmov_3.perfbin
R llvm/test/tools/llvm-profgen/Inputs/cmov_3.perfscript
R llvm/test/tools/llvm-profgen/Inputs/ip-duplication.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noprobe-skid.perfscript
R llvm/test/tools/llvm-profgen/event-filtering.test
R llvm/test/tools/llvm-profgen/iponly-nodupfactor.test
R llvm/test/tools/llvm-profgen/iponly.test
R llvm/test/tools/llvm-profgen/period-scaling.test
M llvm/tools/llvm-profgen/PerfReader.cpp
M llvm/tools/llvm-profgen/ProfileGenerator.cpp
Log Message:
-----------
[llvm-profgen] Revert #99826 and #99026 (#100147)
Revert #99826 and #99026 to allow for additional input.
Commit: dba3dfa2bdbf8924bf16efcf896664fb91d38295
https://github.com/llvm/llvm-project/commit/dba3dfa2bdbf8924bf16efcf896664fb91d38295
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/fpclass-check-idioms.ll
Log Message:
-----------
[InstCombine] Fold isnan idioms (#101510)
Folds `(icmp ne ((bitcast X) & FractionBits), 0) & (icmp eq ((bitcast X)
& ExpBits), ExpBits) -> fcmp uno X, 0.0` and
`(icmp eq ((bitcast X) & FractionBits), 0) | (icmp ne ((bitcast X) &
ExpBits), ExpBits) -> fcmp ord X, 0.0`
Alive2: https://alive2.llvm.org/ce/z/mrLn_x
Commit: e7ee21fbc96664cf7736194c0ed922753e338989
https://github.com/llvm/llvm-project/commit/e7ee21fbc96664cf7736194c0ed922753e338989
Author: Jannick Kremer <51118500+DeinAlptraum at users.noreply.github.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_exception_specification_kind.py
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[libclang/python] Fix `get_exception_specification_kind` (#101548)
Fix a bug with `get_exception_specification_kind`. The function did not
work before. Also add a test that confirms that it works now.
Commit: 28d4149ba0c1748f570fecb683fb1fda62bfd974
https://github.com/llvm/llvm-project/commit/28d4149ba0c1748f570fecb683fb1fda62bfd974
Author: Pasquale Riello <pas.riello at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Models/ChromiumCheckModel.cpp
Log Message:
-----------
[clang][dataflow] Fix casting in `ChromiumCheckModel`. (#101640)
`getDirectCallee()` may return a null pointer if the callee is not a
`FunctionDecl` (for example when using function pointers), this requires
to use `dyn_cast_or_null` instead of `dyn_cast`.
Commit: 411d31ad690707279586ecc636dbe07c400226d6
https://github.com/llvm/llvm-project/commit/411d31ad690707279586ecc636dbe07c400226d6
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/ARM/popcnt.ll
M llvm/test/CodeGen/Thumb2/mve-ctpop.ll
Log Message:
-----------
Partially revert 92e18ffd803365c64910760ba20278f875d93681 (#101673)
It is likely to cause stage2 build failures:
https://lab.llvm.org/buildbot/#/builders/122/builds/389
https://lab.llvm.org/buildbot/#/builders/79/builds/552
I don't have an ARM machine to investigate, so I'm just reverting ARM
changes to see if it helps make the bots green again.
Commit: d40fa2c82afd4767bfa11139214a6b4c00079f1f
https://github.com/llvm/llvm-project/commit/d40fa2c82afd4767bfa11139214a6b4c00079f1f
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx17Issues.csv
Log Message:
-----------
[libc++][NFC] Fix typos in the status-tracking CSV introduced by recent changes
Commit: 4a98f5228170224144da473c25188e23540c55d6
https://github.com/llvm/llvm-project/commit/4a98f5228170224144da473c25188e23540c55d6
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Analysis/StructuralHash.cpp
M llvm/test/Analysis/StructuralHash/structural-hash-printer.ll
Log Message:
-----------
[StructuralHashPrinter] Always print 16-digit hash (#101655)
The hash may contain less than 14 significant digits, which caused the
test to fail.
Commit: 4e93b16f3fce467b2bbda4e5fd8b15fcad2bea93
https://github.com/llvm/llvm-project/commit/4e93b16f3fce467b2bbda4e5fd8b15fcad2bea93
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
Log Message:
-----------
[llvm] Make InstSimplifyFolder constructor explicit (NFC) (#101654)
Commit: 07aaab8345f1728815575639821ce581590d8479
https://github.com/llvm/llvm-project/commit/07aaab8345f1728815575639821ce581590d8479
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/www/c_status.html
Log Message:
-----------
Update C status page rationale for Annex F conformance
This is setting expectations that Clang will likely never conform to
Annex F on 32-bit x86 with SSE2 disabled because of the way x87 works.
Commit: 293df8afae3ec1f99e44d6bc015e4edf2c165c8d
https://github.com/llvm/llvm-project/commit/293df8afae3ec1f99e44d6bc015e4edf2c165c8d
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/docs/WritingAnLLVMPass.rst
M llvm/include/llvm/Pass.h
M llvm/include/llvm/PassInfo.h
M llvm/include/llvm/PassRegistry.h
M llvm/include/llvm/PassSupport.h
M llvm/lib/IR/LegacyPassManager.cpp
M llvm/lib/IR/Pass.cpp
M llvm/lib/IR/PassRegistry.cpp
Log Message:
-----------
[LegacyPM] Drop analysis groups (#101670)
This improves the performance of recordAvailableAnalysis and freePass so
that they don't need to call getPassInfo(), which acquires a lock on
every call.
The performance-wise interesting part is only in LegacyPassManager.cpp,
everything else is just cleanup.
Commit: b537df973731c4b84fdf6f9f44371c2b50205703
https://github.com/llvm/llvm-project/commit/b537df973731c4b84fdf6f9f44371c2b50205703
Author: Andrea Faulds <andrea.faulds at amd.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv-unsupported.mlir
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
Log Message:
-----------
[mlir][arith][spirv] Convert arith.truncf rounding mode to SPIR-V (#101547)
Resolves #87050.
Commit: 461126c29c56ec2362dd24c93d64421c8d73d4ef
https://github.com/llvm/llvm-project/commit/461126c29c56ec2362dd24c93d64421c8d73d4ef
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
Log Message:
-----------
[AArch64] Fix incorrectly getting the destination reg of an insn (#101205)
This popped up while investigating
https://github.com/llvm/llvm-project/issues/96950
In a few places where we need the destination reg of an instruction we
were using a call that worked only by accident.
Commit: 8bfa089e5bfb9f26e05b9cefa9065ca7f97406ce
https://github.com/llvm/llvm-project/commit/8bfa089e5bfb9f26e05b9cefa9065ca7f97406ce
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M mlir/test/Dialect/Vector/vector-transfer-flatten.mlir
Log Message:
-----------
[mlir][vector] Update tests for xfer-flatten (nfc) (#101471)
Updates formatting and variable names in:
* vector-transfer-flatten.mlir
This is primarily to improve consistency, both within this particular
test file as well as across tests.
Overview of changes:
* All memref input arguments are re-named as `%mem`.
* All vector input arguments are re-named as `%vec`.
* All tensor input arguments are re-named as `%dest`.
* LIT variables are update to be consistent with input arguments.
* Renamed all output arguments as `%res`.
* Updated indentation to be more C-like.
Note, similar changes for vector-transfer-permutation-lowering.mlir were
implemented in #101468.
Commit: 12937b1bfb23cca4731fa274f3358f7286cc6784
https://github.com/llvm/llvm-project/commit/12937b1bfb23cca4731fa274f3358f7286cc6784
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-reductions.ll
Log Message:
-----------
[AArch64] Avoid NEON dot product in streaming[-compatible] functions (#101677)
The NEON dot product is not valid in streaming mode.
A follow-up patch will improve codegen for these operations.
Commit: d96569ecc2807a13dab6495d8cc4e82775b00af1
https://github.com/llvm/llvm-project/commit/d96569ecc2807a13dab6495d8cc4e82775b00af1
Author: Pavel Skripkin <paskripkin at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/Store.cpp
M clang/test/Analysis/exercise-ps.c
Log Message:
-----------
[analyzer] Fix crash on using `bitcast(<type>, <array>)` as array subscript (#101647)
Current CSA logic does not expect `LazyCompoundValKind` as array index.
This may happen if array is used as subscript to another, in case of
bitcast to integer type.
Catch such cases and return `UnknownVal`, since CSA cannot model
array -> int casts.
Closes #94496
Commit: d02757ce9ee3b439ba8cb7a67676e725a22a8651
https://github.com/llvm/llvm-project/commit/d02757ce9ee3b439ba8cb7a67676e725a22a8651
Author: Volodymyr Sapsai <421892+vsapsai at users.noreply.github.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/lib/Sema/Sema.cpp
A clang/test/Modules/builtin-vararg.c
Log Message:
-----------
[Modules] Fix using `va_list` with modules and a precompiled header. (#100837)
Fix the false warning
> incompatible pointer types passing 'va_list' (aka '__builtin_va_list')
to parameter of type 'struct __va_list_tag *'
[-Wincompatible-pointer-types]
The warning is wrong because both in the function declaration and at the
call site we are using `va_list`.
When we call `ASTContext::getBuiltinVaListDecl` at a specific moment, we
end up re-entering this function which causes creating 2 instances of
`BuiltinVaListDecl` and 2 instances of `VaListTagDecl` but the stored
instances are unrelated to each other because of the call sequence like
getBuiltinVaListDecl
CreateX86_64ABIBuiltinVaListDecl
VaListTagDecl = TagA
indirectly call getBuiltinVaListDecl
CreateX86_64ABIBuiltinVaListDecl
VaListTagDecl = TagB
BuiltinVaListDecl = ListB
BuiltinVaListDecl = ListA
Now we have `BuiltinVaListDecl == ListA` and `VaListTagDecl == TagB`.
For x86_64 '__builtin_va_list' and 'struct __va_list_tag *' are
compatible because '__builtin_va_list' == '__va_list_tag[1]'. But
because we have unrelated decls for VaListDecl and VaListTagDecl the
types are considered incompatible as we are comparing type pointers.
Fix the error by creating `BuiltinVaListDecl` before
`ASTReader::InitializeSema`, so that during
`ASTContext::getBuiltinVaListDecl` ASTReader doesn't try to de-serialize
'__builtin_va_list' and to call `ASTContext::getBuiltinVaListDecl`
again.
rdar://130947515
Commit: dfda9c5b9ef24b489f4fff30a6ebc0b57b4e7961
https://github.com/llvm/llvm-project/commit/dfda9c5b9ef24b489f4fff30a6ebc0b57b4e7961
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global_atomic_optimizer_fp_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_optimizer_fp_no_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i128.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd-flat-specialization.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-simplify-cfg-CAS-block.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-fp-vector.ll
Log Message:
-----------
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
This is the most complex atomicrmw support case. Note we don't have
accurate remarks for all of the cases, which I'm planning on fixing
in a later change with more precise wording.
Continue respecting amdgpu-unsafe-fp-atomics until it's eventual removal.
Also seems to fix a few cases not interpreting amdgpu-unsafe-fp-atomics
appropriately aaggressively.
Commit: 39c7dc7207e76e72da21cf4fedda21b5311bf62d
https://github.com/llvm/llvm-project/commit/39c7dc7207e76e72da21cf4fedda21b5311bf62d
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx14Issues.csv
M libcxx/docs/Status/Cxx14Papers.csv
M libcxx/docs/Status/Cxx17.rst
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx20Papers.csv
Log Message:
-----------
[libc++][NFC] More consistency fixes to the CSV entries
- Update note for P0156 which was reverted in Kona, to avoid unusual status.
- Add the LWG issue number for an old C++14 NB comment.
- Fix broken link for LWG2118
- Capitalize paper numbers and links consistently
- Remove weird status '* *' which was likely added by mistake
Commit: 8d5cc015e006616ec818522c966b685bcb4951c2
https://github.com/llvm/llvm-project/commit/8d5cc015e006616ec818522c966b685bcb4951c2
Author: Sopy <doimpt at sopy.one>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/neon-rshrn.ll
A llvm/test/CodeGen/AArch64/optimize_combine_large_shifts.ll
Log Message:
-----------
[AArch64] Optimize two large shifts and a combine into a single combine and shift (#99480)
Addresses a missing optimization in the AArch64 back-end where two large
shifts followed by a combine operation can be optimized into a single
combine operation followed by a shift.
Closes #59502
Commit: 937cbe270e5ee4e2e4d6f5568768a55d5e383076
https://github.com/llvm/llvm-project/commit/937cbe270e5ee4e2e4d6f5568768a55d5e383076
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M .git-blame-ignore-revs
Log Message:
-----------
[libc++] Add last commit to git-blame-ignore-revs
Commit: 60054dcd81d027db72b9ef305184e97c55465458
https://github.com/llvm/llvm-project/commit/60054dcd81d027db72b9ef305184e97c55465458
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/Local.h
M llvm/lib/Transforms/Utils/LoopSimplify.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[NFC] Lowercase the first letter of functions defined in SimplifyCFG.cpp
Commit: 9d07f43676f03460d913aabd503ae8154cabdda1
https://github.com/llvm/llvm-project/commit/9d07f43676f03460d913aabd503ae8154cabdda1
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/CMakeLists.txt
R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/CMakeLists.txt
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
Log Message:
-----------
Reland "[lldb] Reland 2402b3213c2f with `/H` to debug the windows build issue (#101672)
This reverts commit 9effefbae8d96006a4dd29bb9ab8532fd408559d.
With the include order in ScriptedProcessPythonInterface.cpp fixed
(though I cannot explain exactly why it works) and removes the /H flag
intended for debugging this issue.
I think it is something to do with Process.h pulling in PosixApi.h
somewhere along the line, and including Process.h after lldb-python.h
means that NO_PID_T is defined to prevent a redefinition of pid_t.
Commit: 4aac78dd4a89f16657c162320e3a720437cb7284
https://github.com/llvm/llvm-project/commit/4aac78dd4a89f16657c162320e3a720437cb7284
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
Log Message:
-----------
[RISCV] Generalize existing SRA combine to fix #101040. (#101610)
We already had a DAG combine for (sra (sext_inreg (shl X, C1), i32), C2)
-> (sra (shl X, C1+32), C2+32) that we used for RV64. This patch
generalizes it to other sext_inregs for both RV32 and RV64.
Fixes #101040.
Commit: 6c367168d6787941df2945528d7414f94a697e60
https://github.com/llvm/llvm-project/commit/6c367168d6787941df2945528d7414f94a697e60
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
A llvm/test/Transforms/InstCombine/skip-opt-void-to-non-void-conversion.ll
Log Message:
-----------
[InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (#98536)
Skip simplification on call instruction where a non-void return value is
expected but the callee returns void, which is undefined behavior and
could lead to non-determinism or crashes.
Commit: bb790b8bf2e9bb57db3313edb4868830213d1079
https://github.com/llvm/llvm-project/commit/bb790b8bf2e9bb57db3313edb4868830213d1079
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[NFC] Extract the probability check for the hoisted BB into a local function
So that we can early bail out to avoid nested if clauses.
This is to extract the NFC change in #96878 into a separate PR.
Commit: 4b6f4efabc71e86d919add3538fa63ba35906e73
https://github.com/llvm/llvm-project/commit/4b6f4efabc71e86d919add3538fa63ba35906e73
Author: Ian Wood <75152913+IanWood1 at users.noreply.github.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/test/Dialect/Linalg/canonicalize.mlir
Log Message:
-----------
[mlir][linalg] Canonicalize non-identity `linalg.generic` ops (#101430)
Extend `linalg.generic`'s canonicalization patterns to be able to erase
ops with non-identity indexing maps but that are still noops.
Commit: 1c1b8c20c2d58b6a307e6fdc6db271e81ee8d603
https://github.com/llvm/llvm-project/commit/1c1b8c20c2d58b6a307e6fdc6db271e81ee8d603
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Support/ARMAttributeParser.cpp
M llvm/lib/Support/CSKYAttributeParser.cpp
M llvm/lib/Support/MSP430AttributeParser.cpp
M llvm/lib/Support/RISCVAttributeParser.cpp
Log Message:
-----------
[ELFAttributeParser][NFC] Make string arrays const (#101460)
Commit: c6ce324fa7fb2438b945fa1205b2a23138327e83
https://github.com/llvm/llvm-project/commit/c6ce324fa7fb2438b945fa1205b2a23138327e83
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectBreakpoint.h
M lldb/source/Commands/CommandObjectBreakpointCommand.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/CommandObjectSource.cpp
Log Message:
-----------
[lldb] Eliminate more Targer* in favor of Target& in CommandObjects (NFC)
The majority of the replaced Target pointers were already used
unconditionally and the few that were shouldn't even be NULL.
Commit: d6649f2d4871c4535ae0519920e36100748890c4
https://github.com/llvm/llvm-project/commit/d6649f2d4871c4535ae0519920e36100748890c4
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M compiler-rt/lib/builtins/aarch64/sme-libc-mem-routines.S
Log Message:
-----------
[AArch64][SME] Rewrite __arm_sc_memset to remove invalid instruction (#101522)
The implementation of __arm_sc_memset in compiler-rt contains
a Neon dup instruction which is not valid in streaming mode. This
patch rewrites the function, using an SVE mov instruction if available.
Commit: 1417633943b77365bda70b1ddddd46a0a3c05300
https://github.com/llvm/llvm-project/commit/1417633943b77365bda70b1ddddd46a0a3c05300
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M flang/CMakeLists.txt
A flang/include/flang/Runtime/CUDA/allocator.h
M flang/runtime/CMakeLists.txt
A flang/runtime/CUDA/CMakeLists.txt
A flang/runtime/CUDA/allocator.cpp
M flang/unittests/Runtime/CMakeLists.txt
A flang/unittests/Runtime/CUDA/AllocatorCUF.cpp
A flang/unittests/Runtime/CUDA/CMakeLists.txt
Log Message:
-----------
[flang][cuda] Add CUF allocator (#101216)
Add allocators for CUDA fortran allocation on the device. 3 allocators
are added for pinned, device and managed/unified memory allocation.
`CUFRegisterAllocator()` is called to register the allocators in the
allocator registry added in #100690.
Since this require CUDA, a cmake option `FLANG_CUF_RUNTIME` is added to
conditionally build these.
Commit: bbdccf4c94ff18a0761b03a0e2c8b05805385132
https://github.com/llvm/llvm-project/commit/bbdccf4c94ff18a0761b03a0e2c8b05805385132
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/Linux/printf-fortify-5.c
M compiler-rt/test/lit.common.cfg.py
Log Message:
-----------
[asan,test] Disable _FORTIFY_SOURCE test incompatible with glibc 2.40
In terms of bug catching capability, `_FORTIFY_SOURCE` does not perform
as well as some dynamic instrumentation tools. When a sanitizer is used,
generally `_FORTIFY_SOURCE` should be disabled since sanitizer runtime
does not implement most `*_chk` functions. Using `_FORTIFY_SOURCE`
will regress error checking (asan/hwasan/tsan) or cause false positives
(msan).
`*printf_chk` are the most pronounced `_chk` interceptors for
uninstrumented DSOes (https://reviews.llvm.org/D40951).
glibc 2.40 introduced `pass_object_info` style fortified source for some
functions ([1]). `fprintf` will be mangled as
`_ZL7fprintfP8_IO_FILEU17pass_object_size1PKcz`, which has no associated
interceptor, leading to printf-fortify-5.c failure.
Just disable the test. Fix #100877
[1]: https://sourceware.org/pipermail/libc-alpha/2024-February/154531.html
Pull Request: https://github.com/llvm/llvm-project/pull/101566
Commit: b1df554c386c4f9e27e0289be868be20d93cb6a5
https://github.com/llvm/llvm-project/commit/b1df554c386c4f9e27e0289be868be20d93cb6a5
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/include/clang/Basic/riscv_vector.td
Log Message:
-----------
[RISCV][clang] Remove unused base type in `vfncvt` (#101646)
We don't have `fp8` type supported yet.
Commit: d6cbcf93b227befaad00957a56acd63c837c26ff
https://github.com/llvm/llvm-project/commit/d6cbcf93b227befaad00957a56acd63c837c26ff
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.h
Log Message:
-----------
[lldb][ClangExpressionParser][NFC] Factor out TargetOpts logic out of ClangExpressionParser (#101681)
Same motivation as https://github.com/llvm/llvm-project/pull/101669. We
plan to eventually use the Clang driver to initialize the
`CompilerInstance`.
This should make refactorings of this code more straightforward.
**Changes**:
* Introduced `SetupTargetOpts`
* Called them from `ClangExpressionParser::ClangExpressionParser`
* Made `GetClangTargetABI` a file-local function since it's not using
any of the state in `ClangExpressionParser`, and isn't used anywhere
outside the source file
Commit: 982cfae465cabac3478f597a63feda64cf5e267c
https://github.com/llvm/llvm-project/commit/982cfae465cabac3478f597a63feda64cf5e267c
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/Helpers/initialization-nobug-extra.cpp
M compiler-rt/test/asan/TestCases/initialization-nobug.cpp
Log Message:
-----------
[test][asan] Check for order of DynInitPoison (#101584)
Also make sure we have dynamic init variables with any `-O`.
Commit: 301db3dee53b5afbc9813c5fcd3cce25a0655f5f
https://github.com/llvm/llvm-project/commit/301db3dee53b5afbc9813c5fcd3cce25a0655f5f
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/newhdrgen/yaml/unistd.yaml
M libc/spec/posix.td
M libc/src/__support/threads/CMakeLists.txt
A libc/src/__support/threads/identifier.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/rwlock.h
M libc/src/unistd/CMakeLists.txt
A libc/src/unistd/gettid.cpp
A libc/src/unistd/gettid.h
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/fork.cpp
M libc/test/integration/src/unistd/CMakeLists.txt
M libc/test/integration/src/unistd/fork_test.cpp
Log Message:
-----------
[libc] add simplified tid cache (#101620)
According to discussions on monthly meeting, we probably don't want to
cache `getpid` anymore. glibc removes their cache. bionic is hesitating
whether such cache is to be removed. `getpid` is async-signal-safe, so
we must make sure it always work.
However, for `gettid`, we have more freedom. Moreover, we are using
`gettid` to examine deadlock such that the performance penalty is not
negligible here. Thus, this patch is separated from previous patch to
provide only `tid` caching. It is much more simplified. Hopefully,
previous build issues can be resolved easily.
Commit: ad836c1569de20f793fc88afdc64bece5126d3e4
https://github.com/llvm/llvm-project/commit/ad836c1569de20f793fc88afdc64bece5126d3e4
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/docs/OpenMPSupport.rst
Log Message:
-----------
[OpenMP][Doc] Add `ompx_bare` entry in `OpenMPSupport.rst` (#101711)
Commit: e14356a61764ab864fe43efbba4a303697115774
https://github.com/llvm/llvm-project/commit/e14356a61764ab864fe43efbba4a303697115774
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M libc/src/__support/threads/identifier.h
Log Message:
-----------
[libc] small fix for overlay mode build (#101724)
Commit: 7a7cb8156b0a85f1eca772329644cae5989d4ed1
https://github.com/llvm/llvm-project/commit/7a7cb8156b0a85f1eca772329644cae5989d4ed1
Author: jimingham <jingham at apple.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
A lldb/source/Plugins/SystemRuntime/MacOSX/AbortWithPayloadFrameRecognizer.cpp
A lldb/source/Plugins/SystemRuntime/MacOSX/AbortWithPayloadFrameRecognizer.h
M lldb/source/Plugins/SystemRuntime/MacOSX/CMakeLists.txt
M lldb/source/Plugins/SystemRuntime/MacOSX/SystemRuntimeMacOSX.cpp
M lldb/source/Target/Process.cpp
A lldb/test/API/macosx/abort_with_payload/Makefile
A lldb/test/API/macosx/abort_with_payload/TestAbortWithPayload.py
A lldb/test/API/macosx/abort_with_payload/main.c
Log Message:
-----------
[LLDB] Add a StackFrameRecognizer for the Darwin specific abort_with_payload… (#101365)
This is used by various system routines (the capabilities checker and
dyld to name a few) to add extra color to an abort. This patch adds a
frame recognizer so people can easily see the details, and also adds the
information to the ExtendedCrashInformation dictionary.
I also had to rework how the dictionary is held; previously it was
created on demand, but that was inconvenient since it meant all the
entries had to be produced at that same time. That didn't work for the
recognizer.
Commit: 1fcddc0dfa1b371bc0b278438d5f47cf8d03b511
https://github.com/llvm/llvm-project/commit/1fcddc0dfa1b371bc0b278438d5f47cf8d03b511
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M lldb/source/Plugins/SystemRuntime/MacOSX/AbortWithPayloadFrameRecognizer.cpp
Log Message:
-----------
[lldb] Fix a warning
This patch fixes:
lldb/source/Plugins/SystemRuntime/MacOSX/AbortWithPayloadFrameRecognizer.cpp:177:10:
error: unused variable 'str_len' [-Werror,-Wunused-variable]
Commit: 5c1d7689738d144613e7915c0b6ec850dd5c3956
https://github.com/llvm/llvm-project/commit/5c1d7689738d144613e7915c0b6ec850dd5c3956
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
Log Message:
-----------
[lldb][ClangExpressionParser] Log and assert on failure to create TargetInfo (#101697)
`CreateTargetInfo` can return a `nullptr` in a couple cases. So we
should log that and let the user know something is wrong (hence the
`lldbassert`).
I didn't actually run into this. Just stumbled upon it from reading the
code.
Commit: 46425b8d0fac3c529aa4a716d19abd7032e452f3
https://github.com/llvm/llvm-project/commit/46425b8d0fac3c529aa4a716d19abd7032e452f3
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M flang/runtime/CUDA/allocator.cpp
Log Message:
-----------
[flang][cuda] Fix allocator-registry header path (#101727)
File was moved in #101212
Commit: bba491f895ad12ac4847cce5e7e819110b87246a
https://github.com/llvm/llvm-project/commit/bba491f895ad12ac4847cce5e7e819110b87246a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M flang/include/flang/Optimizer/CodeGen/CGOps.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
Log Message:
-----------
[flang][NFC] Add missing sourceBox documentation in embox ops (#101221)
Just noticed that `sourceDoc` was not documented in embox operations
description. this patch just add the documentation.
Commit: 737c387f8be15cf3d6004d3f58a3ce5763f7f9e8
https://github.com/llvm/llvm-project/commit/737c387f8be15cf3d6004d3f58a3ce5763f7f9e8
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
A lldb/test/Shell/Commands/command-scripting-template-list.test
Log Message:
-----------
[lldb/test] Add test for the `scripting template list` command (#101726)
Commit: dd7a4c3e5ee3300588b7c12631f3305553d8ea6c
https://github.com/llvm/llvm-project/commit/dd7a4c3e5ee3300588b7c12631f3305553d8ea6c
Author: Qiongsi Wu <qwu at ibm.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/PreprocessorOptions.h
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/test/Preprocessor/pragma_mc_func.c
Log Message:
-----------
Revert "[AIX] Turn on `#pragma mc_func` check by default (#101336)"
This reverts commit b9335176db718bf64c72d48107eb9dff28ed979e.
Commit: ca305337ff84385bf23acddcaf173a8847f86752
https://github.com/llvm/llvm-project/commit/ca305337ff84385bf23acddcaf173a8847f86752
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M flang/include/flang/Evaluate/expression.h
M flang/lib/Semantics/expression.cpp
M flang/test/Evaluate/logical-args.f90
Log Message:
-----------
[flang] Fix -fdefault-integer-8 result kind of relations (#101234)
The result of a relational operator is a default logical, which is
LOGICAL(8) under the -fdefault-integer-8 option.
Fixes https://github.com/llvm/llvm-project/issues/101161.
Commit: b1a1d4e08e0dae54a0d60af4784a30f9d6849ebb
https://github.com/llvm/llvm-project/commit/b1a1d4e08e0dae54a0d60af4784a30f9d6849ebb
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M flang/runtime/edit-output.cpp
M flang/unittests/Runtime/NumericalFormatTest.cpp
Log Message:
-----------
[flang][runtime] Don't emit excess digits for ES0.0E0 or EN0.0E0 (#101238)
Don't emit any digits after the decimal point.
Commit: c2a95ad25c65acede2492ac83039150f9522c3ae
https://github.com/llvm/llvm-project/commit/c2a95ad25c65acede2492ac83039150f9522c3ae
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M flang/runtime/format-implementation.h
M flang/runtime/internal-unit.cpp
M flang/runtime/internal-unit.h
M flang/runtime/io-stmt.cpp
M flang/runtime/io-stmt.h
M flang/runtime/unit.cpp
M flang/runtime/unit.h
M flang/runtime/utf.cpp
M flang/runtime/utf.h
Log Message:
-----------
[flang][runtime] Handle multi-byte characters while tabbing (#101388)
When repositioning within the current record with control edit
descriptors (Xn, Tn, TLn, TRn), deal with multiple-byte character
encodings. This affects only external I/O to units with UTF-8 encoding.
Commit: 90617e99bb17303b351351681a70394c312e0e58
https://github.com/llvm/llvm-project/commit/90617e99bb17303b351351681a70394c312e0e58
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M flang/lib/Evaluate/fold-real.cpp
M flang/lib/Evaluate/real.cpp
M flang/test/Evaluate/fold-nearest.f90
Log Message:
-----------
[flang] Fix folding edge cases with IEEE_NEXT_{UP/DOWN/AFTER} & NEAREST (#101424)
The generation of 80-bit x87 floating-point infinities was incorrect in
Normalize(), the comparison for IEEE_NEXT_AFTER needs to use the most
precise type of its arguments, and we don't need to warn about overflows
from +/-HUGE() to infinity. Warnings about NaN arguments remain in
place, and enabled by default, as their usage may or may not be
portable, and their appearance in a real code seems most likely to
signify an earlier error.
Commit: 858bea86be709ec84757d98da16fbf3a05579b76
https://github.com/llvm/llvm-project/commit/858bea86be709ec84757d98da16fbf3a05579b76
Author: Joshua Cranmer <joshua.cranmer at intel.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Adjust the documentation of some fast-math flags. (#99557)
The first change is the clarification of rewrite-based semantics, and
the fact that when doing the rewrite, all of the instructions involved
need to have the rewrite. This is not a change in semantics: there is
wide agreement that this behavior is true for most flags. But it is
necessary to clarify this, and also clarify that there is a fundamental
difference between a flag like `nnan` and a flag like `contract`. Note
that several InstCombine transforms do not correctly check this behavior
at the moment.
The second change is a specific clarification of the rewrites performed
by arcp. These rewrites capture what is necessary to enable the
transformations that currently require just arcp, none of which are
using the flag incorrectly right now.
Commit: 4ac24b388a5d812c57d50ed8ce336f1d516450cc
https://github.com/llvm/llvm-project/commit/4ac24b388a5d812c57d50ed8ce336f1d516450cc
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M libc/src/__support/threads/thread.cpp
M libc/src/__support/threads/thread.h
Log Message:
-----------
[libc] inline thread self (#101739)
The codegen for non-inlined version is "quite ugly" as it emits some
checks to make sure the initialization routine is properly executed
because the compiler does not see how the TLS object is initialized.
This leads to some `callq 0x0` junk in the final outputs.
For codegen details, see https://godbolt.org/z/rb5qYj3vY.
Commit: 5edb49355a37b9e4168c4c07fdc0c6623107a735
https://github.com/llvm/llvm-project/commit/5edb49355a37b9e4168c4c07fdc0c6623107a735
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/include/llvm/ADT/PackedVector.h
Log Message:
-----------
ADT: Add non-const overload of PackedVector::raw_bits() (#101742)
This is convenient when operating on vectors in a bulk, bit-manipulating
fashion. I plan to use this in a future change.
Commit: 3e4af616334eae532f308605b89ff158dd195180
https://github.com/llvm/llvm-project/commit/3e4af616334eae532f308605b89ff158dd195180
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M lldb/include/lldb/API/SBProcess.h
M lldb/include/lldb/API/SBSaveCoreOptions.h
M lldb/include/lldb/API/SBThread.h
M lldb/include/lldb/Symbol/SaveCoreOptions.h
M lldb/include/lldb/Target/Process.h
M lldb/source/API/SBSaveCoreOptions.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/Core/PluginManager.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.h
M lldb/source/Plugins/ObjectFile/Minidump/ObjectFileMinidump.cpp
M lldb/source/Symbol/SaveCoreOptions.cpp
M lldb/source/Target/Process.cpp
M lldb/test/API/functionalities/process_save_core_minidump/TestProcessSaveCoreMinidump.py
M lldb/test/API/python_api/sbsavecoreoptions/TestSBSaveCoreOptions.py
A lldb/test/API/python_api/sbsavecoreoptions/basic_minidump.yaml
A lldb/test/API/python_api/sbsavecoreoptions/basic_minidump_different_pid.yaml
Log Message:
-----------
[LLDB][SBSaveCore] Implement a selectable threadlist for Core Options. (#100443)
In #98403 I enabled the SBSaveCoreOptions object, which allows users via
the scripting API to define what they want saved into their core file.
As the first option I've added a threadlist, so users can scan and
identify which threads and corresponding stacks they want to save.
In order to support this, I had to add a new method to `Process.h` on
how we identify which threads are to be saved, and I had to change the
book keeping in minidump to ensure we don't double save the stacks.
Important to @jasonmolenda I also changed the MachO coredump to accept
these new APIs.
Commit: a21fc4c0a681000c23089301e8935f579517b96a
https://github.com/llvm/llvm-project/commit/a21fc4c0a681000c23089301e8935f579517b96a
Author: Michael Jones <michaelrj at google.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M libc/docs/dev/printf_behavior.rst
M libc/src/stdio/printf_core/parser.h
M libc/test/src/stdio/printf_core/parser_test.cpp
M libc/test/src/stdio/snprintf_test.cpp
Log Message:
-----------
[libc] Fix printf handling of INT_MIN width (#101729)
Prevously, if INT_MIN was passed as a wildcard width to a printf
conversion the parser would attempt to negate it to get the positive
width (and set the left justify flag), but it would underflow and the
width would be treated as 0. This patch corrects the issue by instead
treating a width of INT_MIN as identical to -INT_MAX.
Also includes docs changes to explain this behavior and adding b to the
list of int conversions.
Commit: bbdb1e400f54527160f62a69f074f211ff03fab1
https://github.com/llvm/llvm-project/commit/bbdb1e400f54527160f62a69f074f211ff03fab1
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M flang/include/flang/Lower/Allocatable.h
M flang/include/flang/Optimizer/Builder/MutableBox.h
M flang/include/flang/Runtime/CUDA/allocator.h
M flang/include/flang/Runtime/allocator-registry.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/test/Lower/CUDA/cuda-allocatable.cuf
M flang/unittests/Runtime/CUDA/AllocatorCUF.cpp
Log Message:
-----------
[flang][cuda] Set the allocator on fir.embox operation (#101722)
This patch set the `allocator_idx` attribute for allocatable descriptor
that have specific CUDA attribute.
Commit: 72a514f42722ad6f6e6baee8e2d75150f9369a66
https://github.com/llvm/llvm-project/commit/72a514f42722ad6f6e6baee8e2d75150f9369a66
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M compiler-rt/lib/asan/asan_globals.cpp
M compiler-rt/test/asan/TestCases/initialization-nobug.cpp
Log Message:
-----------
[NFC][asan] Report DynInitUnPoison (#101586)
Commit: 48e624dc2002a4947923ff309a76a3e4deb7d39a
https://github.com/llvm/llvm-project/commit/48e624dc2002a4947923ff309a76a3e4deb7d39a
Author: dyung <douglas.yung at sony.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/lib/Sema/Sema.cpp
R clang/test/Modules/builtin-vararg.c
Log Message:
-----------
Revert "[Modules] Fix using `va_list` with modules and a precompiled header." (#101752)
Reverts llvm/llvm-project#100837
The test Modules/builtin-vararg.c is failing on AArch64 build bots:
- https://lab.llvm.org/buildbot/#/builders/190/builds/3117
- https://lab.llvm.org/buildbot/#/builders/65/builds/2302
- https://lab.llvm.org/buildbot/#/builders/154/builds/2288
Revert to get the bots back to green.
Commit: ab819d7cf86932e4a47b5bf6aadea9d714a313a9
https://github.com/llvm/llvm-project/commit/ab819d7cf86932e4a47b5bf6aadea9d714a313a9
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
A llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
Log Message:
-----------
[Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (#100952)
Commit: 12e3a06cb7615fbd91031420f3dec2a85d7877d6
https://github.com/llvm/llvm-project/commit/12e3a06cb7615fbd91031420f3dec2a85d7877d6
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M lldb/include/lldb/Expression/Expression.h
M lldb/include/lldb/Expression/UserExpression.h
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
Log Message:
-----------
[lldb][ClangExpressionParser][NFC] Factor LangOptions logic out of ClangExpressionParser constructor (#101669)
We plan to eventually use the Clang driver to initialize the
`CompilerInstance`.
This should make refactorings of this code more straightforward.
**Changes**:
* Introduced `SetupLangOpts` and `SetupImportStdModuleLangOpts`
* Called them from `ClangExpressionParser::ClangExpressionParser`
Commit: 0b92e70dfb7a3b49c24157d0a1b93d127f622683
https://github.com/llvm/llvm-project/commit/0b92e70dfb7a3b49c24157d0a1b93d127f622683
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
R llvm/test/CodeGen/AMDGPU/div-rem-by-constant-64.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
Log Message:
-----------
Revert "[AMDGPU] Always lower s/udiv64 by constant to MUL (#100723)"
This reverts commit 92fbc963a51683d32f70d0c7f3783bb13983f08d.
The patch also affected ARM and caused an assertion failure during
CurDAG->Legalize
(https://github.com/llvm/llvm-project/pull/100723#issuecomment-2266154211).
Commit: b0b490634000b68293eca4be67b59738766a8632
https://github.com/llvm/llvm-project/commit/b0b490634000b68293eca4be67b59738766a8632
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
Log Message:
-----------
[compiler-rt] Call __sys_mmap in internal_mmap on FreeBSD
Due to the slightly non-standard interface that returns a pointer
rather than just an integer, the __syscall() utility cannot be used
on all architectures. This change is required for example to use the
sanitizers on Arm Morello.
Pull Request: https://github.com/llvm/llvm-project/pull/84438
Commit: 1ae837ab34424a0b81bcc9a4fabc89e36cd57235
https://github.com/llvm/llvm-project/commit/1ae837ab34424a0b81bcc9a4fabc89e36cd57235
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
Log Message:
-----------
[compiler-rt] Update AllSupportedArchDefs.cmake for FreeBSD
This syncs the list of supported sanitizers with the matching code
in clang (`FreeBSD::getSupportedSanitizers()`),
Reviewed By: emaste, DimitryAndric
Pull Request: https://github.com/llvm/llvm-project/pull/84280
Commit: 35a509dd2d9a90b7582167558a5285b04aab77c1
https://github.com/llvm/llvm-project/commit/35a509dd2d9a90b7582167558a5285b04aab77c1
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/docs/NVPTXUsage.rst
Log Message:
-----------
[llvm][docs] Correct named metadata name in example code block (NFC)
llvm.module.flag => llvm.module.flags
Commit: e96687acd23fef6ac2402f6933eb1751e0428a76
https://github.com/llvm/llvm-project/commit/e96687acd23fef6ac2402f6933eb1751e0428a76
Author: OverMighty <its.overmighty at gmail.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M libc/test/src/math/smoke/GetPayloadTest.h
Log Message:
-----------
[libc][math][c23] Fix getpayloadf128 smoke test on RV32 (#101720)
Fixes
https://github.com/llvm/llvm-project/pull/101285#issuecomment-2265765022.
Commit: 6c783e19ef66b88859a21a4cbe1862bded8a090a
https://github.com/llvm/llvm-project/commit/6c783e19ef66b88859a21a4cbe1862bded8a090a
Author: Chao Chen <116223022+chencha3 at users.noreply.github.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
Log Message:
-----------
[MLIR][XeGPU] Refine XeGPU definitions (#100763)
This PR has following changes/fixes to XeGPU definition:
- Fix type print format for atomic_rmw
- removed 2D support for MaskType
- Update LoadNd definition
- Add 1D TensorDesc support
- Replaced vnni_axis attribute with packed attribute
- Update DPAS op definition, limiting A to 2D vector, and B to either 2D/3D vector.
Commit: 8cf85653b6f5c90b83f8a5741baad5725d6c6932
https://github.com/llvm/llvm-project/commit/8cf85653b6f5c90b83f8a5741baad5725d6c6932
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/test/CodeGen/DirectX/acos_error.ll
M llvm/test/CodeGen/DirectX/asin_error.ll
M llvm/test/CodeGen/DirectX/atan_error.ll
M llvm/test/CodeGen/DirectX/ceil_error.ll
M llvm/test/CodeGen/DirectX/cos_error.ll
M llvm/test/CodeGen/DirectX/cosh_error.ll
M llvm/test/CodeGen/DirectX/dot2_error.ll
M llvm/test/CodeGen/DirectX/dot3_error.ll
M llvm/test/CodeGen/DirectX/dot4_error.ll
M llvm/test/CodeGen/DirectX/exp2_error.ll
M llvm/test/CodeGen/DirectX/flattened_thread_id_in_group_error.ll
M llvm/test/CodeGen/DirectX/floor_error.ll
M llvm/test/CodeGen/DirectX/frac_error.ll
M llvm/test/CodeGen/DirectX/group_id_error.ll
M llvm/test/CodeGen/DirectX/isinf_error.ll
M llvm/test/CodeGen/DirectX/log2_error.ll
M llvm/test/CodeGen/DirectX/round_error.ll
M llvm/test/CodeGen/DirectX/rsqrt_error.ll
M llvm/test/CodeGen/DirectX/sin_error.ll
M llvm/test/CodeGen/DirectX/sinh_error.ll
M llvm/test/CodeGen/DirectX/sqrt_error.ll
M llvm/test/CodeGen/DirectX/tan_error.ll
M llvm/test/CodeGen/DirectX/tanh_error.ll
M llvm/test/CodeGen/DirectX/thread_id_error.ll
M llvm/test/CodeGen/DirectX/thread_id_in_group_error.ll
M llvm/test/CodeGen/DirectX/trunc_error.ll
M llvm/utils/TableGen/DXILEmitter.cpp
Log Message:
-----------
[DirectX] Make DXILOpBuilder's API more useable
This adjusts the DXILOpBuilder API in a couple of ways:
1. Remove the need to call `getOverloadTy` before creating Ops
2. Introduce `tryCreateOp` to parallel `createOp` but propagate errors
3. Introduce specialized createOp methods for each DXIL Op
This will simplify usage of the builder in upcoming changes, and also allows us
to propagate errors via DiagnosticInfo rather than using fatal errors.
Pull Request: https://github.com/llvm/llvm-project/pull/101250
Commit: d9f786fd13fe03256ef0f2983ecd379d0e7e8c93
https://github.com/llvm/llvm-project/commit/d9f786fd13fe03256ef0f2983ecd379d0e7e8c93
Author: Volodymyr Sapsai <vsapsai at apple.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/lib/Sema/Sema.cpp
A clang/test/Modules/builtin-vararg.c
Log Message:
-----------
Reland "[Modules] Fix using `va_list` with modules and a precompiled header. (#100837)"
Fix the false warning
> incompatible pointer types passing 'va_list' (aka '__builtin_va_list')
to parameter of type 'struct __va_list_tag *'
[-Wincompatible-pointer-types]
The warning is wrong because both in the function declaration and at the
call site we are using `va_list`.
When we call `ASTContext::getBuiltinVaListDecl` at a specific moment, we
end up re-entering this function which causes creating 2 instances of
`BuiltinVaListDecl` and 2 instances of `VaListTagDecl` but the stored
instances are unrelated to each other because of the call sequence like
getBuiltinVaListDecl
CreateX86_64ABIBuiltinVaListDecl
VaListTagDecl = TagA
indirectly call getBuiltinVaListDecl
CreateX86_64ABIBuiltinVaListDecl
VaListTagDecl = TagB
BuiltinVaListDecl = ListB
BuiltinVaListDecl = ListA
Now we have `BuiltinVaListDecl == ListA` and `VaListTagDecl == TagB`.
For x86_64 '__builtin_va_list' and 'struct __va_list_tag *' are
compatible because '__builtin_va_list' == '__va_list_tag[1]'. But
because we have unrelated decls for VaListDecl and VaListTagDecl the
types are considered incompatible as we are comparing type pointers.
Fix the error by creating `BuiltinVaListDecl` before
`ASTReader::InitializeSema`, so that during
`ASTContext::getBuiltinVaListDecl` ASTReader doesn't try to de-serialize
'__builtin_va_list' and to call `ASTContext::getBuiltinVaListDecl`
again.
Reland with the requirement to have x86 target to avoid errors like
> error: unable to create target: 'No available targets are compatible
with triple "x86_64-apple-darwin"'
rdar://130947515
Commit: 874cd100a076f3b98aaae09f90ef224682501538
https://github.com/llvm/llvm-project/commit/874cd100a076f3b98aaae09f90ef224682501538
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
R llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
Log Message:
-----------
Revert "[Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (#100952)"
This reverts commit ab819d7cf86932e4a47b5bf6aadea9d714a313a9.
Commit: 88ef76c4efb11389a9c334c19f751c89c29278d1
https://github.com/llvm/llvm-project/commit/88ef76c4efb11389a9c334c19f751c89c29278d1
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/unittests/Transforms/Utils/ModuleUtilsTest.cpp
Log Message:
-----------
[NFC][ModuleUtils] Rename test function (#101750)
Commit: db1d3b23a37c7a57fa8b9e5bc94e1b22e278d361
https://github.com/llvm/llvm-project/commit/db1d3b23a37c7a57fa8b9e5bc94e1b22e278d361
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/lib/Headers/__clang_hip_cmath.h
M clang/test/Headers/__clang_hip_cmath.hip
Log Message:
-----------
[HIP] Fix __clang_hip_cmath.hip for ambiguity (#101341)
If there is a type T which can be converted to both float and double etc
but itself is not specialized for __numeric_type, and it is called for
math functions eg. fma, it will cause ambiguity with test function of
__numeric_type.
Since test is not template, this error is not bypassed by SFINAE. This
is a design flaw of __numeric_type. This patch fixes clang wrapper
header to use SFINAE to avoid such ambiguity.
Fixes: SWDEV-461604
Fixes: https://github.com/llvm/llvm-project/issues/101239
Commit: 7e44305041d96b064c197216b931ae3917a34ac1
https://github.com/llvm/llvm-project/commit/7e44305041d96b064c197216b931ae3917a34ac1
Author: Sam James <sam at gentoo.org>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/include/llvm/ADT/SmallVector.h
Log Message:
-----------
[ADT] Add `<cstdint>` to SmallVector (#101761)
SmallVector uses `uint32_t`, `uint64_t` without including `<cstdint>`
which fails to build w/ GCC 15 after a change in libstdc++ [0]
[0] https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=3a817a4a5a6d94da9127af3be9f84a74e3076ee2
Commit: 26552e47af803321ca9604936294cdea7e8d90c8
https://github.com/llvm/llvm-project/commit/26552e47af803321ca9604936294cdea7e8d90c8
Author: Sam James <sam at gentoo.org>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M compiler-rt/lib/asan/asan_ignorelist.txt
Log Message:
-----------
[ASan] Fix goo.gl link in comment for MSVC bug
goo.gl is going away: https://developers.googleblog.com/en/google-url-shortener-links-will-no-longer-be-available/
Fix goo.gl link from:
- http://goo.gl/L4qqUG
+ https://connect.microsoft.com/VisualStudio/feedback/details/829931/vs2012-and-vs2013-istream-code-reads-off-the-end-of-its-non-null-terminated-stack-copied-string via archive.org
Endilll points out on the bug that the goo.gl link first goes to a dead
redirect to connect.microsoft.com, then to bing, so grab the article
from archive.org.
Committed as obvious.
Bug: https://github.com/llvm/llvm-project/issues/99586
Commit: 4527fba9ad6bc682eceda603150bfaec65ec6916
https://github.com/llvm/llvm-project/commit/4527fba9ad6bc682eceda603150bfaec65ec6916
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/Analysis/CostModel/RISCV/int-bit-manip.ll
M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
M llvm/test/CodeGen/RISCV/pr56457.ll
M llvm/test/CodeGen/RISCV/pr95271.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/sextw-removal.ll
Log Message:
-----------
Revert "[SDag][ARM][RISCV] Allow lowering CTPOP into a libcall" (#101740)
Reverts the rest of llvm/llvm-project#99752
Commit: 5e2e18b29522217f415de8dd473a87c2e1ea4ebf
https://github.com/llvm/llvm-project/commit/5e2e18b29522217f415de8dd473a87c2e1ea4ebf
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
Log Message:
-----------
[baremetal] Add atan2 to baremetal (#101767)
Co-authored-by: Petr Hosek <phosek at google.com>
Commit: 043ec2feaea763d300246ae723b05477dcb425ab
https://github.com/llvm/llvm-project/commit/043ec2feaea763d300246ae723b05477dcb425ab
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
A llvm/test/Instrumentation/AddressSanitizer/instrument_late_initializer.ll
Log Message:
-----------
[test][asan] Precommit test (#101769)
For #101772
Commit: fca5038597af65d2fd1af0815014440aff055630
https://github.com/llvm/llvm-project/commit/fca5038597af65d2fd1af0815014440aff055630
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/CufOpConversion.cpp
A flang/test/Fir/CUDA/cuda-allocate.fir
Log Message:
-----------
[flang][cuda] Add conversion pass for cuf.allocate and cuf.deallocate (#101563)
Allocator can be specified in the descriptor. For simple local
allocatable, we can simply convert `cuf.allocate`/`cuf.deallocate` to
their corresponding runtime calls in the standard flang runtime. More
specific cases will require dedicated entry points. Global descriptor
will require sync between host and device copy.
This patch adds a pass to perform this conversion.
Commit: ca529dd65c2d50a056d517e6a14f0a25f35a6ce6
https://github.com/llvm/llvm-project/commit/ca529dd65c2d50a056d517e6a14f0a25f35a6ce6
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CMakeLists.txt
Log Message:
-----------
[flang][cuda] Fix libTransforms linking (#101773)
Fix buildbot failure #101563
Commit: a0a9bf5152507beacd2a72dda42d054391494c4a
https://github.com/llvm/llvm-project/commit/a0a9bf5152507beacd2a72dda42d054391494c4a
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/unittests/Transforms/Utils/ModuleUtilsTest.cpp
Log Message:
-----------
[NFC][ModuleUtils] Test appendToGlobalCtors/appendToGlobalDtors (#101753)
Commit: 048cf8857e081fb80d5ac8b24a79f999d632141b
https://github.com/llvm/llvm-project/commit/048cf8857e081fb80d5ac8b24a79f999d632141b
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/ModuleUtils.h
M llvm/lib/Transforms/Utils/ModuleUtils.cpp
M llvm/unittests/Transforms/Utils/ModuleUtilsTest.cpp
Log Message:
-----------
[ModuleUtils] Add transformGlobal{C,D}tors (#101757)
For #101772
Commit: 1c7540c5e1f0c0c435c1ec272fbde23ef416f7ac
https://github.com/llvm/llvm-project/commit/1c7540c5e1f0c0c435c1ec272fbde23ef416f7ac
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/test/CodeGen/DirectX/any.ll
M llvm/test/CodeGen/DirectX/lerp.ll
Log Message:
-----------
[DirectX] Add triples to two tests after #97593 (#101779)
As of cdfd884b0ec6 "[DXIL] Add DXIL version-specific TableGen
specification and implementation of DXIL Ops (#97593)", all of these
tests need to specify triples.
Commit: d8b61dd84b1acbc4f5a84b09bc1abd552a949189
https://github.com/llvm/llvm-project/commit/d8b61dd84b1acbc4f5a84b09bc1abd552a949189
Author: jyu2-git <jennifer.yu at intel.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/target_map_nest_defalut_mapper_ast_dump.cpp
A clang/test/OpenMP/target_map_nest_defalut_mapper_codegen.cpp
A offload/test/mapping/declare_mapper_nested_default_mappers_1.cpp
Log Message:
-----------
[OpenMP] Generate implicit default mapper for mapping array section. (#101101)
This is only for struct containing nested structs with user defined
mappers.
Add four functions:
1>buildImplicitMap: build map for default mapper
2>buildImplicitMapper: build default mapper.
3>hasUserDefinedMapper for given mapper name and mapper type, lookup
user defined map, if found one return true.
4>isImplicitMapperNeeded check if Mapper is needed
During create map, in checkMappableExpressionList, call
isImplicitMapperNeeded when it return true, call buildImplicitMapper to
generate implicit mapper and added to map clause.
https://github.com/llvm/llvm-project/pull/101101
Commit: ac319a8dd8b7999ffa0342e50e02932c5c8f7a6a
https://github.com/llvm/llvm-project/commit/ac319a8dd8b7999ffa0342e50e02932c5c8f7a6a
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
A clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
Log Message:
-----------
Attach resource attributes to handle within record, instead of record (#101433)
This PR attaches the resource attributes, `HLSLResourceAttr` and
`HLSLResourceClassAttr`, to the handle contained within such resource
classes like `RWBuffer`. CodeGen will now search for fields within HLSL
resource decls, and emit previous data based on attributes on the handle
member. An AST-dump test was added to verify that the resource attribute
is attached to the handle within the resource record decl.
Fixes #98556
---------
Co-authored-by: Justin Bogner <mail at justinbogner.com>
Commit: ba4da5a087f28c9522bc7f173e99673bb3009af9
https://github.com/llvm/llvm-project/commit/ba4da5a087f28c9522bc7f173e99673bb3009af9
Author: Mircea Trofin <mtrofin at google.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
A llvm/test/Transforms/PGOProfile/ctx-prof-use-prelink.ll
Log Message:
-----------
[ctx_prof] "Use" support for pre-thinlink. (#101338)
There is currently no plan to support contextual profiling use in a non-
ThinLTO scenario.
In the pre-link phase, we only instrument and then immediately bail out
to let the linker group functions under an entrypoint in the same module
as the entrypoint. We don't actually care what the profile contains -
just that we want to use a contextual profile.
After that, in post-thinlink, we require the profile be passed again so
we can actually use it. The earlier instrumentation will be used to
match counter values.
While the feature is in development, we add a hidden flag for the use
scenario, but we can eventually tie it to the `PGOOptions` mechanism. We
will use the same flag in both pre- and post-thinlink, because it
simplifies things - usually the post-thinlink args are the same as the
ones for pre-. This, despite the flag being basically treated as a
boolean in pre-thinlink.
Commit: a43677c17266308fb615cc37d03dcff87e7e9a5f
https://github.com/llvm/llvm-project/commit/a43677c17266308fb615cc37d03dcff87e7e9a5f
Author: jyu2-git <jennifer.yu at intel.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M offload/test/mapping/declare_mapper_nested_default_mappers_1.cpp
Log Message:
-----------
Test faild with amd. (#101781)
Add unspport.
This is relate #101101
Commit: 259ca9ee9c4d9f7ba2d05db9fe05f782a865aeb5
https://github.com/llvm/llvm-project/commit/259ca9ee9c4d9f7ba2d05db9fe05f782a865aeb5
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsX86.def
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/Driver/ToolChains/Arch/X86.cpp
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/avx10_2_512niintrin.h
A clang/lib/Headers/avx10_2niintrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Sema/SemaX86.cpp
A clang/test/CodeGen/X86/avx10_2_512ni-builtins.c
A clang/test/CodeGen/X86/avx10_2ni-builtins.c
M clang/test/CodeGen/attr-target-x86.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/Driver/x86-target-features.c
M clang/test/Preprocessor/x86_target_features.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
M llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
A llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrFormats.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86InstrInfo.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
A llvm/test/CodeGen/X86/avx10_2_512ni-intrinsics.ll
A llvm/test/CodeGen/X86/avx10_2ni-intrinsics.ll
A llvm/test/MC/Disassembler/X86/avx10_2ni-32.txt
A llvm/test/MC/Disassembler/X86/avx10_2ni-64.txt
A llvm/test/MC/X86/avx10_2ni-32-intel.s
A llvm/test/MC/X86/avx10_2ni-64-att.s
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/utils/TableGen/X86DisassemblerTables.cpp
M llvm/utils/TableGen/X86ManualInstrMapping.def
M llvm/utils/TableGen/X86RecognizableInstr.cpp
M llvm/utils/TableGen/X86RecognizableInstr.h
Log Message:
-----------
Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (#101616)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Commit: 34766d0d488ba2fbefa80dcd0cc8720a0e753448
https://github.com/llvm/llvm-project/commit/34766d0d488ba2fbefa80dcd0cc8720a0e753448
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M lldb/include/lldb/Core/PluginManager.h
M lldb/include/lldb/lldb-private-interfaces.h
M lldb/source/Core/PluginManager.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.h
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.h
M lldb/source/Plugins/ObjectFile/Minidump/ObjectFileMinidump.cpp
M lldb/source/Plugins/ObjectFile/Minidump/ObjectFileMinidump.h
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.h
M lldb/source/Plugins/ObjectFile/PECOFF/WindowsMiniDump.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/WindowsMiniDump.h
M lldb/test/API/functionalities/process_save_core/TestProcessSaveCore.py
Log Message:
-----------
[LLDB][SBSaveCore] Fix bug where default values are not propagated. (#101770)
In #100443, Mach-o and Minidump now only call process API's that take a
`SaveCoreOption` as the container for the style and information if a
thread should be included in the core or not. This introduced a bug
where in subsequent method calls we were not honoring the defaults of
both implementations.
~~To solve this I have made a copy of each SaveCoreOptions that is
mutable by the respective plugin. Originally I wanted to leave the
SaveCoreOptions as non const so these default value mutations could be
shown back to the user. Changing that behavior is outside of the scope
of this bugfix, but is context for why we are making a copy.~~
Removed const on the savecoreoptions so defaults can be inspected by the
user
CC: @Michael137
Commit: 6e70ca1e802f26b4c9cbe90c11b2c5317789ed23
https://github.com/llvm/llvm-project/commit/6e70ca1e802f26b4c9cbe90c11b2c5317789ed23
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/include/clang/Basic/riscv_vector.td
Log Message:
-----------
[RISCV] Use FP type as the base type for some int->f conversions. (#101733)
This is an alternative to part of #101608. Using FP as the base type
allows the existing Zfh extension check to work.
This does not fix fp->int narrowing instructions which still use the
narrow integer type as their base type.
Commit: f25d43285cec24a732a3c489c2c83c8090204977
https://github.com/llvm/llvm-project/commit/f25d43285cec24a732a3c489c2c83c8090204977
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port 259ca9ee9c4d
Commit: 400c7c7cf2b15138aa674355983be74270de93bc
https://github.com/llvm/llvm-project/commit/400c7c7cf2b15138aa674355983be74270de93bc
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/Pointer.cpp
Log Message:
-----------
[clang][Interp][NFC] Simplify Pointer move/copy assignment op
Commit: cad835266ea12dbb3b602d9ae9ae479a550c47b4
https://github.com/llvm/llvm-project/commit/cad835266ea12dbb3b602d9ae9ae479a550c47b4
Author: aaryanshukla <53713108+aaryanshukla at users.noreply.github.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M libc/test/src/math/smoke/FmaTest.h
Log Message:
-----------
[libc][math][c23] fixing dfmal for rv32 (#101763)
Commit: 1299af66322aa21246b0de6204dff553e46c408c
https://github.com/llvm/llvm-project/commit/1299af66322aa21246b0de6204dff553e46c408c
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ExprClassification.cpp
M clang/test/SemaTemplate/temp_arg_template_p0522.cpp
Log Message:
-----------
[clang] create class-type injected NTTP with correct value kind (#101395)
A template parameter object is an lvalue, which was not being respected
for injected parameters.
Fixes #101394
Commit: 13faed8737b3021e59c3df6db3066876ce831dc9
https://github.com/llvm/llvm-project/commit/13faed8737b3021e59c3df6db3066876ce831dc9
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/Descriptor.cpp
Log Message:
-----------
[clang][Interp][NFC] Use move ctor in moveArrayTy
Similar to what we did previously for primitive types, do it for
primitive arrays as well.
Commit: 4d2c9d8cd849e8097f41b3c3b52e4475188b5489
https://github.com/llvm/llvm-project/commit/4d2c9d8cd849e8097f41b3c3b52e4475188b5489
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/InterpBlock.cpp
M clang/lib/AST/Interp/Pointer.cpp
Log Message:
-----------
[clang][Interp][NFC] Add more assertions to add/removePointer
Commit: 53e87908c67f158bfe196a3c7cec690dc5eed1fc
https://github.com/llvm/llvm-project/commit/53e87908c67f158bfe196a3c7cec690dc5eed1fc
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.cpp
Log Message:
-----------
[clang][Interp][NFC] Remove double using namespace stmt
Commit: ed5b0e1e6986a652de8be88fa5ff92bf75c40a21
https://github.com/llvm/llvm-project/commit/ed5b0e1e6986a652de8be88fa5ff92bf75c40a21
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/length.hlsl
A clang/test/SemaHLSL/BuiltIns/length-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
A llvm/test/CodeGen/DirectX/length.ll
A llvm/test/CodeGen/DirectX/length_error.ll
A llvm/test/CodeGen/DirectX/length_invalid_intrinsic_error.ll
A llvm/test/CodeGen/DirectX/length_invalid_intrinsic_error_scalar.ll
Log Message:
-----------
Add length builtins and length HLSL function to DirectX Backend (#101256)
This PR adds the length intrinsic and an HLSL function that uses it.
The SPIRV implementation is left for a future PR.
This PR addresses #99134, though some SPIR-V changes still need to be
made to complete the task. Below is how this PR addresses #99134.
- "Implement `length` clang builtin" was done by defining `HLSLL ength`
in Builtins.td
- "Link `length` clang builtin with hlsl_intrinsics.h" was done by using
the alias attribute to make `length` an alias of
`__builtin_hlsl_elementwise_length` in hlsl_intrinsics.h
- "Add sema checks for `length` to `CheckHLSLBuiltinFunctionCall` in
`SemaChecking.cpp` " was done, but in this case not in SemaChecking.cpp,
rather SemaHLSL.cpp. A case was added to the builtin to check for
semantic failures, and set `TheCall` up to have the right return type.
- "Add codegen for `length` to `EmitHLSLBuiltinExpr` in `CGBuiltin.cpp`"
was done. For scalars, fabs is emitted, otherwise, length is emitted.
- "Add codegen tests to `clang/test/CodeGenHLSL/builtins/length.hlsl`
was done to test that `length` in HLSL emits the right intrinsic.
- "Add sema tests to `clang/test/SemaHLSL/BuiltIns/length-errors.hlsl`"
was done to test for diagnostics emitted in SemaHLSL.cpp
- "Create the `int_dx_length` intrinsic in `IntrinsicsDirectX.td`" was
done. Specifying return types and parameter types was difficult, but
`idot` was used for reference, and `llvm\include\llvm\IR\Intrinsics.td`
contains all the ways to express return / parameter types.
- "Create an intrinsic expansion of `int_dx_length` in
`llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp`" was done, and was
mostly derived by looking at `TranslateLength` in `HLOperationLower.cpp`
in the DXC codebase.
- "Create the `length.ll` and `length_errors.ll` tests in
`llvm/test/CodeGen/DirectX/`" was done by taking the DXIL output of
`clang/test/CodeGenHLSL/builtins/length.hlsl` and running `opt -S
-dxil-intrinsic-expansion` and ` opt -S -dxil-op-lower` on it, checking
for how the length intrinsic was either expanded or lowered.
- "Create the `int_spv_length` intrinsic in `IntrinsicsSPIRV.td`" was
done by copying `IntrinsicsDirectX.td`.
---------
Co-authored-by: Justin Bogner <mail at justinbogner.com>
Commit: 95b366cad2e1232d0b21dcc101362655c7abcc13
https://github.com/llvm/llvm-project/commit/95b366cad2e1232d0b21dcc101362655c7abcc13
Author: Julius Alexandre <juliuswoosebert at gmail.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxIR] Add setVolatile function to LoadInst and StoreInst (#101759)
This patch adds sandboxir::LoadInst::setVolatile() and sandboxir::StoreInst::setVolatile()
and the corresponding tracking class.
Commit: 14837aff058f9a2d32b8277debe619d8eb1995a1
https://github.com/llvm/llvm-project/commit/14837aff058f9a2d32b8277debe619d8eb1995a1
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-08-02 (Fri, 02 Aug 2024)
Changed paths:
A .github/workflows/get-llvm-version/action.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/llvm-tests.yml
A llvm/utils/release/get-llvm-version.sh
Log Message:
-----------
workflows: Re-implement the get-llvm-version action as a composite action (#101569)
The old version in the llvm/actions repo stopped working after the
version variables were moved out of llvm/CMakeLists.txt. Composite
actions are more simple and don't require javascript, which is why I
reimplemented it as a composite action.
This will fix the failing abi checks on the release branch.
Commit: d631ebb7562d48d9e3d0f9ac0543364587d470b6
https://github.com/llvm/llvm-project/commit/d631ebb7562d48d9e3d0f9ac0543364587d470b6
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/Source.h
Log Message:
-----------
[clang][Interp] Enhance CodePtr (#101787)
Add more relational operators.
Commit: ea18a40ed920b11ef35c3cfdd7e5f0b4bc796da4
https://github.com/llvm/llvm-project/commit/ea18a40ed920b11ef35c3cfdd7e5f0b4bc796da4
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/Pointer.cpp
M clang/lib/AST/Interp/Pointer.h
M clang/test/AST/Interp/new-delete.cpp
Log Message:
-----------
[clang][Interp] Check for 'delete this' in dtors (#101792)
Commit: 8bd9ade6284a793c898da133723121c3bcc49ef7
https://github.com/llvm/llvm-project/commit/8bd9ade6284a793c898da133723121c3bcc49ef7
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/fcmp.ll
M llvm/test/Transforms/InstCombine/known-never-nan.ll
Log Message:
-----------
[InstCombine] Fold `fcmp pred sqrt(X), 0.0 -> fcmp pred2 X, 0.0` (#101626)
Proof (Please run alive-tv with larger smt-to):
https://alive2.llvm.org/ce/z/-aqixk
FMF propagation: https://alive2.llvm.org/ce/z/zyKK_p
```
sqrt(X) < 0.0 --> false
sqrt(X) u>= 0.0 --> true
sqrt(X) u< 0.0 --> X u< 0.0
sqrt(X) u<= 0.0 --> X u<= 0.0
sqrt(X) > 0.0 --> X > 0.0
sqrt(X) >= 0.0 --> X >= 0.0
sqrt(X) == 0.0 --> X == 0.0
sqrt(X) u!= 0.0 --> X u!= 0.0
sqrt(X) <= 0.0 --> X == 0.0
sqrt(X) u> 0.0 --> X u!= 0.0
sqrt(X) u== 0.0 --> X u<= 0.0
sqrt(X) != 0.0 --> X > 0.0
!isnan(sqrt(X)) --> X >= 0.0
isnan(sqrt(X)) --> X u< 0.0
```
In most cases, `sqrt` cannot be eliminated since it has multiple uses.
But this patch will break data dependencies and allow optimizer to sink
expensive `sqrt` calls into successor blocks.
Commit: 8f39502b85d34998752193e85f36c408d3c99248
https://github.com/llvm/llvm-project/commit/8f39502b85d34998752193e85f36c408d3c99248
Author: Sam James <sam at gentoo.org>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
Log Message:
-----------
[AMDGPU] Include `<cstdint>` in AMDGPUMCTargetDesc (#101766)
Commit: 5d64b37f3403dc1683bd4f8166f4286e6562c6cf
https://github.com/llvm/llvm-project/commit/5d64b37f3403dc1683bd4f8166f4286e6562c6cf
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/InterpFrame.cpp
M clang/test/AST/Interp/new-delete.cpp
Log Message:
-----------
[clang][Interp] Convert blocks to DeadBlocks when destroying frames (#101794)
This doesn't fix the attached test case, but at least we're not crashing
anymore.
Commit: 3eaca31e4607161c0b878c242c040de2cdadcced
https://github.com/llvm/llvm-project/commit/3eaca31e4607161c0b878c242c040de2cdadcced
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/Compiler.cpp
M clang/lib/AST/Interp/Compiler.h
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/InterpFrame.cpp
M clang/lib/AST/Interp/InterpFrame.h
M clang/lib/AST/Interp/Opcodes.td
M clang/test/AST/Interp/if.cpp
M clang/test/AST/Interp/loops.cpp
Log Message:
-----------
[clang][Interp] Simplify and fix variable scope handling (#101788)
Change scope handling to allow multiple Destroy calls for a given scope,
provided it is preceeded by a InitScope call. This is necessary to
properly allow nested scopes in loops.
Commit: 2fc71e4e4b0c2eabd7c863f5cdfa6245c1d87c71
https://github.com/llvm/llvm-project/commit/2fc71e4e4b0c2eabd7c863f5cdfa6245c1d87c71
Author: Matthias Springer <me at m-sp.org>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms][NFC] Dialect Conversion: Move argument materialization logic (#98805)
This commit moves the argument materialization logic from
`legalizeConvertedArgumentTypes` to
`legalizeUnresolvedMaterializations`.
Before this change:
- Argument materializations were created in
`legalizeConvertedArgumentTypes` (which used to call
`materializeLiveConversions`).
After this change:
- `legalizeConvertedArgumentTypes` creates a "placeholder"
`unrealized_conversion_cast`.
- The placeholder `unrealized_conversion_cast` is replaced with an
argument materialization (using the type converter) in
`legalizeUnresolvedMaterializations`.
- All argument and target materializations now take place in the same
location (`legalizeUnresolvedMaterializations`).
This commit brings us closer towards creating all source/target/argument
materializations in one central step, which can then be made optional
(and delegated to the user) in the future. (There is one more source
materialization step that has not been moved yet.)
This commit also consolidates all `build*UnresolvedMaterialization`
functions into a single `buildUnresolvedMaterialization` function.
This is a re-upload of #96329.
Commit: d1e5dc254de7c543a971ebd58412e9a727f06536
https://github.com/llvm/llvm-project/commit/d1e5dc254de7c543a971ebd58412e9a727f06536
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M llvm/include/llvm/IR/Instructions.h
Log Message:
-----------
[NFC] Add const qualifier for parameters of functions in Instructions.h
This is to extract the NFC change in #96878 into a separate PR.
Commit: 879640cba00344aebd76764f2479497a1c731835
https://github.com/llvm/llvm-project/commit/879640cba00344aebd76764f2479497a1c731835
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
A libcxx/test/libcxx/feature_test_macro/ftm_metadata.sh.py
M libcxx/test/libcxx/feature_test_macro/implemented_ftms.sh.py
M libcxx/test/libcxx/feature_test_macro/standard_ftms.sh.py
M libcxx/test/libcxx/feature_test_macro/test_data.json
A libcxx/test/libcxx/feature_test_macro/version_header.sh.py
A libcxx/test/libcxx/feature_test_macro/version_header_implementation.sh.py
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Implements the new version header generator. (#97847)
The generator makes a few changes to the output
- removes the synopsis, it did not really show what was implemented
correctly.
- the output now is clang-format clean.
This code uses the new FTM data structure. Since the contents of this
structure are not up-to-date the code is only used in its tests.
Commit: 79caa066ea6d4f2479aed6a28c6c04fd7857bec8
https://github.com/llvm/llvm-project/commit/79caa066ea6d4f2479aed6a28c6c04fd7857bec8
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M libcxx/include/__bit/rotate.h
M libcxx/test/std/numerics/bit/bitops.rot/rotl.pass.cpp
M libcxx/test/std/numerics/bit/bitops.rot/rotr.pass.cpp
Log Message:
-----------
[libc++][bit] Improves rotate functions. (#98032)
Investigating #96612 shows our implementation was different from the
Standard and could cause UB. Testing the codegen showed quite a bit of
assembly generated for these functions. The functions have been written
differently which allows Clang to optimize the code to use simple CPU
rotate instructions.
Fixes: https://github.com/llvm/llvm-project/issues/96612
Commit: 0dcada94bb1ae79f0edd91013038098c62a96b3b
https://github.com/llvm/llvm-project/commit/0dcada94bb1ae79f0edd91013038098c62a96b3b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/Compiler.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/Opcodes.td
M clang/test/AST/Interp/eval-order.cpp
Log Message:
-----------
[clang][Interp] Fix array subscript eval order (#101804)
Always evaluate LHS first, then RHS.
Commit: 5f696c1bd9089155666b8d8b5653daa8f9967987
https://github.com/llvm/llvm-project/commit/5f696c1bd9089155666b8d8b5653daa8f9967987
Author: Jannick Kremer <51118500+DeinAlptraum at users.noreply.github.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[github] Add @DeinAlptraum as CODEOWNER for libclang/Python bindings (#101815)
Commit: a3cf8642bf4d3cd4362063cc2a98ead4dca8cdec
https://github.com/llvm/llvm-project/commit/a3cf8642bf4d3cd4362063cc2a98ead4dca8cdec
Author: David Green <david.green at arm.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
A llvm/test/CodeGen/AArch64/sched-postidxalias.mir
Log Message:
-----------
[AArch64] Cleanup existing values in getMemOpInfo (#98196)
This patch tries to clean up some of the existing values in
getMemOpInfo. All values should now be in bytes (not bits), and the
MinOffset/MaxOffset are now always represented unscaled (the immediate
that will be present in the final instruction).
Although I could not find a place where it altered codegen, the offset
of a post-index instruction will be 0, not scale*imm. A
IsPostIndexLdStOpcode method has been added to try and make sure that
case is handled properly.
Commit: 79f7630e28589364ccf989a4a838f5dd74ce260a
https://github.com/llvm/llvm-project/commit/79f7630e28589364ccf989a4a838f5dd74ce260a
Author: Ralf Jung <post at ralfj.de>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Clarify semantics of masked vector load/store (#82469)
Basically, these operations are equivalent to a loop that iterates all
elements and then does a `getelementptr` (without `inbounds`!) plus
`load`/`store` only for the masked-on elements.
Commit: 2bae7aeab42062e61d6f9d6458660d4a5646f7af
https://github.com/llvm/llvm-project/commit/2bae7aeab42062e61d6f9d6458660d4a5646f7af
Author: Jannick Kremer <51118500+DeinAlptraum at users.noreply.github.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M clang/tools/libclang/libclang.map
Log Message:
-----------
[libclang] Fix symbol version of `getBinaryOpcode` functions (#101820)
#98489 resurrected an [old patch](https://reviews.llvm.org/D10833) that
was adding new libclang functions. That PR got merged with old `LLVM_13`
symbol versions for new functions. This patch fixes this oversight.
Commit: f78d288d9d77c66f8b3036c62bb55160f19ba9cd
https://github.com/llvm/llvm-project/commit/f78d288d9d77c66f8b3036c62bb55160f19ba9cd
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/Compiler.cpp
M clang/test/AST/Interp/eval-order.cpp
Log Message:
-----------
[clang][Interp] Fix function pointer callexpr eval order (#101821)
We need to evaluate the callee before the arguments.
Commit: a99e8c9c1d624433b57e16d46ab4ecf9f944f6ae
https://github.com/llvm/llvm-project/commit/a99e8c9c1d624433b57e16d46ab4ecf9f944f6ae
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/Compiler.cpp
M clang/test/AST/Interp/eval-order.cpp
Log Message:
-----------
[clang][Interp] Fix assignment eval order (#101833)
RHS first.
Commit: 59476c99983d3813b412c9b0c0464365644c23a8
https://github.com/llvm/llvm-project/commit/59476c99983d3813b412c9b0c0464365644c23a8
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows/release-binaries: Fix problem with python installation on macos-14 (#101774)
python3 wasn't able to see modules installed by pip, so we need to use
the setup-python action to ensure that the default pip and python3 both
use the same prefix.
See https://github.com/actions/runner-images/issues/10385
Commit: 242e8b94cf68a9666830ef60463400f9a1cc2d2f
https://github.com/llvm/llvm-project/commit/242e8b94cf68a9666830ef60463400f9a1cc2d2f
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M compiler-rt/lib/asan/asan_globals.cpp
Log Message:
-----------
[NFC][asan] Switch from list to DynInitGlobalsByModule (#101596)
The patch just switches container from plain
list of globals, to a map grouped by module.
Prepare for incremental poisoning in #101837
Commit: 534a87301b82f8d914087a848a2e88b897c24644
https://github.com/llvm/llvm-project/commit/534a87301b82f8d914087a848a2e88b897c24644
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/initialization-nobug.cpp
Log Message:
-----------
[test][asan] Fix the test checks
The test is intended to check the order of modules
in DynInitPoison, only relative to
DynInitUnpoison.
Folloup to #101584
Commit: 09dd0febbbd59a0c470b3909690cae6618a2416a
https://github.com/llvm/llvm-project/commit/09dd0febbbd59a0c470b3909690cae6618a2416a
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/OutputSections.h
M lld/ELF/Symbols.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Move Out into Ctx. NFC
Ctx was introduced in March 2022 as a more suitable place for such
singletons. ctx's hidden visibility optimizes generated instructions.
bufferStart and tlsPhdr, which are not OutputSection, can now be moved
outside of `Out`.
Commit: 03be619d9434de0a9616660a2119675635239a5b
https://github.com/llvm/llvm-project/commit/03be619d9434de0a9616660a2119675635239a5b
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Move ElfSym into Ctx. NFC
Ctx was introduced in March 2022 as a more suitable place for such
singletons. ctx's hidden visibility optimizes generated instructions.
This change fixes a pitfall: certain ElfSym members (e.g.
globalOffsetTable, tlsModuleBase) were not zeroed and might be stale
when lld::elf::link was invoked the second time.
Commit: 2fe3bbdf6744949ee30830adc30ae9980fa8f682
https://github.com/llvm/llvm-project/commit/2fe3bbdf6744949ee30830adc30ae9980fa8f682
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/OutputSections.h
M lld/ELF/Relocations.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Move outputSections into Ctx. NFC
Ctx was introduced in March 2022 as a more suitable place for such
singletons.
Commit: edf46f365cf4e7caccd7459ac1a6912de5096857
https://github.com/llvm/llvm-project/commit/edf46f365cf4e7caccd7459ac1a6912de5096857
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M llvm/lib/Analysis/Delinearization.cpp
M llvm/lib/Analysis/IVUsers.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Target/ARM/MVETailPredication.cpp
M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
M llvm/lib/Transforms/Scalar/LoopDeletion.cpp
M llvm/lib/Transforms/Scalar/LoopPredication.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
M llvm/unittests/Transforms/Utils/LoopUtilsTest.cpp
M llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp
Log Message:
-----------
[SCEV] Use const SCEV * explicitly in more places.
Use const SCEV * explicitly in more places to prepare for
https://github.com/llvm/llvm-project/pull/91961. Split off as suggested.
Commit: 85da96115e093dd847a8bd9e2f390e8a69b7fe24
https://github.com/llvm/llvm-project/commit/85da96115e093dd847a8bd9e2f390e8a69b7fe24
Author: vporpo <vporpodas at google.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxIR][Tracker] Track InsertIntoBB (#101595)
This patch implements tracking for the insertion of a
sandboxir::Instruction into a sandboxir::BasicBlock.
Commit: 8252d4d4688f9248e351a396f9489f28972fe39b
https://github.com/llvm/llvm-project/commit/8252d4d4688f9248e351a396f9489f28972fe39b
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/linux/aarch64/entrypoints.txt
M libc/src/stdlib/CMakeLists.txt
Log Message:
-----------
[libc] enable most of the entrypoints on aarch64 (#101797)
This is a non-feature change that enables most of the entrypoints for
aarch64 based runtime builds. It fixes an additional problem that some
compiler-rt targets are not defined at the time of dependency checking
thus leading to false-negatives.
Commit: 3a7861ee2381bc3b60b906411f67a719b5d4292a
https://github.com/llvm/llvm-project/commit/3a7861ee2381bc3b60b906411f67a719b5d4292a
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M compiler-rt/lib/asan/asan_globals.cpp
Log Message:
-----------
[NFC][asan] Track current dynamic init module (#101597)
This patch allows sequences like:
`__asan_before_dynamic_init`
`__asan_before_dynamic_init`
...
`__asan_before_dynamic_init`
to do minimal incrementa poisoning.
It's NFC as now callbacks invokes in pairs:
`__asan_before_dynamic_init`
`__asan_after_dynamic_init`
`__asan_before_dynamic_init`
`__asan_after_dynamic_init`
and `__asan_after_dynamic_init` unpoisons
everything anyway.
For #101837
Commit: 63a7786111c501920afc4cc27a4633f76cdaf803
https://github.com/llvm/llvm-project/commit/63a7786111c501920afc4cc27a4633f76cdaf803
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M compiler-rt/lib/builtins/divtc3.c
M compiler-rt/lib/builtins/multc3.c
Log Message:
-----------
[builtins] Fix divtc3.c etc. compilation on Solaris/SPARC with gcc (#101662)
`compiler-rt/lib/builtins/divtc3.c` and `multc3.c` don't compile on
Solaris/sparcv9 with `gcc -m32`:
```
FAILED: projects/compiler-rt/lib/builtins/CMakeFiles/clang_rt.builtins-sparc.dir/divtc3.c.o
[...]
compiler-rt/lib/builtins/divtc3.c: In function ‘__divtc3’:
compiler-rt/lib/builtins/divtc3.c:22:18: error: implicit declaration of function ‘__compiler_rt_logbtf’ [-Wimplicit-function-declaration]
22 | fp_t __logbw = __compiler_rt_logbtf(
| ^~~~~~~~~~~~~~~~~~~~
```
and many more. It turns out that while the definition of `__divtc3` is
guarded with `CRT_HAS_F128`, the `__compiler_rt_logbtf` and other
declarations use `CRT_HAS_128BIT && CRT_HAS_F128` as guard. This only
shows up with `gcc` since, as documented in Issue #41838, `clang`
violates the SPARC psABI in not using 128-bit `long double`, so this
code path isn't used.
Fixed by changing the guards to match.
Tested on `sparcv9-sun-solaris2.11`.
Commit: 3368a3245ce5049b090d7c1081c2d52a6b6fda68
https://github.com/llvm/llvm-project/commit/3368a3245ce5049b090d7c1081c2d52a6b6fda68
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_stacktrace_sparc.cpp
Log Message:
-----------
[sanitizer_common] Fix UnwindFast on SPARC (#101634)
```
UBSan-Standalone-sparc :: TestCases/Misc/Linux/diag-stacktrace.cpp
```
`FAIL`s on 32 and 64-bit Linux/sparc64 (and on Solaris/sparcv9, too: the
test isn't Linux-specific at all). With
`UBSAN_OPTIONS=fast_unwind_on_fatal=1`, the stack trace shows a
duplicate innermost frame:
```
compiler-rt/test/ubsan/TestCases/Misc/Linux/diag-stacktrace.cpp:14:31: runtime error: execution reached the end of a value-returning function without returning a value
#0 0x7003a708 in f() compiler-rt/test/ubsan/TestCases/Misc/Linux/diag-stacktrace.cpp:14:35
#1 0x7003a708 in f() compiler-rt/test/ubsan/TestCases/Misc/Linux/diag-stacktrace.cpp:14:35
#2 0x7003a714 in g() compiler-rt/test/ubsan/TestCases/Misc/Linux/diag-stacktrace.cpp:17:38
```
which isn't seen with `fast_unwind_on_fatal=0`.
This turns out to be another fallout from fixing
`__builtin_return_address`/`__builtin_extract_return_addr` on SPARC. In
`sanitizer_stacktrace_sparc.cpp` (`BufferedStackTrace::UnwindFast`) the
`pc` arg is the return address, while `pc1` from the stack frame
(`fr_savpc`) is the address of the `call` insn, leading to a double
entry for the innermost frame in `trace_buffer[]`.
This patch fixes this by moving the adjustment before all uses.
Tested on `sparc64-unknown-linux-gnu` and `sparcv9-sun-solaris2.11`
(with the `ubsan/TestCases/Misc/Linux` tests enabled).
Commit: 1a9acd786d493b00c08d1611f51420d421b74cf1
https://github.com/llvm/llvm-project/commit/1a9acd786d493b00c08d1611f51420d421b74cf1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Log Message:
-----------
[RISCV] Capitalize some variable names. NFC
Commit: b7146aed5b99e6f858f6c7243a2a38406bb41d1c
https://github.com/llvm/llvm-project/commit/b7146aed5b99e6f858f6c7243a2a38406bb41d1c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/lib/Transforms/Utils/LoopVersioning.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
Log Message:
-----------
[Transforms] Construct SmallVector with ArrayRef (NFC) (#101851)
Commit: 766f68d17ab1b12a46324d8b526f753cd1a353d3
https://github.com/llvm/llvm-project/commit/766f68d17ab1b12a46324d8b526f753cd1a353d3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Log Message:
-----------
[RISCV] Invert if conditions in the switch in RISCVDAGToDAGISel::hasAllNBitUsers. NFC
Make "break" consistently the "if" body and the "return false" the
last thing in each case.
This makes it easier to add different conditions for different operands
of some instructions and makes everything more consistent.
Commit: c03bf2c41bd3b89a8ed455b7f48cf95cf131656c
https://github.com/llvm/llvm-project/commit/c03bf2c41bd3b89a8ed455b7f48cf95cf131656c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/test/CodeGen/RISCV/imm.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/imm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
Log Message:
-----------
[RISCV] Improve hasAllNBitUsers for users of SLLI.
We can increase the number of Bits passes to the users by adding
the shift amount.
Commit: 899055f20bf5a17e63544892794982e4a6ef2822
https://github.com/llvm/llvm-project/commit/899055f20bf5a17e63544892794982e4a6ef2822
Author: ZhangYin <zhangyin2018 at iscas.ac.cn>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M libcxx/docs/Status/ParallelismProjects.csv
M libcxx/include/experimental/__simd/reference.h
A libcxx/test/std/experimental/simd/simd.reference/reference_arith_operators.pass.cpp
A libcxx/test/std/experimental/simd/simd.reference/reference_bitwise_operators.pass.cpp
M libcxx/test/std/experimental/simd/test_utils.h
Log Message:
-----------
[libc++] <experimental/simd> Add compound assignment operators for simd reference (#86761)
Commit: b024fd267b813149f7bd5ba88731673b9a29258d
https://github.com/llvm/llvm-project/commit/b024fd267b813149f7bd5ba88731673b9a29258d
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
Log Message:
-----------
[libc] disable strfroml entrypoint on aarch64 (#101854)
Disable `strfroml` entrypoint on aarch64 to please clang-11 buildbots.
Detailed in https://github.com/llvm/llvm-project/issues/101846. This is
not a fix for #101846 so I will keep the issue open until our buildbot
is updated or other mitigation is applied.
Commit: f2f410ca1317e7d2da89be0729a63a26ca83e7d7
https://github.com/llvm/llvm-project/commit/f2f410ca1317e7d2da89be0729a63a26ca83e7d7
Author: OverMighty <its.overmighty at gmail.com>
Date: 2024-08-03 (Sat, 03 Aug 2024)
Changed paths:
M libc/newhdrgen/class_implementation/classes/enumeration.py
M libc/newhdrgen/class_implementation/classes/function.py
M libc/newhdrgen/class_implementation/classes/macro.py
M libc/newhdrgen/class_implementation/classes/object.py
M libc/newhdrgen/class_implementation/classes/type.py
M libc/newhdrgen/gpu_headers.py
M libc/newhdrgen/header.py
M libc/newhdrgen/yaml_to_classes.py
Log Message:
-----------
[libc][newhdrgen] Remove shebangs in files other than yaml_to_classes.py (#101816)
None of the Python files were committed with the executable bit set, and
only yaml_to_classes.py was intended to be executed.
Also sets the executable bit on yaml_to_classes.py and changes the
shebang to run python3 instead of python.
Commit: 4aff3f6967eba11aced705e2772f3ad86f2adeef
https://github.com/llvm/llvm-project/commit/4aff3f6967eba11aced705e2772f3ad86f2adeef
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/Compiler.cpp
M clang/test/AST/Interp/eval-order.cpp
Log Message:
-----------
[clang][Interp] Fix assignment operator call eval order (#101845)
Commit: 533190acdb9d2ed774f96a998b5c03be3df4f857
https://github.com/llvm/llvm-project/commit/533190acdb9d2ed774f96a998b5c03be3df4f857
Author: mskamp <msk at posteo.org>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-and-shift.ll
M llvm/test/Transforms/InstCombine/load-cmp.ll
Log Message:
-----------
[InstCombine] Canonicalize Bit Testing by Shifting to Bit 0 (#101838)
Implement a new transformation that fold the bit-testing expression
(icmp ne (and (lshr V B) 1) 0) to (icmp ne (and V (shl 1 B)) 0) for
constant V. This rule already existed for non-constant V and constants
other than 1; this restriction to non-constant V has been added in
commit c3b2111d975a39d19f0c5d635e2961a4449c5a71 to fix an infinite loop.
Avoid the infinite loop by allowing constant V only if the shift
instruction is an lshr and the constant is 1. Also fold the negated
variant of the LHS.
This transformation necessitates an adaption of existing tests in
`icmp-and-shift.ll` and `load-cmp.ll`. One test in `icmp-and-shift.ll`,
which previously was a negative test, now gets folded. Rename it to
indicate that it is a positive test.
Alive proof: https://alive2.llvm.org/ce/z/vcJJTx
Relates to issue #86813.
Commit: 8d1b17b6623742ec4454f5bae2e23f8b30124314
https://github.com/llvm/llvm-project/commit/8d1b17b6623742ec4454f5bae2e23f8b30124314
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/include/llvm/CodeGen/GlobalISel/GISelChangeObserver.h
M llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp
M llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
Log Message:
-----------
[CodeGen] Construct SmallVector with ArrayRef (NFC) (#101841)
Commit: d07fdf9779f7dead2828cfb18bafbd9a2c085920
https://github.com/llvm/llvm-project/commit/d07fdf9779f7dead2828cfb18bafbd9a2c085920
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/include/__algorithm/comp.h
M libcxx/include/__algorithm/lexicographical_compare.h
M libcxx/include/__algorithm/ranges_lexicographical_compare.h
M libcxx/include/__algorithm/ranges_minmax.h
M libcxx/include/__functional/operations.h
M libcxx/include/__functional/ranges_operations.h
M libcxx/include/__string/constexpr_c_functions.h
M libcxx/include/__type_traits/desugars_to.h
M libcxx/include/__type_traits/is_trivially_lexicographically_comparable.h
M libcxx/test/benchmarks/CMakeLists.txt
A libcxx/test/benchmarks/algorithms/lexicographical_compare.bench.cpp
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/std/algorithms/alg.sorting/alg.lex.comparison/lexicographical_compare.pass.cpp
M libcxx/test/std/containers/sequences/array/compare.verify.cpp
Log Message:
-----------
[libc++] Optimize lexicographical_compare (#65279)
If the comparison operation is equivalent to < and that is a total
order, we know that we can use equality comparison on that type instead
to extract some information. Furthermore, if equality comparison on that
type is trivial, the user can't observe that we're calling it. So
instead of using the user-provided total order, we use std::mismatch,
which uses equality comparison (and is vertorized). Additionally, if the
type is trivially lexicographically comparable, we can go one step
further and use std::memcmp directly instead of calling std::mismatch.
Benchmarks:
```
-------------------------------------------------------------------------------------
Benchmark old new
-------------------------------------------------------------------------------------
bm_lexicographical_compare<unsigned char>/1 1.17 ns 2.34 ns
bm_lexicographical_compare<unsigned char>/2 1.64 ns 2.57 ns
bm_lexicographical_compare<unsigned char>/3 2.23 ns 2.58 ns
bm_lexicographical_compare<unsigned char>/4 2.82 ns 2.57 ns
bm_lexicographical_compare<unsigned char>/5 3.34 ns 2.11 ns
bm_lexicographical_compare<unsigned char>/6 3.94 ns 2.21 ns
bm_lexicographical_compare<unsigned char>/7 4.56 ns 2.11 ns
bm_lexicographical_compare<unsigned char>/8 5.25 ns 2.11 ns
bm_lexicographical_compare<unsigned char>/16 9.88 ns 2.11 ns
bm_lexicographical_compare<unsigned char>/64 38.9 ns 2.36 ns
bm_lexicographical_compare<unsigned char>/512 317 ns 6.54 ns
bm_lexicographical_compare<unsigned char>/4096 2517 ns 41.4 ns
bm_lexicographical_compare<unsigned char>/32768 20052 ns 488 ns
bm_lexicographical_compare<unsigned char>/262144 159579 ns 4409 ns
bm_lexicographical_compare<unsigned char>/1048576 640456 ns 20342 ns
bm_lexicographical_compare<signed char>/1 1.18 ns 2.37 ns
bm_lexicographical_compare<signed char>/2 1.65 ns 2.60 ns
bm_lexicographical_compare<signed char>/3 2.23 ns 2.83 ns
bm_lexicographical_compare<signed char>/4 2.81 ns 3.06 ns
bm_lexicographical_compare<signed char>/5 3.35 ns 3.30 ns
bm_lexicographical_compare<signed char>/6 3.90 ns 3.99 ns
bm_lexicographical_compare<signed char>/7 4.56 ns 3.78 ns
bm_lexicographical_compare<signed char>/8 5.20 ns 4.02 ns
bm_lexicographical_compare<signed char>/16 9.80 ns 6.21 ns
bm_lexicographical_compare<signed char>/64 39.0 ns 3.16 ns
bm_lexicographical_compare<signed char>/512 318 ns 7.58 ns
bm_lexicographical_compare<signed char>/4096 2514 ns 47.4 ns
bm_lexicographical_compare<signed char>/32768 20096 ns 504 ns
bm_lexicographical_compare<signed char>/262144 156617 ns 4146 ns
bm_lexicographical_compare<signed char>/1048576 624265 ns 19810 ns
bm_lexicographical_compare<int>/1 1.15 ns 2.12 ns
bm_lexicographical_compare<int>/2 1.60 ns 2.36 ns
bm_lexicographical_compare<int>/3 2.21 ns 2.59 ns
bm_lexicographical_compare<int>/4 2.74 ns 2.83 ns
bm_lexicographical_compare<int>/5 3.26 ns 3.06 ns
bm_lexicographical_compare<int>/6 3.81 ns 4.53 ns
bm_lexicographical_compare<int>/7 4.41 ns 4.72 ns
bm_lexicographical_compare<int>/8 5.08 ns 2.36 ns
bm_lexicographical_compare<int>/16 9.54 ns 3.08 ns
bm_lexicographical_compare<int>/64 37.8 ns 4.71 ns
bm_lexicographical_compare<int>/512 309 ns 24.6 ns
bm_lexicographical_compare<int>/4096 2422 ns 204 ns
bm_lexicographical_compare<int>/32768 19362 ns 1947 ns
bm_lexicographical_compare<int>/262144 155727 ns 19793 ns
bm_lexicographical_compare<int>/1048576 623614 ns 80180 ns
bm_ranges_lexicographical_compare<unsigned char>/1 1.07 ns 2.35 ns
bm_ranges_lexicographical_compare<unsigned char>/2 1.72 ns 2.13 ns
bm_ranges_lexicographical_compare<unsigned char>/3 2.46 ns 2.12 ns
bm_ranges_lexicographical_compare<unsigned char>/4 3.17 ns 2.12 ns
bm_ranges_lexicographical_compare<unsigned char>/5 3.86 ns 2.12 ns
bm_ranges_lexicographical_compare<unsigned char>/6 4.55 ns 2.12 ns
bm_ranges_lexicographical_compare<unsigned char>/7 5.25 ns 2.12 ns
bm_ranges_lexicographical_compare<unsigned char>/8 5.95 ns 2.13 ns
bm_ranges_lexicographical_compare<unsigned char>/16 11.7 ns 2.13 ns
bm_ranges_lexicographical_compare<unsigned char>/64 45.5 ns 2.36 ns
bm_ranges_lexicographical_compare<unsigned char>/512 366 ns 6.35 ns
bm_ranges_lexicographical_compare<unsigned char>/4096 2886 ns 40.9 ns
bm_ranges_lexicographical_compare<unsigned char>/32768 23054 ns 489 ns
bm_ranges_lexicographical_compare<unsigned char>/262144 185302 ns 4339 ns
bm_ranges_lexicographical_compare<unsigned char>/1048576 741576 ns 19430 ns
bm_ranges_lexicographical_compare<signed char>/1 1.10 ns 2.12 ns
bm_ranges_lexicographical_compare<signed char>/2 1.66 ns 2.35 ns
bm_ranges_lexicographical_compare<signed char>/3 2.23 ns 2.58 ns
bm_ranges_lexicographical_compare<signed char>/4 2.82 ns 2.82 ns
bm_ranges_lexicographical_compare<signed char>/5 3.34 ns 3.06 ns
bm_ranges_lexicographical_compare<signed char>/6 3.92 ns 3.99 ns
bm_ranges_lexicographical_compare<signed char>/7 4.64 ns 4.10 ns
bm_ranges_lexicographical_compare<signed char>/8 5.21 ns 4.61 ns
bm_ranges_lexicographical_compare<signed char>/16 9.79 ns 7.42 ns
bm_ranges_lexicographical_compare<signed char>/64 38.9 ns 2.93 ns
bm_ranges_lexicographical_compare<signed char>/512 317 ns 7.31 ns
bm_ranges_lexicographical_compare<signed char>/4096 2500 ns 47.5 ns
bm_ranges_lexicographical_compare<signed char>/32768 19940 ns 496 ns
bm_ranges_lexicographical_compare<signed char>/262144 159166 ns 4393 ns
bm_ranges_lexicographical_compare<signed char>/1048576 638206 ns 19786 ns
bm_ranges_lexicographical_compare<int>/1 1.10 ns 2.12 ns
bm_ranges_lexicographical_compare<int>/2 1.64 ns 3.04 ns
bm_ranges_lexicographical_compare<int>/3 2.23 ns 2.58 ns
bm_ranges_lexicographical_compare<int>/4 2.81 ns 2.81 ns
bm_ranges_lexicographical_compare<int>/5 3.35 ns 3.05 ns
bm_ranges_lexicographical_compare<int>/6 3.94 ns 4.60 ns
bm_ranges_lexicographical_compare<int>/7 4.60 ns 4.81 ns
bm_ranges_lexicographical_compare<int>/8 5.19 ns 2.35 ns
bm_ranges_lexicographical_compare<int>/16 9.85 ns 2.87 ns
bm_ranges_lexicographical_compare<int>/64 38.9 ns 4.70 ns
bm_ranges_lexicographical_compare<int>/512 318 ns 24.5 ns
bm_ranges_lexicographical_compare<int>/4096 2494 ns 202 ns
bm_ranges_lexicographical_compare<int>/32768 20000 ns 1939 ns
bm_ranges_lexicographical_compare<int>/262144 160433 ns 19730 ns
bm_ranges_lexicographical_compare<int>/1048576 642636 ns 80760 ns
```
Commit: 0dd8c0ddd0bef1753f7bcbd6709a8e99af507ed5
https://github.com/llvm/llvm-project/commit/0dd8c0ddd0bef1753f7bcbd6709a8e99af507ed5
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M libcxx/include/__hash_table
M libcxx/include/unordered_map
M libcxx/include/unordered_set
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
Log Message:
-----------
[libc++] Remove a few includes from <__hash_table> (#99738)
Commit: eccc6487c1fc5925ea2e595b5b07a31976c3232e
https://github.com/llvm/llvm-project/commit/eccc6487c1fc5925ea2e595b5b07a31976c3232e
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/SemaCXX/type-traits.cpp
Log Message:
-----------
[Clang] Remove __is_nullptr (#99038)
`is_null_pointer` can be implemented very efficiently as
`__is_same(__remove_cv(T), decltype(nullptr))`. Since GCC supports both
of these builtins as well, libc++ has no interest in using
`__is_nullptr` instead. Furthermore, I could find only a single use in
the wild
(https://sourcegraph.com/search?q=context:global+__is_nullptr%28+-file:clang&patternType=keyword&sm=0).
Because of these reasons I don't think it's worth keeping this builtin
around.
Commit: 4377656f2419a8eb18c01e86929b689dcf22b5d6
https://github.com/llvm/llvm-project/commit/4377656f2419a8eb18c01e86929b689dcf22b5d6
Author: DianQK <dianqk at dianqk.net>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M llvm/lib/IR/Metadata.cpp
A llvm/test/Transforms/GVN/merge-range.ll
Log Message:
-----------
[Metadata] Try to merge the first and last ranges. (#101860)
Fixes #101859.
If we have at least 2 ranges, we have to try to merge the last and first
ones to handle the wrap range.
Commit: 8ab5af603995ba45c77dafa9acf43bde379e81a9
https://github.com/llvm/llvm-project/commit/8ab5af603995ba45c77dafa9acf43bde379e81a9
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M libcxx/test/std/re/re.traits/transform.pass.cpp
Log Message:
-----------
[libc++] Fixes an AIX CI failure.
The test now seems to pass so remove the XFAIL.
Commit: 2fe08ed35a968dcfd797cbd31ae56bb0b1447faf
https://github.com/llvm/llvm-project/commit/2fe08ed35a968dcfd797cbd31ae56bb0b1447faf
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M libcxx/test/std/utilities/utility/mem.res/mem.poly.allocator.class/mem.poly.allocator.class.general/equality.pass.cpp
Log Message:
-----------
[libc++][test] Adds a TODO.
This addresses the post-commit review comment in
https://github.com/llvm/llvm-project/pull/100775
Commit: b32aac4358c1f6639de7c453656cd74fbab75d71
https://github.com/llvm/llvm-project/commit/b32aac4358c1f6639de7c453656cd74fbab75d71
Author: John Brawn <john.brawn at arm.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M libunwind/CMakeLists.txt
M libunwind/src/Registers.hpp
M libunwind/src/UnwindCursor.hpp
M libunwind/src/UnwindLevel1.c
M libunwind/src/UnwindRegistersRestore.S
M libunwind/src/cet_unwind.h
M libunwind/test/CMakeLists.txt
M libunwind/test/configs/llvm-libunwind-merged.cfg.in
M libunwind/test/configs/llvm-libunwind-shared.cfg.in
M libunwind/test/configs/llvm-libunwind-static.cfg.in
Log Message:
-----------
[libunwind] Add GCS support for AArch64 (#99335)
AArch64 GCS (Guarded Control Stack) is similar enough to CET that we can
re-use the existing code that is guarded by _LIBUNWIND_USE_CET, so long
as we also add defines to locate the GCS stack and pop the entries from
it. We also need the jumpto function to exit using br instead of ret, to
prevent it from popping the GCS stack.
GCS support is enabled using the LIBUNWIND_ENABLE_GCS cmake option. This
enables -mbranch-protection=standard, which enables GCS. For the places
we need to use GCS instructions we use the target attribute, as there's
not a command-line option to enable a specific architecture extension.
Commit: 3c483b887e5a32a0ddc0a52a467b31f74aad25bb
https://github.com/llvm/llvm-project/commit/3c483b887e5a32a0ddc0a52a467b31f74aad25bb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
A llvm/test/Transforms/InferAddressSpaces/AMDGPU/store-pointer-to-self.ll
Log Message:
-----------
InferAddressSpaces: Fix mishandling stores of pointers to themselves (#101877)
Commit: 0dba5381d8c8e4cadc32a067bf2fe5e3486ae53d
https://github.com/llvm/llvm-project/commit/0dba5381d8c8e4cadc32a067bf2fe5e3486ae53d
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.def
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/avx10_2niintrin.h
M clang/lib/Sema/SemaX86.cpp
M clang/test/CodeGen/X86/avx10_2ni-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrFMA3Info.cpp
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/avx10_2ni-intrinsics.ll
M llvm/test/MC/Disassembler/X86/avx10_2ni-32.txt
M llvm/test/MC/Disassembler/X86/avx10_2ni-64.txt
M llvm/test/MC/X86/avx10_2ni-32-intel.s
M llvm/test/MC/X86/avx10_2ni-64-att.s
M llvm/utils/TableGen/X86DisassemblerTables.cpp
Log Message:
-----------
[X86][AVX10.2] Support YMM rounding new instructions (#101825)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Commit: 5c48f6fa543e7d081354d3f6c1c2524eb8075223
https://github.com/llvm/llvm-project/commit/5c48f6fa543e7d081354d3f6c1c2524eb8075223
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/stpncpy-1.ll
M llvm/test/Transforms/InstCombine/strncpy-1.ll
M llvm/test/Transforms/InstCombine/strncpy-3.ll
Log Message:
-----------
[InstCombine] Don't add extra 0 to string in str[np]cpy optimization (#101884)
It is unused by subsequent memcpy.
Commit: bfe09685d7a6a472575fac4d6a8108a6e5c51390
https://github.com/llvm/llvm-project/commit/bfe09685d7a6a472575fac4d6a8108a6e5c51390
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/test/std/diagnostics/syserr/syserr.syserr/syserr.syserr.members/ctor_error_code_string.pass.cpp
M libcxx/test/std/diagnostics/syserr/syserr.syserr/syserr.syserr.members/ctor_int_error_category_string.pass.cpp
M libcxx/test/std/input.output/filesystems/class.filesystem_error/filesystem_error.members.pass.cpp
Log Message:
-----------
[NFC][libc++][exceptions] Adds tests for LWG3112. (#100881)
The tests kept being based on std::string instead of std::string_view to
allow testing with older C++ dialects.
Adds tests for:
- LWG3112 system_error and filesystem_error constructors taking a string
may not be able to meet their postconditions
Commit: 0edafc461f5f98b2ed5d2d621e1d9de70ccbd4e5
https://github.com/llvm/llvm-project/commit/0edafc461f5f98b2ed5d2d621e1d9de70ccbd4e5
Author: h-vetinari <h.vetinari at gmx.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M libcxx/docs/Status/Cxx20.rst
Log Message:
-----------
[libc++] mark P0645 as complete (#101852)
Now that #98275 has been merged, the footnote for P0645 has become
outdated. This updates the status information.
Commit: 2e9d2f183f1c4e458201d05e4dea96249f8a8f65
https://github.com/llvm/llvm-project/commit/2e9d2f183f1c4e458201d05e4dea96249f8a8f65
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M llvm/include/llvm/TableGen/Record.h
M llvm/lib/TableGen/Record.cpp
M llvm/utils/TableGen/Common/DAGISelMatcher.h
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
Log Message:
-----------
[TableGen] Construct SmallVector with ArrayRef (NFC) (#101870)
Commit: 7df9da7d780f1ece175020c5aef44b4b06df05b7
https://github.com/llvm/llvm-project/commit/7df9da7d780f1ece175020c5aef44b4b06df05b7
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/DebugInfo/CodeView/TypeRecord.h
M llvm/include/llvm/FuzzMutate/RandomIRBuilder.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/Metadata.h
M llvm/include/llvm/MC/MCFragment.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/include/llvm/Support/ScopedPrinter.h
M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/Object/BuildID.cpp
M llvm/lib/Support/SourceMgr.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
M llvm/tools/dsymutil/MachODebugMapParser.cpp
M llvm/tools/llvm-rc/ResourceScriptStmt.h
M llvm/unittests/Analysis/VectorUtilsTest.cpp
M llvm/unittests/Support/VirtualFileSystemTest.cpp
Log Message:
-----------
[llvm] Construct SmallVector with ArrayRef (NFC) (#101872)
Commit: da0e66e64c39bf43d143ef271c301e49a5a5d2f4
https://github.com/llvm/llvm-project/commit/da0e66e64c39bf43d143ef271c301e49a5a5d2f4
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
Log Message:
-----------
[CodeGen][NFC] Add wrapper method for MBBMap (#101893)
This is a preparation for changing the data structure of MBBMap.
Commit: be031b17191efb32636a05d2e39433446c328d92
https://github.com/llvm/llvm-project/commit/be031b17191efb32636a05d2e39433446c328d92
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M llvm/utils/llvm-locstats/llvm-locstats.py
Log Message:
-----------
[llvm-locstats] Switch shebang from python to python3 (#101864)
Commit: e525f91640770d4cb96c30398e0b21f5cbd03430
https://github.com/llvm/llvm-project/commit/e525f91640770d4cb96c30398e0b21f5cbd03430
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/LoopSimplify.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
Log Message:
-----------
[llvm] Use llvm::is_contained (NFC) (#101855)
Commit: 5262865aac683b72f3e66de7a122e0c455ab6b9b
https://github.com/llvm/llvm-project/commit/5262865aac683b72f3e66de7a122e0c455ab6b9b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
M mlir/include/mlir/IR/DialectRegistry.h
M mlir/include/mlir/TableGen/Class.h
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/lib/Analysis/Presburger/Simplex.cpp
M mlir/lib/Analysis/Presburger/Utils.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Arith/Transforms/IntNarrowing.cpp
M mlir/lib/Dialect/GPU/TransformOps/Utils.cpp
M mlir/lib/Dialect/GPU/Transforms/NVVMAttachTarget.cpp
M mlir/lib/Dialect/GPU/Transforms/ROCDLAttachTarget.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Interchange.cpp
M mlir/lib/Dialect/Linalg/Transforms/Loops.cpp
M mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseBufferRewriting.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Utils/Utils.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/lib/IR/AffineExpr.cpp
M mlir/lib/IR/AffineMap.cpp
M mlir/lib/IR/OperationSupport.cpp
M mlir/lib/Interfaces/FunctionInterfaces.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Transforms/Mem2Reg.cpp
M mlir/lib/Transforms/SROA.cpp
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[mlir] Construct SmallVector with ArrayRef (NFC) (#101896)
Commit: fdb9f96fa2a926425bdf8315048db7623d63547d
https://github.com/llvm/llvm-project/commit/fdb9f96fa2a926425bdf8315048db7623d63547d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
Log Message:
-----------
[LV] Consider earlier stores to invariant reduction address as dead.
For invariant stores to an address of a reduction, only the latest store
will be generated outside the loop. Consider earlier stores as dead.
This fixes a difference between the legacy and VPlan-based cost model.
Fixes https://github.com/llvm/llvm-project/issues/96294.
Commit: 8dd065d5bc81b0c8ab57f365bb169a5d92928f25
https://github.com/llvm/llvm-project/commit/8dd065d5bc81b0c8ab57f365bb169a5d92928f25
Author: Martin Storsjö <martin at martin.st>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
A llvm/test/CodeGen/ARM/Windows/private-func.ll
A llvm/test/MC/ARM/Windows/branch-reloc-offset.s
Log Message:
-----------
[ARM] [Windows] Use IMAGE_SYM_CLASS_STATIC for private functions (#101828)
For functions with private linkage, pick
IMAGE_SYM_CLASS_STATIC rather than IMAGE_SYM_CLASS_EXTERNAL;
GlobalValue::isInternalLinkage() only checks for
InternalLinkage, while GlobalValue::isLocalLinkage() checks for both
InternalLinkage and PrivateLinkage.
This matches what the AArch64 target does, since commit
3406934e4db4bf95c230db072608ed062c13ad5b.
This activates a preexisting fix for the AArch64 target from
1e7f592a890aad860605cf5220530b3744e107ba, for the ARM target as well.
When a relocation points at a symbol, one usually can convey an offset
to the symbol by encoding it as an immediate in the instruction.
However, for the ARM and AArch64 branch instructions, the immediate
stored in the instruction is ignored by MS link.exe (and lld-link
matches this aspect). (It would be simple to extend lld-link to support
it - but such object files would be incompatible with MS link.exe.)
This was worked around by 1e7f592a890aad860605cf5220530b3744e107ba by
emitting symbols into the object file symbol table, for temporary
symbols that otherwise would have been omitted, if they have the class
IMAGE_SYM_CLASS_STATIC, in order to avoid needing an offset in the
relocated instruction.
This change gives the symbols generated from functions with the IR level
"private" linkage the right class, to activate that workaround.
This fixes https://github.com/llvm/llvm-project/issues/100101, fixing
code generation for coroutines for Windows on ARM. After the change in
f78688134026686288a8d310b493d9327753a022, coroutines generate a function
with private linkage, and calls to this function were previously broken
for this target.
Commit: d34191102ae84352b047498825ab9dd9c8777f98
https://github.com/llvm/llvm-project/commit/d34191102ae84352b047498825ab9dd9c8777f98
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M llvm/lib/IR/Metadata.cpp
Log Message:
-----------
[Metadata] Use const APInt &. NFC (#101865)
getValue returns a const APInt &. So using a const APInt & will avoid a
copy.
Commit: 9e9d98aaf503171e2cb229e89966ec1c0adf3804
https://github.com/llvm/llvm-project/commit/9e9d98aaf503171e2cb229e89966ec1c0adf3804
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/SemaConcept.h
M clang/lib/Sema/SemaConcept.cpp
A clang/test/Modules/GH60336-2.cpp
M clang/test/Modules/GH60336.cpp
Log Message:
-----------
[clang] concepts: perform parameter mapping substitution in correct context (#101745)
Prior to this patch, during constraint normalization we could forget
from which declaration an atomic constraint was normalized from.
Subsequently when performing parameter mapping substitution for that
atomic constraint with an incorrect context, we couldn't correctly
recognize which declarations are supposed to be visible.
Fixes #60336
Commit: 8a26c6d9d4ca18b9906f3ec13d52fc0b2952a5f7
https://github.com/llvm/llvm-project/commit/8a26c6d9d4ca18b9906f3ec13d52fc0b2952a5f7
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/SemaCXX/cxx1y-generic-lambdas-variadics.cpp
M clang/test/SemaCXX/cxx1y-generic-lambdas.cpp
Log Message:
-----------
[clang] remove unneeded template deduction canonicalizations (#101594)
This is mostly a cleanups patch, with some hard to observe sugar
preservation improvements.
Except for the function template deduction changes which improve some
pre-existing diagnostics a little bit.
Commit: 22c06aa5e94e30fb1333ecaf46ce33c65d148634
https://github.com/llvm/llvm-project/commit/22c06aa5e94e30fb1333ecaf46ce33c65d148634
Author: Petr Hosek <phosek at google.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[Fuchsia][CMake] Check correct triple to set -mcpu (#101910)
We use armv8m.main-none-eabi now, not armv8m.main-unknown-eabi.
Commit: 748371183ae769bfb485f1e7466a864bf1db93d5
https://github.com/llvm/llvm-project/commit/748371183ae769bfb485f1e7466a864bf1db93d5
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Template.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/test/AST/ast-dump-concepts.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/compound-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/nested-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/simple-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/type-requirement.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.normal/p1.cpp
M clang/test/CXX/temp/temp.param/p10-2a.cpp
M clang/test/SemaTemplate/concepts-recursive-inst.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/test/SemaTemplate/instantiate-requires-expr.cpp
M clang/test/SemaTemplate/pr52970.cpp
M libcxx/test/libcxx/algorithms/cpp17_iterator_concepts.verify.cpp
Log Message:
-----------
[clang] Reland: Instantiate concepts with sugared template arguments (#101782)
Commit: 7f78f99fe5af82361d37adcbd2daa4d04afba13d
https://github.com/llvm/llvm-project/commit/7f78f99fe5af82361d37adcbd2daa4d04afba13d
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M clang-tools-extra/clangd/unittests/HoverTests.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unused-local-non-trivial-variable.cpp
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/AST/ast-dump-template-decls.cpp
M clang/test/CXX/temp/temp.deduct.guide/p3.cpp
M clang/test/Misc/diag-template-diffing-cxx11.cpp
M clang/test/SemaCXX/nullability.cpp
M clang/test/SemaCXX/sizeless-1.cpp
M clang/test/SemaHLSL/VectorOverloadResolution.hlsl
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/test/SemaTemplate/make_integer_seq.cpp
M clang/test/SemaTemplate/temp_arg_nontype.cpp
M lldb/test/API/commands/expression/import-std-module/shared_ptr/TestSharedPtrFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/weak_ptr-dbg-info-content/TestDbgInfoContentWeakPtrFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/weak_ptr/TestWeakPtrFromStdModule.py
Log Message:
-----------
[clang] Reland: Instantiate alias templates with sugar (#101858)
This makes use of the changes introduced in D134604, in order to
instantiate alias templates witn a final sugared substitution.
This comes at no additional relevant cost.
Since we don't track / unique them in specializations, we wouldn't be
able to resugar them later anyway.
Differential Revision: https://reviews.llvm.org/D136565
Commit: 3d5cc7e1e632b74119af13824dabc346bd248c93
https://github.com/llvm/llvm-project/commit/3d5cc7e1e632b74119af13824dabc346bd248c93
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsX86.def
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/avx10_2_512minmaxintrin.h
A clang/lib/Headers/avx10_2minmaxintrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Sema/SemaX86.cpp
A clang/test/CodeGen/X86/avx10_2_512minmax-builtins.c
A clang/test/CodeGen/X86/avx10_2_512minmax-error.c
A clang/test/CodeGen/X86/avx10_2minmax-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
A llvm/test/CodeGen/X86/avx10_2_512minmax-intrinsics.ll
A llvm/test/CodeGen/X86/avx10_2minmax-intrinsics.ll
A llvm/test/MC/Disassembler/X86/avx10.2minmax-32.txt
A llvm/test/MC/Disassembler/X86/avx10.2minmax-64.txt
A llvm/test/MC/X86/avx10.2minmax-32-att.s
A llvm/test/MC/X86/avx10.2minmax-32-intel.s
A llvm/test/MC/X86/avx10.2minmax-64-att.s
A llvm/test/MC/X86/avx10.2minmax-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (#101598)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Commit: a4b429f9e4175a06cc95f054c5dab3d4bc8fa690
https://github.com/llvm/llvm-project/commit/a4b429f9e4175a06cc95f054c5dab3d4bc8fa690
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port 3d5cc7e1e632
Commit: 5f7e921fe3b5402127868faf5855a835cf238196
https://github.com/llvm/llvm-project/commit/5f7e921fe3b5402127868faf5855a835cf238196
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/float-imm-vldi.ll
Log Message:
-----------
[LoongArch] Pre-commit test for load floating-point immediate using VLDI. NFC
Commit: c566769d7c097e3956c6b36c2040bd8baa2e9929
https://github.com/llvm/llvm-project/commit/c566769d7c097e3956c6b36c2040bd8baa2e9929
Author: yonghong-song <yhs at fb.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M llvm/lib/Target/BPF/BPF.h
M llvm/lib/Target/BPF/BPFInstrInfo.td
R llvm/lib/Target/BPF/BPFMIChecking.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/BPF/CMakeLists.txt
M llvm/test/CodeGen/BPF/atomics.ll
M llvm/test/CodeGen/BPF/atomics_2.ll
M llvm/test/CodeGen/BPF/objdump_atomics.ll
R llvm/test/CodeGen/BPF/xadd.ll
M llvm/test/CodeGen/BPF/xadd_legal.ll
Log Message:
-----------
BPF: Ensure __sync_fetch_and_add() always generate atomic_fetch_add insn (#101428)
Peilen Ye reported an issue ([1]) where for __sync_fetch_and_add(...)
without return value like
__sync_fetch_and_add(&foo, 1);
llvm BPF backend generates locked insn e.g.
lock *(u32 *)(r1 + 0) += r2
If __sync_fetch_and_add(...) returns a value like
res = __sync_fetch_and_add(&foo, 1);
llvm BPF backend generates like
r2 = atomic_fetch_add((u32 *)(r1 + 0), r2)
The above generation of 'lock *(u32 *)(r1 + 0) += r2' caused a problem
in jit since proper barrier is not inserted.
The above discrepancy is due to commit [2] where it tries to maintain
backward compatability since before commit [2],
__sync_fetch_and_add(...) generates lock insn in BPF backend.
Based on discussion in [1], now it is time to fix the above discrepancy
so we can have proper barrier support in jit. This patch made sure that
__sync_fetch_and_add(...) always generates atomic_fetch_add(...) insns.
Now 'lock *(u32 *)(r1 + 0) += r2' can only be generated by inline asm. I
also removed the whole BPFMIChecking.cpp file whose original purpose is
to detect and issue errors if XADD{W,D,W32} may return a value used
subsequently. Since insns XADD{W,D,W32} are all inline asm only now,
such error detection is not needed.
[1]
https://lore.kernel.org/bpf/ZqqiQQWRnz7H93Hc@google.com/T/#mb68d67bc8f39e35a0c3db52468b9de59b79f021f
[2]
https://github.com/llvm/llvm-project/commit/286daafd65129228e08a1d07aa4ca74488615744
Co-authored-by: Yonghong Song <yonghong.song at linux.dev>
Commit: a5b65399a7e0ba5865c27a7255ae0e51a5e27a3e
https://github.com/llvm/llvm-project/commit/a5b65399a7e0ba5865c27a7255ae0e51a5e27a3e
Author: Luke Lau <luke at igalia.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
Log Message:
-----------
[RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (#101123)
As noted in
https://github.com/llvm/llvm-project/pull/100367/files#r1695442138,
RISCVMaskedPseudoInfo currently stores two things, whether or not a
masked pseudo has an unmasked variant, and whether or not it's
element-wise.
These are separate things, so this patch splits the latter out into the
underlying instruction's TSFlags to help make the semantics of #100367
more clear.
To the best of my knowledge the only non-element-wise instructions in V
are:
- vredsum.vs and other reductions
- vcompress.vm
- vms*f.m
- vcpop.m and vfirst.m
- viota.m
In vector crypto the instructions that operate on element groups are
conservatively marked (this might be fine to relax later given since
non-EGS multiple vls are reserved), as well as the SiFive extensions and
XTHeadVdot.
Commit: d86a995ab78905cd055f8a93812c3b94cf042499
https://github.com/llvm/llvm-project/commit/d86a995ab78905cd055f8a93812c3b94cf042499
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Format/Format.h
Log Message:
-----------
[clang-format][doc] Fix a typo.
Commit: ebeb6b27294ab63eed1c54062170d3feb0c74533
https://github.com/llvm/llvm-project/commit/ebeb6b27294ab63eed1c54062170d3feb0c74533
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/BPF/BUILD.gn
Log Message:
-----------
[gn build] Port c566769d7c09
Commit: 35b4f8374586e099215f1275c8d840f54b20869d
https://github.com/llvm/llvm-project/commit/35b4f8374586e099215f1275c8d840f54b20869d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
Log Message:
-----------
InferAddressSpaces: Simplify check of volatile allowed
Avoid redundant dyn_cast to instruction before chain of dyn_cast
to specific instructions.
Commit: 5bc99fb515f2411e458517f902435c28f2de94c3
https://github.com/llvm/llvm-project/commit/5bc99fb515f2411e458517f902435c28f2de94c3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/lack-of-signed-truncation-check.ll
M llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll
M llvm/test/CodeGen/RISCV/signed-truncation-check.ll
Log Message:
-----------
[RISCV] Select (and (sra x, c2), c1) as (srli (srai x, c2-c3), c3). (#101868)
If c1 is a mask with c3 leading zeros and c3 is larger than c2.
Fixes regression reported in #101751.
Commit: 120740b16c27c12ce989793c2e1a95ac564f25b8
https://github.com/llvm/llvm-project/commit/120740b16c27c12ce989793c2e1a95ac564f25b8
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/Compiler.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/Opcodes.td
M clang/test/AST/Interp/codegen.cpp
Log Message:
-----------
[clang][Interp] reinterpret casts aren't always fatal (#101900)
The current interpreter emits the diagnostic and continues, so do the
same.
Commit: 1fa7f05b709748e8a36936cbb5508070c8214354
https://github.com/llvm/llvm-project/commit/1fa7f05b709748e8a36936cbb5508070c8214354
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-04 (Sun, 04 Aug 2024)
Changed paths:
M clang/include/clang/AST/ASTConcept.h
M clang/include/clang/Index/DeclOccurrence.h
M clang/include/clang/Tooling/Refactoring/ASTSelection.h
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Format/AffectedRangeManager.h
M clang/lib/Format/TokenAnalyzer.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
M clang/lib/Frontend/DiagnosticRenderer.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/unittests/Format/MacroCallReconstructorTest.cpp
M clang/utils/TableGen/SveEmitter.cpp
Log Message:
-----------
[clang] Construct SmallVector with ArrayRef (NFC) (#101898)
Commit: 4cfbd494b03427e5a7c1b7447382aa77a7e47b17
https://github.com/llvm/llvm-project/commit/4cfbd494b03427e5a7c1b7447382aa77a7e47b17
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-variadics.td
Log Message:
-----------
[GlobalISel][TableGen] Fix match-table-variadics tests label checking (#101625)
We don't really care about the precise label values for specific tests
like this, so just match any number.
The comments are enough to say where we jump in every case, and we have
plenty of tests that check basic match table features (on top of being
just tested by the fact GlobalISel CodeGen isn't broken).
Commit: 42bae9c542c2995ed2b4555d9e25c5ea0b5dc99f
https://github.com/llvm/llvm-project/commit/42bae9c542c2995ed2b4555d9e25c5ea0b5dc99f
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
Log Message:
-----------
[AMDGPU] Optimize the register uses if offset inlinable (#101676)
Fold the frame index offset into v_mad if inlinable.
Commit: bf540ce55bdcf49f74639d9fe8d7dff9e21c24c9
https://github.com/llvm/llvm-project/commit/bf540ce55bdcf49f74639d9fe8d7dff9e21c24c9
Author: Luke Lau <luke at igalia.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/reduce-scalable-fp.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-broadcast.ll
Log Message:
-----------
[RISCV] Remove extraneous attribute groups from tests. NFC
Commit: 86f7374078288e2b3d3d0fd66428f7752e2319e6
https://github.com/llvm/llvm-project/commit/86f7374078288e2b3d3d0fd66428f7752e2319e6
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M lldb/include/lldb/Core/PluginManager.h
M lldb/include/lldb/lldb-private-interfaces.h
M lldb/source/Core/PluginManager.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.h
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.h
M lldb/source/Plugins/ObjectFile/Minidump/ObjectFileMinidump.cpp
M lldb/source/Plugins/ObjectFile/Minidump/ObjectFileMinidump.h
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.h
M lldb/source/Plugins/ObjectFile/PECOFF/WindowsMiniDump.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/WindowsMiniDump.h
M lldb/test/API/functionalities/process_save_core/TestProcessSaveCore.py
Log Message:
-----------
Revert "[LLDB][SBSaveCore] Fix bug where default values are not propagated. (#101770)"
This reverts commit 34766d0d488ba2fbefa80dcd0cc8720a0e753448 which
caused a msan failure, see comment https://github.com/llvm/llvm-project/pull/101770#issuecomment-2268373325 for details.
Commit: 0361c415e17f45b480be5befdb12175e8899357d
https://github.com/llvm/llvm-project/commit/0361c415e17f45b480be5befdb12175e8899357d
Author: Henrik G. Olsson <hnrklssn at gmail.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/utils/chunk-print-before-all.py
Log Message:
-----------
[utils] avoid splitting pass names with spaces (#97371)
Machine function pass names can contain spaces but have an alternative
CLI friendly name within parentheses. This changes
chunk-print-before-all.py to use this name instead of only the first
word in the pretty printed name.
Commit: c04857cb2c9f6f2e8add61192c62e48a83938efd
https://github.com/llvm/llvm-project/commit/c04857cb2c9f6f2e8add61192c62e48a83938efd
Author: Abinaya Saravanan <quic_asaravan at quicinc.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/lib/Target/Hexagon/CMakeLists.txt
A llvm/lib/Target/Hexagon/HexagonMask.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
A llvm/test/CodeGen/Hexagon/mask.ll
Log Message:
-----------
[HEXAGON] Utilize new mask instruction (#92365)
This pass utilizes the new Hexagon Mask Instruction.
Authored by : Harsha Jagasia, Krzysztof Parzyszek
Co-authored-by: Harsha Jagasia <harsha.jagasia at gmail.com>
Co-authored-by: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Commit: fc83e97f6ebfdd67a3eda5fbff61190d92497ce9
https://github.com/llvm/llvm-project/commit/fc83e97f6ebfdd67a3eda5fbff61190d92497ce9
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/BUILD.gn
Log Message:
-----------
[gn build] Port c04857cb2c9f
Commit: 0886440ef0ed0ad553522b731c841b81dc36944c
https://github.com/llvm/llvm-project/commit/0886440ef0ed0ad553522b731c841b81dc36944c
Author: Amit Kumar Pandey <137622562+ampandey-1995 at users.noreply.github.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M lld/Common/DWARF.cpp
M llvm/docs/CommandGuide/llvm-symbolizer.rst
M llvm/include/llvm/DebugInfo/DIContext.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h
M llvm/include/llvm/DebugInfo/Symbolize/Symbolize.h
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
M llvm/lib/DebugInfo/Symbolize/DIPrinter.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
A llvm/test/tools/llvm-symbolizer/skip-line-zero.s
M llvm/tools/llvm-symbolizer/Opts.td
M llvm/tools/llvm-symbolizer/llvm-symbolizer.cpp
Log Message:
-----------
[Symbolizer] Support for Missing Line Numbers. (#82240)
LLVM Symbolizer attempt to symbolize addresses of optimized binaries
reports missing line numbers for some cases. It maybe due to compiler
which sometimes cannot map an instruction to line number due to
optimizations. Symbolizer should handle those cases gracefully.
Adding an option '--skip-line-zero' to symbolizer so as to report the
nearest non-zero line number.
---------
Co-authored-by: Amit Pandey <amit.pandey at amd.com>
Commit: c24fb452651f53bb4d2730703ed7304c6ef71cc2
https://github.com/llvm/llvm-project/commit/c24fb452651f53bb4d2730703ed7304c6ef71cc2
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/Use.h
Log Message:
-----------
[llvm][SandboxIR] Fix some clang-cl warnings on Windows (#101660)
```
[4958/6355] Building CXX object lib\SandboxIR\CMakeFiles\LLVMSandboxIR.dir\Tracker.cpp.obj In file included from C:\Work\david.spickett\llvm-project\llvm\lib\SandboxIR\Tracker.cpp:9: In file included from C:\Work\david.spickett\llvm-project\llvm\include\llvm/SandboxIR/Tracker.h:48: C:\Work\david.spickett\llvm-project\llvm\include\llvm/SandboxIR/Use.h(46,16): warning: unqualified friend declaration referring to type outside of the nearest enclosing namespace is a Microsoft extension; add a nested name specifier [-Wmicrosoft-unqualified-friend]
46 | friend class CallBrInst; // For constructor
| ^
| ::llvm::
In file included from C:\Work\david.spickett\llvm-project\llvm\lib\SandboxIR\Tracker.cpp:13:
C:\Work\david.spickett\llvm-project\llvm\include\llvm/SandboxIR/SandboxIR.h(1433,16): warning:
unqualified friend declaration referring to type outside of the nearest enclosing namespace is a Microsoft extension; add a nested name specifier [-Wmicrosoft-unqualified-friend]
1433 | friend class PtrToInt; // For constructor.
| ^
| ::llvm::
```
First one I think is a missing forward declaration and I couldn't find
the right class for the second one but it appears to be unused anyway.
Commit: 7536ebf0ea8e2d09f47ee77e0d60470b5eeb2743
https://github.com/llvm/llvm-project/commit/7536ebf0ea8e2d09f47ee77e0d60470b5eeb2743
Author: Mital Ashok <mital at mitalashok.co.uk>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaCXX/lambda-pack-expansion.cpp
Log Message:
-----------
[Clang][SemaCXX] Fix bug where unexpanded lambda captures where assumed to have size 1 (#101385)
Fixes #63677
Commit: 1fec981b67ac57abd4d8defd73beb5a9433c602f
https://github.com/llvm/llvm-project/commit/1fec981b67ac57abd4d8defd73beb5a9433c602f
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/AST/DeclBase.cpp
M clang/test/Modules/skip-odr-check-in-gmf.cppm
Log Message:
-----------
[C++20] [Modules] Skip ODR checks in implicit global modules
Previously we skipped the ODR checks in explicit global modules. And due
to similar reasons, we should skip the ODR checks in implicit global
modules too.
Commit: 72fb1889424fc371ef7d630009e4e579d18b9247
https://github.com/llvm/llvm-project/commit/72fb1889424fc371ef7d630009e4e579d18b9247
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/Pointer.cpp
M clang/test/AST/Interp/codegen.cpp
M clang/test/AST/Interp/new-delete.cpp
Log Message:
-----------
[clang][Interp] Handle Pointer::toAPValue() for expr bases (#101937)
No reason to return early for them anymore.
Commit: dd8a9e2b8c91d586fb9421e7bc24b3e153707caa
https://github.com/llvm/llvm-project/commit/dd8a9e2b8c91d586fb9421e7bc24b3e153707caa
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/ops.mlir
Log Message:
-----------
[mlir][vector] Remove `vector.reshape` operation (#101645)
This operation was added five years ago and has no lowerings or uses
within upstream MLIR (and no reported uses downstream). There’s only a
handful of round-trip tests.
See related RFC:
https://discourse.llvm.org/t/rfc-should-vector-reshape-be-removed/80478/3
Commit: 710590e33d19649f08c716d827eb465e3a132d23
https://github.com/llvm/llvm-project/commit/710590e33d19649f08c716d827eb465e3a132d23
Author: Daniel Kiss <daniel.kiss at arm.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M libunwind/src/UnwindCursor.hpp
Log Message:
-----------
[libunwind] Undefined behaviour pointer arithmetic with null pointer (#98648)
Fixes #91144
Commit: 3276ee30226de1572bde5bd3716a1d343bbb3657
https://github.com/llvm/llvm-project/commit/3276ee30226de1572bde5bd3716a1d343bbb3657
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512.s
Log Message:
-----------
[llvm-mca][x86] Add test coverage for evex variant of vextractps
Commit: 888ef0f0fc2a01bf56002060b9b55b61b4e3a5b7
https://github.com/llvm/llvm-project/commit/888ef0f0fc2a01bf56002060b9b55b61b4e3a5b7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512bw.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512dq.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse1.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse41.s
Log Message:
-----------
[X86] Fix pipe resources for INT (V)PEXTR* instructions
IceLakeServer can use ICXPort15 for (V)PEXTR* (but only ICXPort5 for (V)EXTRACTPS)
Confirmed with uops.info + Agner
Commit: d808f15828d0685fb65f140c49d6f7e7142d2503
https://github.com/llvm/llvm-project/commit/d808f15828d0685fb65f140c49d6f7e7142d2503
Author: Kai Yan <aklkaiyan at tencent.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/WindowScheduler.cpp
A llvm/test/CodeGen/Hexagon/swp-ws-resource-reserve.mir
Log Message:
-----------
[llvm][CodeGen] Address the issue of multiple resource reservations In window scheduling (#101665)
Address the issue of multiple resource reservations in window
scheduling.
Commit: f231d3dab3da9966621ed4e72847f1292db54ede
https://github.com/llvm/llvm-project/commit/f231d3dab3da9966621ed4e72847f1292db54ede
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
A llvm/test/CodeGen/Generic/extractelement-shuffle.ll
M llvm/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll
M llvm/test/CodeGen/X86/2010-07-06-DbgCrash.ll
R llvm/test/CodeGen/X86/extractelement-shuffle.ll
Log Message:
-----------
Fix some X86 tests (#101944)
extractelement-shuffle.ll: Test for bugfix in DAGCombiner, moved to
Generic.
2010-07-06-DbgCrash.ll and 2006-10-02-BoolRetCrash.ll: Bugfixes in X86,
run tests with X86 backend.
Commit: fe855666ee27ad95e4a23fe80d735d0484a4ed13
https://github.com/llvm/llvm-project/commit/fe855666ee27ad95e4a23fe80d735d0484a4ed13
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M mlir/docs/Dialects/Vector.md
Log Message:
-----------
[mlir][vector][docs] Fix broken markdown link (#101813)
The link has been "broken" since #73792 that updated
"## DeeperDive" to "## LLVM Lowering Tradeoffs".
This patch fixes the MD link for the affected sub-section:
* Before: [deeper dive section](#DeeperDive)
* After: [LLVM Lowering Tradeoffs](#llvm-lowering-tradeoffs)
I've also rephrased the surrounding comment a
bit - to better match the updated section name.
Commit: 7775a4882d7105fde7f7a81f3c72567d39afce45
https://github.com/llvm/llvm-project/commit/7775a4882d7105fde7f7a81f3c72567d39afce45
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
A llvm/test/Transforms/LoopVectorize/AArch64/streaming-vectorization.ll
Log Message:
-----------
[LLVM][TTI][SME] Allow optional auto-vectorisation for streaming functions. (#101679)
The command line option enable-scalable-autovec-in-streaming-mode is
used to enable scalable vectors but the same check is missing from
enableScalableVectorization, which is blocking auto-vectorisation.
Commit: 69fe7dad158fbb06dac010f091a671edc425f571
https://github.com/llvm/llvm-project/commit/69fe7dad158fbb06dac010f091a671edc425f571
Author: Tuan Chuong Goh <chuong.goh at arm.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/neon-shift-left-long.ll
Log Message:
-----------
[AArch64][NFC] Pre-commit tests for Shift Left Long (#96782)
Commit: 29763aa47103ad039544fc93fe5693b1a7f27691
https://github.com/llvm/llvm-project/commit/29763aa47103ad039544fc93fe5693b1a7f27691
Author: Marina Taylor <marina_taylor at apple.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/test/CodeGen/AArch64/peephole-csel.ll
M llvm/test/CodeGen/AArch64/peephole-csel.mir
Log Message:
-----------
[AArch64] Peephole optimization to remove redundant csel instructions (#101483)
Given a sequence such as
%8:gpr64 = COPY $xzr
%10:gpr64 = COPY $xzr
%11:gpr64 = CSELXr %8:gpr64, %10:gpr64, 0, implicit $nzcv
`PeepholeOptimizer::foldRedundantCopy` led to the creation of select
instructions where both inputs were the same register:
%11:gpr64 = CSELXr %8:gpr64, %8:gpr64, 0, implicit $nzcv
This change adds a later peephole optimization that replaces such
selects with unconditional moves.
Commit: 832203545d4e2157ca29f99b18e3360ffa180183
https://github.com/llvm/llvm-project/commit/832203545d4e2157ca29f99b18e3360ffa180183
Author: Luke Lau <luke at igalia.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll
Log Message:
-----------
[TTI] Use element alignment in vp.strided.{load,store} cost (#101940)
In SelectionDAGBuilder, a vp.strided.{load,store} uses the datalayout
alignment of the element type if an align attribute isn't specified on
the pointer operand. This updates BasicTTIImpl to use said element
alignment instead of defaulting to one when costing it.
This mainly just fixes the output of the cost model tests on RISC-V,
since as far as I'm aware nothing uses the cost of these, e.g. SLP calls
getStridedMemoryOpCost directly
Commit: 77011b00ad5f7f1789e788e85aed1babeb540213
https://github.com/llvm/llvm-project/commit/77011b00ad5f7f1789e788e85aed1babeb540213
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/test/CodeGenObjC/ubsan-bool.m
Log Message:
-----------
[Clang] Fix path-sensitivity in ubsan-bool.m test (NFC)
This test was failing whenever the path contained the string "f1",
e.g. as part of a commit hash.
Double-fix the issue by both not embedding the path in the IR at
all, and making the CHECK-LABELs more specific.
Commit: b0329206db8e66fe180c504115103b27ca50f64e
https://github.com/llvm/llvm-project/commit/b0329206db8e66fe180c504115103b27ca50f64e
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.def
M clang/lib/Headers/avx10_2_512niintrin.h
M clang/lib/Headers/avx10_2niintrin.h
M clang/lib/Headers/avxvnniint16intrin.h
M clang/lib/Headers/avxvnniint8intrin.h
M clang/test/CodeGen/X86/avx10_2_512ni-builtins.c
M clang/test/CodeGen/X86/avx10_2ni-builtins.c
M clang/test/CodeGen/X86/avxvnniint16-builtins.c
M clang/test/CodeGen/X86/avxvnniint8-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/avx10_2_512ni-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2ni-intrinsics.ll
M llvm/test/CodeGen/X86/avxvnniint16-intrinsics.ll
M llvm/test/CodeGen/X86/avxvnniint8-intrinsics.ll
M llvm/test/MC/Disassembler/X86/avx10_2ni-32.txt
M llvm/test/MC/Disassembler/X86/avx10_2ni-64.txt
M llvm/test/MC/X86/avx10_2ni-32-intel.s
M llvm/test/MC/X86/avx10_2ni-64-att.s
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/utils/TableGen/X86InstrMappingEmitter.cpp
Log Message:
-----------
[X86][AVX10.2] Support AVX10.2 VNNI FP16/INT8/INT16 new instructions (#101783)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Commit: 6676f794dcdab9ad78d59e044dfdc355dc0916a2
https://github.com/llvm/llvm-project/commit/6676f794dcdab9ad78d59e044dfdc355dc0916a2
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/include/llvm/IR/PredIteratorCache.h
Log Message:
-----------
[IR] Use single map in PredIteratorCache (NFC) (#101950)
Use a single map storing ArrayRef instead of two separate maps for the
base pointer and size. This saves one map lookup per cache accesses.
This is an alternative to
https://github.com/llvm/llvm-project/pull/101885 with a similar
compile-time improvement.
Commit: 6f8ef5ad2f35321257adbe353f86027bf5209023
https://github.com/llvm/llvm-project/commit/6f8ef5ad2f35321257adbe353f86027bf5209023
Author: Kazu Hirata <kazu at google.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M flang/include/flang/Lower/CallInterface.h
M flang/include/flang/Lower/IterationSpace.h
M flang/include/flang/Optimizer/Builder/BoxValue.h
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/lib/Lower/ConvertArrayConstructor.cpp
M flang/lib/Lower/IterationSpace.cpp
M flang/lib/Optimizer/Transforms/AffineDemotion.cpp
M flang/unittests/Optimizer/InternalNamesTest.cpp
Log Message:
-----------
[flang] Construct SmallVector with ArrayRef (NFC) (#101901)
Commit: 8370ba4d15c6726ed82bcd0d42a3ea9c94cc56b0
https://github.com/llvm/llvm-project/commit/8370ba4d15c6726ed82bcd0d42a3ea9c94cc56b0
Author: Kristóf Umann <dkszelethus at gmail.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NoOwnershipChangeVisitor.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
Log Message:
-----------
[analyzer][NFC] Eliminate a dyn_cast (#100719)
Response to the catch in this comment:
https://github.com/llvm/llvm-project/pull/94357/files/07f6daf2cf0f5d5bd4fc9950f2585a3f52b4ad2f#r1692084074
Commit: a42e515e3a9f3bb4e44389c097b89104d95b9b29
https://github.com/llvm/llvm-project/commit/a42e515e3a9f3bb4e44389c097b89104d95b9b29
Author: Julian Brown <julian.brown at amd.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang-c/Index.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtOpenMP.h
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtOpenMP.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
A clang/test/OpenMP/assume_lambda.cpp
A clang/test/OpenMP/assume_messages.c
A clang/test/OpenMP/assume_messages_attr.c
A clang/test/OpenMP/assume_nesting.cpp
A clang/test/OpenMP/assume_nesting_tmpl.cpp
A clang/test/OpenMP/assume_serialize_deserialize.cpp
A clang/test/OpenMP/assume_serialize_deserialize_tmpl.cpp
A clang/test/OpenMP/assume_template.cpp
M clang/tools/libclang/CIndex.cpp
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[OpenMP] OpenMP 5.1 "assume" directive parsing support (#92731)
This is a minimal patch to support parsing for "omp assume" directives.
These are meant to be hints to a compiler's optimisers: as such, it is
legitimate (if not very useful) to ignore them. The patch builds on top
of the existing support for "omp assumes" directives (note spelling!).
Unlike the "omp [begin/end] assumes" directives, "omp assume" is
associated with a compound statement, i.e. it can appear within a
function. The "holds" assumption could (theoretically) be mapped onto
the existing builtin "__builtin_assume", though the latter applies to a
single point in the program, and the former to a range (i.e. the whole
of the associated compound statement).
This patch fixes sollve's OpenMP 5.1 "omp assume"-based tests.
Commit: e60ee1f2d70bdb0ac87b09ae685d669d8543b7bd
https://github.com/llvm/llvm-project/commit/e60ee1f2d70bdb0ac87b09ae685d669d8543b7bd
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
Log Message:
-----------
[Driver] Restrict Ofast deprecation help message to Clang (#101682)
The discussion about this in Flang
(https://discourse.llvm.org/t/rfc-deprecate-ofast-in-flang/80243) has
not concluded hence restricting the deprecation only to Clang.
Commit: c65afad9c58474a784633314e945c874ed06584a
https://github.com/llvm/llvm-project/commit/c65afad9c58474a784633314e945c874ed06584a
Author: Sirraide <aeternalmail at gmail.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/test/Lexer/cxx-features.cpp
Log Message:
-----------
[Clang] Define __cpp_pack_indexing (#101956)
Following the discussion on #101448 this defines
`__cpp_pack_indexing`. Since pack indexing is currently
supported in all language modes, the feature test macro
is also defined in all language modes.
Commit: 9ae24fca2522c70eaff6c3e9c5ea89675db7c213
https://github.com/llvm/llvm-project/commit/9ae24fca2522c70eaff6c3e9c5ea89675db7c213
Author: Nico Weber <thakis at chromium.org>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M libcxxabi/src/demangle/ItaniumDemangle.h
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/include/llvm/Demangle/MicrosoftDemangleNodes.h
M llvm/lib/Demangle/RustDemangle.cpp
Log Message:
-----------
Demangle: Fix comment typos to cycle bots
Commit: 31bb759d78576bec4c5b844edd52686eb6cc9fc3
https://github.com/llvm/llvm-project/commit/31bb759d78576bec4c5b844edd52686eb6cc9fc3
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
Log Message:
-----------
Fix an unused variable and -Wswitch warning after a42e515e3a9f3bb4e44389c097b89104d95b9b29
Commit: 9fea73110ecc0a13d18e5c52f8e7fa62a9de9ee9
https://github.com/llvm/llvm-project/commit/9fea73110ecc0a13d18e5c52f8e7fa62a9de9ee9
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M libc/src/math/amdgpu/CMakeLists.txt
M libc/src/math/nvptx/CMakeLists.txt
Log Message:
-----------
[libc] Use generic 'atan2' function for the GPU
Summary:
I forget to enable this one in the previous patch.
Commit: 69c6a3faafe8fa3fa8d7554e0ebe64aae3c3d10b
https://github.com/llvm/llvm-project/commit/69c6a3faafe8fa3fa8d7554e0ebe64aae3c3d10b
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
Log Message:
-----------
More -Wswitch warning fixes for a42e515e3a9f3bb4e44389c097b89104d95b9b29
Commit: da380b26e4748ade5a8dba85b7df5e1c4eded8bc
https://github.com/llvm/llvm-project/commit/da380b26e4748ade5a8dba85b7df5e1c4eded8bc
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
Log Message:
-----------
[Clang] SFINAE on mismatching pack length during constraint satisfaction checking (#101879)
If a fold expanded constraint would expand packs of different size, it
is not a valid pack expansion and it is not satisfied. This should not
produce an error.
Fixes #99430
Commit: 23d6fc37170a8c1bb285cfae16fadefc49c6cdb1
https://github.com/llvm/llvm-project/commit/23d6fc37170a8c1bb285cfae16fadefc49c6cdb1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/test/CodeGen/X86/abds.ll
M llvm/test/CodeGen/X86/abdu.ll
Log Message:
-----------
[X86] Add i128 abds/abdu test coverage - based off #100810
Commit: 96602c3ad504a26d4fb8b5ca73e878a7206ab26c
https://github.com/llvm/llvm-project/commit/96602c3ad504a26d4fb8b5ca73e878a7206ab26c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
A llvm/test/CodeGen/X86/abds-neg.ll
A llvm/test/CodeGen/X86/abdu-neg.ll
Log Message:
-----------
[X86] Add negated abds/abdu test coverage - based off #100810
Commit: 04f65043bc8711996a4ade05c67ae2d087ae8be5
https://github.com/llvm/llvm-project/commit/04f65043bc8711996a4ade05c67ae2d087ae8be5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/abds-neg.ll
A llvm/test/CodeGen/AArch64/abds.ll
A llvm/test/CodeGen/AArch64/abdu-neg.ll
A llvm/test/CodeGen/AArch64/abdu.ll
A llvm/test/CodeGen/RISCV/abds-neg.ll
A llvm/test/CodeGen/RISCV/abds.ll
A llvm/test/CodeGen/RISCV/abdu-neg.ll
A llvm/test/CodeGen/RISCV/abdu.ll
Log Message:
-----------
[AArch64][RISCV] Add scalar abds/abdu test coverage - based off #100810
Extend test coverage for #92576 - copied from existing x86 tests
Commit: 7b9fcf5c44aa52a8daea304723d82e7dd2b5b74f
https://github.com/llvm/llvm-project/commit/7b9fcf5c44aa52a8daea304723d82e7dd2b5b74f
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/test/tools/llvm-dwarfdump/X86/prettyprint_type_units.s
Log Message:
-----------
[DWARF] Teach getAttributeValueAsReferencedDie to resolve DW_FORM_ref… (#101197)
…_sig8
Splitting from #99495.
I've extended the type unit test case to feature more kinds of
references, including the gcc-style DW_AT_type[DW_FORM_ref_sig8]
reference, which this patch fixes.
Commit: 05b26ef9915972c586619795726ef948e2e54899
https://github.com/llvm/llvm-project/commit/05b26ef9915972c586619795726ef948e2e54899
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/abds-neg.ll
M llvm/test/CodeGen/AArch64/abds.ll
M llvm/test/CodeGen/AArch64/abdu-neg.ll
M llvm/test/CodeGen/AArch64/abdu.ll
Log Message:
-----------
[AArch64] Regenerate abds/abdu tests to remove x86 copy+pasta. NFC
Commit: 39826b10306ea05fe79d7af3420ffd4a93718ec4
https://github.com/llvm/llvm-project/commit/39826b10306ea05fe79d7af3420ffd4a93718ec4
Author: jameshu15869 <55058507+jameshu15869 at users.noreply.github.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M libc/benchmarks/gpu/LibcGpuBenchmark.cpp
Log Message:
-----------
[libc] [gpu] Change Time To Be Per Iteration (#101919)
Previously, the time field was the total time take to run all iterations
of the benchmark. This PR changes the value displayed to be the average
time take by each iteration.
Commit: 30e5d7190d39fe4f0982435d4fb5043e64acdc9f
https://github.com/llvm/llvm-project/commit/30e5d7190d39fe4f0982435d4fb5043e64acdc9f
Author: Mital Ashok <mital at mitalashok.co.uk>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/test/CXX/drs/cwg15xx.cpp
M clang/test/CXX/drs/cwg7xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang][NFC] Add CWG713 test; add example from CWG1584 test (#100747)
https://cplusplus.github.io/CWG/issues/713.html
https://cplusplus.github.io/CWG/issues/1584.html
Commit: dc95aa209b9a64ed4cce9c47ed53a26376cca0be
https://github.com/llvm/llvm-project/commit/dc95aa209b9a64ed4cce9c47ed53a26376cca0be
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/basic-pic.ll
M llvm/test/CodeGen/AArch64/elf-globals-pic.ll
M llvm/test/CodeGen/AArch64/extern-weak.ll
M llvm/test/CodeGen/AArch64/got-abuse.ll
M llvm/test/CodeGen/AArch64/tagged-globals-pic.ll
Log Message:
-----------
[test][AArch64][CodeGen] Enhance GOT-related tests (#101968)
- use `-NEXT` for check lines where applicable (as discussed in
https://github.com/llvm/llvm-project/pull/96164#discussion_r1673889562);
- move to shorter check prefixes where applicable (e.g. `CHECK` instead
of `CHECK-PIC` if it's the only prefix used in the file);
- minor formatting.
Commit: 3364284d87035eaac9662d345d4ddee2714f8fd7
https://github.com/llvm/llvm-project/commit/3364284d87035eaac9662d345d4ddee2714f8fd7
Author: chuongg3 <chuong.goh at arm.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/neon-shift-left-long.ll
Log Message:
-----------
[AArch64][GlobalISel] Select SHL({Z|S}EXT, DUP Imm) into {U|S}HLL Imm (#96782)
First commit's PR is #96780
Combines the following instructions:
`ushll r0, r0, #0`
`shl r0, r0, #3`
Into:
`ushll r0, r0, #3`
Commit: 9884fd33dbfe6dc8808a6047f29d8166a6ccb7be
https://github.com/llvm/llvm-project/commit/9884fd33dbfe6dc8808a6047f29d8166a6ccb7be
Author: Anton Sidorenko <anton.sidorenko at syntacore.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note.c
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add Syntacore SCR4 RV32/64 processors definition (#101321)
Syntacore SCR4 is a microcontroller-class processor core that has much
in common with SCR3. The most significant difference for compilers is F
and D extensions support. Overview: https://syntacore.com/products/scr4
Two CPUs are added:
* 'syntacore-scr4-rv32' -- rv32imfdc
* 'syntacore-scr4-rv64' -- rv64imafdc
Scheduling model will be added in a separate PR.
Co-authored-by: Dmitrii Petrov <dmitrii.petrov at syntacore.com>
Co-authored-by: Anton Afanasyev <anton.afanasyev at syntacore.com>
Commit: 0e4c7fabd3587c7d95fa4733e4a9001a0bae737f
https://github.com/llvm/llvm-project/commit/0e4c7fabd3587c7d95fa4733e4a9001a0bae737f
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/test/CodeGen/X86/dwarf-headers.ll
M llvm/test/DebugInfo/COFF/fission-cu.ll
M llvm/test/DebugInfo/COFF/fission-sections.ll
M llvm/test/DebugInfo/WebAssembly/dwarf-headers.ll
M llvm/test/DebugInfo/WebAssembly/fission-cu.ll
M llvm/test/DebugInfo/X86/convert-debugloc.ll
M llvm/test/DebugInfo/X86/convert-loclist.ll
M llvm/test/DebugInfo/X86/fission-cu.ll
M llvm/test/DebugInfo/X86/fission-hash-local.ll
M llvm/test/DebugInfo/X86/fission-hash.ll
A llvm/test/DebugInfo/X86/split-dwarf-dwo-hash.ll
R llvm/test/DebugInfo/X86/split-dwarf-multiple-cu-hash.ll
M llvm/test/DebugInfo/X86/sret.ll
M llvm/test/MC/WebAssembly/dwarfdump.ll
Log Message:
-----------
[DebugInfo] (Always) include the dwo name in the hash (#100375)
Since ce0c205813c74b4225180ac8a6e40fd52ea88229, we are doing that if a
single (LTO) compilation contains more than one compile unit, but the
same thing can happen if the non-lto and single-cu lto compilations,
typically when the CU ends up (nearly) empty. In my case, this happened
when LTO emptied two compile units.
Note that the source file name is already a part of the hash, so this
can only happen when a single file is compiled and linked twice into the
same application (most likely with different preprocessor defintiions).
While not exactly common, this pattern is used by some C code to
implement "templates".
The 2017 patch already hinted at the possibility of doing this
unconditionally, and this patch implements that. While the DWARF spec
hints at the option of using the type signature hashing algorithm for
the DWO_id purposes, AFAICT it does not actually require it, so I
believe this change is still conforming.
The relevant section of the spec is in Section 3.1.2 "Skeleton
Compilation Unit Entries" (in non-normative text):
```
The means of determining a compilation unit ID does not need to be
similar or related to the means of determining a type unit signature.
However, it should be suitable for detecting file version skew or other
kinds of mismatched files and for looking up a full split unit in a
DWARF package file (see Section 7.3.5 on page 190).
```
Commit: 337c8b1a4f88bdb58ba17712e05307cc2532dc00
https://github.com/llvm/llvm-project/commit/337c8b1a4f88bdb58ba17712e05307cc2532dc00
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
Log Message:
-----------
[SCEV] Add additional computeConstantDifference() tests (NFC)
And some tweaks to make this test easier to update. Use raw
string literals and print parse and verifier errors.
Commit: 6848b99d170e9ac59ce2007c817bc579536d8e8e
https://github.com/llvm/llvm-project/commit/6848b99d170e9ac59ce2007c817bc579536d8e8e
Author: jyu2-git <jennifer.yu at intel.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
A clang/test/OpenMP/target_map_pointer_defalut_mapper_codegen.cpp
Log Message:
-----------
[OpenMP][Map][NFC] improve map chain. (#101903)
This is for mapping structure has data members, which have 'default'
mappers, where needs to map these members individually using
their 'default' mappers.
example map(tofrom: spp[0][0]), look at test case.
currently create 6 maps:
1>&spp, &spp[0], size 8, maptype TARGET_PARAM | FROM | TO
2>&spp[0], &spp[0][0], size(D)with maptype OMP_MAP_NONE, nullptr
3>&spp[0], &spp[0][0].e, size(e) with maptype MEMBER_OF | FROM | TO
4>&spp[0], &spp[0][0].h, size(h) with maptype MEMBER_OF | FROM | TO
5>&spp, &spp[0],size(8), maptype MEMBER_OF | IMPLICIT | FROM | TO
6>&spp[0], &spp[0][0].f size(D) with maptype MEMBER_OF |IMPLICIT
|PTR_AND_OBJ, @.omp_mapper._ZTS1C.default
maptype with/without OMP_MAP_PTR_AND_OBJ
For "2" and "5", since it is mapping pointer and pointee pair,
PTR_AND_OBJ should be set
But for "6" the PTR_AND_OBJ should not set.
However, "5" is duplicate with "1" can be skip.
To fix "2", during the call to emitCombinEntry with false with
NotTargetParams
instead !PartialStruct.PreliminaryMapData.BasePointers.empty(), since
all captures need to be TARGET_PARAM
And inside emitCombineEntry: check
!PartialStruct.PreliminaryMapData.BasePointers.empty() to set
PTR_AND_OBJ
For "5" and "6": the fix in generateInfoForComponentList:
Add new variable IsPartialMapped set with
!PartialStruct.PreliminaryMapData.BasePointers.empty();
When that is true, skip generate "5" and don"t set IsExpressionFirstInfo
to false, so that PTR_AND_OBJ would be set.
After fix: will have 5 maps instead 6
1>&spp, &spp[0], size 8, maptype TARGET_PARAM | FROM | TO
2>&spp[0], &spp[0][0], size(D), maptype PTR_AND_OBJ, nullptr
3>&spp[0], &spp[0][0].e, size(e), maptype MEMBER_OF_2 | FROM | TO
4>&spp[0], &spp[0][0].h, size(h), maptype MEMBER_OF_2 | FROM | TO
5>&spp[0], &spp[0][0].f size(32), maptype MEMBER_OF_2 | IMPLICIT,
@.omp_mapper._ZTS1C.default
For map(sppp[0][0][0]):
after fix: will have 6 maps instead 8.
https://github.com/llvm/llvm-project/pull/101903
Commit: 212950fbcec3b71fa15ee49e0539333a30159c32
https://github.com/llvm/llvm-project/commit/212950fbcec3b71fa15ee49e0539333a30159c32
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M lldb/include/lldb/Symbol/Type.h
M lldb/include/lldb/lldb-private-enumerations.h
M lldb/source/Symbol/Type.cpp
M lldb/test/Shell/SymbolFile/DWARF/clang-gmodules-type-lookup.c
M lldb/test/Shell/SymbolFile/DWARF/x86/compilercontext.ll
M lldb/tools/lldb-test/lldb-test.cpp
M lldb/unittests/Symbol/TestType.cpp
Log Message:
-----------
[lldb] Refactor TypeQuery::ContextMatches, take 2 (#101333)
This is an alternative, much simpler implementation of #99305. In this
version I replace the AnyModule wildcard match with a special TypeQuery
flag which achieves (mostly) the same thing.
It is a preparatory step for teaching ContextMatches about anonymous
namespaces. It started out as a way to remove the assumption that the
pattern and target contexts must be of the same length -- that's will
not be correct with anonymous namespaces, and probably isn't even
correct right now for AnyModule matches.
Commit: 13dd795ef108c75b1b6240832f77ca5282a2e629
https://github.com/llvm/llvm-project/commit/13dd795ef108c75b1b6240832f77ca5282a2e629
Author: macurtis-amd <macurtis at amd.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/include/clang/Driver/Driver.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
Log Message:
-----------
[clang][NFC] Make OffloadLTOMode getter a separate method (#101200)
Minor readability improvement (IMHO). Also makes it easier to find the
places where we are getting the offload lto mode.
Commit: 0b2d50c08d2eadf32f685fcd5b5468bc2ec7a16d
https://github.com/llvm/llvm-project/commit/0b2d50c08d2eadf32f685fcd5b5468bc2ec7a16d
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/lib/Sema/SemaExpr.cpp
Log Message:
-----------
[Clang][NFC] Remove trailing whitespace from SemaExpr.cpp (#102001)
This patch removes trailing whitespace from `SemaExpr.cpp` added by
#70307
Commit: 257831582c759048ecce5c393993268b71a602e0
https://github.com/llvm/llvm-project/commit/257831582c759048ecce5c393993268b71a602e0
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M libcxx/include/__algorithm/equal_range.h
M libcxx/include/__algorithm/includes.h
M libcxx/include/__algorithm/is_permutation.h
M libcxx/include/__algorithm/lower_bound.h
M libcxx/include/__algorithm/max_element.h
M libcxx/include/__algorithm/min_element.h
M libcxx/include/__algorithm/minmax.h
M libcxx/include/__algorithm/minmax_element.h
M libcxx/include/__algorithm/partial_sort_copy.h
M libcxx/include/__algorithm/search.h
M libcxx/include/__algorithm/search_n.h
M libcxx/include/__algorithm/upper_bound.h
M libcxx/src/regex.cpp
A libcxx/test/libcxx/algorithms/callable-requirements-rvalue.compile.pass.cpp
A libcxx/test/libcxx/algorithms/callable-requirements.verify.cpp
R libcxx/test/libcxx/algorithms/callable.verify.cpp
M libcxx/test/libcxx/algorithms/ranges_robust_against_copying_projections.pass.cpp
M libcxx/test/libcxx/algorithms/robust_against_cpp20_hostile_iterators.compile.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.is_permutation/is_permutation_pred.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.search/search_n_pred.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.search/search_pred.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.binary.search/upper.bound/upper_bound_comp.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.merge/inplace_merge_comp.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.sort/stable.sort/stable_sort_comp.pass.cpp
Log Message:
-----------
[libc++] Check correctly ref-qualified __is_callable in algorithms (#101553)
We were only checking that the comparator was rvalue callable,
when in reality the algorithms always call comparators as lvalues.
This patch also refactors the tests for callable requirements and
expands it to a few missing algorithms.
This is take 2 of #73451, which was reverted because it broke some
CI bots. The issue was that we checked __is_callable with arguments
in the wrong order inside std::upper_bound. This has now been fixed
and a test was added.
Fixes #69554
Commit: d77f07d166618d0f33500b518144ada99be2f13f
https://github.com/llvm/llvm-project/commit/d77f07d166618d0f33500b518144ada99be2f13f
Author: Shimin Cui <scui at ca.ibm.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
A llvm/test/Transforms/TailCallElim/stackrestore.ll
Log Message:
-----------
[TailCallElim] Don’t mark llvm.stackrestore with tail-call (#101352)
This is to teach tailcallelim transformation not to mark
llvm.stackrestore with tail-call, as the intrinsic call can modify
unescaped allocas from the caller.
This fixes a problem found with our downstream testing. The problem can
also be shown when running the test case
llvm/test/Transforms/MemCpyOpt/stackrestore with passes=”tailcallelim,
memcpyopt”.
Commit: 8fda5ba0ce0f4fd2854c2b0daec0c6c1fbe44e4e
https://github.com/llvm/llvm-project/commit/8fda5ba0ce0f4fd2854c2b0daec0c6c1fbe44e4e
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
A llvm/test/Transforms/InstCombine/icmp-or-of-select-with-zero.ll
Log Message:
-----------
[InstCombine] Add tests for folding `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)`; NFC
Commit: b4ac7f4fc91ee5c8a192bcf15fffa69cb30d1912
https://github.com/llvm/llvm-project/commit/b4ac7f4fc91ee5c8a192bcf15fffa69cb30d1912
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-or-of-select-with-zero.ll
Log Message:
-----------
[InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)`
Four cases:
`(icmp eq (or (select cond, 0, NonZero), Other))`
-> `(and cond, (icmp eq Other, 0))`
`(icmp ne (or (select cond, NonZero, 0), Other))`
-> `(or cond, (icmp ne Other, 0))`
`(icmp ne (or (select cond, 0, NonZero), Other))`
-> `(or (not cond), (icmp ne Other, 0))`
`(icmp eq (or (select cond, NonZero, 0), Other))`
-> `(and (not cond), (icmp eq Other, 0))`
These cases came up in tests on: #88088
Proofs: https://alive2.llvm.org/ce/z/ojGo_J
Closes #88183
Commit: a113b4e52736b8d32499edf391b8ca53268a641f
https://github.com/llvm/llvm-project/commit/a113b4e52736b8d32499edf391b8ca53268a641f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/lib/AST/Interp/Compiler.cpp
M clang/lib/AST/Interp/Compiler.h
M clang/lib/AST/Interp/Context.cpp
M clang/lib/AST/Interp/Descriptor.cpp
M clang/test/AST/Interp/codegen.cpp
Log Message:
-----------
[clang][Interp] Remove GlobalDecl flag (#101995)
When initializing global variables, we still need to create local
variables for temporaries created in the process. Otherwise, we will
never call their destructors.
Commit: 72c9e24ed92149e853fc215cdf07e3afe34ae146
https://github.com/llvm/llvm-project/commit/72c9e24ed92149e853fc215cdf07e3afe34ae146
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M libc/startup/linux/do_start.cpp
Log Message:
-----------
[libc][startup] fix main thread TLS unmapped with wrong value (#102009)
We have been unmapping a wrong address all the time.
```c
munmap(0x704cffebb000, 41048) = 0
munmap(0x704cffec6000, 69632) = 0
munmap(0x704cffe9f000, 41048) = 0
munmap(0x704cffeaa000, 69632) = 0
munmap(0x704cffe83000, 41048) = 0
munmap(0x704cffe8e000, 69632) = 0
munmap(0x704cffe67000, 41048) = 0
munmap(0x704cffe72000, 69632) = 0
munmap(0x704cffe4b000, 41048) = 0
munmap(0x704cffe56000, 69632) = 0
munmap(0x704cffe2f000, 41048) = 0
munmap(0x704cffe3a000, 69632) = 0
munmap(0x704cfff51028, 41048) = -1 EINVAL (Invalid argument)
```
Commit: 5689cccead7b70d8eeae4c641e8078e6d3c50b9a
https://github.com/llvm/llvm-project/commit/5689cccead7b70d8eeae4c641e8078e6d3c50b9a
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M lldb/source/Commands/CommandObjectScripting.cpp
M lldb/source/Commands/Options.td
A lldb/test/Shell/Commands/command-scripting-extension-list.test
R lldb/test/Shell/Commands/command-scripting-template-list.test
Log Message:
-----------
[lldb] Rename `scripting template` to `scripting extension` (NFC) (#101935)
This patch renames the `scripting template` subcommand to be `scripting
extension` instead since that would make more sense for upcoming
commands.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 799fd3d87bb15c37027c9c4451ab8c4dac3ca437
https://github.com/llvm/llvm-project/commit/799fd3d87bb15c37027c9c4451ab8c4dac3ca437
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
Log Message:
-----------
[SLP]Support vectorization of small strided loads only graph.
If the graph includes only strided loads node, the compiler should still
try to vectorize it.
Reviewers: RKSimon, preames, topperc
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/101659
Commit: 1fdc553e9734dd0655778e67ba02823f8647bd9b
https://github.com/llvm/llvm-project/commit/1fdc553e9734dd0655778e67ba02823f8647bd9b
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M clang/test/CXX/drs/cwg20xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Add test for CWG2091 "Deducing reference non-type template arguments" (#100765)
https://cplusplus.github.io/CWG/issues/2091.html
Commit: 2b17366207f4906616e9e46a17f675ec7ac93bcd
https://github.com/llvm/llvm-project/commit/2b17366207f4906616e9e46a17f675ec7ac93bcd
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/include/llvm/Object/ELFObjectFile.h
M llvm/test/tools/llvm-nm/data.test
M llvm/test/tools/llvm-nm/readonly.test
M llvm/test/tools/llvm-objdump/section-headers.test
Log Message:
-----------
[Object] Refine isData/isBSS criteria
In GNU, DATA applies to not only SHT_PROGBITS, but also other non-NOBITS
types. BSS doesn't require the SHF_WRITE flag.
Pull Request: https://github.com/llvm/llvm-project/pull/101290
Commit: 1569e0edf3ea5ecc17e3827c07c939a7a2fe2604
https://github.com/llvm/llvm-project/commit/1569e0edf3ea5ecc17e3827c07c939a7a2fe2604
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/lib/TextAPI/InterfaceFile.cpp
Log Message:
-----------
[TextAPI] Add an assertion for adding duplicate libraries into a single TBD file (#101744)
This would lead to a malformed TBD file.
Commit: 9f6b440adf27056f9c9b7772c52c6d01dfcf2f13
https://github.com/llvm/llvm-project/commit/9f6b440adf27056f9c9b7772c52c6d01dfcf2f13
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M libc/config/darwin/arm/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/math/index.rst
M libc/src/math/amdgpu/CMakeLists.txt
R libc/src/math/amdgpu/pow.cpp
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/pow.cpp
M libc/src/math/nvptx/CMakeLists.txt
R libc/src/math/nvptx/pow.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/pow_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/pow_test.cpp
Log Message:
-----------
[libc][math] Implement fast pass for double precision pow function with up to 1ULP error. (#101926)
Commit: d6b5b98f5568f90950020af577fc1fb48b775b74
https://github.com/llvm/llvm-project/commit/d6b5b98f5568f90950020af577fc1fb48b775b74
Author: tcwzxx <tcwzxx at gmail.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/stores_mix_sizes.ll
Log Message:
-----------
[SLP][NFC] Add a new test for store chains that mix different sizes of values (#101979)
Commit: 834ad102c377a4d1cdc6c601d9899b5dc0a1858b
https://github.com/llvm/llvm-project/commit/834ad102c377a4d1cdc6c601d9899b5dc0a1858b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
Log Message:
-----------
[SLP][NFC]ADd a test version with threshold=-15, NFC.
Commit: 0319711f89ed815b92ab581ed98cc4ace5178135
https://github.com/llvm/llvm-project/commit/0319711f89ed815b92ab581ed98cc4ace5178135
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M llvm/test/CodeGen/DirectX/length_error.ll
Log Message:
-----------
[test] Fix DirectX/length_error.ll after #101256
Commit: ff45a2dc26949d2a57d42fcd625e1bfb5b7a7779
https://github.com/llvm/llvm-project/commit/ff45a2dc26949d2a57d42fcd625e1bfb5b7a7779
Author: Fangrui Song <i at maskray.me>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M .git-blame-ignore-revs
M .github/CODEOWNERS
A .github/workflows/get-llvm-version/action.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/llvm-tests.yml
M .github/workflows/release-binaries.yml
M clang-tools-extra/clangd/unittests/HoverTests.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unused-local-non-trivial-variable.cpp
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_exception_specification_kind.py
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/CommandGuide/clang.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang-c/Index.h
M clang/include/clang/AST/ASTConcept.h
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtOpenMP.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsX86.def
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Format/Format.h
M clang/include/clang/Index/DeclOccurrence.h
M clang/include/clang/Lex/PreprocessorOptions.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/SemaConcept.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/Sema/Template.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Tooling/Refactoring/ASTSelection.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/ExprClassification.cpp
M clang/lib/AST/Interp/Compiler.cpp
M clang/lib/AST/Interp/Compiler.h
M clang/lib/AST/Interp/Context.cpp
M clang/lib/AST/Interp/Descriptor.cpp
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/InterpBlock.cpp
M clang/lib/AST/Interp/InterpFrame.cpp
M clang/lib/AST/Interp/InterpFrame.h
M clang/lib/AST/Interp/Opcodes.td
M clang/lib/AST/Interp/Pointer.cpp
M clang/lib/AST/Interp/Pointer.h
M clang/lib/AST/Interp/Source.h
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtOpenMP.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Analysis/FlowSensitive/Models/ChromiumCheckModel.cpp
M clang/lib/Basic/Builtins.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/Arch/X86.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Format/AffectedRangeManager.h
M clang/lib/Format/TokenAnalyzer.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
M clang/lib/Frontend/DiagnosticRenderer.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/__clang_hip_cmath.h
A clang/lib/Headers/avx10_2_512minmaxintrin.h
A clang/lib/Headers/avx10_2_512niintrin.h
A clang/lib/Headers/avx10_2minmaxintrin.h
A clang/lib/Headers/avx10_2niintrin.h
M clang/lib/Headers/avxvnniint16intrin.h
M clang/lib/Headers/avxvnniint8intrin.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/immintrin.h
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NoOwnershipChangeVisitor.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/Store.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/Interp/codegen.cpp
M clang/test/AST/Interp/eval-order.cpp
M clang/test/AST/Interp/if.cpp
M clang/test/AST/Interp/loops.cpp
M clang/test/AST/Interp/new-delete.cpp
M clang/test/AST/ast-dump-concepts.cpp
M clang/test/AST/ast-dump-template-decls.cpp
A clang/test/Analysis/block-in-critical-section-inheritance.cpp
M clang/test/Analysis/exercise-ps.c
A clang/test/C/C11/n1396.c
M clang/test/CXX/drs/cwg15xx.cpp
M clang/test/CXX/drs/cwg20xx.cpp
M clang/test/CXX/drs/cwg7xx.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/compound-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/nested-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/simple-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/type-requirement.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.normal/p1.cpp
M clang/test/CXX/temp/temp.deduct.guide/p3.cpp
M clang/test/CXX/temp/temp.param/p10-2a.cpp
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfncvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfncvt_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwcvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwcvt_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmerge.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vreinterpret.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfncvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfncvt_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwcvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwcvt_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vmerge.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vmv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vreinterpret.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfncvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfncvt_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwcvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwcvt_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmerge.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfncvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfncvt_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwcvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwcvt_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vmerge.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vmv.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/zvfhmin.c
A clang/test/CodeGen/X86/avx10_2_512minmax-builtins.c
A clang/test/CodeGen/X86/avx10_2_512minmax-error.c
A clang/test/CodeGen/X86/avx10_2_512ni-builtins.c
A clang/test/CodeGen/X86/avx10_2minmax-builtins.c
A clang/test/CodeGen/X86/avx10_2ni-builtins.c
M clang/test/CodeGen/X86/avxvnniint16-builtins.c
M clang/test/CodeGen/X86/avxvnniint8-builtins.c
M clang/test/CodeGen/attr-nomerge.cpp
M clang/test/CodeGen/attr-target-x86.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/CodeGenCXX/regparm.cpp
M clang/test/CodeGenCXX/x86_32-vaarg.cpp
A clang/test/CodeGenHLSL/builtins/length.hlsl
M clang/test/CodeGenObjC/ubsan-bool.m
A clang/test/Driver/Inputs/baremetal_arm/lib/crt0.o
A clang/test/Driver/Inputs/basic_baremetal_tree/lib/armv6m-unknown-none-eabi/crt0.o
M clang/test/Driver/baremetal.cpp
M clang/test/Driver/riscv-cpus.c
M clang/test/Driver/x86-target-features.c
M clang/test/Headers/__clang_hip_cmath.hip
M clang/test/Lexer/cxx-features.cpp
M clang/test/Misc/diag-template-diffing-cxx11.cpp
M clang/test/Misc/target-invalid-cpu-note.c
A clang/test/Modules/GH60336-2.cpp
M clang/test/Modules/GH60336.cpp
A clang/test/Modules/builtin-vararg.c
M clang/test/Modules/skip-odr-check-in-gmf.cppm
A clang/test/OpenMP/assume_lambda.cpp
A clang/test/OpenMP/assume_messages.c
A clang/test/OpenMP/assume_messages_attr.c
A clang/test/OpenMP/assume_nesting.cpp
A clang/test/OpenMP/assume_nesting_tmpl.cpp
A clang/test/OpenMP/assume_serialize_deserialize.cpp
A clang/test/OpenMP/assume_serialize_deserialize_tmpl.cpp
A clang/test/OpenMP/assume_template.cpp
A clang/test/OpenMP/target_map_nest_defalut_mapper_ast_dump.cpp
A clang/test/OpenMP/target_map_nest_defalut_mapper_codegen.cpp
A clang/test/OpenMP/target_map_pointer_defalut_mapper_codegen.cpp
A clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M clang/test/Preprocessor/pragma_mc_func.c
M clang/test/Preprocessor/x86_target_features.c
M clang/test/Sema/constexpr.c
M clang/test/SemaCXX/coroutines.cpp
M clang/test/SemaCXX/cxx1y-generic-lambdas-variadics.cpp
M clang/test/SemaCXX/cxx1y-generic-lambdas.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaCXX/lambda-pack-expansion.cpp
M clang/test/SemaCXX/nullability.cpp
M clang/test/SemaCXX/sizeless-1.cpp
M clang/test/SemaCXX/type-traits.cpp
A clang/test/SemaHLSL/BuiltIns/all-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/any-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/length-errors.hlsl
M clang/test/SemaHLSL/VectorOverloadResolution.hlsl
M clang/test/SemaTemplate/concepts-recursive-inst.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/test/SemaTemplate/instantiate-requires-expr.cpp
M clang/test/SemaTemplate/make_integer_seq.cpp
M clang/test/SemaTemplate/pr52970.cpp
M clang/test/SemaTemplate/temp_arg_nontype.cpp
M clang/test/SemaTemplate/temp_arg_template_p0522.cpp
M clang/tools/clang-format/ClangFormat.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
M clang/tools/libclang/libclang.map
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/MacroCallReconstructorTest.cpp
M clang/unittests/Format/MatchFilePathTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/asan/asan_globals.cpp
M compiler-rt/lib/asan/asan_ignorelist.txt
M compiler-rt/lib/builtins/aarch64/sme-libc-mem-routines.S
M compiler-rt/lib/builtins/cpu_model/x86.c
M compiler-rt/lib/builtins/divtc3.c
M compiler-rt/lib/builtins/multc3.c
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stacktrace_sparc.cpp
M compiler-rt/test/asan/TestCases/Helpers/initialization-nobug-extra.cpp
M compiler-rt/test/asan/TestCases/Linux/odr_indicator_unregister.cpp
M compiler-rt/test/asan/TestCases/Linux/printf-fortify-5.c
M compiler-rt/test/asan/TestCases/initialization-nobug.cpp
M compiler-rt/test/lit.common.cfg.py
M flang/CMakeLists.txt
M flang/include/flang/Evaluate/expression.h
M flang/include/flang/Frontend/LangOptions.h
M flang/include/flang/Lower/Allocatable.h
M flang/include/flang/Lower/CallInterface.h
M flang/include/flang/Lower/IterationSpace.h
M flang/include/flang/Optimizer/Builder/BoxValue.h
M flang/include/flang/Optimizer/Builder/MutableBox.h
M flang/include/flang/Optimizer/CodeGen/CGOps.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
A flang/include/flang/Runtime/CUDA/allocator.h
M flang/include/flang/Runtime/allocator-registry.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Evaluate/fold-real.cpp
M flang/lib/Evaluate/real.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/ConvertArrayConstructor.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/IterationSpace.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/Transforms/AffineDemotion.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/CufOpConversion.cpp
M flang/lib/Semantics/expression.cpp
M flang/runtime/CMakeLists.txt
A flang/runtime/CUDA/CMakeLists.txt
A flang/runtime/CUDA/allocator.cpp
M flang/runtime/edit-output.cpp
M flang/runtime/format-implementation.h
M flang/runtime/internal-unit.cpp
M flang/runtime/internal-unit.h
M flang/runtime/io-stmt.cpp
M flang/runtime/io-stmt.h
M flang/runtime/unit.cpp
M flang/runtime/unit.h
M flang/runtime/utf.cpp
M flang/runtime/utf.h
M flang/test/Evaluate/fold-nearest.f90
M flang/test/Evaluate/logical-args.f90
A flang/test/Fir/CUDA/cuda-allocate.fir
M flang/test/Integration/OpenMP/copyprivate.f90
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/CUDA/cuda-allocatable.cuf
M flang/test/Lower/OpenMP/Todo/omp-default-clause-inner-loop.f90
M flang/test/Lower/OpenMP/associate.f90
M flang/test/Lower/OpenMP/copyprivate.f90
M flang/test/Lower/OpenMP/copyprivate2.f90
M flang/test/Lower/OpenMP/critical.f90
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/firstprivate-allocatable.f90
M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
A flang/test/Lower/OpenMP/offload-targets.f90
M flang/test/Lower/OpenMP/parallel-firstprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/parallel-private-clause-str.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
M flang/test/Lower/OpenMP/unstructured.f90
M flang/tools/bbc/bbc.cpp
M flang/unittests/Optimizer/InternalNamesTest.cpp
M flang/unittests/Runtime/CMakeLists.txt
A flang/unittests/Runtime/CUDA/AllocatorCUF.cpp
A flang/unittests/Runtime/CUDA/CMakeLists.txt
M flang/unittests/Runtime/NumericalFormatTest.cpp
M libc/benchmarks/gpu/LibcGpuBenchmark.cpp
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/arm/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/dev/printf_behavior.rst
M libc/docs/math/index.rst
M libc/newhdrgen/class_implementation/classes/enumeration.py
M libc/newhdrgen/class_implementation/classes/function.py
M libc/newhdrgen/class_implementation/classes/macro.py
M libc/newhdrgen/class_implementation/classes/object.py
M libc/newhdrgen/class_implementation/classes/type.py
M libc/newhdrgen/gpu_headers.py
M libc/newhdrgen/header.py
M libc/newhdrgen/yaml/unistd.yaml
M libc/newhdrgen/yaml_to_classes.py
M libc/spec/posix.td
M libc/src/__support/threads/CMakeLists.txt
A libc/src/__support/threads/identifier.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/rwlock.h
M libc/src/__support/threads/thread.cpp
M libc/src/__support/threads/thread.h
M libc/src/math/amdgpu/CMakeLists.txt
R libc/src/math/amdgpu/pow.cpp
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/pow.cpp
M libc/src/math/nvptx/CMakeLists.txt
R libc/src/math/nvptx/pow.cpp
M libc/src/stdio/printf_core/parser.h
M libc/src/stdlib/CMakeLists.txt
M libc/src/unistd/CMakeLists.txt
A libc/src/unistd/gettid.cpp
A libc/src/unistd/gettid.h
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/fork.cpp
M libc/startup/linux/do_start.cpp
M libc/test/integration/src/unistd/CMakeLists.txt
M libc/test/integration/src/unistd/fork_test.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/pow_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/FmaTest.h
M libc/test/src/math/smoke/GetPayloadTest.h
A libc/test/src/math/smoke/pow_test.cpp
M libc/test/src/stdio/printf_core/parser_test.cpp
M libc/test/src/stdio/snprintf_test.cpp
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/docs/Status/Cxx14Issues.csv
M libcxx/docs/Status/Cxx14Papers.csv
M libcxx/docs/Status/Cxx17.rst
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx20.rst
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/docs/Status/ParallelismProjects.csv
M libcxx/include/__algorithm/comp.h
M libcxx/include/__algorithm/equal_range.h
M libcxx/include/__algorithm/includes.h
M libcxx/include/__algorithm/is_permutation.h
M libcxx/include/__algorithm/lexicographical_compare.h
M libcxx/include/__algorithm/lower_bound.h
M libcxx/include/__algorithm/max_element.h
M libcxx/include/__algorithm/min_element.h
M libcxx/include/__algorithm/minmax.h
M libcxx/include/__algorithm/minmax_element.h
M libcxx/include/__algorithm/partial_sort_copy.h
M libcxx/include/__algorithm/ranges_lexicographical_compare.h
M libcxx/include/__algorithm/ranges_minmax.h
M libcxx/include/__algorithm/search.h
M libcxx/include/__algorithm/search_n.h
M libcxx/include/__algorithm/upper_bound.h
M libcxx/include/__bit/rotate.h
M libcxx/include/__functional/operations.h
M libcxx/include/__functional/ranges_operations.h
M libcxx/include/__hash_table
M libcxx/include/__string/constexpr_c_functions.h
M libcxx/include/__type_traits/desugars_to.h
M libcxx/include/__type_traits/is_trivially_lexicographically_comparable.h
M libcxx/include/experimental/__simd/reference.h
M libcxx/include/unordered_map
M libcxx/include/unordered_set
M libcxx/src/regex.cpp
M libcxx/test/benchmarks/CMakeLists.txt
A libcxx/test/benchmarks/algorithms/lexicographical_compare.bench.cpp
A libcxx/test/libcxx/algorithms/callable-requirements-rvalue.compile.pass.cpp
A libcxx/test/libcxx/algorithms/callable-requirements.verify.cpp
R libcxx/test/libcxx/algorithms/callable.verify.cpp
M libcxx/test/libcxx/algorithms/cpp17_iterator_concepts.verify.cpp
M libcxx/test/libcxx/algorithms/ranges_robust_against_copying_projections.pass.cpp
M libcxx/test/libcxx/algorithms/robust_against_cpp20_hostile_iterators.compile.pass.cpp
A libcxx/test/libcxx/feature_test_macro/ftm_metadata.sh.py
M libcxx/test/libcxx/feature_test_macro/implemented_ftms.sh.py
M libcxx/test/libcxx/feature_test_macro/standard_ftms.sh.py
M libcxx/test/libcxx/feature_test_macro/test_data.json
A libcxx/test/libcxx/feature_test_macro/version_header.sh.py
A libcxx/test/libcxx/feature_test_macro/version_header_implementation.sh.py
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/std/algorithms/alg.nonmodifying/alg.is_permutation/is_permutation_pred.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.search/search_n_pred.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.search/search_pred.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.binary.search/upper.bound/upper_bound_comp.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.lex.comparison/lexicographical_compare.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.merge/inplace_merge_comp.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.sort/stable.sort/stable_sort_comp.pass.cpp
M libcxx/test/std/containers/sequences/array/compare.verify.cpp
M libcxx/test/std/diagnostics/syserr/syserr.syserr/syserr.syserr.members/ctor_error_code_string.pass.cpp
M libcxx/test/std/diagnostics/syserr/syserr.syserr/syserr.syserr.members/ctor_int_error_category_string.pass.cpp
A libcxx/test/std/experimental/simd/simd.reference/reference_arith_operators.pass.cpp
A libcxx/test/std/experimental/simd/simd.reference/reference_bitwise_operators.pass.cpp
M libcxx/test/std/experimental/simd/test_utils.h
M libcxx/test/std/input.output/filesystems/class.filesystem_error/filesystem_error.members.pass.cpp
M libcxx/test/std/numerics/bit/bitops.rot/rotl.pass.cpp
M libcxx/test/std/numerics/bit/bitops.rot/rotr.pass.cpp
M libcxx/test/std/re/re.traits/transform.pass.cpp
M libcxx/test/std/utilities/utility/mem.res/mem.poly.allocator.class/mem.poly.allocator.class.general/equality.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
M libcxxabi/src/demangle/ItaniumDemangle.h
M libunwind/CMakeLists.txt
M libunwind/src/Registers.hpp
M libunwind/src/UnwindCursor.hpp
M libunwind/src/UnwindLevel1.c
M libunwind/src/UnwindRegistersRestore.S
M libunwind/src/UnwindRegistersSave.S
M libunwind/src/cet_unwind.h
M libunwind/test/CMakeLists.txt
M libunwind/test/configs/llvm-libunwind-merged.cfg.in
M libunwind/test/configs/llvm-libunwind-shared.cfg.in
M libunwind/test/configs/llvm-libunwind-static.cfg.in
M lld/Common/DWARF.cpp
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/OutputSections.h
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.cpp
M lld/ELF/Writer.cpp
M lldb/include/lldb/API/SBProcess.h
M lldb/include/lldb/API/SBSaveCoreOptions.h
M lldb/include/lldb/API/SBThread.h
M lldb/include/lldb/Expression/Expression.h
M lldb/include/lldb/Expression/UserExpression.h
M lldb/include/lldb/Symbol/SaveCoreOptions.h
M lldb/include/lldb/Symbol/Type.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/lldb-private-enumerations.h
M lldb/source/API/SBSaveCoreOptions.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectBreakpoint.h
M lldb/source/Commands/CommandObjectBreakpointCommand.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/CommandObjectScripting.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/PluginManager.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.h
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.h
M lldb/source/Plugins/ObjectFile/Minidump/ObjectFileMinidump.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/CMakeLists.txt
R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/CMakeLists.txt
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
A lldb/source/Plugins/SystemRuntime/MacOSX/AbortWithPayloadFrameRecognizer.cpp
A lldb/source/Plugins/SystemRuntime/MacOSX/AbortWithPayloadFrameRecognizer.h
M lldb/source/Plugins/SystemRuntime/MacOSX/CMakeLists.txt
M lldb/source/Plugins/SystemRuntime/MacOSX/SystemRuntimeMacOSX.cpp
M lldb/source/Symbol/SaveCoreOptions.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Target/Process.cpp
M lldb/test/API/commands/expression/import-std-module/shared_ptr/TestSharedPtrFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/weak_ptr-dbg-info-content/TestDbgInfoContentWeakPtrFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/weak_ptr/TestWeakPtrFromStdModule.py
M lldb/test/API/functionalities/breakpoint/breakpoint_conditions/TestBreakpointConditions.py
M lldb/test/API/functionalities/process_save_core_minidump/TestProcessSaveCoreMinidump.py
A lldb/test/API/macosx/abort_with_payload/Makefile
A lldb/test/API/macosx/abort_with_payload/TestAbortWithPayload.py
A lldb/test/API/macosx/abort_with_payload/main.c
M lldb/test/API/python_api/sbsavecoreoptions/TestSBSaveCoreOptions.py
A lldb/test/API/python_api/sbsavecoreoptions/basic_minidump.yaml
A lldb/test/API/python_api/sbsavecoreoptions/basic_minidump_different_pid.yaml
A lldb/test/Shell/Commands/command-scripting-extension-list.test
M lldb/test/Shell/SymbolFile/DWARF/clang-gmodules-type-lookup.c
M lldb/test/Shell/SymbolFile/DWARF/x86/compilercontext.ll
M lldb/tools/lldb-test/lldb-test.cpp
M lldb/unittests/Symbol/TestType.cpp
M llvm/docs/CommandGuide/llvm-symbolizer.rst
M llvm/docs/LangRef.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/docs/WritingAnLLVMPass.rst
M llvm/include/llvm/ADT/PackedVector.h
M llvm/include/llvm/ADT/SmallVector.h
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/include/llvm/CodeGen/GlobalISel/GISelChangeObserver.h
M llvm/include/llvm/DebugInfo/CodeView/TypeRecord.h
M llvm/include/llvm/DebugInfo/DIContext.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h
M llvm/include/llvm/DebugInfo/Symbolize/Symbolize.h
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/include/llvm/Demangle/MicrosoftDemangleNodes.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/FuzzMutate/RandomIRBuilder.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/IR/Metadata.h
M llvm/include/llvm/IR/PredIteratorCache.h
M llvm/include/llvm/MC/MCFragment.h
M llvm/include/llvm/Object/ELFObjectFile.h
M llvm/include/llvm/Pass.h
M llvm/include/llvm/PassInfo.h
M llvm/include/llvm/PassRegistry.h
M llvm/include/llvm/PassSupport.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/include/llvm/SandboxIR/Use.h
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/include/llvm/Support/ScopedPrinter.h
M llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
M llvm/include/llvm/TableGen/Record.h
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/include/llvm/Transforms/Utils/Local.h
M llvm/include/llvm/Transforms/Utils/ModuleUtils.h
M llvm/lib/Analysis/Delinearization.cpp
M llvm/lib/Analysis/IVUsers.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/StructuralHash.cpp
M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp
M llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/lib/CodeGen/WindowScheduler.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/DebugInfo/Symbolize/DIPrinter.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/lib/Demangle/RustDemangle.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/LegacyPassManager.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Pass.cpp
M llvm/lib/IR/PassRegistry.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/Object/BuildID.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/lib/Support/ARMAttributeParser.cpp
M llvm/lib/Support/CSKYAttributeParser.cpp
M llvm/lib/Support/MSP430AttributeParser.cpp
M llvm/lib/Support/RISCVAttributeParser.cpp
M llvm/lib/Support/SourceMgr.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/ARM/MVETailPredication.cpp
M llvm/lib/Target/BPF/BPF.h
M llvm/lib/Target/BPF/BPFInstrInfo.td
R llvm/lib/Target/BPF/BPFMIChecking.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/BPF/CMakeLists.txt
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/Hexagon/CMakeLists.txt
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
A llvm/lib/Target/Hexagon/HexagonMask.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcTargetStreamer.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcTargetStreamer.h
M llvm/lib/Target/Sparc/Sparc.td
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
M llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
A llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrFMA3Info.cpp
M llvm/lib/Target/X86/X86InstrFormats.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/lib/TextAPI/InterfaceFile.cpp
M llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/LoopDeletion.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LoopPredication.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/LoopSimplify.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/LoopVersioning.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/ModuleUtils.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/CostModel/RISCV/reduce-scalable-fp.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-broadcast.ll
M llvm/test/Analysis/StructuralHash/structural-hash-printer.ll
A llvm/test/CodeGen/AArch64/abds-neg.ll
A llvm/test/CodeGen/AArch64/abds.ll
A llvm/test/CodeGen/AArch64/abdu-neg.ll
A llvm/test/CodeGen/AArch64/abdu.ll
M llvm/test/CodeGen/AArch64/basic-pic.ll
M llvm/test/CodeGen/AArch64/elf-globals-pic.ll
M llvm/test/CodeGen/AArch64/extern-weak.ll
M llvm/test/CodeGen/AArch64/fast-isel-branch-uncond-debug.ll
M llvm/test/CodeGen/AArch64/got-abuse.ll
M llvm/test/CodeGen/AArch64/neon-rshrn.ll
M llvm/test/CodeGen/AArch64/neon-shift-left-long.ll
A llvm/test/CodeGen/AArch64/optimize_combine_large_shifts.ll
M llvm/test/CodeGen/AArch64/peephole-csel.ll
M llvm/test/CodeGen/AArch64/peephole-csel.mir
A llvm/test/CodeGen/AArch64/sched-postidxalias.mir
A llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-reductions.ll
M llvm/test/CodeGen/AArch64/tagged-globals-pic.ll
A llvm/test/CodeGen/AArch64/whilewr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global_atomic_optimizer_fp_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_optimizer_fp_no_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
A llvm/test/CodeGen/ARM/Windows/private-func.ll
M llvm/test/CodeGen/BPF/atomics.ll
M llvm/test/CodeGen/BPF/atomics_2.ll
M llvm/test/CodeGen/BPF/objdump_atomics.ll
R llvm/test/CodeGen/BPF/xadd.ll
M llvm/test/CodeGen/BPF/xadd_legal.ll
M llvm/test/CodeGen/DirectX/acos_error.ll
M llvm/test/CodeGen/DirectX/any.ll
M llvm/test/CodeGen/DirectX/asin_error.ll
M llvm/test/CodeGen/DirectX/atan_error.ll
M llvm/test/CodeGen/DirectX/ceil_error.ll
M llvm/test/CodeGen/DirectX/cos_error.ll
M llvm/test/CodeGen/DirectX/cosh_error.ll
M llvm/test/CodeGen/DirectX/dot2_error.ll
M llvm/test/CodeGen/DirectX/dot3_error.ll
M llvm/test/CodeGen/DirectX/dot4_error.ll
M llvm/test/CodeGen/DirectX/exp2_error.ll
M llvm/test/CodeGen/DirectX/flattened_thread_id_in_group_error.ll
M llvm/test/CodeGen/DirectX/floor_error.ll
M llvm/test/CodeGen/DirectX/frac_error.ll
M llvm/test/CodeGen/DirectX/group_id_error.ll
M llvm/test/CodeGen/DirectX/isinf_error.ll
A llvm/test/CodeGen/DirectX/length.ll
A llvm/test/CodeGen/DirectX/length_error.ll
A llvm/test/CodeGen/DirectX/length_invalid_intrinsic_error.ll
A llvm/test/CodeGen/DirectX/length_invalid_intrinsic_error_scalar.ll
M llvm/test/CodeGen/DirectX/lerp.ll
M llvm/test/CodeGen/DirectX/log2_error.ll
M llvm/test/CodeGen/DirectX/round_error.ll
M llvm/test/CodeGen/DirectX/rsqrt_error.ll
M llvm/test/CodeGen/DirectX/sin_error.ll
M llvm/test/CodeGen/DirectX/sinh_error.ll
M llvm/test/CodeGen/DirectX/sqrt_error.ll
M llvm/test/CodeGen/DirectX/tan_error.ll
M llvm/test/CodeGen/DirectX/tanh_error.ll
M llvm/test/CodeGen/DirectX/thread_id_error.ll
M llvm/test/CodeGen/DirectX/thread_id_in_group_error.ll
M llvm/test/CodeGen/DirectX/trunc_error.ll
A llvm/test/CodeGen/Generic/extractelement-shuffle.ll
A llvm/test/CodeGen/Hexagon/mask.ll
A llvm/test/CodeGen/Hexagon/swp-ws-resource-reserve.mir
A llvm/test/CodeGen/LoongArch/float-imm-vldi.ll
M llvm/test/CodeGen/LoongArch/unaligned-memcpy-inline.ll
A llvm/test/CodeGen/RISCV/abds-neg.ll
A llvm/test/CodeGen/RISCV/abds.ll
A llvm/test/CodeGen/RISCV/abdu-neg.ll
A llvm/test/CodeGen/RISCV/abdu.ll
M llvm/test/CodeGen/RISCV/imm.ll
M llvm/test/CodeGen/RISCV/lack-of-signed-truncation-check.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/imm.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
M llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll
M llvm/test/CodeGen/RISCV/signed-truncation-check.ll
M llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
M llvm/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll
M llvm/test/CodeGen/X86/2010-07-06-DbgCrash.ll
A llvm/test/CodeGen/X86/abds-neg.ll
M llvm/test/CodeGen/X86/abds.ll
A llvm/test/CodeGen/X86/abdu-neg.ll
M llvm/test/CodeGen/X86/abdu.ll
A llvm/test/CodeGen/X86/avx10_2_512minmax-intrinsics.ll
A llvm/test/CodeGen/X86/avx10_2_512ni-intrinsics.ll
A llvm/test/CodeGen/X86/avx10_2minmax-intrinsics.ll
A llvm/test/CodeGen/X86/avx10_2ni-intrinsics.ll
M llvm/test/CodeGen/X86/avxvnniint16-intrinsics.ll
M llvm/test/CodeGen/X86/avxvnniint8-intrinsics.ll
M llvm/test/CodeGen/X86/dwarf-headers.ll
R llvm/test/CodeGen/X86/extractelement-shuffle.ll
M llvm/test/DebugInfo/COFF/fission-cu.ll
M llvm/test/DebugInfo/COFF/fission-sections.ll
M llvm/test/DebugInfo/WebAssembly/dwarf-headers.ll
M llvm/test/DebugInfo/WebAssembly/fission-cu.ll
M llvm/test/DebugInfo/X86/convert-debugloc.ll
M llvm/test/DebugInfo/X86/convert-loclist.ll
M llvm/test/DebugInfo/X86/fission-cu.ll
M llvm/test/DebugInfo/X86/fission-hash-local.ll
M llvm/test/DebugInfo/X86/fission-hash.ll
A llvm/test/DebugInfo/X86/split-dwarf-dwo-hash.ll
R llvm/test/DebugInfo/X86/split-dwarf-multiple-cu-hash.ll
M llvm/test/DebugInfo/X86/sret.ll
A llvm/test/Instrumentation/AddressSanitizer/instrument_late_initializer.ll
A llvm/test/MC/ARM/Windows/branch-reloc-offset.s
A llvm/test/MC/Disassembler/X86/avx10.2minmax-32.txt
A llvm/test/MC/Disassembler/X86/avx10.2minmax-64.txt
A llvm/test/MC/Disassembler/X86/avx10_2ni-32.txt
A llvm/test/MC/Disassembler/X86/avx10_2ni-64.txt
M llvm/test/MC/Sparc/elf-sparc-machine-type.s
M llvm/test/MC/WebAssembly/dwarfdump.ll
A llvm/test/MC/X86/avx10.2minmax-32-att.s
A llvm/test/MC/X86/avx10.2minmax-32-intel.s
A llvm/test/MC/X86/avx10.2minmax-64-att.s
A llvm/test/MC/X86/avx10.2minmax-64-intel.s
A llvm/test/MC/X86/avx10_2ni-32-intel.s
A llvm/test/MC/X86/avx10_2ni-64-att.s
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-variadics.td
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i128.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd-flat-specialization.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-simplify-cfg-CAS-block.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-fp-vector.ll
M llvm/test/Transforms/Attributor/memory_locations_gpu.ll
A llvm/test/Transforms/GVN/merge-range.ll
A llvm/test/Transforms/InferAddressSpaces/AMDGPU/store-pointer-to-self.ll
M llvm/test/Transforms/Inline/AArch64/sme-pstateza-attrs.ll
M llvm/test/Transforms/InstCombine/fcmp.ll
M llvm/test/Transforms/InstCombine/fpclass-check-idioms.ll
M llvm/test/Transforms/InstCombine/icmp-and-shift.ll
A llvm/test/Transforms/InstCombine/icmp-or-of-select-with-zero.ll
M llvm/test/Transforms/InstCombine/known-never-nan.ll
M llvm/test/Transforms/InstCombine/load-cmp.ll
A llvm/test/Transforms/InstCombine/skip-opt-void-to-non-void-conversion.ll
M llvm/test/Transforms/InstCombine/stpncpy-1.ll
M llvm/test/Transforms/InstCombine/strncpy-1.ll
M llvm/test/Transforms/InstCombine/strncpy-3.ll
A llvm/test/Transforms/LoopVectorize/AArch64/streaming-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
A llvm/test/Transforms/PGOProfile/ctx-prof-use-prelink.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
A llvm/test/Transforms/SLPVectorizer/X86/stores_mix_sizes.ll
A llvm/test/Transforms/TailCallElim/stackrestore.ll
M llvm/test/tools/llvm-dwarfdump/X86/prettyprint_type_units.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512bw.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512dq.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse1.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse41.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512.s
M llvm/test/tools/llvm-nm/data.test
M llvm/test/tools/llvm-nm/readonly.test
M llvm/test/tools/llvm-objdump/ELF/RISCV/source-interleave.ll
M llvm/test/tools/llvm-objdump/section-headers.test
R llvm/test/tools/llvm-profgen/Inputs/cmov_3.perfbin
R llvm/test/tools/llvm-profgen/Inputs/cmov_3.perfscript
R llvm/test/tools/llvm-profgen/Inputs/ip-duplication.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noprobe-skid.perfscript
R llvm/test/tools/llvm-profgen/event-filtering.test
R llvm/test/tools/llvm-profgen/iponly-nodupfactor.test
R llvm/test/tools/llvm-profgen/iponly.test
R llvm/test/tools/llvm-profgen/period-scaling.test
A llvm/test/tools/llvm-symbolizer/skip-line-zero.s
M llvm/tools/dsymutil/MachODebugMapParser.cpp
M llvm/tools/llvm-profgen/PerfReader.cpp
M llvm/tools/llvm-profgen/ProfileGenerator.cpp
M llvm/tools/llvm-rc/ResourceScriptStmt.h
M llvm/tools/llvm-symbolizer/Opts.td
M llvm/tools/llvm-symbolizer/llvm-symbolizer.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
M llvm/unittests/Analysis/VectorUtilsTest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
M llvm/unittests/Support/VirtualFileSystemTest.cpp
M llvm/unittests/Transforms/Utils/LoopUtilsTest.cpp
M llvm/unittests/Transforms/Utils/ModuleUtilsTest.cpp
M llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M llvm/utils/TableGen/Common/DAGISelMatcher.h
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
M llvm/utils/TableGen/DXILEmitter.cpp
M llvm/utils/TableGen/X86DisassemblerTables.cpp
M llvm/utils/TableGen/X86InstrMappingEmitter.cpp
M llvm/utils/TableGen/X86ManualInstrMapping.def
M llvm/utils/TableGen/X86RecognizableInstr.cpp
M llvm/utils/TableGen/X86RecognizableInstr.h
M llvm/utils/chunk-print-before-all.py
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/BPF/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/BUILD.gn
M llvm/utils/llvm-locstats/llvm-locstats.py
A llvm/utils/release/get-llvm-version.sh
M mlir/docs/Dialects/Vector.md
M mlir/include/mlir-c/BuiltinTypes.h
M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/IR/Builders.h
M mlir/include/mlir/IR/BuiltinTypes.h
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/include/mlir/IR/DialectRegistry.h
M mlir/include/mlir/IR/Types.h
M mlir/include/mlir/TableGen/Class.h
M mlir/include/mlir/Target/LLVMIR/LLVMImportInterface.h
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/lib/Analysis/Presburger/Simplex.cpp
M mlir/lib/Analysis/Presburger/Utils.cpp
M mlir/lib/AsmParser/TokenKinds.def
M mlir/lib/AsmParser/TypeParser.cpp
M mlir/lib/Bindings/Python/IRTypes.cpp
M mlir/lib/CAPI/IR/BuiltinTypes.cpp
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/Arith/Transforms/IntNarrowing.cpp
M mlir/lib/Dialect/Bufferization/Transforms/DropEquivalentBufferResults.cpp
M mlir/lib/Dialect/GPU/TransformOps/Utils.cpp
M mlir/lib/Dialect/GPU/Transforms/NVVMAttachTarget.cpp
M mlir/lib/Dialect/GPU/Transforms/ROCDLAttachTarget.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Interchange.cpp
M mlir/lib/Dialect/Linalg/Transforms/Loops.cpp
M mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseBufferRewriting.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Utils/Utils.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/IR/AffineExpr.cpp
M mlir/lib/IR/AffineMap.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/IR/OperationSupport.cpp
M mlir/lib/IR/Types.cpp
M mlir/lib/Interfaces/FunctionInterfaces.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/lib/Transforms/Mem2Reg.cpp
M mlir/lib/Transforms/SROA.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/python/mlir/_mlir_libs/_mlir/ir.pyi
M mlir/python/mlir/extras/types.py
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv-unsupported.mlir
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
M mlir/test/Dialect/LLVMIR/func.mlir
M mlir/test/Dialect/Linalg/canonicalize.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Dialect/Vector/vector-transfer-flatten.mlir
M mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/IR/attribute.mlir
A mlir/test/Target/LLVMIR/Import/metadata-kernel.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/omptarget-array-sectioning-host.mlir
M mlir/test/Target/LLVMIR/omptarget-byref-bycopy-generation-host.mlir
A mlir/test/Target/LLVMIR/omptarget-depend-host-only.mlir
M mlir/test/Target/LLVMIR/omptarget-depend.mlir
M mlir/test/Target/LLVMIR/omptarget-fortran-allocatable-types-host.mlir
M mlir/test/Target/LLVMIR/omptarget-fortran-common-block-host.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-record-type-mapping-host.mlir
A mlir/test/Target/LLVMIR/omptarget-region-host-only.mlir
M mlir/test/Target/LLVMIR/omptarget-region-llvm.mlir
M mlir/test/Target/SPIRV/decorations.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
M mlir/test/python/ir/builtin_types.py
M mlir/utils/lldb-scripts/mlirDataFormatters.py
M mlir/utils/tree-sitter-mlir/grammar.js
A offload/test/mapping/declare_mapper_nested_default_mappers_1.cpp
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