[all-commits] [llvm/llvm-project] c03bf2: [RISCV] Improve hasAllNBitUsers for users of SLLI.

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c03bf2c41bd3b89a8ed455b7f48cf95cf131656c
      https://github.com/llvm/llvm-project/commit/c03bf2c41bd3b89a8ed455b7f48cf95cf131656c
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-08-03 (Sat, 03 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
    M llvm/test/CodeGen/RISCV/imm.ll
    M llvm/test/CodeGen/RISCV/rv64-legal-i32/imm.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll

  Log Message:
  -----------
  [RISCV] Improve hasAllNBitUsers for users of SLLI.

We can increase the number of Bits passes to the users by adding
the shift amount.



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