[all-commits] [llvm/llvm-project] a3cf86: [AArch64] Cleanup existing values in getMemOpInfo ...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a3cf8642bf4d3cd4362063cc2a98ead4dca8cdec
      https://github.com/llvm/llvm-project/commit/a3cf8642bf4d3cd4362063cc2a98ead4dca8cdec
  Author: David Green <david.green at arm.com>
  Date:   2024-08-03 (Sat, 03 Aug 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.h
    A llvm/test/CodeGen/AArch64/sched-postidxalias.mir

  Log Message:
  -----------
  [AArch64] Cleanup existing values in getMemOpInfo (#98196)

This patch tries to clean up some of the existing values in
getMemOpInfo. All values should now be in bytes (not bits), and the
MinOffset/MaxOffset are now always represented unscaled (the immediate
that will be present in the final instruction).

Although I could not find a place where it altered codegen, the offset
of a post-index instruction will be 0, not scale*imm. A
IsPostIndexLdStOpcode method has been added to try and make sure that
case is handled properly.



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