[all-commits] [llvm/llvm-project] eca79c: [RISCV] Use zext.[b/h/w] instead of th.extu for bi...

[joshua-arch1 via All-commits]

  Branch: refs/heads/users/joshua/zext
  Home:   https://github.com/llvm/llvm-project
  Commit: eca79c3847f047fc6f911d42b188d0d9ac21f220
      https://github.com/llvm/llvm-project/commit/eca79c3847f047fc6f911d42b188d0d9ac21f220
  Author: Jun Sha (Joshua) <cooper.joshua at linux.alibaba.com>
  Date:   2024-08-02 (Fri, 02 Aug 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
    M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll

  Log Message:
  -----------
  [RISCV] Use zext.[b/h/w] instead of th.extu for bitfield extraction

We prefer not to do the extu optimization in https://github.com/llvm/
llvm-project/commit/10b7cd660c73f704ad8610828e80b33c241451df if we
can directly use one zext.b/zext.h/zext.w instruction with zba/zbb
extension, since we always give preference to standard extension
instead of vendor extension.



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