[all-commits] [llvm/llvm-project] 57d10b: [AMDGPU] Inplace FI elimination during PEI for sca...

[Pankaj Dwivedi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 57d10b4fc9142d12fbdec578a0cc6f78deb67ef4
      https://github.com/llvm/llvm-project/commit/57d10b4fc9142d12fbdec578a0cc6f78deb67ef4
  Author: Pankaj Dwivedi <divedi.pk.117 at gmail.com>
  Date:   2024-07-31 (Wed, 31 Jul 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    A llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
    M llvm/test/CodeGen/AMDGPU/frame-index.mir

  Log Message:
  -----------
  [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (#99556)

eliminateFrameIndex wasn't handling the FI copy to Scalar registers and
the default implementation breaks the code while trying to handle it.
This patch handles the broken lowering and also takes care of some edge
cases that might arise. This case is tricky for non-zero offset, scc &
vcc is live and we don't find sgpr pair available.
Co-authored by @arsenm

---------
Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
Co-authored-by: PankajDwivedi-25 <pankajkumar.divedi at amd.com>



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