[all-commits] [llvm/llvm-project] e6fa09: [SCCP] Add context to SimplifyQuery (#100831)
darkbuck via All-commits
all-commits at lists.llvm.org
Tue Jul 30 07:56:43 PDT 2024
Branch: refs/heads/users/darkbuck/spr/clang-allow-convergent-to-be-a-statement-attribute
Home: https://github.com/llvm/llvm-project
Commit: e6fa09f445f172bfd0c011adc6bf36e38816b781
https://github.com/llvm/llvm-project/commit/e6fa09f445f172bfd0c011adc6bf36e38816b781
Author: Thomas Hashem <35398565+hashemthomas1 at users.noreply.github.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
A llvm/test/Transforms/SCCP/float-denormal-simplification.ll
Log Message:
-----------
[SCCP] Add context to SimplifyQuery (#100831)
Commit: 4cdc19b84cf48189e40915178d60991f6fc469b2
https://github.com/llvm/llvm-project/commit/4cdc19b84cf48189e40915178d60991f6fc469b2
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Exceptions.h
M flang/include/flang/Runtime/exceptions.h
M flang/include/flang/Runtime/magic-numbers.h
M flang/lib/Evaluate/real.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Exceptions.cpp
M flang/lib/Optimizer/Builder/Runtime/Numeric.cpp
M flang/runtime/exceptions.cpp
M flang/test/Evaluate/fold-nearest.f90
A flang/test/Lower/Intrinsics/ieee_next.f90
M flang/test/Lower/Intrinsics/nearest.f90
M flang/unittests/Optimizer/Builder/Runtime/NumericTest.cpp
Log Message:
-----------
[flang] IEEE_NEXT_AFTER, IEEE_NEXT_DOWN, IEEE_NEXT_UP, NEAREST (#100782)
IEEE_ARITHMETIC intrinsic module procedures IEEE_NEXT_AFTER,
IEEE_NEXT_DOWN, and IEEE_NEXT_UP, and intrinsic NEAREST return larger or
smaller values adjacent to their primary REAL argument. The four
procedures vary in how the direction is chosen, in how special cases are
treated, and in what exceptions are generated. Implement the three
IEEE_ARITHMETIC procedures. Update the NEAREST implementation to support
all six REAL kinds 2,3,4,8,10,16, and fix several bugs.
IEEE_NEXT_AFTER(X,Y) returns a NaN when Y is a NaN as that seems to be
the universal choice of other compilers.
Change the front end compile time implementation of these procedures to
return normal (HUGE) values for infinities when applicable, rather than
always returning the input infinity.
Commit: f7e9d48a73dd68c8b652692d8a9e559a6ceb722e
https://github.com/llvm/llvm-project/commit/f7e9d48a73dd68c8b652692d8a9e559a6ceb722e
Author: Braden Helmer <bradenhelmeraus at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaOverload.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
Log Message:
-----------
[Clang] Fix confusing diagnositcs related to explicit this parameters (#100351)
Fixes #97878.
This PR improves diagnostics related to explicit 'this' parameters.
Previously, the 'this' parameter would be incorrectly underlined when
diagnosing a bad conversion.
Commit: ad778889cf5ce74be3193fae1d3b2bce34a56863
https://github.com/llvm/llvm-project/commit/ad778889cf5ce74be3193fae1d3b2bce34a56863
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
Log Message:
-----------
[DAG] Add SDPatternMatch for VScale nodes
Commit: d2304427cb0270259bc083a3db27413823f56e59
https://github.com/llvm/llvm-project/commit/d2304427cb0270259bc083a3db27413823f56e59
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG][NFC] Use SDPatternMatch for VScale in some instances
Commit: e1065370aaacb1b1cb48e77d37d376bf024f4a39
https://github.com/llvm/llvm-project/commit/e1065370aaacb1b1cb48e77d37d376bf024f4a39
Author: Luke Lau <luke at igalia.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfptoi-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/insertelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/unmasked-ta.ll
M llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll
M llvm/test/CodeGen/RISCV/rvv/vfmv.s.f.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
Log Message:
-----------
[RISCV] Remove vfmv.s.f and vfmv.f.s lmul pseudo variants (#100970)
In #71501 we removed the LMUL variants for vmv.s.x and vmv.x.s because
they ignore register groups, so this patch does the same for their
floating point equivalents.
We don't need to add any extra patterns for extractelt in
RISCVInstrInfoVSDPatterns.td because in lowerEXTRACT_VECTOR_ELT we make
sure that the node is narrowed down to LMUL 1.
Commit: 97c62b8f7501d1c6c2f507b075fbe45a31d2b9dc
https://github.com/llvm/llvm-project/commit/97c62b8f7501d1c6c2f507b075fbe45a31d2b9dc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/test/Driver/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
Log Message:
-----------
[LinkerWrapper] Forward `-mllvm` and `--offload-opt` arguments to device (#100424)
Summary:
Previously we could parse these internally as they would be used by the
embedded LTO job. Now, this LTO is passed to the linker utilities which
means these need to be forwarded. So this can now either be done with
`--offload-opt` which works in the clang job, or with `-Xoffload-linker`
manually.
Fixes https://github.com/llvm/llvm-project/issues/100212
Commit: 77ff969e5d6a561606ea87fbae101195417d4d73
https://github.com/llvm/llvm-project/commit/77ff969e5d6a561606ea87fbae101195417d4d73
Author: Jonathan Peyton <jonathan.l.peyton at intel.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M openmp/runtime/src/kmp_affinity.cpp
M openmp/runtime/src/kmp_affinity.h
Log Message:
-----------
[OpenMP] Add topology and affinity changes for Meteor Lake (#91012)
These are Intel-specific changes for the CPUID leaf 31 method for
detecting machine topology.
* Cleanup known levels usage in x2apicid topology algorithm
Change to be a constant mask of all Intel topology type values.
* Take unknown ids into account when sorting them
If a hardware id is unknown, then put further down the hardware thread
list so it will take last priority when assigning to threads.
* Have sub ids printed out for hardware thread dump
* Add caches to topology
New` kmp_cache_ids_t` class helps create cache ids which are then put
into the topology table after regular topology type ids have been put
in.
* Allow empty masks in place list creation
Have enumeration information and place list generation take into account
that certain hardware threads may be lacking certain layers
* Allow different procs to have different number of topology levels
Accommodates possible situation where CPUID.1F has different depth for
different hardware threads. Each hardware thread has a topology
description which is just a small set of its topology levels. These
descriptions are tracked to see if the topology is uniform or not.
* Change regular ids with logical ids
Instead of keeping the original sub ids that the x2apicid topology
detection algorithm gives, change each id to its logical id which is a
number: [0, num_items - 1]. This makes inserting new layers into the
topology significantly simpler.
* Insert caches into topology
This change takes into account that most topologies are uniform and
therefore can use the quicker method of inserting caches as equivalent
layers into the topology.
Commit: 916a91578f7b367c106859a0b46d8ce573bce36a
https://github.com/llvm/llvm-project/commit/916a91578f7b367c106859a0b46d8ce573bce36a
Author: Jonathan Peyton <jonathan.l.peyton at intel.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M openmp/runtime/src/kmp_affinity.cpp
Log Message:
-----------
[OpenMP] Assign thread ids in the cpuinfo topology method (#91013)
On non-hyperthreaded machines, the thread id is not always explicit in
the /proc/cpuinfo file. This patch adds a check to ensure the thread ids
are put in.
Commit: 3ef922081193ae1c46683f3ca282e700efc9005e
https://github.com/llvm/llvm-project/commit/3ef922081193ae1c46683f3ca282e700efc9005e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/arith-overflow.ll
Log Message:
-----------
[CostModel][X86] Add missing AVX512 vector mul overflow intrinsic costs
Fix regressions in #100519
Commit: 1b4be6a474b3747765a218201bd637f899fd9b66
https://github.com/llvm/llvm-project/commit/1b4be6a474b3747765a218201bd637f899fd9b66
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/test/CodeGen/ARM/vselect_imax.ll
Log Message:
-----------
[ARM] Regenerate vselect_imax.ll
Commit: 363c1e6e517281ad387fd91787545d632e7c48b6
https://github.com/llvm/llvm-project/commit/363c1e6e517281ad387fd91787545d632e7c48b6
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M offload/test/offloading/bug51781.c
Log Message:
-----------
[OpenMP] Re-enable test after correctly forwarding `mllvm`
Commit: 53c37f300dd1b450671f2aee4cc649c380adb5ad
https://github.com/llvm/llvm-project/commit/53c37f300dd1b450671f2aee4cc649c380adb5ad
Author: Stefan Pintilie <stefanp at ca.ibm.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
M llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll
M llvm/test/CodeGen/PowerPC/build-vector-tests.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-pwr9-64bit.ll
M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
M llvm/test/CodeGen/PowerPC/combine-fneg.ll
M llvm/test/CodeGen/PowerPC/constant-pool.ll
M llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll
M llvm/test/CodeGen/PowerPC/fma-combine.ll
M llvm/test/CodeGen/PowerPC/fp-strict-round.ll
M llvm/test/CodeGen/PowerPC/frem.ll
M llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
M llvm/test/CodeGen/PowerPC/ldexp.ll
M llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
M llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
M llvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll
M llvm/test/CodeGen/PowerPC/save-reg-params.ll
M llvm/test/CodeGen/PowerPC/select_const.ll
M llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
M llvm/test/CodeGen/PowerPC/subreg-lanemasks.mir
M llvm/test/CodeGen/PowerPC/toc-float.ll
M llvm/test/CodeGen/PowerPC/variable_elem_vec_extracts.ll
M llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/PowerPC/vector-llrint.ll
M llvm/test/CodeGen/PowerPC/vector-lrint.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll
M llvm/test/CodeGen/PowerPC/vsx.ll
Log Message:
-----------
[PowerPC] Add phony subregisters to cover the high half of the VSX registers. (#94628)
On PowerPC there are 128 bit VSX registers. These registers are half
overlapped with 64 bit floating point registers (FPR). The 64 bit half
of the VXS register that does not overlap with the FPR does not overlap
with any other register class. The FPR are the only subregisters of the
VSX registers but they do not fully cover the 128 bit super register.
This leads to incorrect lane masks being created.
This patch adds phony registers for the other half of the VSX registers
in order to fully cover them and to make sure that the lane masks are
not the same for the VSX and the floating point register.
Commit: 64199bf332567aeeff02841022d967325b318075
https://github.com/llvm/llvm-project/commit/64199bf332567aeeff02841022d967325b318075
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
Log Message:
-----------
[libc] make aarch64 libm entrypoints consistent w/ x86-64 (#100963)
Test passes locally.
Commit: 0a1ce1ae62f58eacf98b89487065fedccbc7cd68
https://github.com/llvm/llvm-project/commit/0a1ce1ae62f58eacf98b89487065fedccbc7cd68
Author: Kohei Yamaguchi <fix7211 at gmail.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/Ptr/IR/CMakeLists.txt
Log Message:
-----------
[mlir][doc] Fix docs for `PtrDialect` using the `-gen-dialect-doc`(NFC) (#101013)
Commit: 7647f88234cadf0aed019abb1fc723c6708b871c
https://github.com/llvm/llvm-project/commit/7647f88234cadf0aed019abb1fc723c6708b871c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/rv64zba.ll
Log Message:
-----------
[RISCV] Add isel special case for (and (srl X, c2), c1) -> (slli_uw (srli x, c2+c3), c3). (#100966)
Where c1 is a shifted mask with 32 set bits and c3 trailing zeros.
Fixes #100936.
Commit: 922558f47446fc732aa474f7bffc3190b4ffab43
https://github.com/llvm/llvm-project/commit/922558f47446fc732aa474f7bffc3190b4ffab43
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
Log Message:
-----------
[RISCV] Remove registers from ins of Priv instructions. (#100857)
The rd and rs1 encoding are already forced to 0s. We don't need
registers too.
Commit: 2c37334d8dce7ef7d3ecc8c80522fe73010b12cc
https://github.com/llvm/llvm-project/commit/2c37334d8dce7ef7d3ecc8c80522fe73010b12cc
Author: William Junda Huang <williamjhuang at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SSAUpdaterImpl.h
Log Message:
-----------
[Transforms] Speed up SSAUpdater::FindExistingPHI (#100281)
In SSAUpdater::FindExistingPHI, the cleanup function is inefficient for
large function with many blocks because it clears the Phi value
reference for every block if not matched for every phi value, even if
most blocks are not modified by CheckIfPHIMatches. This behavior is
particularly slow for large functions because the complexity is Θ(# PHI
* # BBs).
Updated the behavior to only clear modified blocks, which in practice
has a much less complexity because of early exit on PHI mismatch.
Commit: 7a2a36f952e5f1c0184e5de0bb8a32b5d2382427
https://github.com/llvm/llvm-project/commit/7a2a36f952e5f1c0184e5de0bb8a32b5d2382427
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.h
M llvm/lib/Target/ARM/ARMMCInstLower.cpp
M llvm/lib/Target/CSKY/CSKYAsmPrinter.cpp
M llvm/lib/Target/CSKY/CSKYAsmPrinter.h
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
Log Message:
-----------
[AsmPrinter] Don't EmitToStreamer instructions lowered by tblgenned code (#100803)
This allows lowering individual instructions in a bundle before a single
call to EmitToStreamer for VLIW targets.
Commit: 7b3db551e499a7ecef6a29c0ffbc923c45277332
https://github.com/llvm/llvm-project/commit/7b3db551e499a7ecef6a29c0ffbc923c45277332
Author: Jannick Kremer <51118500+DeinAlptraum at users.noreply.github.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/bindings/python/clang/cindex.py
Log Message:
-----------
[libclang/python] Export all enums (#100941)
This resolves #48212 and also adds the remaining unexposed Enums
Commit: b66310f938f36557f44042e300e5894e39297b2b
https://github.com/llvm/llvm-project/commit/b66310f938f36557f44042e300e5894e39297b2b
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV][TTI] Split costing of [u/s]int_to_fp from fp_to_[u/s]int [nfc] (#101029)
The amount of code sharing between them is fairly small, and the split
version is much easier to read.
Commit: ee57ce57d8094026e2795182758bc57027a72293
https://github.com/llvm/llvm-project/commit/ee57ce57d8094026e2795182758bc57027a72293
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaInit.cpp
M clang/test/SemaCXX/destructor.cpp
Log Message:
-----------
[Clang] prevent checking destructor reference with an invalid initializer (#97860)
Fixes #97230
Commit: 150bf637baad2ba4df6369600b65d897ed9b31a7
https://github.com/llvm/llvm-project/commit/150bf637baad2ba4df6369600b65d897ed9b31a7
Author: Pavel Skripkin <paskripkin at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/AST/attr-print-emit.cpp
M clang/test/Sema/attr-ownership.c
M clang/test/Sema/attr-ownership.cpp
Log Message:
-----------
[Clang][Sema] Disallow applying `onwership_returns` to functions that return non-pointers (#99564)
`onwership_returns` works only with pointers, since it models
user-defined memory allocation functions. Make semantics more clear and
report an error if attribute is attached to wrong function.
Closes #99501
Commit: e65882fec9689b2232575530bab0776d7c303dae
https://github.com/llvm/llvm-project/commit/e65882fec9689b2232575530bab0776d7c303dae
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
A llvm/test/Transforms/InstCombine/lib-call-exit.ll
Log Message:
-----------
[InstCombine][InferFunctionAttrs] Add tests for inferring `cold` on exit/abort; NFC
Commit: 67fb7c34f11df03ac359571dd4d503a36e06275e
https://github.com/llvm/llvm-project/commit/67fb7c34f11df03ac359571dd4d503a36e06275e
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/include/llvm/Transforms/Utils/SimplifyLibCalls.h
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
M llvm/test/Transforms/InstCombine/lib-call-exit.ll
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
Log Message:
-----------
[TLI] Add support for inferring attr `cold` on `exit`/`abort`
`abort` can be assumed always cold and assume non-zero `exit` status
as a `cold` path as well.
Closes #101003
Commit: 135a1e90a3066f61ca741e9ebebfec79c9595ea5
https://github.com/llvm/llvm-project/commit/135a1e90a3066f61ca741e9ebebfec79c9595ea5
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/docs/DirectX/DXILResources.rst
Log Message:
-----------
[DirectX] Update "dx.TypedBuffer" docs to include a "signed" bit (#100695)
To lower these types to dxil we need to know whether ints are signed or
not, but the LLVM type loses that. Add a bit to indicate it's so.
Commit: 0d9b4394081df959b3752283ed9ca303759dda61
https://github.com/llvm/llvm-project/commit/0d9b4394081df959b3752283ed9ca303759dda61
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMask.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
Log Message:
-----------
[mlir][vector] Use `DenseI64ArrayAttr` for constant_mask dim sizes (#100997)
This prevents a bunch of boilerplate conversions to/from IntegerAttrs
and int64_ts. Other than that this is a NFC.
Commit: 2c0ec01b516deba8922c1aae59b1907de6443587
https://github.com/llvm/llvm-project/commit/2c0ec01b516deba8922c1aae59b1907de6443587
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/test/Driver/amdgpu-toolchain.c
Log Message:
-----------
[AMDGPU] Correctly pass the target-id to `ld.lld` (#101037)
Summary:
The `ld.lld` linker handles LTO, but it does not understand the
target-id syntax some AMDGPU targets use. This patch parses the
target-id and passes the processor name in `-mcpu` and features in
`-mattr`.
Commit: 0dd1128d6341283d60150d294a9c4db1ba38f8b2
https://github.com/llvm/llvm-project/commit/0dd1128d6341283d60150d294a9c4db1ba38f8b2
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
Log Message:
-----------
[DAG] Add SDPatternMatch::m_VSelect (#100758)
As per the comment in
https://github.com/llvm/llvm-project/pull/100686#pullrequestreview-2201991135
Commit: 197f4a90519df308d9bfddcc931f7683a5ae9cb9
https://github.com/llvm/llvm-project/commit/197f4a90519df308d9bfddcc931f7683a5ae9cb9
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/external-used-across-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-extractelements-different-bbs.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-gather-non-scheduled-extracts.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
Log Message:
-----------
[SLP]Remove ExtraArgs from reductions.
No need to handle extra arguments during the reductions anymore, the
compiler now can handle all reduced values and reduction operands
correctly, even if they are from different basic blocks.
Simplifies analysis, reduces compiler size, improves overall
vectorization.
Metric: size..text
test-suite :: SingleSource/Benchmarks/Misc-C++/stepanov_container.test 16668.00 17148.00 2.9%
test-suite :: External/SPEC/CINT2006/483.xalancbmk/483.xalancbmk.test 2389675.00 2418683.00 1.2%
test-suite :: MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000.test 253517.00 253645.00 0.1%
test-suite :: MultiSource/Benchmarks/Bullet/bullet.test 309678.00 309806.00 0.0%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 389203.00 389363.00 0.0%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-jpeg/consumer-jpeg.test 111120.00 111152.00 0.0%
test-suite :: MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4.test 1039103.00 1039215.00 0.0%
test-suite :: External/SPEC/CFP2017rate/511.povray_r/511.povray_r.test 1155883.00 1155963.00 0.0%
test-suite :: MicroBenchmarks/LoopVectorization/LoopInterleavingBenchmarks.test 276646.00 276662.00 0.0%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 848691.00 848739.00 0.0%
test-suite :: External/SPEC/CFP2006/453.povray/453.povray.test 1138604.00 1138636.00 0.0%
test-suite :: External/SPEC/CINT2006/445.gobmk/445.gobmk.test 910201.00 910217.00 0.0%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 12385484.00 12385628.00 0.0%
test-suite :: External/SPEC/CINT2017speed/602.gcc_s/602.gcc_s.test 9667580.00 9667676.00 0.0%
test-suite :: External/SPEC/CINT2017rate/502.gcc_r/502.gcc_r.test 9667580.00 9667676.00 0.0%
test-suite :: External/SPEC/CINT2017rate/523.xalancbmk_r/523.xalancbmk_r.test 2856182.00 2856198.00 0.0%
test-suite :: External/SPEC/CINT2017speed/623.xalancbmk_s/623.xalancbmk_s.test 2856182.00 2856198.00 0.0%
test-suite :: External/SPEC/CINT2006/464.h264ref/464.h264ref.test 773224.00 773192.00 -0.0%
test-suite :: MultiSource/Benchmarks/7zip/7zip-benchmark.test 1035148.00 1035084.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/631.deepsjeng_s/631.deepsjeng_s.test 98126.00 98094.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/531.deepsjeng_r/531.deepsjeng_r.test 97966.00 97934.00 -0.0%
test-suite :: MultiSource/Benchmarks/MallocBench/gs/gs.test 167391.00 167215.00 -0.1%
test-suite :: MultiSource/Applications/ALAC/encode/alacconvert-encode.test 56685.00 56605.00 -0.1%
test-suite :: MultiSource/Applications/ALAC/decode/alacconvert-decode.test 56685.00 56605.00 -0.1%
test-suite :: SingleSource/Regression/C/gcc-c-torture/execute/GCC-C-execute-20050826-2.test 1302.00 1294.00 -0.6%
Misc-C++/stepanov_container - better code due to cost fixes.
483.xalancbmk - better code due to cost fixes.
ASCI_Purple/SMG2000 - better code due to cost fixes.
Benchmarks/Bullet - better vector code because of the cost.
JM/ldecod - extra code remain scalar, extra reduction vectorized
consumer-jpeg - extra code remain scalar because of the cost.
tramp3d-v4 - better vectorization because of cost fixes.
511.povray_r - better vectorization because of cost fixes.
LoopInterleavingBenchmarks - extra reductions are vectorized
JM/lencod - small changes in vector code because of extract cost fixes.
453.povray - small changes in vector code because of extract cost fixes.
445.gobmk - extra small reduction vectorized
526.blender_r - extra reduced scalars, better small reduction, small
changes in the vetorization because of the fixes for extracts cost
602.gcc_s
502.gcc_r - small changes in reductions vectorization because of the
fixes in the extract cost.
631.deepsjeng_s
623.xalancbmk_s - small changes in reductions vectorization because of
the fixes in the extract cost.
MallocBench/gs - extra code remain scalar because of extracts cost
alacconvert-encode - extra code remain scalar because of extracts cost
alacconvert-decode - extra code remain scalar because of extracts cost
GCC-C-execute-20050826-2 - extra reduction gets vectorized
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/99923
Commit: 945dd9a740958e3c1230f3661edec53a5d858675
https://github.com/llvm/llvm-project/commit/945dd9a740958e3c1230f3661edec53a5d858675
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/Loads.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[NFC][Load] Find better place for `mustSuppressSpeculation` (#100794)
And extract `suppressSpeculativeLoadForSanitizers`.
For #100639.
Commit: 07f3a08c614afe32b845aa44db5a6a0e44ce24a7
https://github.com/llvm/llvm-project/commit/07f3a08c614afe32b845aa44db5a6a0e44ce24a7
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/Loads.h
M polly/lib/Analysis/ScopBuilder.cpp
M polly/lib/Analysis/ScopDetection.cpp
Log Message:
-----------
[NFC][Load] Make `ScanFrom` required parameters (#100789)
In #100773 we will go conservative for sanitizers,
so it's better to pinpoint location consciously.
For #100639.
Commit: d6081bff5b49c5f6560bdffd3692b8f1247c4843
https://github.com/llvm/llvm-project/commit/d6081bff5b49c5f6560bdffd3692b8f1247c4843
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/cast.ll
Log Message:
-----------
[RISCV][CostModel] Add coverage for non-power-of-2 vector sizes
Commit: 2f3ae2f625588ea5eb1393db10b83e9e18380770
https://github.com/llvm/llvm-project/commit/2f3ae2f625588ea5eb1393db10b83e9e18380770
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/load.ll
M llvm/test/Transforms/InstCombine/multiple-uses-load-bitcast-select.ll
M llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll
A llvm/test/Transforms/InstCombine/select-load.ll
M llvm/test/Transforms/InstCombine/strnlen-2.ll
M llvm/test/Transforms/SROA/phi-and-select.ll
M llvm/test/Transforms/SROA/phi-with-duplicate-pred.ll
M llvm/test/Transforms/SROA/select-load.ll
Log Message:
-----------
[NFC][InstCombine][SROA][Asan] Precommit tests affected by #100773 (#100844)
Some optimization need to be undone with
sanitizers by #100773.
For #100639.
Commit: c66d25d1429fbf49c97ee9cd0195246642178cb7
https://github.com/llvm/llvm-project/commit/c66d25d1429fbf49c97ee9cd0195246642178cb7
Author: Egor Zhdan <e_zhdan at apple.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/lib/Sema/SemaAPINotes.cpp
M clang/test/APINotes/Inputs/Headers/Methods.h
Log Message:
-----------
[APINotes] Do not crash for C++ operators
This fixes a crash during `CXXMethod->getName()` in
`Sema::ProcessAPINotes`: we were trying to get the name of a C++ method
as a string, which fails with an assertion if the name is not a simple
identifier.
Commit: 708a9a06cba66bc8f739b05646e7d3be9247feee
https://github.com/llvm/llvm-project/commit/708a9a06cba66bc8f739b05646e7d3be9247feee
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Parse/Parser.h
M clang/lib/Lex/PPCaching.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseExprCXX.cpp
A clang/test/CXX/dcl.decl/dcl.meaning/dcl.mptr/p2.cpp
M clang/test/CXX/temp/temp.res/p3.cpp
Log Message:
-----------
[Clang][Parse] Fix ambiguity with nested-name-specifiers that may declarative (#96364)
Consider the following:
```
template<typename T>
struct A { };
template<typename T>
int A<T>::B::* f(); // error: no member named 'B' in 'A<T>'
```
Although this is clearly valid, clang rejects it because the
_nested-name-specifier_ `A<T>::` is parsed as-if it was declarative,
meaning, we parse it as-if it was the _nested-name-specifier_ in a
redeclaration/specialization. However, we don't (and can't) know whether
the _nested-name-specifier_ is declarative until we see the '`*`' token,
but at that point we have already complained that `A` has no member
named `B`! This patch addresses this bug by adding support for _fully_
unannotated _and_ unbounded tentative parsing, which allows for us to
parse past tokens without having to cache them until we reach a point
where we can guarantee to be past the construct we are disambiguating.
I don't know where the approach taken here is ideal -- alternatives are
welcome. However, the performance impact (as measured by
llvm-compile-time-tracker (https://llvm-compile-time-tracker.com/?config=Overview&stat=instructions%3Au&remote=sdkrystian)
is quite minimal (0.09%, which I plan to further improve).
Commit: f9e7cba122c2b636ddb975791aadf33c69f3f056
https://github.com/llvm/llvm-project/commit/f9e7cba122c2b636ddb975791aadf33c69f3f056
Author: Nathan James <n.james93 at hotmail.co.uk>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
Log Message:
-----------
Fix hasName matcher assertion with inline namespaces (#100975)
Fix handling of nodes which can be skipped in the fast path for the
hasName matcher
Fixes #100973
Commit: 6dba99e14f7e508a5028036b753fa7f84e846307
https://github.com/llvm/llvm-project/commit/6dba99e14f7e508a5028036b753fa7f84e846307
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Analysis/Loads.cpp
M llvm/test/Transforms/InstCombine/load.ll
M llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll
M llvm/test/Transforms/InstCombine/select-load.ll
M llvm/test/Transforms/InstCombine/strnlen-2.ll
M llvm/test/Transforms/SROA/phi-and-select.ll
M llvm/test/Transforms/SROA/phi-with-duplicate-pred.ll
M llvm/test/Transforms/SROA/select-load.ll
Log Message:
-----------
[InstCombine][asan] Don't speculate loads before `select ptr` (#100773)
Even if memory is valid from `llvm` point of view,
e.g. local alloca, sanitizers have API for user
specific memory annotations.
These annotations can be used to track size of the
local object, e.g. inline vectors may prevent
accesses beyond the current vector size.
So valid programs should not access those parts of
alloca before checking preconditions.
Fixes #100639.
Commit: 2c376fe96c83443c15e6485d043ebe321904546b
https://github.com/llvm/llvm-project/commit/2c376fe96c83443c15e6485d043ebe321904546b
Author: Dimitry Andric <dimitry at andric.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M compiler-rt/lib/profile/InstrProfiling.h
Log Message:
-----------
[InstrProf] Remove duplicate definition of IntPtrT
In 16e74fd48988a (for #82711) a duplicate definition of `IntPtrT` was
added to `InstrProfiling.h`, leading to warnings:
compiler-rt/lib/profile/InstrProfiling.h:52:15: warning: redefinition of typedef 'IntPtrT' is a C11 feature [-Wtypedef-redefinition]
52 | typedef void *IntPtrT;
| ^
compiler-rt/lib/profile/InstrProfiling.h:34:15: note: previous definition is here
34 | typedef void *IntPtrT;
| ^
Fix the warnings by removing the duplicate typedef.
Commit: fb7028237bac1dccd328b6c3150e50e222a0879b
https://github.com/llvm/llvm-project/commit/fb7028237bac1dccd328b6c3150e50e222a0879b
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/MC/MCFragment.h
M llvm/lib/MC/MCFragment.cpp
Log Message:
-----------
[MC] Move some bool members to MCFragment. NFC
Move `AllowAutoPadding` to MCFragment, which reduce the
MCRelaxableFragment size by 8 bytes. While here, also move
`AlignToBundleEnd` next to `HasInstructions`. Functions that create
fragments are slightly shorter due to fewer byte zeroing instructions.
Although fewer in number than MCDataFragments, MCRelaxableFragment
objects still constitute a significant proportion warranting
optimization.
```
% clang -c sqlite3.i -w -g -Xclang -print-stats
...
2206 assembler - Number of emitted assembler fragments - align
83980 assembler - Number of emitted assembler fragments - data
84 assembler - Number of emitted assembler fragments - fill
169462 assembler - Number of emitted assembler fragments - total
11396 assembler - Number of emitted assembler fragments - relaxable
```
Pull Request: https://github.com/llvm/llvm-project/pull/100976
Commit: b3b390b98e90d94d178fb74c15bce92a34c53b10
https://github.com/llvm/llvm-project/commit/b3b390b98e90d94d178fb74c15bce92a34c53b10
Author: Julius Alexandre <juliuswoosebert at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR][NFC] Fixes for LoadInst::create functions (#100955)
This patch updates `LoadInst::create()` functions. The end result is four `LoadInst::create()` functions in total, two of which with an `IsVolatile` argument and two without.
Commit: 7b99b1d4f733ed5e1b206f0b392b0864e7a0d468
https://github.com/llvm/llvm-project/commit/7b99b1d4f733ed5e1b206f0b392b0864e7a0d468
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/test/CodeGen/AArch64/exp10-libcall-names.ll
M llvm/test/CodeGen/X86/exp10-libcall-names.ll
Log Message:
-----------
[Darwin] Fix availability of exp10 for BridgeOS, DriverKit. (#100894)
Same as https://github.com/llvm/llvm-project/pull/98542, but also mark
exp10 available on BridgeOS and DriverKit.
Note that BridgeOS currently is not included by isOSDarwin, but it
probably should.
PR: https://github.com/llvm/llvm-project/pull/100894
Commit: 2a612a1b343dcc0d3dd44df4866f6c6af5cc090f
https://github.com/llvm/llvm-project/commit/2a612a1b343dcc0d3dd44df4866f6c6af5cc090f
Author: Matthew Weingarten <matt at weingarten.org>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M compiler-rt/lib/memprof/memprof_mapping.h
Log Message:
-----------
[Memprof] Changes `HISTOGRAM_GRANULARITY` from 8U to 8ULL. (#100949)
This changes a bug in memprofiling with histogram where the shadow mask
would be `0xFFFFFFF8` instead of `0xFFFFFFFFFFFFFFF8`, essentially
discarding the upper 32 bits of the address. This can cause different
addresses to be mapped to the same shadow address.
Commit: 26e455bac0c44d75cb5d544c35e7c8326c91b4f3
https://github.com/llvm/llvm-project/commit/26e455bac0c44d75cb5d544c35e7c8326c91b4f3
Author: macurtis-amd <macurtis at amd.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/lib/LTO/LTOBackend.cpp
A llvm/test/LTO/X86/print-pipeline-passes.ll
M llvm/tools/llc/NewPMDriver.cpp
M llvm/tools/opt/NewPMDriver.cpp
Log Message:
-----------
[lld][LTO] Teach LTO to print pipeline passes (#101018)
I found this useful while debugging code generation differences between
old and new offloading drivers.
No functional change (intended).
Commit: 62bd08acedc88d8976a017f7f6818f3167dfa697
https://github.com/llvm/llvm-project/commit/62bd08acedc88d8976a017f7f6818f3167dfa697
Author: Dimitry Andric <dimitry at andric.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
Log Message:
-----------
[compiler-rt] Fix format string warnings in FreeBSD DumpAllRegisters (#101072)
On FreeBSD amd64 (aka x86_64), registers are always defined as
`int64_t`, which in turn is equivalent to `long`. This leads to a number
of warnings in `DumpAllRegisters()`:
compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp:2245:31: warning:
format specifies type 'unsigned long long' but the argument has type
'__register_t' (aka 'long') [-Wformat]
2245 | Printf("rax = 0x%016llx ", ucontext->uc_mcontext.mc_rax);
| ~~~~~~~ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
| %016lx
compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp:2246:31: warning:
format specifies type 'unsigned long long' but the argument has type
'__register_t' (aka 'long') [-Wformat]
2246 | Printf("rbx = 0x%016llx ", ucontext->uc_mcontext.mc_rbx);
| ~~~~~~~ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
| %016lx
... more of these ...
Fix it by using the `lx` format.
Commit: cfb92be0a9cdd0f4595100c5add4e2795a44134e
https://github.com/llvm/llvm-project/commit/cfb92be0a9cdd0f4595100c5add4e2795a44134e
Author: vporpo <vporpodas at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/include/llvm/SandboxIR/Use.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxIR] Implement CallBrInst (#100823)
This patch implements sandboxir::CallBrInst which mirrors
llvm::CallBrInst.
LLVM IR does not expose the Uses to DefaultDest and IndirectDest so we
need special Tracker objects for both of setters.
Commit: 842a332f11f53c698fa0560505e533ecdca28876
https://github.com/llvm/llvm-project/commit/842a332f11f53c698fa0560505e533ecdca28876
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
Log Message:
-----------
[NVPTX] Fix DwarfFrameBase construction (#101000)
The `{0}` here was initializing the first union member `Register`,
rather than the union member used by CFA, which is `Offset`. Prior to
https://github.com/llvm/llvm-project/pull/99263 this was harmless, but
now they have different layout, leading to test failures on some
platforms (at least i686 and s390x).
Commit: 38e671ab5221ec3d355fe4e3f70fdcd6f4809532
https://github.com/llvm/llvm-project/commit/38e671ab5221ec3d355fe4e3f70fdcd6f4809532
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/lib/Analysis/DXILResource.cpp
Log Message:
-----------
[DXIL][Analysis] Use setters for dxil::ResourceInfo initialization. NFC
This simplifies making sure we set all of the members of the unions
and adds asserts to help catch if we do something wrong.
Pull Request: https://github.com/llvm/llvm-project/pull/100696
Commit: a94edb6b8e321a46fe429934236aaa4e2e9fb97f
https://github.com/llvm/llvm-project/commit/a94edb6b8e321a46fe429934236aaa4e2e9fb97f
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/lib/Analysis/DXILResource.cpp
M llvm/unittests/Analysis/DXILResourceTest.cpp
Log Message:
-----------
[DXIL][Analysis] Make alignment on StructuredBuffer optional
HLSL allows StructuredBuffer<> to be defined with scalar or
up-to-4-element vectors as well as with structs, but when doing so
`dxc` doesn't set the alignment. Emulate this.
Pull Request: https://github.com/llvm/llvm-project/pull/100697
Commit: c22171f12fa9f260e2525cf61b93c136889e17f2
https://github.com/llvm/llvm-project/commit/c22171f12fa9f260e2525cf61b93c136889e17f2
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/lib/Analysis/DXILResource.cpp
M llvm/unittests/Analysis/DXILResourceTest.cpp
Log Message:
-----------
Revert "[DXIL][Analysis] Make alignment on StructuredBuffer optional" (#101088)
Seeing build failures, reverting to investigate.
Reverts llvm/llvm-project#100697
Commit: bb4aeb66ab4f39901ef6c1d01baf8b82b81cecfb
https://github.com/llvm/llvm-project/commit/bb4aeb66ab4f39901ef6c1d01baf8b82b81cecfb
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
Log Message:
-----------
[SPIRV] Don't specialize MachineModuleInfo to access the LLVMContext. NFC (#101085)
The MachineModuleInfo reference was removed from the MachineFunction in
#100357, which broke this code. Instead of finding another way to get at
the MMI, just avoid using it - we can get at the LLVMContext from the
MachineFunction itself.
Commit: c99bd3ceffc81be0209324e6c4fceeffa9107e4d
https://github.com/llvm/llvm-project/commit/c99bd3ceffc81be0209324e6c4fceeffa9107e4d
Author: Mircea Trofin <mtrofin at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionImport.cpp
A llvm/test/ThinLTO/X86/ctxprof.ll
Log Message:
-----------
[ctx_prof] Extend `WorkloadImportsManager` to use the contextual profile (#98682)
Keeping the json-based input as it's useful for diagnostics or for driving the import by other means than contextual composition.
The support for the contextual profile is just another modality for constructing the import list (`WorkloadImportsManager::Workloads`).
Everything else - i.e. the actual importing logic - is already independent from how that list was obtained.
Commit: 2c3eb8db057b9d58acd4735999f0f5d5d8d55b0d
https://github.com/llvm/llvm-project/commit/2c3eb8db057b9d58acd4735999f0f5d5d8d55b0d
Author: Daniel Martinez <danielpedromartinez at duck.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M compiler-rt/lib/nsan/nsan_interceptors.cpp
Log Message:
-----------
[nsan] Remove mallopt from nsan_interceptors (#101055)
Fixes a build failure on 19.1.0-rc1 when building on linux with musl as
the libc
musl does not provide mallopt, whereas glibc does. mallopt has
portability issues with other libc implementations. Just remove the use.
Co-authored-by: Daniel Martinez <danielmartinez at cock.li>
Commit: f9765a28a14c48bd900bbea4d0502c9f446d6392
https://github.com/llvm/llvm-project/commit/f9765a28a14c48bd900bbea4d0502c9f446d6392
Author: vporpo <vporpodas at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Implement GetElementPtrInst (#101078)
This patch implements sandboxir::GetElementPtrInst which mirrors
llvm::GetElementPtrInst.
Commit: 17993eb162c513fd03753237c5c8229fd629148b
https://github.com/llvm/llvm-project/commit/17993eb162c513fd03753237c5c8229fd629148b
Author: Matthew Weingarten <matt at weingarten.org>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
A llvm/test/Instrumentation/HeapProfiler/basic-histogram.ll
Log Message:
-----------
[Memprof] Adds instrumentation support for memprof with histograms. (#100834)
This patch allows running `-fmemory-profile` without the flag
`-memprof-use-callbacks`, meaning the `RecordAccessesHistogram` is
injected into IR as a sequence of instructions. This significantly
increases performance of the instrumented binary.
Commit: 460a86d8c7b5cd279c437c7e8f611f66a64bda08
https://github.com/llvm/llvm-project/commit/460a86d8c7b5cd279c437c7e8f611f66a64bda08
Author: Thurston Dang <thurston at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst_lane.ll
Log Message:
-----------
[msan] Precommit tests for Arm NEON VST with lanes (#100645)
MSan does not yet correctly instrument the st{2,3,4}lane intrinsics but
the test should still pass.
st1lane does not map to an Arm NEON instruction and is already correctly
instrumented.
Commit: 76605f5718e07bc0e551620a39a0853cb6fc81f5
https://github.com/llvm/llvm-project/commit/76605f5718e07bc0e551620a39a0853cb6fc81f5
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/linker-wrapper.c
M clang/test/Driver/openmp-offload-gpu.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
Log Message:
-----------
[LinkerWrapper] Make `-Xoffload-linker` match `-Xlinker` semantics (#101032)
Summary:
`-Xlinker` is supposed to pass options to the linker, while
`-Xoffload-linker` instead passes it to the `clang` job. This is
unintuitive and results in unnecessarily complex command lines. Because
passing it to the clang job is still useful, I've added
`-device-compiler`. This changes the behavior of the flag, but I think
it should be fine in this case since it's likely rarely used and has a
direct replacement.
---------
Co-authored-by: Joel E. Denny <jdenny.ornl at gmail.com>
Commit: 42326c7170283efce84b4c29b3bc25836ed88301
https://github.com/llvm/llvm-project/commit/42326c7170283efce84b4c29b3bc25836ed88301
Author: Julius Alexandre <juliuswoosebert at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Added new StoreInst::create() functions with isVolatile arg (#100961)
This patch implements new create() functions with an `IsVolatile` argument for sandboxir::StoreInst.
Commit: 03e1eb29e7169ddb0804b1d0b9d71d6d2aaf531d
https://github.com/llvm/llvm-project/commit/03e1eb29e7169ddb0804b1d0b9d71d6d2aaf531d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/trunc-select-to-max-usat.ll
Log Message:
-----------
[RISCV] Replace hasStdExtV with hasVInstructions.
This prevents excluding Zve*
Commit: 3de76e4f57bdba612ddca7ac53b2f5787929391a
https://github.com/llvm/llvm-project/commit/3de76e4f57bdba612ddca7ac53b2f5787929391a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/pr94265.ll
Log Message:
-----------
[RISCV] Replace hasStdExtV with hasVInstructions in isTruncateFree.
This prevents excluding the embedded vector extensions Zve*.
Commit: ee6d932b4f258ae36c5f75ae1ab52656dde49c83
https://github.com/llvm/llvm-project/commit/ee6d932b4f258ae36c5f75ae1ab52656dde49c83
Author: Michael Jones <michaelrj at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/unistd/BUILD.bazel
Log Message:
-----------
[libc][bazel] Remove tid tests from bazel (#101109)
In patch https://github.com/llvm/llvm-project/pull/100915 the tid code
was reverted. The bazel build wasn't updated, leaving some broken
targets. This patch fixes those.
Commit: 3a9ef4e69a3fec3203bd3e1caa53edf4b76843cf
https://github.com/llvm/llvm-project/commit/3a9ef4e69a3fec3203bd3e1caa53edf4b76843cf
Author: Wei Wang <apollo.mobility at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
A clang/test/CodeGenCoroutines/coro-elide-thinlto.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
Log Message:
-----------
[Pipelines] Do not run CoroSplit and CoroCleanup in LTO pre-link pipeline (#100205)
This is re-land of #90310 after making asan skip pre-split coroutines in
#99415.
Skip CoroSplit and CoroCleanup in LTO pre-link pipeline so that
CoroElide can happen after callee coroutine is imported into caller's
module in ThinLTO.
Commit: 73c961a3345c697f40e2148318f34f5f347701c1
https://github.com/llvm/llvm-project/commit/73c961a3345c697f40e2148318f34f5f347701c1
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Fix misannotations of `<` in ternary expressions (#100980)
Fixes #100300.
Commit: 40b4fd7a3e81d32b29364a1b15337bcf817659c0
https://github.com/llvm/llvm-project/commit/40b4fd7a3e81d32b29364a1b15337bcf817659c0
Author: Chen Zheng <czhengsz at cn.ibm.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
Log Message:
-----------
[NFC] fix build failure (#100993)
Fix the build failure caused by
https://github.com/llvm/llvm-project/pull/94944
Fixes https://github.com/llvm/llvm-project/issues/100296
Commit: c9cc6c4772df6fc6f30d1e6831b83fe4db5f2044
https://github.com/llvm/llvm-project/commit/c9cc6c4772df6fc6f30d1e6831b83fe4db5f2044
Author: Jannick Kremer <51118500+DeinAlptraum at users.noreply.github.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
Log Message:
-----------
[Clang][Sema][NFC] Remove duplicate check in if-condition (#101070)
Resolves #101041
Commit: 9b14831a4ade78d06754f2112aead3b99f73a98a
https://github.com/llvm/llvm-project/commit/9b14831a4ade78d06754f2112aead3b99f73a98a
Author: Julius Alexandre <juliuswoosebert at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR][NFC] Removed comments from LoadInst test case (#101099)
Commit: 6d02f62e4af90295a6e0386e3e96afe518777c17
https://github.com/llvm/llvm-project/commit/6d02f62e4af90295a6e0386e3e96afe518777c17
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorization-with-patterns.mlir
Log Message:
-----------
[mlir][linalg] Add vectorization support for minnumf/maxnumf reductions. (#101092)
This is a follow-up for
https://discourse.llvm.org/t/rfc-fix-floating-point-max-and-min-operations-in-mlir/72671
The ops were splitted to two version, and the vectorization support for
one of them is missing.
The revision also renames the existing lit tests accordingly, which
explicitly puts `maximumf/minimumf` to the function names.
Commit: 677796cab327409012bab0e374e743602435edaf
https://github.com/llvm/llvm-project/commit/677796cab327409012bab0e374e743602435edaf
Author: jameshu15869 <55058507+jameshu15869 at users.noreply.github.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M libc/benchmarks/gpu/CMakeLists.txt
M libc/benchmarks/gpu/LibcGpuBenchmark.cpp
M libc/benchmarks/gpu/LibcGpuBenchmark.h
M libc/benchmarks/gpu/src/CMakeLists.txt
A libc/benchmarks/gpu/src/math/CMakeLists.txt
A libc/benchmarks/gpu/src/math/sin_benchmark.cpp
M libc/benchmarks/gpu/timing/amdgpu/timing.h
M libc/benchmarks/gpu/timing/nvptx/timing.h
Log Message:
-----------
[libc] Add Generic and NVPTX Sin Benchmark (#99795)
This PR adds sin benchmarking for a range of values and on a
pregenerated random distribution.
Commit: 7cf67d499287b22c6e2aa118009ed06eaef5e5d6
https://github.com/llvm/llvm-project/commit/7cf67d499287b22c6e2aa118009ed06eaef5e5d6
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/lib/Sema/SemaStmtAttr.cpp
Log Message:
-----------
[clang][Sema] Remove dead code. NFC
Commit: 6bd5fd35063cd14b0a56bc6f7fb1e7b6e1ac56d5
https://github.com/llvm/llvm-project/commit/6bd5fd35063cd14b0a56bc6f7fb1e7b6e1ac56d5
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/CMakeLists.txt
R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/CMakeLists.txt
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
Log Message:
-----------
[lldb] Reland 2402b3213c2f with `-H -MM` to debug the windows build issue
This patch relands 2402b3213c2f to investigate the ambigious typedef
issue happening on the windows bots:
https://lab.llvm.org/buildbot/#/builders/141/builds/1175/
However this patch adds the `-H` & `-MM` compiler flags when building
the ScriptedProcessPythonInterface library to be able to investigate the
include order issue.
This patch will be revert after 1 failing run on the windows bot.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: bbde3f6e9df018975bc84fa23ba510360b6d715c
https://github.com/llvm/llvm-project/commit/bbde3f6e9df018975bc84fa23ba510360b6d715c
Author: Thurston Dang <thurston at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst_float.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst_origins.ll
Log Message:
-----------
[msan] Support vst1x_{2,3,4} and vst_{2,3,4} with floating-point parameters (#100644)
Cloning the vst_ intrinsics to apply them to the shadows did not work if
the arguments were floating-point, since the shadows are integers. This
patch changes MSan to create an intrinsic of the correct integer types.
Additionally, this patch adds support for vst1x_{2,3,4}; these can be
handled similarly to vst_{2,3,4}, since in all cases we are adapting the
corresponding intrinsic.
This also updates the tests.
Commit: 8425aa24d802c73e24368a81a4a96afc158497aa
https://github.com/llvm/llvm-project/commit/8425aa24d802c73e24368a81a4a96afc158497aa
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/CMakeLists.txt
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.h
R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/CMakeLists.txt
R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.cpp
R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
Log Message:
-----------
Revert "[lldb] Reland 2402b3213c2f with `-H -MM` to debug the windows build issue"
This reverts commit 6bd5fd35063cd14b0a56bc6f7fb1e7b6e1ac56d5.
Commit: e90c21831f375d0469b4213ab71cc7de0cd5ab20
https://github.com/llvm/llvm-project/commit/e90c21831f375d0469b4213ab71cc7de0cd5ab20
Author: Luke Lau <luke at igalia.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
Log Message:
-----------
[RISCV] Use APInt in isSimpleVIDSequence to account for index overflow (#100072)
At zvl1024b, we may have legal fixed length vectors where a vid.v would
overflow at i8, e.g. <512 x i8>.
When lowering constant build_vectors, isSimpleVIDSequence used uint64_t
to model the vid.v sequence which meant it didn't account for the fact
that it could overflow in these larger types.
This patch fixes it by modelling the sequence with an SEW-wide APInt so
if it does overflow the loop that checks/calculates the addend will
detect it and bail.
Fixes #99729
Commit: 4ed66cb4e14303435d0df30f428d0758fe880b57
https://github.com/llvm/llvm-project/commit/4ed66cb4e14303435d0df30f428d0758fe880b57
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AMDGPU/fma.ll
M llvm/test/Analysis/CostModel/AMDGPU/fmuladd.ll
Log Message:
-----------
AMDGPU: Improve cost handling of fma/fmuladd (#100798)
We were overcounting the cost of fast f32 FMA. Also address todo
and handle fmuladd (which I'm just assuming lowers to FMA, the slow FMA
expansion is about as fast on slow targets anyway).
Commit: 524795926be00ac4ce5ca1c0db6f81d8bb18e609
https://github.com/llvm/llvm-project/commit/524795926be00ac4ce5ca1c0db6f81d8bb18e609
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AMDGPU/copysign.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
Log Message:
-----------
AMDGPU: Enable vectorization of v2f16 copysign (#100799)
Commit: ad8026587464f29e53c673e892d646a4b94f138b
https://github.com/llvm/llvm-project/commit/ad8026587464f29e53c673e892d646a4b94f138b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV] Qualify all XCV predicates with !is64Bit. (#101074)
The tablegen patterns all have isRV32. I did not check if any of them
could naively support RV64.
Fixes #101067 and probably other bugs like it we haven't found yet.
Commit: 43de4e03a3ebd2ce1a035fdd6cfa4b107817fe99
https://github.com/llvm/llvm-project/commit/43de4e03a3ebd2ce1a035fdd6cfa4b107817fe99
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[RISCV] Rename hasVInstructionsBF16 to hasVInstructionsBF16Minimal. NFC (#101080)
This makes it more consistent with Zvfhmin since it is not a complete
bf16 implementation.
Commit: 3fcc4f28ed808d72cb3c6bc45f9bca891ae5ca48
https://github.com/llvm/llvm-project/commit/3fcc4f28ed808d72cb3c6bc45f9bca891ae5ca48
Author: Yeting Kuo <46629943+yetingk at users.noreply.github.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M clang/lib/CodeGen/CGStmt.cpp
A clang/test/CodeGen/inline-asm-size-zero.c
Log Message:
-----------
[clang][CodeGen] Don't crash on output whose size is zero. (#99849)
This fixes issue #63878 caused by creating an integer with zero
bitwidth.
Commit: 28f9575b41ce5a184baeaab95f5db74fb3ad176f
https://github.com/llvm/llvm-project/commit/28f9575b41ce5a184baeaab95f5db74fb3ad176f
Author: Dmitry Chestnykh <dm.chestnykh at gmail.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/dump_registers_aarch64.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/dump_registers_arm.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/dump_registers_i386.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/dump_registers_x86_64.cpp
Log Message:
-----------
[compiler-rt] Require glibc for DumpAllRegisters on Linux (#101131)
For example musl doesn't provide REG_R* definitions for ARM
#100398
Commit: 3e2631c9c62990467eca3e173f714367d7e7c0dd
https://github.com/llvm/llvm-project/commit/3e2631c9c62990467eca3e173f714367d7e7c0dd
Author: hev <wangrui at loongson.cn>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/test/CodeGen/LoongArch/rotl-rotr.ll
Log Message:
-----------
[LoongArch] Optimize codegen for ISD::ROTL (#100344)
The LoongArch rotr.{w,d} instruction ignores the high bits of the shift
operand, allowing it to generate more efficient code using the constant
zero register.
Commit: 0e6f64cd5e5a06bd78542d5541a762154546ced3
https://github.com/llvm/llvm-project/commit/0e6f64cd5e5a06bd78542d5541a762154546ced3
Author: hev <wangrui at loongson.cn>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/test/CodeGen/LoongArch/code-models.ll
M llvm/test/CodeGen/LoongArch/expand-call.ll
M llvm/test/CodeGen/LoongArch/global-address.ll
M llvm/test/CodeGen/LoongArch/global-variable-code-model.ll
M llvm/test/CodeGen/LoongArch/machinelicm-address-pseudos.ll
M llvm/test/CodeGen/LoongArch/psabi-restricted-scheduling.ll
M llvm/test/CodeGen/LoongArch/tls-models.ll
Log Message:
-----------
[LoongArch] Reimplement to prevent Pseudo{CALL, LA*}_LARGE instruction reordering (#100099)
The Pseudo{CALL, LA*}_LARGE instruction patterns specified in psABI
v2.30 cannot be reordered. This patch sets scheduling boundaries for
these instructions to prevent reordering. The Pseudo{CALL, LA*}_LARGE
instruction is moved back to Pre-RA expansion, which will help with
subsequent address calculation optimizations.
Commit: 2d6f4d22ef8be48db151019bb763de725104857a
https://github.com/llvm/llvm-project/commit/2d6f4d22ef8be48db151019bb763de725104857a
Author: David CARLIER <devnexen at gmail.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
A compiler-rt/test/sanitizer_common/TestCases/NetBSD/dump_registers_i386.cpp
A compiler-rt/test/sanitizer_common/TestCases/NetBSD/dump_registers_x86_64.cpp
Log Message:
-----------
[compiler-rt] DumpAllRegisters implementation for netbsd i386/x86_64. (#99743)
Commit: 84ad292f343e0b0b821fc18447a20c59530f9ec7
https://github.com/llvm/llvm-project/commit/84ad292f343e0b0b821fc18447a20c59530f9ec7
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/test/CodeGen/LoongArch/inline-asm-constraint-m.ll
A llvm/test/CodeGen/LoongArch/merge-base-offset.ll
Log Message:
-----------
[LoongArch] Pre-commit tests for merge base offset. NFC
Commit: 3d149123f46cee5ac8d961c6bf77c5c566f1e410
https://github.com/llvm/llvm-project/commit/3d149123f46cee5ac8d961c6bf77c5c566f1e410
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp
Log Message:
-----------
[sanitizer_common][test] Always skip select allocator tests on SPARC V9 (#100530)
Two allocator tests `FAIL` on Linux/sparc64:
```
SanitizerCommon-Unit :: ./Sanitizer-sparcv9-Test/SanitizerCommon/CombinedAllocator32Compact
SanitizerCommon-Unit :: ./Sanitizer-sparcv9-Test/SanitizerCommon/SizeClassAllocator32Iteration
```
The failure mode is the same on Solaris/sparcv9, where those tests are
already disabled since 0f69cbe2694a4740e6db5b99bd81a26746403072.
Therefore, this patch skips them on SPARC in general.
Tested on `sparc64-unknown-linux-gnu` and `sparcv9-sun-solaris2.11`.
Commit: 9eefe065bb2752b0db9ed553d2406e9a15ce349e
https://github.com/llvm/llvm-project/commit/9eefe065bb2752b0db9ed553d2406e9a15ce349e
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/tests/sanitizer_ioctl_test.cpp
Log Message:
-----------
[sanitizer_common][test] Fix SanitizerIoctl/KVM_GET_* tests on Linux/… (#100532)
…sparc64
Two ioctl tests `FAIL` on Linux/sparc64 (both 32 and 64-bit):
```
SanitizerCommon-Unit :: ./Sanitizer-sparc-Test/SanitizerIoctl/KVM_GET_LAPIC
SanitizerCommon-Unit :: ./Sanitizer-sparc-Test/SanitizerIoctl/KVM_GET_MP_STATE
```
like
```
compiler-rt/lib/sanitizer_common/tests/./Sanitizer-sparc-Test --gtest_filter=SanitizerIoctl.KVM_GET_LAPIC
--
compiler-rt/lib/sanitizer_common/tests/sanitizer_ioctl_test.cpp:91: Failure
Value of: res
Actual: false
Expected: true
compiler-rt/lib/sanitizer_common/tests/sanitizer_ioctl_test.cpp:92: Failure
Expected equality of these values:
ioctl_desc::WRITE
Which is: 2
desc.type
Which is: 1
```
The problem is that Linux/sparc64, like Linux/mips, uses a different
layout for the `ioctl` `request` arg than most other Linux targets as
can be seen in `sanitizer_platform_limits_posix.h` (`IOC_*`). Therefore,
this patch makes the tests use the correct one.
Tested on `sparc64-unknown-linux-gnu` and `x86_64-pc-linux-gnu`.
Commit: 1c53b907bd6348138a59da270836fc9b4c161a07
https://github.com/llvm/llvm-project/commit/1c53b907bd6348138a59da270836fc9b4c161a07
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
Log Message:
-----------
[sanitizer_common] Don't use syscall(SYS_clone) on Linux/sparc64 (#100534)
```
SanitizerCommon-Unit :: ./Sanitizer-sparc-Test/SanitizerCommon/StartSubprocessTest
```
and every single test using the `llvm-symbolizer` `FAIL` on
Linux/sparc64 in a very weird way: when using `StartSubprocess`, there's
a call to `internal_fork`, but we never reach `internal_execve`.
`internal_fork` is implemented using `syscall(SYS_clone)`. The calling
convention of that syscall already varies considerably between targets,
but as documented in `clone(2)`, SPARC again is widely different.
Instead of trying to match `glibc` here, this patch just calls `__fork`.
Tested on `sparc64-unknown-linux-gnu` and `x86_64-pc-linux-gnu`.
Commit: 94394ca980f8ecbd845155d2170cfd865e4d62dc
https://github.com/llvm/llvm-project/commit/94394ca980f8ecbd845155d2170cfd865e4d62dc
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Linux/signal_line.cpp
Log Message:
-----------
[sanitizer_common] Fix signal_line.cpp on SPARC (#100535)
```
SanitizerCommon-ubsan-sparc-Linux :: Linux/signal_line.cpp
```
currently `FAIL`s on Linux/sparc64 (32 and 64-bit) for `n == 2`. Instead
of the expected `SIGSEGV`, the test dies with `SIGBUS`. `strace` reveals
that this is due to a unaligned access:
```
--- SIGBUS {si_signo=SIGBUS, si_code=BUS_ADRALN, si_addr=0x1} ---
```
which is to be expected on a strict-alignment target like SPARC. Fixed
by changing the invalid pointer to be better aligned.
Tested on `sparc64-unknown-linux-gnu` and `x86_64-pc-linux-gnu`.
Commit: 7cecbdfe4eac3fd7268532426fb6b13e51b8720d
https://github.com/llvm/llvm-project/commit/7cecbdfe4eac3fd7268532426fb6b13e51b8720d
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Linux/signal_send.cpp
Log Message:
-----------
[sanitizer_common] Adjust signal_send.cpp for Linux/sparc64 (#100538)
```
SanitizerCommon-ubsan-sparc-Linux :: Linux/signal_send.cpp
```
currently `FAIL`s on Linux/sparc64 (32 and 64-bit). Instead of the
expected values for `SIGUSR1` (`10`) and `SIGUSR1` (`12`), that target
uses `30` and `31`.
On Linux/x86_64, the signals get their values from
`x86_64-linux-gnu/bits/signum-generic.h`, to be overridden in
`x86_64-linux-gnu/bits/signum.h`. On Linux/sparc64 OTOH, the definitions
are from `sparc64-linux-gnu/bits/signum-arch.h` and remain that way.
There's no `signum.h` at all.
The patch allows for both values.
Tested on `sparc64-unknown-linux-gnu` and `x86_64-pc-linux-gnu`.
Commit: 1c25f2cd470c2882e422b66d0482f5a120960394
https://github.com/llvm/llvm-project/commit/1c25f2cd470c2882e422b66d0482f5a120960394
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
Log Message:
-----------
[sanitizer_common][test] Fix InternalMmapWithOffset on 32-bit Linux/s… (#101011)
…parc64
```
SanitizerCommon-Unit :: ./Sanitizer-sparc-Test/SanitizerCommon/InternalMmapWithOffset
```
`FAIL`s on 32-bit Linux/sparc64:
```
projects/compiler-rt/lib/sanitizer_common/tests/./Sanitizer-sparc-Test --gtest_filter=SanitizerCommon.InternalMmapWithOffset
--
compiler-rt/lib/sanitizer_common/tests/sanitizer_libc_test.cpp:335: Failure
Expected equality of these values:
'A'
Which is: 'A' (65, 0x41)
p[0]
Which is: '\0'
```
It turns out the `pgoffset` arg to `mmap2` is passed incorrectly in this
case, unlike the 64-bit test. The caller, `MapWritableFileToMemory`,
passes an `u64` arg, while `mmap2` expects an `off_t`. This patch casts
the arg accordingly.
Tested on `sparc64-unknown-linux-gnu` and `x86_64-pc-linux-gnu`.
Commit: fcd6bd5587cc376cd8f43b60d1c7d61fdfe0f535
https://github.com/llvm/llvm-project/commit/fcd6bd5587cc376cd8f43b60d1c7d61fdfe0f535
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
Log Message:
-----------
[sanitizer_common] Fix internal_*stat on Linux/sparc64 (#101012)
```
SanitizerCommon-Unit :: ./Sanitizer-sparcv9-Test/SanitizerCommon/FileOps
```
`FAIL`s on 64-bit Linux/sparc64:
```
projects/compiler-rt/lib/sanitizer_common/tests/./Sanitizer-sparcv9-Test --gtest_filter=SanitizerCommon.FileOps
--
compiler-rt/lib/sanitizer_common/tests/sanitizer_libc_test.cpp:144: Failure
Expected equality of these values:
len1 + len2
Which is: 10
fsize
Which is: 1721875535
```
The issue is similar to the mips64 case: the Linux/sparc64 `*stat`
syscalls take a `struct kernel_stat64 *` arg. Also the syscalls actually
used differ.
This patch handles this, adopting the mips64 code to avoid too much
duplication.
Tested on `sparc64-unknown-linux-gnu` and `x86_64-pc-linux-gnu`.
Commit: abc2fe31fc622c4eab3766d739576110eb6f16c3
https://github.com/llvm/llvm-project/commit/abc2fe31fc622c4eab3766d739576110eb6f16c3
Author: Alexander Pivovarov <pivovaa at amazon.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M clang/lib/AST/MicrosoftMangle.cpp
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/Support/APFloat.cpp
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[APFloat] Add support for f8E3M4 IEEE 754 type (#99698)
This PR adds `f8E4M3` type to APFloat.
`f8E3M4` type follows IEEE 754 convention
```c
f8E3M4 (IEEE 754)
- Exponent bias: 3
- Maximum stored exponent value: 6 (binary 110)
- Maximum unbiased exponent value: 6 - 3 = 3
- Minimum stored exponent value: 1 (binary 001)
- Minimum unbiased exponent value: 1 − 3 = −2
- Precision specifies the total number of bits used for the significand (mantissa),
including implicit leading integer bit = 4 + 1 = 5
- Follows IEEE 754 conventions for representation of special values
- Has Positive and Negative zero
- Has Positive and Negative infinity
- Has NaNs
Additional details:
- Max exp (unbiased): 3
- Min exp (unbiased): -2
- Infinities (+/-): S.111.0000
- Zeros (+/-): S.000.0000
- NaNs: S.111.{0,1}⁴ except S.111.0000
- Max normal number: S.110.1111 = +/-2^(6-3) x (1 + 15/16) = +/-2^3 x 31 x 2^(-4) = +/-15.5
- Min normal number: S.001.0000 = +/-2^(1-3) x (1 + 0) = +/-2^(-2)
- Max subnormal number: S.000.1111 = +/-2^(-2) x 15/16 = +/-2^(-2) x 15 x 2^(-4) = +/-15 x 2^(-6)
- Min subnormal number: S.000.0001 = +/-2^(-2) x 1/16 = +/-2^(-2) x 2^(-4) = +/-2^(-6)
```
Related PRs:
- [PR-97179](https://github.com/llvm/llvm-project/pull/97179) [APFloat]
Add support for f8E4M3 IEEE 754 type
Commit: 2b23e6c8d6a28ce1c134d1b6b322e35eec9d98e4
https://github.com/llvm/llvm-project/commit/2b23e6c8d6a28ce1c134d1b6b322e35eec9d98e4
Author: Observer007 <45875558+Observer007 at users.noreply.github.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPUDialect.h
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
M mlir/test/Dialect/NVGPU/invalid.mlir
Log Message:
-----------
[mlir][nvgpu] Add `nvgpu.rcp` OP (#100965)
This PR introduces a new OP for reciprocal calculation for `vector`
types using `nvvm.rcp` OPs. Currently, it supports only f32 types
---------
Co-authored-by: jingzec <jingzec at nvidia.com>
Commit: 155b7a12820ec45095988b6aa6e057afaf2bc892
https://github.com/llvm/llvm-project/commit/155b7a12820ec45095988b6aa6e057afaf2bc892
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M compiler-rt/lib/interception/interception_linux.h
Log Message:
-----------
[Sanitizers] Avoid overload ambiguity for interceptors (#100986)
Since glibc 2.40 some functions like openat make use of overloads when
built with `-D_FORTIFY_SOURCE=2`, see:
https://github.com/bminor/glibc/blob/master/io/bits/fcntl2.h
This means that doing something like `(uintptr_t) openat` or `(void *)
openat` is now ambiguous, breaking the compiler-rt build on new glibc
versions.
Fix this by explicitly casting the symbol to the expected function type
before casting it to an intptr. The expected type is obtained as
`decltype(REAL(func))` so we don't have to repeat the signature from
INTERCEPTOR in the INTERCEPT_FUNTION macro.
Fixes https://github.com/llvm/llvm-project/issues/100754.
Commit: 053bbb6a71abf15dd086a292aa92fccfc54e1f56
https://github.com/llvm/llvm-project/commit/053bbb6a71abf15dd086a292aa92fccfc54e1f56
Author: David CARLIER <devnexen at gmail.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
Log Message:
-----------
[compiler-rt] DumpAllRegisters fix for other unimplemented oses (#101134)
Commit: 25bea3eb03dc3f9036af37bd51edcf297662d34f
https://github.com/llvm/llvm-project/commit/25bea3eb03dc3f9036af37bd51edcf297662d34f
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/include/llvm/MC/MCELFStreamer.h
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFStreamer.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFStreamer.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
Log Message:
-----------
[MC] Forward declare ELFObjectWriter (#100989)
Commit: 78e7ec3be88bac7f3cd9ab32758156d479b0a106
https://github.com/llvm/llvm-project/commit/78e7ec3be88bac7f3cd9ab32758156d479b0a106
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M clang/test/Driver/unified-lto.c
Log Message:
-----------
[PS4/PS5][Driver] Allow unified-lto.c test to find .*ld.exe (#101034)
It's common in SIE development environments to have the PlayStation
linkers on the %PATH%. In such cases, the driver will resolve the linker
name to an existing executable, replete with ".exe" extension. Update
recent modifications to clang/test/Driver/unified-lto.c to allow for
this.
Commit: e8f07cdb57602d71f8960c0499765bcb000745c2
https://github.com/llvm/llvm-project/commit/e8f07cdb57602d71f8960c0499765bcb000745c2
Author: Victor Perez <victor.perez at codeplay.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
M mlir/include/mlir/Dialect/SCF/Transforms/Transforms.h
M mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
A mlir/lib/Dialect/SCF/Transforms/RotateWhileLoop.cpp
M mlir/test/Dialect/SCF/wrap-while-loop-in-zero-trip-check.mlir
M mlir/test/lib/Dialect/SCF/TestSCFWrapInZeroTripCheck.cpp
Log Message:
-----------
[MLIR][SCF] Define `-scf-rotate-while` pass (#99850)
Define SCF dialect patterns rotating `scf.while` loops leveraging
existing `mlir::scf::wrapWhileLoopInZeroTripCheck`. `forceCreateCheck`
is always `false` as the pattern would lead to an infinite recursion
otherwise.
This pattern rotates `scf.while` ops, mutating them from "while" loops to
"do-while" loops. A guard checking the condition for the first iteration
is inserted. Note this guard can be optimized away if the compiler can
prove the loop will be executed at least once.
Using this pattern, the following while loop:
```mlir
scf.while (%arg0 = %init) : (i32) -> i64 {
%val = .., %arg0 : i64
%cond = arith.cmpi .., %arg0 : i32
scf.condition(%cond) %val : i64
} do {
^bb0(%arg1: i64):
%next = .., %arg1 : i32
scf.yield %next : i32
}
```
Can be transformed into:
``` mlir
%pre_val = .., %init : i64
%pre_cond = arith.cmpi .., %init : i32
scf.if %pre_cond -> i64 {
%res = scf.while (%arg1 = %va0) : (i64) -> i64 {
// Original after block
%next = .., %arg1 : i32
// Original before block
%val = .., %next : i64
%cond = arith.cmpi .., %next : i32
scf.condition(%cond) %val : i64
} do {
^bb0(%arg2: i64):
%scf.yield %arg2 : i32
}
scf.yield %res : i64
} else {
scf.yield %pre_val : i64
}
```
The test pass for `wrapWhileLoopInZeroTripCheck` has been modified to
use the new pattern when `forceCreateCheck=false`.
---------
Signed-off-by: Victor Perez <victor.perez at codeplay.com>
Commit: 16e9bb9cd7f50ae2ec7f29a80bc3b95f528bfdbf
https://github.com/llvm/llvm-project/commit/16e9bb9cd7f50ae2ec7f29a80bc3b95f528bfdbf
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
Log Message:
-----------
[sanitizer_common] Make sanitizer_linux.cpp kernel_stat* handling Linux-specific
fcd6bd5587cc376cd8f43b60d1c7d61fdfe0f535 broke the Solaris/sparcv9 buildbot:
```
compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp:39:14: fatal error: 'asm/unistd.h' file not found
39 | # include <asm/unistd.h>
| ^~~~~~~~~~~~~~
```
That section should have been Linux-specific in the first place, which is
what this patch does.
Tested on sparcv9-sun-solaris2.11.
Commit: 518d8632ce54308f52614b165ee8d84f45d54e54
https://github.com/llvm/llvm-project/commit/518d8632ce54308f52614b165ee8d84f45d54e54
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M clang/lib/AST/ASTImporter.cpp
M clang/unittests/AST/ASTImporterTest.cpp
Log Message:
-----------
[clang][ASTImporter] Fix import of template parameter default values. (#100100)
Default values of template parameters (non-type, type, template) were
not correctly handled in the "inherited" case. This occurs if the first
declaration contains the default value but a next one not. The default
value is "inherited" from the first.
In ASTImporter it was only possible to set the inherited status after
the template object was created with the template parameters that were
imported without handling the inherited case. The import function of the
template parameter contains not enough information (previous
declaration) to set the inherited-from status. After the template was
created, default value of the parameters that should be inherited is
reset to inherited mode.
Commit: 533a22941e9acee1460fbd054fbfa57b82d660e5
https://github.com/llvm/llvm-project/commit/533a22941e9acee1460fbd054fbfa57b82d660e5
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M clang/test/CodeGenCoroutines/coro-elide-thinlto.cpp
Log Message:
-----------
[clang][test] Write temporary files to %t
The issue was introduced in
https://github.com/llvm/llvm-project/commit/3a9ef4e69a3fec3203bd3e1caa53edf4b76843cf.
Commit: 55357d8b92e32999aca83daab017df35e87e9ed2
https://github.com/llvm/llvm-project/commit/55357d8b92e32999aca83daab017df35e87e9ed2
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/test/MC/X86/apx/ccmp-att.s
M llvm/test/MC/X86/apx/ccmp-intel.s
M llvm/test/MC/X86/apx/ctest-att.s
M llvm/test/MC/X86/apx/ctest-intel.s
Log Message:
-----------
[X86][MC] Add alias for `{evex} cmp` and `{evex} test`. (#99277)
Related gas patch:
https://sourceware.org/pipermail/binutils/2024-June/134478.html
Commit: c6b192ac2e1441b3484781488adef2986408ebdf
https://github.com/llvm/llvm-project/commit/c6b192ac2e1441b3484781488adef2986408ebdf
Author: nicole mazzuca <nicole at strega-nil.co>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find.last/ranges.find_last.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find.last/ranges.find_last_if.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find.last/ranges.find_last_if_not.pass.cpp
M libcxx/test/support/test_iterators.h
Log Message:
-----------
[libc++][test] Do not assume array::iterator is a pointer (#100603)
In the tests I added for `ranges::find_last{_if{_not}}`, I accidentally
introduced an assumption that `same_as<array<T, 0>::iterator, T*>`; this
is a faulty assumption on MSVC-STL.
Fixes #100498.
Commit: 7645a7690de1c050d933a2dbe1e9156057006333
https://github.com/llvm/llvm-project/commit/7645a7690de1c050d933a2dbe1e9156057006333
Author: martinboehme <mboehme at google.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/DataflowAnalysis.h
Log Message:
-----------
[clang][dataflow] Remove legacy version of `runDataflowAnalysis()`. (#101146)
Commit: 96b1ae8927a411ef691a8843dc5add156581b1c0
https://github.com/llvm/llvm-project/commit/96b1ae8927a411ef691a8843dc5add156581b1c0
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/riscv.c
Log Message:
-----------
[compiler-rt][RISCV][NFC] Add link to kernel documenation on hwprobe interface
Makes it a little easier for future reviewers/maintainers.
Commit: b1542afd0b3d393aea3a0ccab41b850f59e4033c
https://github.com/llvm/llvm-project/commit/b1542afd0b3d393aea3a0ccab41b850f59e4033c
Author: Luke Lau <luke at igalia.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVScheduleV.td
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/rvv/vleff-vlseg2ff-output.ll
Log Message:
-----------
[RISCV] Rename merge operand -> passthru. NFC (#100330)
We sometimes call the first tied dest operand in vector pseudos the
merge operand, and other times the passthru.
Passthru seems to be more common, and it's what the C intrinsics call
it[^1], so this renames all usages of merge to passthru to be
consistent. It also helps prevent confusion with vmerge.vvm in some of
the peephole optimisations.
[^1]:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/blob/main/doc/rvv-intrinsic-spec.adoc#the-passthrough-vd-argument-in-the-intrinsics
Commit: ca8a4111f796fe8533e0af95557875b15becff06
https://github.com/llvm/llvm-project/commit/ca8a4111f796fe8533e0af95557875b15becff06
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/Modules/inline-builtins.cppm
Log Message:
-----------
[C++20] [Modules] Always emit the inline builtins
See the attached test for the motivation example. If we're too greedy to
not emit the definition for inline builtins, we may meet a middle end
crash. And it should be good to emit inline builtins always.
Commit: 2b2f4ae0fbe366ebaa8811bed567a6ff76bbe3b1
https://github.com/llvm/llvm-project/commit/2b2f4ae0fbe366ebaa8811bed567a6ff76bbe3b1
Author: Eleanor Bonnici <eleanor.bonnici at arm.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/include/llvm/ObjCopy/CommonConfig.h
M llvm/lib/ObjCopy/ConfigManager.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
A llvm/test/tools/llvm-objcopy/ELF/change-section-address.test
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objcopy/ObjcopyOpts.td
Log Message:
-----------
[llvm-objcopy] Add --change-section-address (#98664)
--change-section address and its alias --adjust-section-vma allows
modification
of section addresses in a relocatable file. This used to be used, for
example,
in Fiasco microkernel.
On a relocatable file this option behaves the same as GNU objcopy, apart
from
the fact that it does not issue any warnings, for example, when an
argument is
not used.
GNU objcopy does not produce an error when passed an executable file but
the
usecase for this is not clear, and the behaviour is inconsistent. The
idea of
GNU objcopy --change-section-address is that the option should change
both LMA
and VMA in an executable file. Since this patch does not implement
executable
file support, only VMA is changed.
Commit: 933b80006af5801f7fe9327d160c04b12bb8d8b8
https://github.com/llvm/llvm-project/commit/933b80006af5801f7fe9327d160c04b12bb8d8b8
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/include/llvm/Support/GenericDomTreeConstruction.h
M llvm/test/Transforms/SCCP/ipsccp-preserve-pdt.ll
Log Message:
-----------
[Support][NFC] Use DomTreeBase methods in SemiNCA (#101059)
Previously, there were two implementations with identical behavior to
erase a node from a dominator tree, one in the DomTreeBase and one in
SemiNCAInfo. Remove the latter, as it is completely redundant.
Also, use getNode() instead of a direct access into DomTreeNodes. This
will simplify replacing the data structure of DomTreeNodes later on.
While at it, also use swap+pop_back instead of erase when removing a
node from the children vector to avoid O(n) copy. This slightly changes
the order of the tree nodes after removal, but should have no impact.
Commit: f6a928a532543a5db4ab89fccbede42f8df32f0f
https://github.com/llvm/llvm-project/commit/f6a928a532543a5db4ab89fccbede42f8df32f0f
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/include/llvm/Support/GenericDomTreeConstruction.h
Log Message:
-----------
[Support][NFC] Simplify DomTreeNodeBase::addChild (#101056)
Previously, the method would take the unique_ptr, store the pointer in
its Children vector, and then return the unique_ptr. Pass the raw
pointer as parameter instead. Also merge createChild and createNode to
avoid code duplication.
This was added in a72d6ef891707173b when introducing unique_ptr,
previously this was a source code size optimization.
Commit: 95e9afff30920a43c98fea9a3ece1a2129207946
https://github.com/llvm/llvm-project/commit/95e9afff30920a43c98fea9a3ece1a2129207946
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[X86] Update sub-features of APX for host CPU
This is a follow-up for https://github.com/llvm/llvm-project/pull/80636
Commit: d90fa612604b49dfc81c3f42c106fab7401322ec
https://github.com/llvm/llvm-project/commit/d90fa612604b49dfc81c3f42c106fab7401322ec
Author: Xing Xue <xingxue at outlook.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M libunwind/src/UnwindCursor.hpp
M libunwind/test/aix_signal_unwind.pass.sh.S
Log Message:
-----------
[libunwind][AIX] Fix the wrong traceback from signal handler (#101069)
Patch [llvm#92291](https://github.com/llvm/llvm-project/pull/92291)
causes wrong traceback from a signal handler for AIX because the AIX
unwinder uses the traceback table at the end of each function instead of
FDE/CIE for unwinding. This patch adds a condition to exclude traceback
table based unwinding from the code added by the patch.
Commit: 803db1f5254047b08b6887c52009d4e72e67a673
https://github.com/llvm/llvm-project/commit/803db1f5254047b08b6887c52009d4e72e67a673
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M clang/lib/AST/Interp/Compiler.cpp
Log Message:
-----------
[clang][Interp][NFC] Add missing fallthrough when parsing While loops
Commit: a27a01212ab68d6d5aee882906674def21c5ab0b
https://github.com/llvm/llvm-project/commit/a27a01212ab68d6d5aee882906674def21c5ab0b
Author: Simon Camphausen <simon.camphausen at iml.fraunhofer.de>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
Log Message:
-----------
[MLIR][EmitC] Fix typo in op description (#101153)
Commit: 36c57532f528e2d6420c0d205841af8b76c70d6a
https://github.com/llvm/llvm-project/commit/36c57532f528e2d6420c0d205841af8b76c70d6a
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M mlir/lib/CAPI/Dialect/SparseTensor.cpp
Log Message:
-----------
[mlir] Apply ClangTidy performance finding.
Commit: 53925e33c5943bee7cf2fe29ca1274a42a5d5687
https://github.com/llvm/llvm-project/commit/53925e33c5943bee7cf2fe29ca1274a42a5d5687
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M clang/lib/AST/Interp/Descriptor.cpp
M clang/test/AST/Interp/lifetimes.cpp
Log Message:
-----------
[clang][Interp] Fix primitive MoveFn (#101165)
Declaring the SrcPtr as const will cause us later to call the copy ctor
instead of the move ctor.
Commit: c39daa6e19800d9a1b20ec6e04b2a68149dcf89c
https://github.com/llvm/llvm-project/commit/c39daa6e19800d9a1b20ec6e04b2a68149dcf89c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.h
M clang/test/AST/Interp/records.cpp
Log Message:
-----------
[clang][Interp] Pick right dynamic type when doing virtual calls (#101166)
Commit: 51681409aeb081c8dfe241e0d8e8c71f8bf0a4f4
https://github.com/llvm/llvm-project/commit/51681409aeb081c8dfe241e0d8e8c71f8bf0a4f4
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][Bazel] Adapt to 2b23e6c8d6a28ce1c134d1b6b322e35eec9d98e4
Commit: 5d833ee6acc85bf108a8787ba233e955728868ab
https://github.com/llvm/llvm-project/commit/5d833ee6acc85bf108a8787ba233e955728868ab
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Avoid unnecessary computeConstantDifference() call (NFC)
No need to do the second one if the first one already failed.
Commit: 41c0f89f5532ec110b927c3a67ceac83448c5d98
https://github.com/llvm/llvm-project/commit/41c0f89f5532ec110b927c3a67ceac83448c5d98
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
Log Message:
-----------
[CodeGen][ARM64EC] Use alias symbol for exporting hybrid_patchable functions. (#100872)
Exporting $hp_target symbol doesn't make sense, use the unmangled alias instead.
This is not compatible with MSVC, but it makes using dllexport together with
hybrid_patchable attribute possible.
Commit: 65697b1c7cc9824d51f22f109c6a32428a7dd557
https://github.com/llvm/llvm-project/commit/65697b1c7cc9824d51f22f109c6a32428a7dd557
Author: Johannes Reifferscheid <jreiffers at google.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
Log Message:
-----------
Remove value cache in SCEV comparator. (#100721)
The cache triggers almost never, and seems unlikely to help with
performance. However, when it does, it is likely to cause the comparator
to become inconsistent due to a bad interaction of the depth limit and
cache hits. This leads to crashes in debug builds. See the new unit test
for a reproducer.
Commit: 8d28d448e35add632345ff6d1c45449155652756
https://github.com/llvm/llvm-project/commit/8d28d448e35add632345ff6d1c45449155652756
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Fix outdated comment (NFC)
The EqCache parameter has been removed.
Commit: 14dfdc00d96b9c51eae4c802397ac5b15f097401
https://github.com/llvm/llvm-project/commit/14dfdc00d96b9c51eae4c802397ac5b15f097401
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/IR/OptBisect.cpp
Log Message:
-----------
[OptBisect] Add an option to disable print of pass message (#101065)
The print could take a huge amount of time if there are millions of
optimization
passes running. This patch simply adds an option to disable the print.
Commit: 26ca7820ebe06369227efaa282fb2ac96c5aa74a
https://github.com/llvm/llvm-project/commit/26ca7820ebe06369227efaa282fb2ac96c5aa74a
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[NFC][clang] Fix typo of `riscv_rvv_vector_bits` in AttrDocs (#101046)
Commit: 243b27f7e1fbd6131d00cdcd4c06d6ce6e57a0e5
https://github.com/llvm/llvm-project/commit/243b27f7e1fbd6131d00cdcd4c06d6ce6e57a0e5
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/DeclOpenMP.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/lib/AST/StmtProfile.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTWriter.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[clang][OpenMP] Rename `varlists` to `varlist`, NFC (#101058)
It returns a range of variables (via Expr*), not a range of lists.
Commit: 6cb95f73e1974e5e36a6d2b0d1457c401819ffde
https://github.com/llvm/llvm-project/commit/6cb95f73e1974e5e36a6d2b0d1457c401819ffde
Author: martinboehme <mboehme at google.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/AdornedCFG.h
Log Message:
-----------
[clang][dataflow] Remove deprecated method `AdornedCFG::getStmtToBlock()`. (#101174)
Commit: 7937eaa0db5752296a54fad22b4e80cf3f93be41
https://github.com/llvm/llvm-project/commit/7937eaa0db5752296a54fad22b4e80cf3f93be41
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/test/Transforms/IRCE/wide_indvar.ll
Log Message:
-----------
[IRCE] Regenerate test checks (NFC)
Commit: d2b6a8ee67efc16d6594dfa9fdcf4a27251c7dac
https://github.com/llvm/llvm-project/commit/d2b6a8ee67efc16d6594dfa9fdcf4a27251c7dac
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
Log Message:
-----------
AMDGPU: Fix asserting when trying to print scc (#101175)
This is printable using inline assembly. Also we should
handle using scc directly as instruction operands.
Commit: d92a484e6f5c9063d82ca79405bb3557d88ad575
https://github.com/llvm/llvm-project/commit/d92a484e6f5c9063d82ca79405bb3557d88ad575
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M compiler-rt/lib/builtins/aarch64/sme-abi-vg.c
Log Message:
-----------
[compiler-rt][AArch64][NFCI] Use CONSTRUCTOR_ATTRIBUTE in sme-abi-vg.c (#101159)
sme-abi-vg.c includes cpu_model/aarch64.h which includes cpu_model.h
which has an equivalent define for `CONSTRUCTOR_ATTRIBUTE` that has the
same checks for the GCC version that we repeat here. Just use that,
rather than repeating the same logic.
Commit: b4444dca47c41436aa781bfd38aac6eca856ef23
https://github.com/llvm/llvm-project/commit/b4444dca47c41436aa781bfd38aac6eca856ef23
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorInsertExtractStridedSliceRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
Log Message:
-----------
[mlir][vector] Use `DenseI64ArrayAttr` for shuffle masks (#101163)
Follow on from #100997. This again removes from boilerplate conversions
to/from IntegerAttr and int64_t (otherwise, this is a NFC).
Commit: b356aa3e2da7d1792412783e2c6247538ead75e8
https://github.com/llvm/llvm-project/commit/b356aa3e2da7d1792412783e2c6247538ead75e8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/floor.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fconstant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global-saddr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrmask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector_v2x16.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-placement-issue61083.ll
Log Message:
-----------
AMDGPU/GlobalISel: Partially move constant selection to patterns (#100786)
This is still relying on the manual code for splitting 64-bit
constants, and handling pointers.
We were missing some of the tablegen patterns for all immediate types,
so this has some side effect DAG path improvements. This also reduces
the diff in the 2 selector outputs.
Commit: 2033767d68ed9aabcf1ad5d2bdd7541b272a05fd
https://github.com/llvm/llvm-project/commit/2033767d68ed9aabcf1ad5d2bdd7541b272a05fd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
Log Message:
-----------
AMDGPU: Cleanup immediate selection patterns (#100787)
Reorder for consistency, so the same types for v/s are together.
Commit: dcb4399f07180bcad4632f152225309ea70f0700
https://github.com/llvm/llvm-project/commit/dcb4399f07180bcad4632f152225309ea70f0700
Author: Jannick Kremer <51118500+DeinAlptraum at users.noreply.github.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_code_completion.py
M clang/bindings/python/tests/cindex/test_comment.py
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[libclang/python] Fix some type errors, add type annotations (#98745)
This fixes a few of the more debatable type errors, and adds related
annotations, as the next step towards #76664. This fixes 71 out of the
remaining 418 strict typing errors.
Commit: 6b08e4d3ac52c4cccba650d6a8afce61dcb6fb2f
https://github.com/llvm/llvm-project/commit/6b08e4d3ac52c4cccba650d6a8afce61dcb6fb2f
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/docs/SourceLevelDebugging.rst
Log Message:
-----------
[docs] SourceLevelDebugging: fix metadata references (#101187)
The metadata was off-by-one in a couple of places, making the
explanatory text incorrect.
Commit: 1d0723d4fb333f50d7eddac964ac09e9b05efb57
https://github.com/llvm/llvm-project/commit/1d0723d4fb333f50d7eddac964ac09e9b05efb57
Author: Manupa Karunaratne <manupa.karunaratne at amd.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[MLIR][AMDGPU] Add amdgpu.sched_barrier (#98911)
This commit adds sched_barrier operator
to AMDGPU dialect that lowers to rocdl.sched.barrier.
Commit: 42d641ef5cc4bd82f98ef9959a593ca6db66d75d
https://github.com/llvm/llvm-project/commit/42d641ef5cc4bd82f98ef9959a593ca6db66d75d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
Log Message:
-----------
AMDGPU/GlobalISel: Select all constants in tablegen (#100788)
This regresses the arbitrary address space pointer case. Ideally
we could write a pattern that matches a pointer based only on
its size, but using iPTR/iPTRAny seem to not work for this.
Commit: 8fc329421b2e3bc5cdda98ce303ea3b07af58ebc
https://github.com/llvm/llvm-project/commit/8fc329421b2e3bc5cdda98ce303ea3b07af58ebc
Author: Matthias Springer <me at m-sp.org>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Transforms/test-legalize-type-conversion.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][Transforms] Dialect conversion: Add missing "else if" branch (#101148)
This code got lost in #97213 and there was no test for it. Add it back
with an MLIR test.
When a pattern is run without a type converter, we can assume that the
new block argument types of a signature conversion are legal. That's
because they were specified by the user. This won't work for 1->N
conversions due to limitations in the dialect conversion infrastructure,
so the original `FIXME` has to stay in place.
Commit: 52f26c5e4d363336c3bfcf8a62e9429189b19add
https://github.com/llvm/llvm-project/commit/52f26c5e4d363336c3bfcf8a62e9429189b19add
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_code_completion.py
M clang/bindings/python/tests/cindex/test_comment.py
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/DeclOpenMP.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/Analysis/FlowSensitive/AdornedCFG.h
M clang/include/clang/Analysis/FlowSensitive/DataflowAnalysis.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Parse/Parser.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Interp/Compiler.cpp
M clang/lib/AST/Interp/Descriptor.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Lex/PPCaching.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/APINotes/Inputs/Headers/Methods.h
M clang/test/AST/Interp/lifetimes.cpp
M clang/test/AST/Interp/records.cpp
M clang/test/AST/attr-print-emit.cpp
A clang/test/CXX/dcl.decl/dcl.meaning/dcl.mptr/p2.cpp
M clang/test/CXX/temp/temp.res/p3.cpp
A clang/test/CodeGen/inline-asm-size-zero.c
A clang/test/CodeGenCoroutines/coro-elide-thinlto.cpp
M clang/test/Driver/amdgpu-toolchain.c
M clang/test/Driver/linker-wrapper.c
M clang/test/Driver/openmp-offload-gpu.c
M clang/test/Driver/unified-lto.c
A clang/test/Modules/inline-builtins.cppm
M clang/test/Sema/attr-ownership.c
M clang/test/Sema/attr-ownership.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/destructor.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M compiler-rt/lib/builtins/aarch64/sme-abi-vg.c
M compiler-rt/lib/builtins/cpu_model/riscv.c
M compiler-rt/lib/interception/interception_linux.h
M compiler-rt/lib/memprof/memprof_mapping.h
M compiler-rt/lib/nsan/nsan_interceptors.cpp
M compiler-rt/lib/profile/InstrProfiling.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_ioctl_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/dump_registers_aarch64.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/dump_registers_arm.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/dump_registers_i386.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/dump_registers_x86_64.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/signal_line.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/signal_send.cpp
A compiler-rt/test/sanitizer_common/TestCases/NetBSD/dump_registers_i386.cpp
A compiler-rt/test/sanitizer_common/TestCases/NetBSD/dump_registers_x86_64.cpp
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Exceptions.h
M flang/include/flang/Runtime/exceptions.h
M flang/include/flang/Runtime/magic-numbers.h
M flang/lib/Evaluate/real.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Exceptions.cpp
M flang/lib/Optimizer/Builder/Runtime/Numeric.cpp
M flang/runtime/exceptions.cpp
M flang/test/Evaluate/fold-nearest.f90
A flang/test/Lower/Intrinsics/ieee_next.f90
M flang/test/Lower/Intrinsics/nearest.f90
M flang/unittests/Optimizer/Builder/Runtime/NumericTest.cpp
M libc/benchmarks/gpu/CMakeLists.txt
M libc/benchmarks/gpu/LibcGpuBenchmark.cpp
M libc/benchmarks/gpu/LibcGpuBenchmark.h
M libc/benchmarks/gpu/src/CMakeLists.txt
A libc/benchmarks/gpu/src/math/CMakeLists.txt
A libc/benchmarks/gpu/src/math/sin_benchmark.cpp
M libc/benchmarks/gpu/timing/amdgpu/timing.h
M libc/benchmarks/gpu/timing/nvptx/timing.h
M libc/config/linux/aarch64/entrypoints.txt
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find.last/ranges.find_last.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find.last/ranges.find_last_if.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find.last/ranges.find_last_if_not.pass.cpp
M libcxx/test/support/test_iterators.h
M libunwind/src/UnwindCursor.hpp
M libunwind/test/aix_signal_unwind.pass.sh.S
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/docs/DirectX/DXILResources.rst
M llvm/docs/SourceLevelDebugging.rst
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/include/llvm/Analysis/Loads.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/include/llvm/MC/MCELFStreamer.h
M llvm/include/llvm/MC/MCFragment.h
M llvm/include/llvm/ObjCopy/CommonConfig.h
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/include/llvm/SandboxIR/Use.h
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/include/llvm/Support/GenericDomTreeConstruction.h
M llvm/include/llvm/Transforms/Utils/SSAUpdaterImpl.h
M llvm/include/llvm/Transforms/Utils/SimplifyLibCalls.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/IR/OptBisect.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/ObjCopy/ConfigManager.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.h
M llvm/lib/Target/ARM/ARMMCInstLower.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFStreamer.cpp
M llvm/lib/Target/CSKY/CSKYAsmPrinter.cpp
M llvm/lib/Target/CSKY/CSKYAsmPrinter.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFStreamer.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVScheduleV.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Analysis/CostModel/AMDGPU/copysign.ll
M llvm/test/Analysis/CostModel/AMDGPU/fma.ll
M llvm/test/Analysis/CostModel/AMDGPU/fmuladd.ll
M llvm/test/Analysis/CostModel/RISCV/cast.ll
M llvm/test/Analysis/CostModel/X86/arith-overflow.ll
M llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
M llvm/test/CodeGen/AArch64/exp10-libcall-names.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/floor.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fconstant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global-saddr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrmask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector_v2x16.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-placement-issue61083.ll
M llvm/test/CodeGen/ARM/vselect_imax.ll
M llvm/test/CodeGen/LoongArch/code-models.ll
M llvm/test/CodeGen/LoongArch/expand-call.ll
M llvm/test/CodeGen/LoongArch/global-address.ll
M llvm/test/CodeGen/LoongArch/global-variable-code-model.ll
M llvm/test/CodeGen/LoongArch/inline-asm-constraint-m.ll
M llvm/test/CodeGen/LoongArch/machinelicm-address-pseudos.ll
A llvm/test/CodeGen/LoongArch/merge-base-offset.ll
M llvm/test/CodeGen/LoongArch/psabi-restricted-scheduling.ll
M llvm/test/CodeGen/LoongArch/rotl-rotr.ll
M llvm/test/CodeGen/LoongArch/tls-models.ll
M llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll
M llvm/test/CodeGen/PowerPC/build-vector-tests.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-pwr9-64bit.ll
M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
M llvm/test/CodeGen/PowerPC/combine-fneg.ll
M llvm/test/CodeGen/PowerPC/constant-pool.ll
M llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll
M llvm/test/CodeGen/PowerPC/fma-combine.ll
M llvm/test/CodeGen/PowerPC/fp-strict-round.ll
M llvm/test/CodeGen/PowerPC/frem.ll
M llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
M llvm/test/CodeGen/PowerPC/ldexp.ll
M llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
M llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
M llvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll
M llvm/test/CodeGen/PowerPC/save-reg-params.ll
M llvm/test/CodeGen/PowerPC/select_const.ll
M llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
M llvm/test/CodeGen/PowerPC/subreg-lanemasks.mir
M llvm/test/CodeGen/PowerPC/toc-float.ll
M llvm/test/CodeGen/PowerPC/variable_elem_vec_extracts.ll
M llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/PowerPC/vector-llrint.ll
M llvm/test/CodeGen/PowerPC/vector-lrint.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll
M llvm/test/CodeGen/PowerPC/vsx.ll
M llvm/test/CodeGen/RISCV/pr94265.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfptoi-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/insertelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/trunc-select-to-max-usat.ll
M llvm/test/CodeGen/RISCV/rvv/unmasked-ta.ll
M llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll
M llvm/test/CodeGen/RISCV/rvv/vfmv.s.f.ll
M llvm/test/CodeGen/RISCV/rvv/vleff-vlseg2ff-output.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
M llvm/test/CodeGen/X86/exp10-libcall-names.ll
A llvm/test/Instrumentation/HeapProfiler/basic-histogram.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst_float.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst_lane.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst_origins.ll
A llvm/test/LTO/X86/print-pipeline-passes.ll
M llvm/test/MC/X86/apx/ccmp-att.s
M llvm/test/MC/X86/apx/ccmp-intel.s
M llvm/test/MC/X86/apx/ctest-att.s
M llvm/test/MC/X86/apx/ctest-intel.s
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
A llvm/test/ThinLTO/X86/ctxprof.ll
M llvm/test/Transforms/IRCE/wide_indvar.ll
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
A llvm/test/Transforms/InstCombine/lib-call-exit.ll
M llvm/test/Transforms/InstCombine/load.ll
M llvm/test/Transforms/InstCombine/multiple-uses-load-bitcast-select.ll
M llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll
A llvm/test/Transforms/InstCombine/select-load.ll
M llvm/test/Transforms/InstCombine/strnlen-2.ll
A llvm/test/Transforms/SCCP/float-denormal-simplification.ll
M llvm/test/Transforms/SCCP/ipsccp-preserve-pdt.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-used-across-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-extractelements-different-bbs.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-gather-non-scheduled-extracts.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SROA/phi-and-select.ll
M llvm/test/Transforms/SROA/phi-with-duplicate-pred.ll
M llvm/test/Transforms/SROA/select-load.ll
A llvm/test/tools/llvm-objcopy/ELF/change-section-address.test
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/tools/llc/NewPMDriver.cpp
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objcopy/ObjcopyOpts.td
M llvm/tools/opt/NewPMDriver.cpp
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPUDialect.h
M mlir/include/mlir/Dialect/Ptr/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
M mlir/include/mlir/Dialect/SCF/Transforms/Transforms.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/CAPI/Dialect/SparseTensor.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
M mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
A mlir/lib/Dialect/SCF/Transforms/RotateWhileLoop.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMask.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorInsertExtractStridedSliceRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
M mlir/test/Dialect/Linalg/vectorization-with-patterns.mlir
M mlir/test/Dialect/NVGPU/invalid.mlir
M mlir/test/Dialect/SCF/wrap-while-loop-in-zero-trip-check.mlir
M mlir/test/Transforms/test-legalize-type-conversion.mlir
M mlir/test/lib/Dialect/SCF/TestSCFWrapInZeroTripCheck.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
M offload/test/offloading/bug51781.c
M openmp/runtime/src/kmp_affinity.cpp
M openmp/runtime/src/kmp_affinity.h
M polly/lib/Analysis/ScopBuilder.cpp
M polly/lib/Analysis/ScopDetection.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/unistd/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
rebase
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/ee4cf7119f5c...52f26c5e4d36
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