[all-commits] [llvm/llvm-project] e90c21: [RISCV] Use APInt in isSimpleVIDSequence to accoun...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e90c21831f375d0469b4213ab71cc7de0cd5ab20
      https://github.com/llvm/llvm-project/commit/e90c21831f375d0469b4213ab71cc7de0cd5ab20
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-07-30 (Tue, 30 Jul 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll

  Log Message:
  -----------
  [RISCV] Use APInt in isSimpleVIDSequence to account for index overflow (#100072)

At zvl1024b, we may have legal fixed length vectors where a vid.v would
overflow at i8, e.g. <512 x i8>.

When lowering constant build_vectors, isSimpleVIDSequence used uint64_t
to model the vid.v sequence which meant it didn't account for the fact
that it could overflow in these larger types.

This patch fixes it by modelling the sequence with an SEW-wide APInt so
if it does overflow the loop that checks/calculates the addend will
detect it and bail.

Fixes #99729



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