[all-commits] [llvm/llvm-project] 3db5c1: revert all tid changes (#100915)
Justin Bogner via All-commits
all-commits at lists.llvm.org
Mon Jul 29 14:31:43 PDT 2024
Branch: refs/heads/users/bogner/sprmain.dxilanalysis-make-alignment-on-structuredbuffer-optional
Home: https://github.com/llvm/llvm-project
Commit: 3db5c1eeb08766cdd84a3186a1d2be6ab63b2883
https://github.com/llvm/llvm-project/commit/3db5c1eeb08766cdd84a3186a1d2be6ab63b2883
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-07-27 (Sat, 27 Jul 2024)
Changed paths:
M libc/config/config.json
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/configure.rst
M libc/docs/dev/undefined_behavior.rst
M libc/spec/posix.td
M libc/src/__support/OSUtil/CMakeLists.txt
M libc/src/__support/OSUtil/linux/CMakeLists.txt
R libc/src/__support/OSUtil/linux/pid.cpp
R libc/src/__support/OSUtil/pid.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/rwlock.h
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/thread.h
R libc/src/__support/threads/tid.h
M libc/src/unistd/CMakeLists.txt
M libc/src/unistd/getpid.h
R libc/src/unistd/gettid.cpp
R libc/src/unistd/gettid.h
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/fork.cpp
M libc/src/unistd/linux/getpid.cpp
M libc/startup/linux/CMakeLists.txt
M libc/startup/linux/do_start.cpp
M libc/test/integration/src/unistd/CMakeLists.txt
M libc/test/integration/src/unistd/fork_test.cpp
M libc/test/src/unistd/CMakeLists.txt
R libc/test/src/unistd/gettid_test.cpp
Log Message:
-----------
revert all tid changes (#100915)
Commit: 4202634886b9b8f1ee74713a8ed8c86941891853
https://github.com/llvm/llvm-project/commit/4202634886b9b8f1ee74713a8ed8c86941891853
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64.ll
Log Message:
-----------
[AMDGPU] Remove -wavefrontsizeX from GlobalISel tests (NFC) (#100812)
This is to make https://github.com/llvm/llvm-project/pull/100711
complete
Commit: eee620b890ad7e2e139d44fee95bd5049fa48f5c
https://github.com/llvm/llvm-project/commit/eee620b890ad7e2e139d44fee95bd5049fa48f5c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/include/llvm/AsmParser/LLParser.h
M llvm/lib/AsmParser/LLParser.cpp
Log Message:
-----------
[LLParser] Use SmallVector instead of std::vector (#100916)
The use of SmallVector here saves 1.03% of heap allocations during the
compilation of X86ISelLowering.cpp.ll, a .ll version of
X86ISelLowering.cpp. The 8 inline elements cover greater than 99% of
invocations encountered here.
While I am it, the patch changes the parameter type to ArrayRef to
allow callers to use any vector type.
Commit: 25efb746d907ce0ffdd9195d191ff0f6944ea3ca
https://github.com/llvm/llvm-project/commit/25efb746d907ce0ffdd9195d191ff0f6944ea3ca
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/config.bzl
Log Message:
-----------
[Bazel] Use PACKAGE_VERSION for version string.
This enables "-rc" suffix in release branches.
Commit: 594d3593fec2ae15f6dd38c51fba8bb1f9828089
https://github.com/llvm/llvm-project/commit/594d3593fec2ae15f6dd38c51fba8bb1f9828089
Author: David Green <david.green at arm.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/fcvt_combine.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
Log Message:
-----------
[AArch64] Split v8f32 fptosi_sat into two v4f32.
If we produce illegal v8f32 types, the VectorLegalizer will unroll them,
scalarizing the operations. In this patch we pre-split them during custom
legalization to produce better results.
Commit: 6907ab49399f131e04ea1816d155107e92d3b1aa
https://github.com/llvm/llvm-project/commit/6907ab49399f131e04ea1816d155107e92d3b1aa
Author: David Green <david.green at arm.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/fptoi_sat.ll
M llvm/test/Transforms/AggressiveInstCombine/AArch64/fptosisat.ll
Log Message:
-----------
[AArch64] Extend costs for fptoi.sat intrinsics.
Most of these bring the costs in line with the code generation. The f16 costs
without FullFP16 are usually converted to f32. Extended v2f32->v2f64 vectors
similarly use fcvtl + fcvt. As a backup we use the costs similar to the target
independent code, which should give a relatively high cost.
Commit: 2711618214b22bbc170edd0672f0b5fc1cb8acf4
https://github.com/llvm/llvm-project/commit/2711618214b22bbc170edd0672f0b5fc1cb8acf4
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/include/__memory_resource/polymorphic_allocator.h
A libcxx/test/std/utilities/utility/mem.res/mem.poly.allocator.class/mem.poly.allocator.class.general/equality.pass.cpp
Log Message:
-----------
[libc++][memory_resource] Implements LWG3683. (#100775)
The polymorphic_allocator was added in C++17.
This issue was filed in 2022 so well after C++20. This issue adds an
operator==.
Starting with C++20 this adds a compiler generated operator!=. To have
the same behaviour in C++17 and C++20 (and later) a manual operator!= is
defined in C++17.
Implements
- LWG3683 operator== for polymorphic_allocator cannot deduce template
argument in common cases
Commit: f7914aa2fd91a54f1314570442fc7730ee4b0457
https://github.com/llvm/llvm-project/commit/f7914aa2fd91a54f1314570442fc7730ee4b0457
Author: Dimitry Andric <dimitry at andric.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
R llvm/lib/Target/AArch64/peephole-sxtw.mir
A llvm/test/CodeGen/AArch64/peephole-sxtw.mir
Log Message:
-----------
[AArch64] Move peephole-sxtw.mir file to regression test directory (#100819)
In #96293 ("Remove superfluous sxtw in peephole opt") a file
`peephole-sxtw.mir` was added to `llvm/lib/Target/AArch64/`, but it
looks like this is a regression test file.
Move it to `llvm/test/CodeGen/AArch64/` which seems a more correct
location.
Commit: 81595e9178eedc18dfcace9ac412f20697497f9f
https://github.com/llvm/llvm-project/commit/81595e9178eedc18dfcace9ac412f20697497f9f
Author: Pavel Samolysov <samolisov at gmail.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
A clang/test/AST/explicit-base-class-move-cntr.cpp
Log Message:
-----------
[Clang][Sema] Add a test for move ctor calling for a base class. NFC (#97164)
When clang compiles the following expression:
```c++
return A{B{"Move Ctor"}};
```
(where `B` is a base class for `A`), it adds a call to the move
constructor of `B`. When the code is changed to...
```c++
return A{{"No Move Ctor"}};
```
... a move constructor is invoked neither for `A` nor for `B`.
The lit test demonstrates the difference in the generated AST.
Commit: bb064535bd071c1bddaf55ff7fe283fc8d23c1fc
https://github.com/llvm/llvm-project/commit/bb064535bd071c1bddaf55ff7fe283fc8d23c1fc
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
Log Message:
-----------
[Clang][CTAD][NFC] Unify transformTemplateParameter() (#100865)
We ended up having two transformTemplateParameter() after CTAD for type
aliases was landed. This patch cleans them up and allows them to share
one implementation.
As a bonus, this also uses getDepthAndIndex() in preference to
getTemplateParameter{Depth,Index}().
Commit: 77f89f1f541976b92b43a4b40bd54e889fc55f53
https://github.com/llvm/llvm-project/commit/77f89f1f541976b92b43a4b40bd54e889fc55f53
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/test/CodeGen/SPARC/64cond.ll
Log Message:
-----------
[Sparc] Remove custom lowering for SMULO / UMULO (#100858)
The underlying issue was fixed by 7c4fe0e9. The lowering is tested by
[us]mulo-128-legalisation-lowering.ll and there are no changes.
Commit: 991192b211212aa366bf73b993ac444839c10bf5
https://github.com/llvm/llvm-project/commit/991192b211212aa366bf73b993ac444839c10bf5
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/test/CodeGen/SPARC/2011-01-11-CC.ll
M llvm/test/CodeGen/SPARC/fp128-split.ll
M llvm/test/CodeGen/SPARC/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/SPARC/umulo-128-legalisation-lowering.ll
Log Message:
-----------
[Sparc] Remove custom lowering for ADD[CE] / SUB[CE] (#100861)
The default lowering produces fewer instructions.
Commit: c53843415ebba4d7c295bcd31bb325bfd08570a6
https://github.com/llvm/llvm-project/commit/c53843415ebba4d7c295bcd31bb325bfd08570a6
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/include/llvm/ADT/StableHashing.h
M llvm/lib/CodeGen/MachineStableHash.cpp
Log Message:
-----------
[ADT,CodeGen] Remove stable_hash_combine_string
FNV, used by stable_hash_combine_string is extremely slow. For string
hashing with good avalanche effects, we prefer xxh3_64bits.
StableHashing.h might still be useful as it provides a stable
hash_combine while Hashing.h's might be non-deterministic (#96282).
Pull Request: https://github.com/llvm/llvm-project/pull/100668
Commit: 30fa01141390a8d60ab661f763a22329337bd97d
https://github.com/llvm/llvm-project/commit/30fa01141390a8d60ab661f763a22329337bd97d
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M lld/test/ELF/linkerscript/group.s
Log Message:
-----------
[ELF,test] Improve --sysroot and GROUP tests
3i.t (INCLUDE "%t.dir/3a.t") describes a behavior difference from GNU
ld, which will be fixed by the next change.
Commit: a7e8bddfc1ce3e9ef86f104a34f72ece72c23ba7
https://github.com/llvm/llvm-project/commit/a7e8bddfc1ce3e9ef86f104a34f72ece72c23ba7
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M lld/ELF/ScriptLexer.cpp
M lld/ELF/ScriptLexer.h
M lld/ELF/ScriptParser.cpp
M lld/test/ELF/linkerscript/group.s
Log Message:
-----------
[ELF] Respect --sysroot for INCLUDE
If an included script is under the sysroot directory, when it opens an
absolute path file (`INPUT` or `GROUP`), add sysroot before the absolute
path. When the included script ends, the `isUnderSysroot` state is
restored.
Commit: 44df89cc30fc462dcb821929c6d5459688ffe545
https://github.com/llvm/llvm-project/commit/44df89cc30fc462dcb821929c6d5459688ffe545
Author: Eric977 <53341107+Eric977 at users.noreply.github.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/dev/undefined_behavior.rst
M libc/newhdrgen/yaml/pthread.yaml
M libc/spec/posix.td
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_rwlock_clockrdlock.cpp
A libc/src/pthread/pthread_rwlock_clockrdlock.h
A libc/src/pthread/pthread_rwlock_clockwrlock.cpp
A libc/src/pthread/pthread_rwlock_clockwrlock.h
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_rwlock_test.cpp
Log Message:
-----------
[libc] add pthread_rwlock_clockrdlock and pthread_rwlock_clockwrlock … (#100543)
Commit: ff7f97a8199e6e931f5ae2b1ec79e8a1eb9b05d6
https://github.com/llvm/llvm-project/commit/ff7f97a8199e6e931f5ae2b1ec79e8a1eb9b05d6
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/ScriptParser.h
M lld/test/ELF/defsym.s
Log Message:
-----------
[ELF] --defsym: support quoted LHS
and move = splitting from Driver.cpp to ScriptParser.cpp.
Commit: a17f8fe7d46e1708331df2dec733203de356b0cf
https://github.com/llvm/llvm-project/commit/a17f8fe7d46e1708331df2dec733203de356b0cf
Author: Kazu Hirata <kazu at google.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
Log Message:
-----------
[InstCombine] Use more inline elements in a SmallVector (#100942)
The 4 inline elements only cover 58% of cases encountered here during
the compilation of X86ISelLowering.cpp.ll, a .ll version of
X86ISelLowering.cpp.
The 8 inline elements cover 96% and save 0.27% of heap allocations.
Commit: 41211919db5feb279d2954eb590a3cf2a1742152
https://github.com/llvm/llvm-project/commit/41211919db5feb279d2954eb590a3cf2a1742152
Author: Julius Alexandre <juliuswoosebert at gmail.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Added isVolatile args to existing LoadInst::create function (#100850)
Added isVolatile args along with the tests.
Commit: 0fb9f898e227925f43780bfe0e4887fba9fb1a15
https://github.com/llvm/llvm-project/commit/0fb9f898e227925f43780bfe0e4887fba9fb1a15
Author: Kazu Hirata <kazu at google.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
Log Message:
-----------
[InstCombine] Initialize a SmallVector with a range (NFC) (#100947)
Commit: b7e4fba6e5dcae5ff51f8eced21470a1b3ccd895
https://github.com/llvm/llvm-project/commit/b7e4fba6e5dcae5ff51f8eced21470a1b3ccd895
Author: James Y Knight <jyknight at google.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/test/Bindings/llvm-c/echo.ll
M llvm/test/Bitcode/compatibility.ll
M llvm/test/CodeGen/X86/2007-05-15-maskmovq.ll
M llvm/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll
M llvm/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll
M llvm/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll
M llvm/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll
M llvm/test/CodeGen/X86/2011-06-14-mmx-inlineasm.ll
M llvm/test/CodeGen/X86/avx-vbroadcast.ll
M llvm/test/CodeGen/X86/avx2-vbroadcast.ll
M llvm/test/CodeGen/X86/bitcast-mmx.ll
M llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir
M llvm/test/CodeGen/X86/fast-isel-bc.ll
M llvm/test/CodeGen/X86/fast-isel-nontemporal.ll
M llvm/test/CodeGen/X86/mmx-arg-passing-x86-64.ll
M llvm/test/CodeGen/X86/mmx-arg-passing.ll
M llvm/test/CodeGen/X86/mmx-arith.ll
M llvm/test/CodeGen/X86/mmx-bitcast-fold.ll
M llvm/test/CodeGen/X86/mmx-bitcast.ll
M llvm/test/CodeGen/X86/mmx-build-vector.ll
M llvm/test/CodeGen/X86/mmx-coalescing.ll
M llvm/test/CodeGen/X86/mmx-cvt.ll
M llvm/test/CodeGen/X86/mmx-fold-load.ll
M llvm/test/CodeGen/X86/mmx-fold-zero.ll
M llvm/test/CodeGen/X86/mmx-intrinsics.ll
M llvm/test/CodeGen/X86/mmx-only.ll
M llvm/test/CodeGen/X86/mxcsr-reg-usage.ll
M llvm/test/CodeGen/X86/nontemporal.ll
M llvm/test/CodeGen/X86/pr13859.ll
M llvm/test/CodeGen/X86/pr23246.ll
M llvm/test/CodeGen/X86/pr29222.ll
M llvm/test/CodeGen/X86/pr35982.ll
M llvm/test/CodeGen/X86/select-mmx.ll
M llvm/test/CodeGen/X86/stack-folding-mmx.ll
M llvm/test/CodeGen/X86/vec_extract-mmx.ll
M llvm/test/CodeGen/X86/vec_insert-5.ll
M llvm/test/CodeGen/X86/vec_insert-7.ll
M llvm/test/CodeGen/X86/vec_insert-mmx.ll
M llvm/test/CodeGen/X86/vector-shuffle-mmx.ll
M llvm/test/CodeGen/X86/x86-64-psub.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/vector_arith.ll
M llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll
M llvm/test/Instrumentation/MemorySanitizer/vector_pack.ll
M llvm/test/Instrumentation/MemorySanitizer/vector_shift.ll
M llvm/test/MC/X86/x86-GCC-inline-asm-Y-constraints.ll
R llvm/test/Transforms/GlobalOpt/x86_mmx_load.ll
M llvm/test/Transforms/InstCombine/X86/x86-movmsk.ll
M llvm/test/Transforms/InstCombine/cast.ll
M llvm/test/Transforms/InstSimplify/ConstProp/gep-zeroinit-vector.ll
M llvm/test/Transforms/SCCP/crash.ll
M llvm/test/Transforms/SROA/pr57796.ll
M llvm/test/Verifier/atomics.ll
Log Message:
-----------
Cleanup x86_mmx after removing IR type (#100646)
After #98505, the textual IR keyword `x86_mmx` was temporarily made to
parse as `<1 x i64>`, so as not to require a lot of test update noise.
This completes the removal of the type, by removing the`x86_mmx` keyword
from the IR parser, and making the (now no-op) test updates via `sed -i
's/\bx86_mmx\b/<1 x i64>/g' $(git grep -l x86_mmx llvm/test/)`.
Resulting bitcasts from <1 x i64> to itself were then manually deleted.
Changes to llvm/test/Bitcode/compatibility-$VERSION.ll were reverted, as
they're intended to be equivalent to the .bc file, if parsed by old
LLVM, so shouldn't be updated.
A few tests were removed, as they're no longer testing anything, in the
following files:
- llvm/test/Transforms/GlobalOpt/x86_mmx_load.ll
- llvm/test/Transforms/InstCombine/cast.ll
- llvm/test/Transforms/InstSimplify/ConstProp/gep-zeroinit-vector.ll
Works towards issue #98272.
Commit: fd791f0fe562a41d8569fcb4d1e84b4c1e5719c7
https://github.com/llvm/llvm-project/commit/fd791f0fe562a41d8569fcb4d1e84b4c1e5719c7
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
Log Message:
-----------
[ELF] Move TarWriter into Ctx. NFC
Similar to e980f16d52196fb2bc672ecb87e0f622253addec.
Commit: ea7cc12f612ef5c5f70082ebfdee378d80ec44bd
https://github.com/llvm/llvm-project/commit/ea7cc12f612ef5c5f70082ebfdee378d80ec44bd
Author: David Green <david.green at arm.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
Log Message:
-----------
[ARM] Add fallback fptoi_sat costs.
This makes sure that the custom operations get a fallback cost, even if they
are not perfect.
Commit: 378fe2fc23fa56181577d411fe6d51fa531cd860
https://github.com/llvm/llvm-project/commit/378fe2fc23fa56181577d411fe6d51fa531cd860
Author: Farzon Lotfi <1802579+farzonl at users.noreply.github.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/test/CodeGen/X86/fp-strict-libcalls-msvc32.ll
M llvm/test/CodeGen/X86/vec-libcalls.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll
Log Message:
-----------
[X86][LoopVectorize] Add support for arc and hyperbolic trig functions (#99383)
This change is part 2 x86 Loop Vectorization of :
https://github.com/llvm/llvm-project/pull/96222
It also has veclib call loop vectorization hence the test cases in
`llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll`
finally the last pr missed tests for
`llvm/test/CodeGen/X86/fp-strict-libcalls-msvc32.ll` and
`llvm/test/CodeGen/X86/vec-libcalls.ll` so added those aswell.
No evidence was found for arc and hyperbolic trig glibc vector math
functions
https://github.com/lattera/glibc/blob/master/sysdeps/x86/fpu/bits/math-vector.h
so no new `_ZGVbN2v_*` and `_ZGVdN4v_*` .
So no new tests in
`llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll`
Also no new svml and no new tests to:
`llvm/test/Transforms/LoopVectorize/X86/svml-calls.ll`
There was not enough evidence that there were svml arc and hyperbolic
trig vector implementations, Documentation was scarces so looked at test
cases in
[numpy](https://github.com/numpy/SVML/blob/32bf2a98420762a63ab418aaa0a7d6e17eb9627a/linux/avx512/svml_z0_acos_d_la.s#L8).
Someone with more experience with svml should investigate.
## Note
amd libm doesn't have a vector hyperbolic sine api hence why youi might
notice there are no tests for `sinh`.
## History
This change is part of
https://github.com/llvm/llvm-project/issues/87367's investigation on
supporting IEEE math operations as intrinsics.
Which was discussed in this RFC:
https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294
This change adds loop vectorization for `acos`, `asin`, `atan`, `cosh`,
`sinh`, and `tanh`.
resolves #70079
resolves #70080
resolves #70081
resolves #70083
resolves #70084
resolves #95966
Commit: 62e9f40949ddc52e9660b25ab146bd5d9b39ad88
https://github.com/llvm/llvm-project/commit/62e9f40949ddc52e9660b25ab146bd5d9b39ad88
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/LoopBoundSplit.cpp
M llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp
M llvm/unittests/IR/PatternMatch.cpp
Log Message:
-----------
[PatternMatch] Use `m_SpecificCmp` matchers. NFC. (#100878)
Compile-time improvement:
http://llvm-compile-time-tracker.com/compare.php?from=13996378d81c8fa9a364aeaafd7382abbc1db83a&to=861ffa4ec5f7bde5a194a7715593a1b5359eb581&stat=instructions:u
baseline: 803eaf29267c6aae9162d1a83a4a2ae508b440d3
```
Top 5 improvements:
stockfish/movegen.ll 2541620819 2538599412 -0.12%
minetest/profiler.cpp.ll 431724935 431246500 -0.11%
abc/luckySwap.c.ll 581173720 580581935 -0.10%
abc/kitTruth.c.ll 2521936288 2519445570 -0.10%
abc/extraUtilTruth.c.ll 1216674614 1215495502 -0.10%
Top 5 regressions:
openssl/libcrypto-shlib-sm4.ll 1155054721 1155943201 +0.08%
openssl/libcrypto-lib-sm4.ll 1155054838 1155943063 +0.08%
spike/vsm4r_vv.ll 1296430080 1297039258 +0.05%
spike/vsm4r_vs.ll 1312496906 1313093460 +0.05%
nuttx/lib_rand48.c.ll 126201233 126246692 +0.04%
Overall: -0.02112308%
```
Commit: aef9a89c85db61783cd7484d8f114103e22f8953
https://github.com/llvm/llvm-project/commit/aef9a89c85db61783cd7484d8f114103e22f8953
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M libc/src/compiler/generic/__stack_chk_fail.cpp
Log Message:
-----------
[NFC] add newline after stack smashing message (#100958)
<img width="662" alt="smash newline"
src="https://github.com/user-attachments/assets/99625bcb-efd6-4733-aa01-2a2167ee686f">
Commit: 279953f1da7d7d0e404638414deec5d1df291c7c
https://github.com/llvm/llvm-project/commit/279953f1da7d7d0e404638414deec5d1df291c7c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Simplify code in decomposeMulByConstant. NFC (#100946)
We already checked that the type is a scalar integer, so the constant
node should definitely be a ConstantSDNode. We can use cast instead of
dyn_cast.
Commit: ad8cc88b1b84bd4d450824259eee5436e85309a9
https://github.com/llvm/llvm-project/commit/ad8cc88b1b84bd4d450824259eee5436e85309a9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rv64zba.ll
Log Message:
-----------
[RISCV] Rename a few test cases for accuracy. NFC
The tests are for slliuw rather than slliw.
Commit: 71d85ca2f9dba7f08a7a84c6cff5396ed594cb3c
https://github.com/llvm/llvm-project/commit/71d85ca2f9dba7f08a7a84c6cff5396ed594cb3c
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/RISCV/rvv-cfi-info.ll
Log Message:
-----------
[RISCV][CFI] Emit cfi_offset for every callee-saved vector registers (#100455)
The grouped vector register is modeled as a single register, e.g. V2M2,
which is actually V2 and V3. We need to decompose the grouped vector
register(if any) to individual vector register when emitting CFIs in
prologue.
Fixed https://github.com/llvm/llvm-project/issues/94500
Commit: 43d0bb571b42609b454723fab7421d301d35e1b1
https://github.com/llvm/llvm-project/commit/43d0bb571b42609b454723fab7421d301d35e1b1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rv64zba.ll
Log Message:
-----------
[RISCV] Add more srli+slli.uw tests cases for #100936. NFC
Commit: 0953fb4c68380760562e61a5a09979359eb498c1
https://github.com/llvm/llvm-project/commit/0953fb4c68380760562e61a5a09979359eb498c1
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/test/Driver/immediate-options.c
Log Message:
-----------
[Driver] Ensure -W<warning> gets HelpHidden
Individual groups should not be displayed in --help. Fix two violations
and change the test to prevent regression.
Commit: 8e2476e102e8ce3ae496b293bacccb248787404d
https://github.com/llvm/llvm-project/commit/8e2476e102e8ce3ae496b293bacccb248787404d
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] Move SymbolAux into Ctx. NFC
The number of uses is modest.
Commit: 5cddc314c8928ead12bb9c07cbefa45ee410de5c
https://github.com/llvm/llvm-project/commit/5cddc314c8928ead12bb9c07cbefa45ee410de5c
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M libc/test/integration/src/pthread/pthread_rwlock_test.cpp
Log Message:
-----------
[libc] fix rwlock test (#100962)
Previous commit uses wrong clock id and forget to release an additional
rdlock. cc @Eric977
Sorry for missing this in my initial review.
Fixes https://github.com/llvm/llvm-project/issues/100960.
Notice that the timestamp is created via
```c++
LIBC_NAMESPACE::clock_gettime(CLOCK_REALTIME, &ts);
ts.tv_nsec += 50'000;
if (ts.tv_nsec >= 1'000'000'000) {
ts.tv_nsec -= 1'000'000'000;
ts.tv_sec += 1;
}
```
Commit: dfdef2cbf738dd1cae99fb521d49086fcbbaf19a
https://github.com/llvm/llvm-project/commit/dfdef2cbf738dd1cae99fb521d49086fcbbaf19a
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M libc/fuzzing/math/RemQuoDiff.h
M libc/fuzzing/stdlib/strtofloat_fuzz.cpp
M libc/test/src/math/cbrt_test.cpp
M libc/test/utils/FPUtil/x86_long_double_test.cpp
Log Message:
-----------
[libc] Fix the remaining isnan and isinf in tests. (#100969)
Fixes https://github.com/llvm/llvm-project/issues/100964
Commit: 34d48279b8161d2510fff9e94e10c9508d5249f8
https://github.com/llvm/llvm-project/commit/34d48279b8161d2510fff9e94e10c9508d5249f8
Author: Kazu Hirata <kazu at google.com>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/ExecutionEngine/MCJIT/MCJIT.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/Target/PowerPC/PPCGenScalarMASSEntries.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
Log Message:
-----------
[llvm] Initialize SmallVector with ranges (NFC) (#100948)
Commit: de5aa8d0060cbe286c9cbae90ca8f197b92a3956
https://github.com/llvm/llvm-project/commit/de5aa8d0060cbe286c9cbae90ca8f197b92a3956
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/include/llvm/MC/MCFragment.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Log Message:
-----------
[MC] Remove unused MCCompactEncodedInstFragment
This has been used after #94950.
Commit: 034d01422b5fd8f502ccb45ce95da108415a39a6
https://github.com/llvm/llvm-project/commit/034d01422b5fd8f502ccb45ce95da108415a39a6
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-28 (Sun, 28 Jul 2024)
Changed paths:
M llvm/include/llvm/MC/MCFragment.h
Log Message:
-----------
[MC] Remove MCEncodedFragmentWithContents
MCEncodedFragmentWithFixups can derive from MCEncodedFragment directly.
Follow-up to de5aa8d0060cbe286c9cbae90ca8f197b92a3956.
Commit: 73c72f2c6505d5bc8b47bb0420f6cba5b24270fe
https://github.com/llvm/llvm-project/commit/73c72f2c6505d5bc8b47bb0420f6cba5b24270fe
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/lib/Analysis/LiveVariables.cpp
M clang/test/Analysis/live-stmts.cpp
A clang/test/Analysis/short-circuiting-eval.cpp
Log Message:
-----------
[analyzer] Keep alive short-circuiting condition subexpressions in a conditional (#100745)
Fix the false negative caused by state merging in the evaluation of a
short-circuiting expression inside the condition of a ternary operator.
The fixed symptom is that CSA always evaluates `(x || x) ? n : m` to
`m`.
This change forces the analyzer to consider all logical expressions
prone to short-circuiting alive until the entire conditional expression
is evaluated. Here is why.
By default, LiveVariables analysis marks only direct subexpressions as
live relative to any expression. So for `a ? b : c` it will consider
`a`, `b`, and `c` alive when evaluating the ternary operator expression.
To explore both possibilities opened by a ternary operator, it is
important to keep something different about the exploded nodes created
after the evaluation of its branches. These two nodes come to the same
location, so they must have different states. Otherwise, they will be
considered identical and can engender only one outcome.
`ExprEngine::visitGuardedExpr` chooses the first predecessor exploded
node to carry the value of the conditional expression. It works well in
the case of a simple condition, because when `a ? b : c` is evaluated,
`a` is kept alive, so the two branches differ in the value of `a`.
However, before this patch is applied, this strategy breaks for `(x ||
x) ? n : m`. `x` is not a direct child of the ternary expression. Due to
short-circuiting, once `x` is assumed to be `true`, evaluation jumps
directly to `n` and then to the result of the entire ternary expression.
Given that the result of the entire condition `(x || x)` is not
constructed, and `x` is not kept alive, the difference between the path
coming through `n` and through `m` disappears. As a result, exploded
nodes coming from the "true expression" and the "false expression"
engender identical successors and merge the execution paths.
Commit: 33a50e0eaa80cf3db1b944762db9a37a06f3ac32
https://github.com/llvm/llvm-project/commit/33a50e0eaa80cf3db1b944762db9a37a06f3ac32
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M compiler-rt/CMakeLists.txt
Log Message:
-----------
[compiler-rt][test] Disable lld tests on SPARC (#100533)
As detailed in Issue #100320, a considerable number of tests that
explicitly use `-fuse-ld=lld` `FAIL` on Linux/sparc64 due to several
`lld` limitations (no 32-bit SPARC support, lack of support for various
relocations, ...).
To reduce the noise, this patch disables `COMPILER_RT_HAS_LLD` on SPARC
wholesale.
Tested on `sparc64-unknown-linux-gnu`.
Commit: 5d2c324fea2d7cf86ec50e4bb6b680acf89b2ed5
https://github.com/llvm/llvm-project/commit/5d2c324fea2d7cf86ec50e4bb6b680acf89b2ed5
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
Log Message:
-----------
Remove a leftover debug-only statement in CheckExprLifetime.cpp
Commit: f6d1d6fe7b7f04db7f0a445c8bc3e63fcdcd8e0a
https://github.com/llvm/llvm-project/commit/f6d1d6fe7b7f04db7f0a445c8bc3e63fcdcd8e0a
Author: Manish Kausik H <46352931+Nirhar at users.noreply.github.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/X86/unaligned_extract_from_vector_through_stack.ll
Log Message:
-----------
[SelectionDAG] Use unaligned store to legalize `EXTRACT_VECTOR_ELT` type when Stack is non-realignable (#98176)
This patch ports the commit a6614ec5b7c1dbfc4b847884c5de780cf75e8e9c to
SelectionDAG TypeLegalization.
Fixes #98044
Co-authored-by: Manish Kausik H <hmamishkausik at gmail.com>
Commit: 2db0c00e6092947fa07cc587c4a7537213bbc093
https://github.com/llvm/llvm-project/commit/2db0c00e6092947fa07cc587c4a7537213bbc093
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
A clang/test/CodeGenCXX/debug-info-explicit-this.cpp
Log Message:
-----------
[clang][CGDebugInfo] Don't generate an implicit 'this' parameter if one was specified explicitly (#100767)
Currently we would unconditionally add an implicit `this` parameter when
creating an instance method type. However, when we have an explicit
'this', we shouldn't generate one. This patch only passes a valid
`ThisPtr` type to `getOrCreateInstanceMethodType` if one wasn't
explicitly specified. There's no way to get a pointer to a member
function with an explicit `this` parameter (those are treated as regular
function pointers instead). So there's no need to account for that case
in `CGDebugInfo::CreateType`.
Fixes https://github.com/llvm/llvm-project/issues/99744
Commit: 31769e4d0892312948812fbc2d0a56249ea72492
https://github.com/llvm/llvm-project/commit/31769e4d0892312948812fbc2d0a56249ea72492
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/include/clang/AST/ASTImporter.h
M clang/include/clang/AST/DeclCXX.h
M clang/lib/AST/ASTImporter.cpp
M clang/unittests/AST/ASTImporterTest.cpp
Log Message:
-----------
Revert "Reland [clang][ASTImport] Add support for import of empty records" (#100903)
This reverts commit 88e5206f2c96a34e23a4d63f0a38afb2db044f0a. The
original change went in a while ago (last year) in
https://reviews.llvm.org/D145057. The specific reason I'm proposing a
revert is that this is now causing exactly the issue that @balazske
predicted in https://reviews.llvm.org/D145057#4164717:
> Problematic case is if the attribute has pointer to a Decl or Type
that is imported here in a state when the field is already created but
not initialized. Another problem is that attributes are added a second
time in Import(Decl *)
This now came up in the testing of LLDB support for
https://github.com/llvm/llvm-project/issues/93069. There,
`__compressed_pair`s are now replaced with fields that have an
`alignof(...)` and `[[no_unique_address]]` attribute. In the specific
failing case, we're importing following `std::list` method:
```
size_type& __sz() _NOEXCEPT { return __size_; }
```
During this process, we create a new `__size_` `FieldDecl` (but don't
initialize it yet). Then we go down the `ImportAttrs` codepath added in
D145057. This imports the `alignof` expression which then references the
uninitialized `__size_` and we trigger an assertion.
Important to note, this codepath was added specifically to support
`[[no_unique_address]]` in LLDB, and was supposed to land with
https://reviews.llvm.org/D143347. But the LLDB side of that never
landed, and the way we plan to support `[[no_unique_address]]` doesn't
require things like the `markEmpty` method added here. So really, this
is a dead codepath, which as pointed out in the original review isn't
fully sound.
Commit: 3a2ef3a6348786b139b66c17febc87925da5d506
https://github.com/llvm/llvm-project/commit/3a2ef3a6348786b139b66c17febc87925da5d506
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
R llvm/test/Analysis/CostModel/AMDGPU/arith-fp.ll
A llvm/test/Analysis/CostModel/AMDGPU/arithmetic_fence.ll
A llvm/test/Analysis/CostModel/AMDGPU/canonicalize.ll
A llvm/test/Analysis/CostModel/AMDGPU/copysign.ll
A llvm/test/Analysis/CostModel/AMDGPU/exp.ll
A llvm/test/Analysis/CostModel/AMDGPU/exp10.ll
A llvm/test/Analysis/CostModel/AMDGPU/exp2.ll
M llvm/test/Analysis/CostModel/AMDGPU/fabs.ll
M llvm/test/Analysis/CostModel/AMDGPU/fma.ll
M llvm/test/Analysis/CostModel/AMDGPU/fmul.ll
A llvm/test/Analysis/CostModel/AMDGPU/fmuladd.ll
M llvm/test/Analysis/CostModel/AMDGPU/fneg.ll
A llvm/test/Analysis/CostModel/AMDGPU/frexp.ll
A llvm/test/Analysis/CostModel/AMDGPU/is_fpclass.ll
A llvm/test/Analysis/CostModel/AMDGPU/ldexp.ll
A llvm/test/Analysis/CostModel/AMDGPU/log.ll
A llvm/test/Analysis/CostModel/AMDGPU/log10.ll
A llvm/test/Analysis/CostModel/AMDGPU/log2.ll
A llvm/test/Analysis/CostModel/AMDGPU/maximum.ll
A llvm/test/Analysis/CostModel/AMDGPU/maxnum.ll
A llvm/test/Analysis/CostModel/AMDGPU/minimum.ll
A llvm/test/Analysis/CostModel/AMDGPU/minnum.ll
A llvm/test/Analysis/CostModel/AMDGPU/ptrmask.ll
A llvm/test/Analysis/CostModel/AMDGPU/sqrt.ll
A llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
Log Message:
-----------
AMDGPU: Add some baseline cost model tests (#100797)
Commit: 5430f73b501f9fc0a38c3768592f5f31bcbdf2f0
https://github.com/llvm/llvm-project/commit/5430f73b501f9fc0a38c3768592f5f31bcbdf2f0
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/test/CodeGen/aarch64-sme-inline-streaming-attrs.c
Log Message:
-----------
[Clang] Demote always_inline error to warning for mismatching SME attrs (#100740)
PR #77936 introduced a diagnostic to avoid calls being inlined into
functions with a different streaming mode, because inlining those
functions may result in different runtime behaviour. This was necessary
because LLVM doesn't check whether inlining is possible and thus blindly
inlines the function without checking feasibility.
In practice however, this introduces an artificial restriction that the
user may not be able to work around. Calling an `always_inline` function
from some header file that is out of the control of the user would
result in an error that the user cannot remedy.
Therefore, this patch demotes the error into a warning (for calls from
streaming[-compatible] -> non-streaming), but the proper fix would be to
fix the AlwaysInliner in LLVM to avoid inlining when it has analyzed the
callee and has determined that inlining is not possible.
Calling an always_inline function for calls from non-streaming ->
streaming will remain an error, because there is little pre-existing
code for SME, so it is expected that the header file can be modified by
the user (e.g. by using `__arm_streaming_compatible` if the code is
claimed to be compatible).
Commit: d72c8b02802c87386f5db3c7de6c79e921618fa3
https://github.com/llvm/llvm-project/commit/d72c8b02802c87386f5db3c7de6c79e921618fa3
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M lldb/include/lldb/Symbol/SymbolFile.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
M lldb/test/API/lang/c/struct_types/main.c
A lldb/test/Shell/SymbolFile/DWARF/vla.cpp
Log Message:
-----------
[lldb][TypeSystemClang] Create VLAs of explicitly 0-size as ConstantArrayType (#100710)
Depends on https://github.com/llvm/llvm-project/pull/100674
Currently, we treat VLAs declared as `int[]` and `int[0]` identically.
I.e., we create them as `IncompleteArrayType`s. However, the
`DW_AT_count` for `int[0]` *does* exist, and is retrievable without an
execution context. This patch decouples the notion of "has 0 elements"
from "has no known `DW_AT_count`".
This aligns with how Clang represents `int[0]` in the AST (it treats it
as a `ConstantArrayType` of 0 size).
This issue was surfaced when adapting LLDB to
https://github.com/llvm/llvm-project/issues/93069. There, the
`__compressed_pair_padding` type has a `char[0]` member. If we
previously got the `__compressed_pair_padding` out of a module (where
clang represents `char[0]` as a `ConstantArrayType`), and try to merge
the AST with one we got from DWARF (where LLDB used to represent
`char[0]` as an `IncompleteArrayType`), the AST structural equivalence
check fails, resulting in silent ASTImporter failures. This manifested
in a failure in `TestNonModuleTypeSeparation.py`.
**Implementation**
1. Adjust `ParseChildArrayInfo` to store the element counts of each VLA
dimension as an `optional<uint64_t>`, instead of a regular `uint64_t`.
So when we pass this down to `CreateArrayType`, we have a better
heuristic for what is an `IncompleteArrayType`.
2. In `TypeSystemClang::GetBitSize`, if we encounter a
`ConstantArrayType` simply return the size that it was created with. If
we couldn't determine the authoritative bound from DWARF during parsing,
we would've created an `IncompleteArrayType`. This ensures that
`GetBitSize` on arrays with `DW_AT_count 0x0` returns `0` (whereas
previously it would've returned a `std::nullopt`, causing that
`FieldDecl` to just get dropped during printing)
Commit: 5bd3aef5e285cce793e3fc6b21299ac9d650a947
https://github.com/llvm/llvm-project/commit/5bd3aef5e285cce793e3fc6b21299ac9d650a947
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SMInstructions.td
Log Message:
-----------
[AMDGPU] Use a generic printer for NamedIntOperands. (#100399)
This includes simplifying printing dmask modifiers where we don't need
to mask the value to print.
Part of <https://github.com/llvm/llvm-project/issues/62629>.
Commit: e3a3397209fe05ec65d74e9096347fc7a76e919e
https://github.com/llvm/llvm-project/commit/e3a3397209fe05ec65d74e9096347fc7a76e919e
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/test/CodeGen/aarch64-sme-inline-streaming-attrs.c
Log Message:
-----------
Revert "[Clang] Demote always_inline error to warning for mismatching SME attrs" (#100991)
Reverts llvm/llvm-project#100740
Commit: d86311f293ebc3867733d4453e0d6c929e620d8b
https://github.com/llvm/llvm-project/commit/d86311f293ebc3867733d4453e0d6c929e620d8b
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/test/Driver/omp-driver-offload.f90
M flang/test/Driver/target-cpu-features.f90
M flang/test/Driver/target-gpu-features.f90
Log Message:
-----------
[Flang-new][OpenMP] Add bitcode files for AMD GPU OpenMP (#96742)
Flang-new needs to add `mlink-builtin-bitcode` objects to properly
support offload code generation for AMD GPUs (for example, math
functions).
Both Flang-new and Clang rely on `mlink-builtin-bitcode` flags. These
flags are added by the `AMDGPUOpenMPToolchain::addClangTargetOptions`
function. Now, both compilers reuse the same function.
Flang-new tests for AMDGPU were updated by adding the `-nogpulib` flag.
This flag allows running AMDGPU tests on machines without the ROCm stack.
Commit: 0362a29905ab8d68a8eb48741840a514b66552f8
https://github.com/llvm/llvm-project/commit/0362a29905ab8d68a8eb48741840a514b66552f8
Author: martinboehme <mboehme at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/AdornedCFG.h
M clang/lib/Analysis/FlowSensitive/AdornedCFG.cpp
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/lib/Analysis/FlowSensitive/TypeErasedDataflowAnalysis.cpp
M clang/unittests/Analysis/FlowSensitive/TypeErasedDataflowAnalysisTest.cpp
Log Message:
-----------
[clang][dataflow] Fix bug in `buildContainsExprConsumedInDifferentBlock()`. (#100874)
This was missing a call to `ignoreCFGOmittedNodes()`. As a result, the
function
would erroneously conclude that a block did not contain an expression
consumed
in a different block if the expression in question was surrounded by a
`ParenExpr` in the consuming block. The patch adds a test that triggers
this
scenario (and fails without the fix).
To prevent this kind of bug in the future, the patch also adds a new
method
`blockForStmt()` to `AdornedCFG` that calls `ignoreCFGOmittedNodes()`
and is
preferred over accessing `getStmtToBlock()` directly.
Commit: 03e17da510963ce6b7a1d0ab4d67f753a6cc7495
https://github.com/llvm/llvm-project/commit/03e17da510963ce6b7a1d0ab4d67f753a6cc7495
Author: Nabeel Omer <nabeel.omer at sony.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/CodeGen/DebugHandlerBase.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
M llvm/test/CodeGen/X86/fsafdo_test1.ll
M llvm/test/CodeGen/X86/fsafdo_test4.ll
A llvm/test/DebugInfo/X86/loop-align-debug.ll
Log Message:
-----------
[DWARF] Emit line 0 source locations for BB padding nops (#99496)
This patch makes LLVM emit line 0 source locations for nops emitted as
basic block padding.
---------
Co-authored-by: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Commit: a347bdb2b828272359e49a8ce9de9d6412950838
https://github.com/llvm/llvm-project/commit/a347bdb2b828272359e49a8ce9de9d6412950838
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
R llvm/test/Transforms/SimplifyCFG/AMDGPU/skip-threading.ll
M llvm/test/Transforms/SimplifyCFG/convergent.ll
Log Message:
-----------
Revert "[SimplifyCFG] Skip threading if the target may have divergent branches" (#100994)
Reverts llvm/llvm-project#100185
See comments on PR (PR not accepted, outstanding review comments, breaks HIP-clang buildbot)
Commit: fdfeea5bd6763277b5078e33e17e1bfc521a6cba
https://github.com/llvm/llvm-project/commit/fdfeea5bd6763277b5078e33e17e1bfc521a6cba
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Transforms/OMPMapInfoFinalization.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauseOperands.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
Log Message:
-----------
[MLIR][OpenMP][Flang] Normalize clause arguments names (#99505)
Currently, there are some inconsistencies to how clause arguments are
named in the OpenMP dialect. Additionally, the clause operand structures
associated to them also diverge in certain cases. The purpose of this
patch is to normalize argument names across all `OpenMP_Clause` tablegen
definitions and clause operand structures.
This has the benefit of providing more consistent representations for
clauses in the dialect, but the main short-term advantage is that it
enables the development of an OpenMP-specific tablegen backend to
automatically generate the clause operand structures without breaking
dependent code.
The main re-naming decisions made in this patch are the following:
- Variadic arguments (i.e. multiple values) have the "_vars" suffix.
This and other similar suffixes are removed from array attribute
arguments.
- Individual required or optional value arguments do not have any suffix
added to them (e.g. "val", "var", "expr", ...), except for `if` which
would otherwise result in an invalid C++ variable name.
- The associated clause's name is prepended to argument names that don't
already contain it as part of its name. This avoids future collisions
between arguments named the same way on different clauses and adding
both clauses to the same operation.
- Privatization and reduction related arguments that contain lists of
symbols pointing to privatizer/reducer operations use the "_syms"
suffix. This removes the inconsistencies between the names for
"copyprivate_funcs", "[in]reductions", "privatizers", etc.
- General improvements to names, replacement of camel case for snake
case everywhere, etc.
- Renaming of operation-associated operand structures to use the
"Operands" suffix in place of "ClauseOps", to better differentiate
between clause operand structures and operation operand structures.
- Fields on clause operand structures are sorted according to the
tablegen definition of the same clause.
The assembly format for a few arguments is updated to better reflect the
clause they are associated with:
- `chunk_size` -> `dist_schedule_chunk_size`
- `grain_size` -> `grainsize`
- `simd` -> `par_level_simd`
Commit: 389679d5f9055bffe8bbd25ae41f084a8d08e0f8
https://github.com/llvm/llvm-project/commit/389679d5f9055bffe8bbd25ae41f084a8d08e0f8
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/test/CodeGen/aarch64-sme-inline-streaming-attrs.c
Log Message:
-----------
Reland: "[Clang] Demote always_inline error to warning for mismatching SME attrs" (#100991) (#100996)
Test `aarch64-sme-inline-streaming-attrs.c` caused some buildbot
failures, because the test was missing a `REQUIRES: aarch64-registered
target`. This was because we've demoted the error to a warning, which
then resulted in a different error message, because Clang can't actually
CodeGen the IR.
Commit: 46ecd7bbe895c12f77feea7353da43c32d1a8a41
https://github.com/llvm/llvm-project/commit/46ecd7bbe895c12f77feea7353da43c32d1a8a41
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauseOperands.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[MLIR][OpenMP] Create `LoopRelatedClause` (#99506)
This patch introduces a new OpenMP clause definition not defined by the spec.
Its main purpose is to define the `loop_inclusive` (previously "inclusive",
renamed according to the parent of this PR in the stack) argument of
`omp.loop_nest` in such a way that a followup implementation of a tablegen
backend to automatically generate clause and operation operand structures
directly from `OpenMP_Op` and `OpenMP_Clause` definitions can properly generate
the `LoopNestOperands` structure.
`collapse` clause arguments are also moved into this new definition, as they
represent information on the loop nests being collapsed rather than the
`collapse` clause itself.
Commit: 0a94511aec7a41194c0e61d88801312542ff70ce
https://github.com/llvm/llvm-project/commit/0a94511aec7a41194c0e61d88801312542ff70ce
Author: Mitch Phillips <31459023+hctim at users.noreply.github.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M compiler-rt/lib/gwp_asan/definitions.h
M compiler-rt/lib/gwp_asan/platform_specific/guarded_pool_allocator_fuchsia.cpp
M compiler-rt/lib/gwp_asan/platform_specific/guarded_pool_allocator_posix.cpp
M compiler-rt/lib/gwp_asan/platform_specific/utilities_fuchsia.cpp
M compiler-rt/lib/gwp_asan/platform_specific/utilities_posix.cpp
M compiler-rt/lib/gwp_asan/tests/CMakeLists.txt
A compiler-rt/lib/gwp_asan/tests/utilities.cpp
M compiler-rt/lib/gwp_asan/utilities.h
Log Message:
-----------
Log errno (or fuchsia equivalent) on map failures (#95391)
A feature requested by Android, we should log errno (or the
corresponding fuchsia error status) as part of the message when
mmap/mprotect/etc. fails.
Commit: 102f322557b0969ea5b85448df1b03508554218c
https://github.com/llvm/llvm-project/commit/102f322557b0969ea5b85448df1b03508554218c
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauseOperands.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[MLIR][OpenMP] Add missing clauses to OpenMP op definitions (#99507)
This patch adds the missing `OpenMP_Clause` definitions to all existing
`OpenMP_Op`s and updates their operand structure based builders to
initialize the new arguments.
The result of this change is that operation operand structures are now
based in the same list of clauses as their tablegen counterparts. This
means that all of the information needed is now in place to
automatically generate OpenMP operand structures from tablegen
defitions.
Since this change doesn't involve the introduction of actual support for
these clauses, new arguments are not initialized from values stored in
the corresponding operand structure fields but rather set to empty or
null. Those should be updated when support for these clauses on the
corresponding operation is added.
Commit: 19b785b7334d01354e8430634bab3c3341c671ca
https://github.com/llvm/llvm-project/commit/19b785b7334d01354e8430634bab3c3341c671ca
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/shuffle-other.ll
M llvm/test/Transforms/VectorCombine/AArch64/select-shuffle.ll
Log Message:
-----------
Revert "[AArch64] Remove special-case inserted shuffle cost."
This reverts commit f67fa3be4db68afc08c7f3d9523f1533fa5687b7.
Caused test suite failures on AArch64:
https://lab.llvm.org/buildbot/#/builders/17/builds/1349
Commit: d1f3a92ea9c491855b3186e84115fefe7c4185ee
https://github.com/llvm/llvm-project/commit/d1f3a92ea9c491855b3186e84115fefe7c4185ee
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/shuffle-other.ll
M llvm/test/Transforms/VectorCombine/AArch64/select-shuffle.ll
Log Message:
-----------
Revert "[AArch64] Remove special-case inserted shuffle cost."
This reverts commit 19b785b7334d01354e8430634bab3c3341c671ca.
My bisect must have been wrong because they're still failing,
and there are follow ups to this that would need unpicking anyway.
Commit: 9e462b7ea23ea864b1f3f3b72d25cfbed95149d5
https://github.com/llvm/llvm-project/commit/9e462b7ea23ea864b1f3f3b72d25cfbed95149d5
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
Log Message:
-----------
[LowerMemIntrinsics][NFC] Use Align in TTI::getMemcpyLoopLoweringType (#100984)
...and also in TTI::getMemcpyLoopResidualLoweringType.
Commit: 1f38301957c1f41722e219ede5d56d67c000213e
https://github.com/llvm/llvm-project/commit/1f38301957c1f41722e219ede5d56d67c000213e
Author: Julien Schueller <schueller at phimeca.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M mlir/lib/Dialect/Affine/Analysis/CMakeLists.txt
Log Message:
-----------
[mlir] Fix missing FuncOps.h.inc (#97885)
Closes #84568
Similar to #71691 (reproduce with make -j1)
Commit: f7491f53cbef28ecea764a6a47ae69338fb7afbe
https://github.com/llvm/llvm-project/commit/f7491f53cbef28ecea764a6a47ae69338fb7afbe
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/ctpop-pow2.ll
M llvm/test/Transforms/InstCombine/ctpop.ll
M llvm/test/Transforms/InstCombine/icmp-ne-pow2.ll
M llvm/test/Transforms/InstCombine/ispow2.ll
Log Message:
-----------
[InstCombine] Reduce range of ctpop for non zero argument (#100899)
Commit: 13d39cb6f7b20e596b66f59ebf4dba766451398b
https://github.com/llvm/llvm-project/commit/13d39cb6f7b20e596b66f59ebf4dba766451398b
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/test/Analysis/stream.c
Log Message:
-----------
[analyzer] Fix crash of StreamChecker when eval calling 'fopen' (#100990)
Actually, on the failure branch of `fopen`, the resulting pointer could
alias with `stdout` iff `stdout` is already known to be null.
We crashed in this case as the implementation assumed that the
state-split for creating the success and failure branches both should be
viable; thus dereferenced both of those states - leading to the crash.
To fix this, let's just only add this no-alias property for the success
path, and that's it :)
Fixes #100901
Commit: 77655f42d58e85875c4b4e28a73208b64a653c2a
https://github.com/llvm/llvm-project/commit/77655f42d58e85875c4b4e28a73208b64a653c2a
Author: Ingo Müller <ingomueller at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
Log Message:
-----------
[mlir][arith] Assert preconditions in `BitcastOp::fold`. (#100743)
This PR adds an assertion to `BitcastOp::fold` that fails if that
function is called on invalid IR. That can happen when patterns, passes,
etc. create (invalid) IR using builders and folding is triggered on that
IR before verification, for example, through `OpBuilder::createOrFold`.
The new assert triggers earlier than previously in order to help getting
to the root cause faster.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: e6fa09f445f172bfd0c011adc6bf36e38816b781
https://github.com/llvm/llvm-project/commit/e6fa09f445f172bfd0c011adc6bf36e38816b781
Author: Thomas Hashem <35398565+hashemthomas1 at users.noreply.github.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
A llvm/test/Transforms/SCCP/float-denormal-simplification.ll
Log Message:
-----------
[SCCP] Add context to SimplifyQuery (#100831)
Commit: 4cdc19b84cf48189e40915178d60991f6fc469b2
https://github.com/llvm/llvm-project/commit/4cdc19b84cf48189e40915178d60991f6fc469b2
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Exceptions.h
M flang/include/flang/Runtime/exceptions.h
M flang/include/flang/Runtime/magic-numbers.h
M flang/lib/Evaluate/real.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Exceptions.cpp
M flang/lib/Optimizer/Builder/Runtime/Numeric.cpp
M flang/runtime/exceptions.cpp
M flang/test/Evaluate/fold-nearest.f90
A flang/test/Lower/Intrinsics/ieee_next.f90
M flang/test/Lower/Intrinsics/nearest.f90
M flang/unittests/Optimizer/Builder/Runtime/NumericTest.cpp
Log Message:
-----------
[flang] IEEE_NEXT_AFTER, IEEE_NEXT_DOWN, IEEE_NEXT_UP, NEAREST (#100782)
IEEE_ARITHMETIC intrinsic module procedures IEEE_NEXT_AFTER,
IEEE_NEXT_DOWN, and IEEE_NEXT_UP, and intrinsic NEAREST return larger or
smaller values adjacent to their primary REAL argument. The four
procedures vary in how the direction is chosen, in how special cases are
treated, and in what exceptions are generated. Implement the three
IEEE_ARITHMETIC procedures. Update the NEAREST implementation to support
all six REAL kinds 2,3,4,8,10,16, and fix several bugs.
IEEE_NEXT_AFTER(X,Y) returns a NaN when Y is a NaN as that seems to be
the universal choice of other compilers.
Change the front end compile time implementation of these procedures to
return normal (HUGE) values for infinities when applicable, rather than
always returning the input infinity.
Commit: f7e9d48a73dd68c8b652692d8a9e559a6ceb722e
https://github.com/llvm/llvm-project/commit/f7e9d48a73dd68c8b652692d8a9e559a6ceb722e
Author: Braden Helmer <bradenhelmeraus at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaOverload.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
Log Message:
-----------
[Clang] Fix confusing diagnositcs related to explicit this parameters (#100351)
Fixes #97878.
This PR improves diagnostics related to explicit 'this' parameters.
Previously, the 'this' parameter would be incorrectly underlined when
diagnosing a bad conversion.
Commit: ad778889cf5ce74be3193fae1d3b2bce34a56863
https://github.com/llvm/llvm-project/commit/ad778889cf5ce74be3193fae1d3b2bce34a56863
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
Log Message:
-----------
[DAG] Add SDPatternMatch for VScale nodes
Commit: d2304427cb0270259bc083a3db27413823f56e59
https://github.com/llvm/llvm-project/commit/d2304427cb0270259bc083a3db27413823f56e59
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG][NFC] Use SDPatternMatch for VScale in some instances
Commit: e1065370aaacb1b1cb48e77d37d376bf024f4a39
https://github.com/llvm/llvm-project/commit/e1065370aaacb1b1cb48e77d37d376bf024f4a39
Author: Luke Lau <luke at igalia.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfptoi-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/insertelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/unmasked-ta.ll
M llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll
M llvm/test/CodeGen/RISCV/rvv/vfmv.s.f.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
Log Message:
-----------
[RISCV] Remove vfmv.s.f and vfmv.f.s lmul pseudo variants (#100970)
In #71501 we removed the LMUL variants for vmv.s.x and vmv.x.s because
they ignore register groups, so this patch does the same for their
floating point equivalents.
We don't need to add any extra patterns for extractelt in
RISCVInstrInfoVSDPatterns.td because in lowerEXTRACT_VECTOR_ELT we make
sure that the node is narrowed down to LMUL 1.
Commit: 97c62b8f7501d1c6c2f507b075fbe45a31d2b9dc
https://github.com/llvm/llvm-project/commit/97c62b8f7501d1c6c2f507b075fbe45a31d2b9dc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/test/Driver/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
Log Message:
-----------
[LinkerWrapper] Forward `-mllvm` and `--offload-opt` arguments to device (#100424)
Summary:
Previously we could parse these internally as they would be used by the
embedded LTO job. Now, this LTO is passed to the linker utilities which
means these need to be forwarded. So this can now either be done with
`--offload-opt` which works in the clang job, or with `-Xoffload-linker`
manually.
Fixes https://github.com/llvm/llvm-project/issues/100212
Commit: 77ff969e5d6a561606ea87fbae101195417d4d73
https://github.com/llvm/llvm-project/commit/77ff969e5d6a561606ea87fbae101195417d4d73
Author: Jonathan Peyton <jonathan.l.peyton at intel.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M openmp/runtime/src/kmp_affinity.cpp
M openmp/runtime/src/kmp_affinity.h
Log Message:
-----------
[OpenMP] Add topology and affinity changes for Meteor Lake (#91012)
These are Intel-specific changes for the CPUID leaf 31 method for
detecting machine topology.
* Cleanup known levels usage in x2apicid topology algorithm
Change to be a constant mask of all Intel topology type values.
* Take unknown ids into account when sorting them
If a hardware id is unknown, then put further down the hardware thread
list so it will take last priority when assigning to threads.
* Have sub ids printed out for hardware thread dump
* Add caches to topology
New` kmp_cache_ids_t` class helps create cache ids which are then put
into the topology table after regular topology type ids have been put
in.
* Allow empty masks in place list creation
Have enumeration information and place list generation take into account
that certain hardware threads may be lacking certain layers
* Allow different procs to have different number of topology levels
Accommodates possible situation where CPUID.1F has different depth for
different hardware threads. Each hardware thread has a topology
description which is just a small set of its topology levels. These
descriptions are tracked to see if the topology is uniform or not.
* Change regular ids with logical ids
Instead of keeping the original sub ids that the x2apicid topology
detection algorithm gives, change each id to its logical id which is a
number: [0, num_items - 1]. This makes inserting new layers into the
topology significantly simpler.
* Insert caches into topology
This change takes into account that most topologies are uniform and
therefore can use the quicker method of inserting caches as equivalent
layers into the topology.
Commit: 916a91578f7b367c106859a0b46d8ce573bce36a
https://github.com/llvm/llvm-project/commit/916a91578f7b367c106859a0b46d8ce573bce36a
Author: Jonathan Peyton <jonathan.l.peyton at intel.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M openmp/runtime/src/kmp_affinity.cpp
Log Message:
-----------
[OpenMP] Assign thread ids in the cpuinfo topology method (#91013)
On non-hyperthreaded machines, the thread id is not always explicit in
the /proc/cpuinfo file. This patch adds a check to ensure the thread ids
are put in.
Commit: 3ef922081193ae1c46683f3ca282e700efc9005e
https://github.com/llvm/llvm-project/commit/3ef922081193ae1c46683f3ca282e700efc9005e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/arith-overflow.ll
Log Message:
-----------
[CostModel][X86] Add missing AVX512 vector mul overflow intrinsic costs
Fix regressions in #100519
Commit: 1b4be6a474b3747765a218201bd637f899fd9b66
https://github.com/llvm/llvm-project/commit/1b4be6a474b3747765a218201bd637f899fd9b66
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/test/CodeGen/ARM/vselect_imax.ll
Log Message:
-----------
[ARM] Regenerate vselect_imax.ll
Commit: 363c1e6e517281ad387fd91787545d632e7c48b6
https://github.com/llvm/llvm-project/commit/363c1e6e517281ad387fd91787545d632e7c48b6
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M offload/test/offloading/bug51781.c
Log Message:
-----------
[OpenMP] Re-enable test after correctly forwarding `mllvm`
Commit: 53c37f300dd1b450671f2aee4cc649c380adb5ad
https://github.com/llvm/llvm-project/commit/53c37f300dd1b450671f2aee4cc649c380adb5ad
Author: Stefan Pintilie <stefanp at ca.ibm.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
M llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll
M llvm/test/CodeGen/PowerPC/build-vector-tests.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-pwr9-64bit.ll
M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
M llvm/test/CodeGen/PowerPC/combine-fneg.ll
M llvm/test/CodeGen/PowerPC/constant-pool.ll
M llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll
M llvm/test/CodeGen/PowerPC/fma-combine.ll
M llvm/test/CodeGen/PowerPC/fp-strict-round.ll
M llvm/test/CodeGen/PowerPC/frem.ll
M llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
M llvm/test/CodeGen/PowerPC/ldexp.ll
M llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
M llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
M llvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll
M llvm/test/CodeGen/PowerPC/save-reg-params.ll
M llvm/test/CodeGen/PowerPC/select_const.ll
M llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
M llvm/test/CodeGen/PowerPC/subreg-lanemasks.mir
M llvm/test/CodeGen/PowerPC/toc-float.ll
M llvm/test/CodeGen/PowerPC/variable_elem_vec_extracts.ll
M llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/PowerPC/vector-llrint.ll
M llvm/test/CodeGen/PowerPC/vector-lrint.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll
M llvm/test/CodeGen/PowerPC/vsx.ll
Log Message:
-----------
[PowerPC] Add phony subregisters to cover the high half of the VSX registers. (#94628)
On PowerPC there are 128 bit VSX registers. These registers are half
overlapped with 64 bit floating point registers (FPR). The 64 bit half
of the VXS register that does not overlap with the FPR does not overlap
with any other register class. The FPR are the only subregisters of the
VSX registers but they do not fully cover the 128 bit super register.
This leads to incorrect lane masks being created.
This patch adds phony registers for the other half of the VSX registers
in order to fully cover them and to make sure that the lane masks are
not the same for the VSX and the floating point register.
Commit: 64199bf332567aeeff02841022d967325b318075
https://github.com/llvm/llvm-project/commit/64199bf332567aeeff02841022d967325b318075
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
Log Message:
-----------
[libc] make aarch64 libm entrypoints consistent w/ x86-64 (#100963)
Test passes locally.
Commit: 0a1ce1ae62f58eacf98b89487065fedccbc7cd68
https://github.com/llvm/llvm-project/commit/0a1ce1ae62f58eacf98b89487065fedccbc7cd68
Author: Kohei Yamaguchi <fix7211 at gmail.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/Ptr/IR/CMakeLists.txt
Log Message:
-----------
[mlir][doc] Fix docs for `PtrDialect` using the `-gen-dialect-doc`(NFC) (#101013)
Commit: 7647f88234cadf0aed019abb1fc723c6708b871c
https://github.com/llvm/llvm-project/commit/7647f88234cadf0aed019abb1fc723c6708b871c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/rv64zba.ll
Log Message:
-----------
[RISCV] Add isel special case for (and (srl X, c2), c1) -> (slli_uw (srli x, c2+c3), c3). (#100966)
Where c1 is a shifted mask with 32 set bits and c3 trailing zeros.
Fixes #100936.
Commit: 922558f47446fc732aa474f7bffc3190b4ffab43
https://github.com/llvm/llvm-project/commit/922558f47446fc732aa474f7bffc3190b4ffab43
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
Log Message:
-----------
[RISCV] Remove registers from ins of Priv instructions. (#100857)
The rd and rs1 encoding are already forced to 0s. We don't need
registers too.
Commit: 2c37334d8dce7ef7d3ecc8c80522fe73010b12cc
https://github.com/llvm/llvm-project/commit/2c37334d8dce7ef7d3ecc8c80522fe73010b12cc
Author: William Junda Huang <williamjhuang at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SSAUpdaterImpl.h
Log Message:
-----------
[Transforms] Speed up SSAUpdater::FindExistingPHI (#100281)
In SSAUpdater::FindExistingPHI, the cleanup function is inefficient for
large function with many blocks because it clears the Phi value
reference for every block if not matched for every phi value, even if
most blocks are not modified by CheckIfPHIMatches. This behavior is
particularly slow for large functions because the complexity is Θ(# PHI
* # BBs).
Updated the behavior to only clear modified blocks, which in practice
has a much less complexity because of early exit on PHI mismatch.
Commit: 7a2a36f952e5f1c0184e5de0bb8a32b5d2382427
https://github.com/llvm/llvm-project/commit/7a2a36f952e5f1c0184e5de0bb8a32b5d2382427
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.h
M llvm/lib/Target/ARM/ARMMCInstLower.cpp
M llvm/lib/Target/CSKY/CSKYAsmPrinter.cpp
M llvm/lib/Target/CSKY/CSKYAsmPrinter.h
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
Log Message:
-----------
[AsmPrinter] Don't EmitToStreamer instructions lowered by tblgenned code (#100803)
This allows lowering individual instructions in a bundle before a single
call to EmitToStreamer for VLIW targets.
Commit: 7b3db551e499a7ecef6a29c0ffbc923c45277332
https://github.com/llvm/llvm-project/commit/7b3db551e499a7ecef6a29c0ffbc923c45277332
Author: Jannick Kremer <51118500+DeinAlptraum at users.noreply.github.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/bindings/python/clang/cindex.py
Log Message:
-----------
[libclang/python] Export all enums (#100941)
This resolves #48212 and also adds the remaining unexposed Enums
Commit: b66310f938f36557f44042e300e5894e39297b2b
https://github.com/llvm/llvm-project/commit/b66310f938f36557f44042e300e5894e39297b2b
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV][TTI] Split costing of [u/s]int_to_fp from fp_to_[u/s]int [nfc] (#101029)
The amount of code sharing between them is fairly small, and the split
version is much easier to read.
Commit: ee57ce57d8094026e2795182758bc57027a72293
https://github.com/llvm/llvm-project/commit/ee57ce57d8094026e2795182758bc57027a72293
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaInit.cpp
M clang/test/SemaCXX/destructor.cpp
Log Message:
-----------
[Clang] prevent checking destructor reference with an invalid initializer (#97860)
Fixes #97230
Commit: 150bf637baad2ba4df6369600b65d897ed9b31a7
https://github.com/llvm/llvm-project/commit/150bf637baad2ba4df6369600b65d897ed9b31a7
Author: Pavel Skripkin <paskripkin at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/AST/attr-print-emit.cpp
M clang/test/Sema/attr-ownership.c
M clang/test/Sema/attr-ownership.cpp
Log Message:
-----------
[Clang][Sema] Disallow applying `onwership_returns` to functions that return non-pointers (#99564)
`onwership_returns` works only with pointers, since it models
user-defined memory allocation functions. Make semantics more clear and
report an error if attribute is attached to wrong function.
Closes #99501
Commit: e65882fec9689b2232575530bab0776d7c303dae
https://github.com/llvm/llvm-project/commit/e65882fec9689b2232575530bab0776d7c303dae
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
A llvm/test/Transforms/InstCombine/lib-call-exit.ll
Log Message:
-----------
[InstCombine][InferFunctionAttrs] Add tests for inferring `cold` on exit/abort; NFC
Commit: 67fb7c34f11df03ac359571dd4d503a36e06275e
https://github.com/llvm/llvm-project/commit/67fb7c34f11df03ac359571dd4d503a36e06275e
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-07-30 (Tue, 30 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/include/llvm/Transforms/Utils/SimplifyLibCalls.h
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
M llvm/test/Transforms/InstCombine/lib-call-exit.ll
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
Log Message:
-----------
[TLI] Add support for inferring attr `cold` on `exit`/`abort`
`abort` can be assumed always cold and assume non-zero `exit` status
as a `cold` path as well.
Closes #101003
Commit: 135a1e90a3066f61ca741e9ebebfec79c9595ea5
https://github.com/llvm/llvm-project/commit/135a1e90a3066f61ca741e9ebebfec79c9595ea5
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/docs/DirectX/DXILResources.rst
Log Message:
-----------
[DirectX] Update "dx.TypedBuffer" docs to include a "signed" bit (#100695)
To lower these types to dxil we need to know whether ints are signed or
not, but the LLVM type loses that. Add a bit to indicate it's so.
Commit: 0d9b4394081df959b3752283ed9ca303759dda61
https://github.com/llvm/llvm-project/commit/0d9b4394081df959b3752283ed9ca303759dda61
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMask.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
Log Message:
-----------
[mlir][vector] Use `DenseI64ArrayAttr` for constant_mask dim sizes (#100997)
This prevents a bunch of boilerplate conversions to/from IntegerAttrs
and int64_ts. Other than that this is a NFC.
Commit: 2c0ec01b516deba8922c1aae59b1907de6443587
https://github.com/llvm/llvm-project/commit/2c0ec01b516deba8922c1aae59b1907de6443587
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/test/Driver/amdgpu-toolchain.c
Log Message:
-----------
[AMDGPU] Correctly pass the target-id to `ld.lld` (#101037)
Summary:
The `ld.lld` linker handles LTO, but it does not understand the
target-id syntax some AMDGPU targets use. This patch parses the
target-id and passes the processor name in `-mcpu` and features in
`-mattr`.
Commit: 0dd1128d6341283d60150d294a9c4db1ba38f8b2
https://github.com/llvm/llvm-project/commit/0dd1128d6341283d60150d294a9c4db1ba38f8b2
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
Log Message:
-----------
[DAG] Add SDPatternMatch::m_VSelect (#100758)
As per the comment in
https://github.com/llvm/llvm-project/pull/100686#pullrequestreview-2201991135
Commit: 197f4a90519df308d9bfddcc931f7683a5ae9cb9
https://github.com/llvm/llvm-project/commit/197f4a90519df308d9bfddcc931f7683a5ae9cb9
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/external-used-across-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-extractelements-different-bbs.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-gather-non-scheduled-extracts.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
Log Message:
-----------
[SLP]Remove ExtraArgs from reductions.
No need to handle extra arguments during the reductions anymore, the
compiler now can handle all reduced values and reduction operands
correctly, even if they are from different basic blocks.
Simplifies analysis, reduces compiler size, improves overall
vectorization.
Metric: size..text
test-suite :: SingleSource/Benchmarks/Misc-C++/stepanov_container.test 16668.00 17148.00 2.9%
test-suite :: External/SPEC/CINT2006/483.xalancbmk/483.xalancbmk.test 2389675.00 2418683.00 1.2%
test-suite :: MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000.test 253517.00 253645.00 0.1%
test-suite :: MultiSource/Benchmarks/Bullet/bullet.test 309678.00 309806.00 0.0%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 389203.00 389363.00 0.0%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-jpeg/consumer-jpeg.test 111120.00 111152.00 0.0%
test-suite :: MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4.test 1039103.00 1039215.00 0.0%
test-suite :: External/SPEC/CFP2017rate/511.povray_r/511.povray_r.test 1155883.00 1155963.00 0.0%
test-suite :: MicroBenchmarks/LoopVectorization/LoopInterleavingBenchmarks.test 276646.00 276662.00 0.0%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 848691.00 848739.00 0.0%
test-suite :: External/SPEC/CFP2006/453.povray/453.povray.test 1138604.00 1138636.00 0.0%
test-suite :: External/SPEC/CINT2006/445.gobmk/445.gobmk.test 910201.00 910217.00 0.0%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 12385484.00 12385628.00 0.0%
test-suite :: External/SPEC/CINT2017speed/602.gcc_s/602.gcc_s.test 9667580.00 9667676.00 0.0%
test-suite :: External/SPEC/CINT2017rate/502.gcc_r/502.gcc_r.test 9667580.00 9667676.00 0.0%
test-suite :: External/SPEC/CINT2017rate/523.xalancbmk_r/523.xalancbmk_r.test 2856182.00 2856198.00 0.0%
test-suite :: External/SPEC/CINT2017speed/623.xalancbmk_s/623.xalancbmk_s.test 2856182.00 2856198.00 0.0%
test-suite :: External/SPEC/CINT2006/464.h264ref/464.h264ref.test 773224.00 773192.00 -0.0%
test-suite :: MultiSource/Benchmarks/7zip/7zip-benchmark.test 1035148.00 1035084.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/631.deepsjeng_s/631.deepsjeng_s.test 98126.00 98094.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/531.deepsjeng_r/531.deepsjeng_r.test 97966.00 97934.00 -0.0%
test-suite :: MultiSource/Benchmarks/MallocBench/gs/gs.test 167391.00 167215.00 -0.1%
test-suite :: MultiSource/Applications/ALAC/encode/alacconvert-encode.test 56685.00 56605.00 -0.1%
test-suite :: MultiSource/Applications/ALAC/decode/alacconvert-decode.test 56685.00 56605.00 -0.1%
test-suite :: SingleSource/Regression/C/gcc-c-torture/execute/GCC-C-execute-20050826-2.test 1302.00 1294.00 -0.6%
Misc-C++/stepanov_container - better code due to cost fixes.
483.xalancbmk - better code due to cost fixes.
ASCI_Purple/SMG2000 - better code due to cost fixes.
Benchmarks/Bullet - better vector code because of the cost.
JM/ldecod - extra code remain scalar, extra reduction vectorized
consumer-jpeg - extra code remain scalar because of the cost.
tramp3d-v4 - better vectorization because of cost fixes.
511.povray_r - better vectorization because of cost fixes.
LoopInterleavingBenchmarks - extra reductions are vectorized
JM/lencod - small changes in vector code because of extract cost fixes.
453.povray - small changes in vector code because of extract cost fixes.
445.gobmk - extra small reduction vectorized
526.blender_r - extra reduced scalars, better small reduction, small
changes in the vetorization because of the fixes for extracts cost
602.gcc_s
502.gcc_r - small changes in reductions vectorization because of the
fixes in the extract cost.
631.deepsjeng_s
623.xalancbmk_s - small changes in reductions vectorization because of
the fixes in the extract cost.
MallocBench/gs - extra code remain scalar because of extracts cost
alacconvert-encode - extra code remain scalar because of extracts cost
alacconvert-decode - extra code remain scalar because of extracts cost
GCC-C-execute-20050826-2 - extra reduction gets vectorized
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/99923
Commit: 945dd9a740958e3c1230f3661edec53a5d858675
https://github.com/llvm/llvm-project/commit/945dd9a740958e3c1230f3661edec53a5d858675
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/Loads.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[NFC][Load] Find better place for `mustSuppressSpeculation` (#100794)
And extract `suppressSpeculativeLoadForSanitizers`.
For #100639.
Commit: 07f3a08c614afe32b845aa44db5a6a0e44ce24a7
https://github.com/llvm/llvm-project/commit/07f3a08c614afe32b845aa44db5a6a0e44ce24a7
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/Loads.h
M polly/lib/Analysis/ScopBuilder.cpp
M polly/lib/Analysis/ScopDetection.cpp
Log Message:
-----------
[NFC][Load] Make `ScanFrom` required parameters (#100789)
In #100773 we will go conservative for sanitizers,
so it's better to pinpoint location consciously.
For #100639.
Commit: d6081bff5b49c5f6560bdffd3692b8f1247c4843
https://github.com/llvm/llvm-project/commit/d6081bff5b49c5f6560bdffd3692b8f1247c4843
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/cast.ll
Log Message:
-----------
[RISCV][CostModel] Add coverage for non-power-of-2 vector sizes
Commit: 2f3ae2f625588ea5eb1393db10b83e9e18380770
https://github.com/llvm/llvm-project/commit/2f3ae2f625588ea5eb1393db10b83e9e18380770
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/load.ll
M llvm/test/Transforms/InstCombine/multiple-uses-load-bitcast-select.ll
M llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll
A llvm/test/Transforms/InstCombine/select-load.ll
M llvm/test/Transforms/InstCombine/strnlen-2.ll
M llvm/test/Transforms/SROA/phi-and-select.ll
M llvm/test/Transforms/SROA/phi-with-duplicate-pred.ll
M llvm/test/Transforms/SROA/select-load.ll
Log Message:
-----------
[NFC][InstCombine][SROA][Asan] Precommit tests affected by #100773 (#100844)
Some optimization need to be undone with
sanitizers by #100773.
For #100639.
Commit: c66d25d1429fbf49c97ee9cd0195246642178cb7
https://github.com/llvm/llvm-project/commit/c66d25d1429fbf49c97ee9cd0195246642178cb7
Author: Egor Zhdan <e_zhdan at apple.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/lib/Sema/SemaAPINotes.cpp
M clang/test/APINotes/Inputs/Headers/Methods.h
Log Message:
-----------
[APINotes] Do not crash for C++ operators
This fixes a crash during `CXXMethod->getName()` in
`Sema::ProcessAPINotes`: we were trying to get the name of a C++ method
as a string, which fails with an assertion if the name is not a simple
identifier.
Commit: 708a9a06cba66bc8f739b05646e7d3be9247feee
https://github.com/llvm/llvm-project/commit/708a9a06cba66bc8f739b05646e7d3be9247feee
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Parse/Parser.h
M clang/lib/Lex/PPCaching.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseExprCXX.cpp
A clang/test/CXX/dcl.decl/dcl.meaning/dcl.mptr/p2.cpp
M clang/test/CXX/temp/temp.res/p3.cpp
Log Message:
-----------
[Clang][Parse] Fix ambiguity with nested-name-specifiers that may declarative (#96364)
Consider the following:
```
template<typename T>
struct A { };
template<typename T>
int A<T>::B::* f(); // error: no member named 'B' in 'A<T>'
```
Although this is clearly valid, clang rejects it because the
_nested-name-specifier_ `A<T>::` is parsed as-if it was declarative,
meaning, we parse it as-if it was the _nested-name-specifier_ in a
redeclaration/specialization. However, we don't (and can't) know whether
the _nested-name-specifier_ is declarative until we see the '`*`' token,
but at that point we have already complained that `A` has no member
named `B`! This patch addresses this bug by adding support for _fully_
unannotated _and_ unbounded tentative parsing, which allows for us to
parse past tokens without having to cache them until we reach a point
where we can guarantee to be past the construct we are disambiguating.
I don't know where the approach taken here is ideal -- alternatives are
welcome. However, the performance impact (as measured by
llvm-compile-time-tracker (https://llvm-compile-time-tracker.com/?config=Overview&stat=instructions%3Au&remote=sdkrystian)
is quite minimal (0.09%, which I plan to further improve).
Commit: f9e7cba122c2b636ddb975791aadf33c69f3f056
https://github.com/llvm/llvm-project/commit/f9e7cba122c2b636ddb975791aadf33c69f3f056
Author: Nathan James <n.james93 at hotmail.co.uk>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
Log Message:
-----------
Fix hasName matcher assertion with inline namespaces (#100975)
Fix handling of nodes which can be skipped in the fast path for the
hasName matcher
Fixes #100973
Commit: 6dba99e14f7e508a5028036b753fa7f84e846307
https://github.com/llvm/llvm-project/commit/6dba99e14f7e508a5028036b753fa7f84e846307
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Analysis/Loads.cpp
M llvm/test/Transforms/InstCombine/load.ll
M llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll
M llvm/test/Transforms/InstCombine/select-load.ll
M llvm/test/Transforms/InstCombine/strnlen-2.ll
M llvm/test/Transforms/SROA/phi-and-select.ll
M llvm/test/Transforms/SROA/phi-with-duplicate-pred.ll
M llvm/test/Transforms/SROA/select-load.ll
Log Message:
-----------
[InstCombine][asan] Don't speculate loads before `select ptr` (#100773)
Even if memory is valid from `llvm` point of view,
e.g. local alloca, sanitizers have API for user
specific memory annotations.
These annotations can be used to track size of the
local object, e.g. inline vectors may prevent
accesses beyond the current vector size.
So valid programs should not access those parts of
alloca before checking preconditions.
Fixes #100639.
Commit: 2c376fe96c83443c15e6485d043ebe321904546b
https://github.com/llvm/llvm-project/commit/2c376fe96c83443c15e6485d043ebe321904546b
Author: Dimitry Andric <dimitry at andric.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M compiler-rt/lib/profile/InstrProfiling.h
Log Message:
-----------
[InstrProf] Remove duplicate definition of IntPtrT
In 16e74fd48988a (for #82711) a duplicate definition of `IntPtrT` was
added to `InstrProfiling.h`, leading to warnings:
compiler-rt/lib/profile/InstrProfiling.h:52:15: warning: redefinition of typedef 'IntPtrT' is a C11 feature [-Wtypedef-redefinition]
52 | typedef void *IntPtrT;
| ^
compiler-rt/lib/profile/InstrProfiling.h:34:15: note: previous definition is here
34 | typedef void *IntPtrT;
| ^
Fix the warnings by removing the duplicate typedef.
Commit: fb7028237bac1dccd328b6c3150e50e222a0879b
https://github.com/llvm/llvm-project/commit/fb7028237bac1dccd328b6c3150e50e222a0879b
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/MC/MCFragment.h
M llvm/lib/MC/MCFragment.cpp
Log Message:
-----------
[MC] Move some bool members to MCFragment. NFC
Move `AllowAutoPadding` to MCFragment, which reduce the
MCRelaxableFragment size by 8 bytes. While here, also move
`AlignToBundleEnd` next to `HasInstructions`. Functions that create
fragments are slightly shorter due to fewer byte zeroing instructions.
Although fewer in number than MCDataFragments, MCRelaxableFragment
objects still constitute a significant proportion warranting
optimization.
```
% clang -c sqlite3.i -w -g -Xclang -print-stats
...
2206 assembler - Number of emitted assembler fragments - align
83980 assembler - Number of emitted assembler fragments - data
84 assembler - Number of emitted assembler fragments - fill
169462 assembler - Number of emitted assembler fragments - total
11396 assembler - Number of emitted assembler fragments - relaxable
```
Pull Request: https://github.com/llvm/llvm-project/pull/100976
Commit: b3b390b98e90d94d178fb74c15bce92a34c53b10
https://github.com/llvm/llvm-project/commit/b3b390b98e90d94d178fb74c15bce92a34c53b10
Author: Julius Alexandre <juliuswoosebert at gmail.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR][NFC] Fixes for LoadInst::create functions (#100955)
This patch updates `LoadInst::create()` functions. The end result is four `LoadInst::create()` functions in total, two of which with an `IsVolatile` argument and two without.
Commit: 7b99b1d4f733ed5e1b206f0b392b0864e7a0d468
https://github.com/llvm/llvm-project/commit/7b99b1d4f733ed5e1b206f0b392b0864e7a0d468
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/test/CodeGen/AArch64/exp10-libcall-names.ll
M llvm/test/CodeGen/X86/exp10-libcall-names.ll
Log Message:
-----------
[Darwin] Fix availability of exp10 for BridgeOS, DriverKit. (#100894)
Same as https://github.com/llvm/llvm-project/pull/98542, but also mark
exp10 available on BridgeOS and DriverKit.
Note that BridgeOS currently is not included by isOSDarwin, but it
probably should.
PR: https://github.com/llvm/llvm-project/pull/100894
Commit: 2a612a1b343dcc0d3dd44df4866f6c6af5cc090f
https://github.com/llvm/llvm-project/commit/2a612a1b343dcc0d3dd44df4866f6c6af5cc090f
Author: Matthew Weingarten <matt at weingarten.org>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M compiler-rt/lib/memprof/memprof_mapping.h
Log Message:
-----------
[Memprof] Changes `HISTOGRAM_GRANULARITY` from 8U to 8ULL. (#100949)
This changes a bug in memprofiling with histogram where the shadow mask
would be `0xFFFFFFF8` instead of `0xFFFFFFFFFFFFFFF8`, essentially
discarding the upper 32 bits of the address. This can cause different
addresses to be mapped to the same shadow address.
Commit: 26e455bac0c44d75cb5d544c35e7c8326c91b4f3
https://github.com/llvm/llvm-project/commit/26e455bac0c44d75cb5d544c35e7c8326c91b4f3
Author: macurtis-amd <macurtis at amd.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/lib/LTO/LTOBackend.cpp
A llvm/test/LTO/X86/print-pipeline-passes.ll
M llvm/tools/llc/NewPMDriver.cpp
M llvm/tools/opt/NewPMDriver.cpp
Log Message:
-----------
[lld][LTO] Teach LTO to print pipeline passes (#101018)
I found this useful while debugging code generation differences between
old and new offloading drivers.
No functional change (intended).
Commit: 62bd08acedc88d8976a017f7f6818f3167dfa697
https://github.com/llvm/llvm-project/commit/62bd08acedc88d8976a017f7f6818f3167dfa697
Author: Dimitry Andric <dimitry at andric.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
Log Message:
-----------
[compiler-rt] Fix format string warnings in FreeBSD DumpAllRegisters (#101072)
On FreeBSD amd64 (aka x86_64), registers are always defined as
`int64_t`, which in turn is equivalent to `long`. This leads to a number
of warnings in `DumpAllRegisters()`:
compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp:2245:31: warning:
format specifies type 'unsigned long long' but the argument has type
'__register_t' (aka 'long') [-Wformat]
2245 | Printf("rax = 0x%016llx ", ucontext->uc_mcontext.mc_rax);
| ~~~~~~~ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
| %016lx
compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp:2246:31: warning:
format specifies type 'unsigned long long' but the argument has type
'__register_t' (aka 'long') [-Wformat]
2246 | Printf("rbx = 0x%016llx ", ucontext->uc_mcontext.mc_rbx);
| ~~~~~~~ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
| %016lx
... more of these ...
Fix it by using the `lx` format.
Commit: cfb92be0a9cdd0f4595100c5add4e2795a44134e
https://github.com/llvm/llvm-project/commit/cfb92be0a9cdd0f4595100c5add4e2795a44134e
Author: vporpo <vporpodas at google.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/include/llvm/SandboxIR/Use.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxIR] Implement CallBrInst (#100823)
This patch implements sandboxir::CallBrInst which mirrors
llvm::CallBrInst.
LLVM IR does not expose the Uses to DefaultDest and IndirectDest so we
need special Tracker objects for both of setters.
Commit: 842a332f11f53c698fa0560505e533ecdca28876
https://github.com/llvm/llvm-project/commit/842a332f11f53c698fa0560505e533ecdca28876
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
Log Message:
-----------
[NVPTX] Fix DwarfFrameBase construction (#101000)
The `{0}` here was initializing the first union member `Register`,
rather than the union member used by CFA, which is `Offset`. Prior to
https://github.com/llvm/llvm-project/pull/99263 this was harmless, but
now they have different layout, leading to test failures on some
platforms (at least i686 and s390x).
Commit: 38e671ab5221ec3d355fe4e3f70fdcd6f4809532
https://github.com/llvm/llvm-project/commit/38e671ab5221ec3d355fe4e3f70fdcd6f4809532
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/lib/Analysis/DXILResource.cpp
Log Message:
-----------
[DXIL][Analysis] Use setters for dxil::ResourceInfo initialization. NFC
This simplifies making sure we set all of the members of the unions
and adds asserts to help catch if we do something wrong.
Pull Request: https://github.com/llvm/llvm-project/pull/100696
Commit: ef2aa4f5bb82395648240efe888f8794ebad786f
https://github.com/llvm/llvm-project/commit/ef2aa4f5bb82395648240efe888f8794ebad786f
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-07-29 (Mon, 29 Jul 2024)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/checkers.rst
M clang/include/clang/AST/ASTImporter.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/Analysis/FlowSensitive/AdornedCFG.h
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Parse/Parser.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/lib/Analysis/FlowSensitive/AdornedCFG.cpp
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/lib/Analysis/FlowSensitive/TypeErasedDataflowAnalysis.cpp
M clang/lib/Analysis/LiveVariables.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Lex/PPCaching.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/test/APINotes/Inputs/Headers/Methods.h
M clang/test/AST/attr-print-emit.cpp
A clang/test/AST/explicit-base-class-move-cntr.cpp
M clang/test/Analysis/live-stmts.cpp
A clang/test/Analysis/short-circuiting-eval.cpp
M clang/test/Analysis/stream.c
A clang/test/CXX/dcl.decl/dcl.meaning/dcl.mptr/p2.cpp
M clang/test/CXX/temp/temp.res/p3.cpp
M clang/test/CodeGen/aarch64-sme-inline-streaming-attrs.c
A clang/test/CodeGenCXX/debug-info-explicit-this.cpp
M clang/test/Driver/amdgpu-toolchain.c
M clang/test/Driver/immediate-options.c
M clang/test/Driver/linker-wrapper.c
M clang/test/Sema/attr-ownership.c
M clang/test/Sema/attr-ownership.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/destructor.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
M clang/unittests/Analysis/FlowSensitive/TypeErasedDataflowAnalysisTest.cpp
M compiler-rt/CMakeLists.txt
M compiler-rt/lib/gwp_asan/definitions.h
M compiler-rt/lib/gwp_asan/platform_specific/guarded_pool_allocator_fuchsia.cpp
M compiler-rt/lib/gwp_asan/platform_specific/guarded_pool_allocator_posix.cpp
M compiler-rt/lib/gwp_asan/platform_specific/utilities_fuchsia.cpp
M compiler-rt/lib/gwp_asan/platform_specific/utilities_posix.cpp
M compiler-rt/lib/gwp_asan/tests/CMakeLists.txt
A compiler-rt/lib/gwp_asan/tests/utilities.cpp
M compiler-rt/lib/gwp_asan/utilities.h
M compiler-rt/lib/memprof/memprof_mapping.h
M compiler-rt/lib/profile/InstrProfiling.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Exceptions.h
M flang/include/flang/Runtime/exceptions.h
M flang/include/flang/Runtime/magic-numbers.h
M flang/lib/Evaluate/real.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Exceptions.cpp
M flang/lib/Optimizer/Builder/Runtime/Numeric.cpp
M flang/lib/Optimizer/Transforms/OMPMapInfoFinalization.cpp
M flang/runtime/exceptions.cpp
M flang/test/Driver/omp-driver-offload.f90
M flang/test/Driver/target-cpu-features.f90
M flang/test/Driver/target-gpu-features.f90
M flang/test/Evaluate/fold-nearest.f90
A flang/test/Lower/Intrinsics/ieee_next.f90
M flang/test/Lower/Intrinsics/nearest.f90
M flang/unittests/Optimizer/Builder/Runtime/NumericTest.cpp
M libc/config/config.json
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/configure.rst
M libc/docs/dev/undefined_behavior.rst
M libc/fuzzing/math/RemQuoDiff.h
M libc/fuzzing/stdlib/strtofloat_fuzz.cpp
M libc/newhdrgen/yaml/pthread.yaml
M libc/spec/posix.td
M libc/src/__support/OSUtil/CMakeLists.txt
M libc/src/__support/OSUtil/linux/CMakeLists.txt
R libc/src/__support/OSUtil/linux/pid.cpp
R libc/src/__support/OSUtil/pid.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/rwlock.h
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/thread.h
R libc/src/__support/threads/tid.h
M libc/src/compiler/generic/__stack_chk_fail.cpp
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_rwlock_clockrdlock.cpp
A libc/src/pthread/pthread_rwlock_clockrdlock.h
A libc/src/pthread/pthread_rwlock_clockwrlock.cpp
A libc/src/pthread/pthread_rwlock_clockwrlock.h
M libc/src/unistd/CMakeLists.txt
M libc/src/unistd/getpid.h
R libc/src/unistd/gettid.cpp
R libc/src/unistd/gettid.h
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/fork.cpp
M libc/src/unistd/linux/getpid.cpp
M libc/startup/linux/CMakeLists.txt
M libc/startup/linux/do_start.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_rwlock_test.cpp
M libc/test/integration/src/unistd/CMakeLists.txt
M libc/test/integration/src/unistd/fork_test.cpp
M libc/test/src/math/cbrt_test.cpp
M libc/test/src/unistd/CMakeLists.txt
R libc/test/src/unistd/gettid_test.cpp
M libc/test/utils/FPUtil/x86_long_double_test.cpp
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/include/__memory_resource/polymorphic_allocator.h
A libcxx/test/std/utilities/utility/mem.res/mem.poly.allocator.class/mem.poly.allocator.class.general/equality.pass.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptLexer.cpp
M lld/ELF/ScriptLexer.h
M lld/ELF/ScriptParser.cpp
M lld/ELF/ScriptParser.h
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/test/ELF/defsym.s
M lld/test/ELF/linkerscript/group.s
M lldb/include/lldb/Symbol/SymbolFile.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
M lldb/test/API/lang/c/struct_types/main.c
A lldb/test/Shell/SymbolFile/DWARF/vla.cpp
M llvm/docs/DirectX/DXILResources.rst
M llvm/include/llvm/ADT/StableHashing.h
M llvm/include/llvm/Analysis/Loads.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/AsmParser/LLParser.h
M llvm/include/llvm/CodeGen/DebugHandlerBase.h
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/MC/MCFragment.h
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/include/llvm/SandboxIR/Use.h
M llvm/include/llvm/Transforms/Utils/SSAUpdaterImpl.h
M llvm/include/llvm/Transforms/Utils/SimplifyLibCalls.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/MachineStableHash.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/ExecutionEngine/MCJIT/MCJIT.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
R llvm/lib/Target/AArch64/peephole-sxtw.mir
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
M llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.h
M llvm/lib/Target/ARM/ARMMCInstLower.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/CSKY/CSKYAsmPrinter.cpp
M llvm/lib/Target/CSKY/CSKYAsmPrinter.h
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
M llvm/lib/Target/PowerPC/PPCGenScalarMASSEntries.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/LoopBoundSplit.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Analysis/CostModel/AArch64/fptoi_sat.ll
R llvm/test/Analysis/CostModel/AMDGPU/arith-fp.ll
A llvm/test/Analysis/CostModel/AMDGPU/arithmetic_fence.ll
A llvm/test/Analysis/CostModel/AMDGPU/canonicalize.ll
A llvm/test/Analysis/CostModel/AMDGPU/copysign.ll
A llvm/test/Analysis/CostModel/AMDGPU/exp.ll
A llvm/test/Analysis/CostModel/AMDGPU/exp10.ll
A llvm/test/Analysis/CostModel/AMDGPU/exp2.ll
M llvm/test/Analysis/CostModel/AMDGPU/fabs.ll
M llvm/test/Analysis/CostModel/AMDGPU/fma.ll
M llvm/test/Analysis/CostModel/AMDGPU/fmul.ll
A llvm/test/Analysis/CostModel/AMDGPU/fmuladd.ll
M llvm/test/Analysis/CostModel/AMDGPU/fneg.ll
A llvm/test/Analysis/CostModel/AMDGPU/frexp.ll
A llvm/test/Analysis/CostModel/AMDGPU/is_fpclass.ll
A llvm/test/Analysis/CostModel/AMDGPU/ldexp.ll
A llvm/test/Analysis/CostModel/AMDGPU/log.ll
A llvm/test/Analysis/CostModel/AMDGPU/log10.ll
A llvm/test/Analysis/CostModel/AMDGPU/log2.ll
A llvm/test/Analysis/CostModel/AMDGPU/maximum.ll
A llvm/test/Analysis/CostModel/AMDGPU/maxnum.ll
A llvm/test/Analysis/CostModel/AMDGPU/minimum.ll
A llvm/test/Analysis/CostModel/AMDGPU/minnum.ll
A llvm/test/Analysis/CostModel/AMDGPU/ptrmask.ll
A llvm/test/Analysis/CostModel/AMDGPU/sqrt.ll
M llvm/test/Analysis/CostModel/RISCV/cast.ll
M llvm/test/Analysis/CostModel/X86/arith-overflow.ll
M llvm/test/Bindings/llvm-c/echo.ll
M llvm/test/Bitcode/compatibility.ll
M llvm/test/CodeGen/AArch64/exp10-libcall-names.ll
M llvm/test/CodeGen/AArch64/fcvt_combine.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
A llvm/test/CodeGen/AArch64/peephole-sxtw.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64.ll
M llvm/test/CodeGen/ARM/vselect_imax.ll
M llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll
M llvm/test/CodeGen/PowerPC/build-vector-tests.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-pwr9-64bit.ll
M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
M llvm/test/CodeGen/PowerPC/combine-fneg.ll
M llvm/test/CodeGen/PowerPC/constant-pool.ll
M llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll
M llvm/test/CodeGen/PowerPC/fma-combine.ll
M llvm/test/CodeGen/PowerPC/fp-strict-round.ll
M llvm/test/CodeGen/PowerPC/frem.ll
M llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
M llvm/test/CodeGen/PowerPC/ldexp.ll
M llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
M llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
M llvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll
M llvm/test/CodeGen/PowerPC/save-reg-params.ll
M llvm/test/CodeGen/PowerPC/select_const.ll
M llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
M llvm/test/CodeGen/PowerPC/subreg-lanemasks.mir
M llvm/test/CodeGen/PowerPC/toc-float.ll
M llvm/test/CodeGen/PowerPC/variable_elem_vec_extracts.ll
M llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/PowerPC/vector-llrint.ll
M llvm/test/CodeGen/PowerPC/vector-lrint.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll
M llvm/test/CodeGen/PowerPC/vsx.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
M llvm/test/CodeGen/RISCV/rvv-cfi-info.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfptoi-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/insertelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/unmasked-ta.ll
M llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll
M llvm/test/CodeGen/RISCV/rvv/vfmv.s.f.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
M llvm/test/CodeGen/SPARC/2011-01-11-CC.ll
M llvm/test/CodeGen/SPARC/64cond.ll
M llvm/test/CodeGen/SPARC/fp128-split.ll
M llvm/test/CodeGen/SPARC/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/SPARC/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/X86/2007-05-15-maskmovq.ll
M llvm/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll
M llvm/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll
M llvm/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll
M llvm/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll
M llvm/test/CodeGen/X86/2011-06-14-mmx-inlineasm.ll
M llvm/test/CodeGen/X86/avx-vbroadcast.ll
M llvm/test/CodeGen/X86/avx2-vbroadcast.ll
M llvm/test/CodeGen/X86/bitcast-mmx.ll
M llvm/test/CodeGen/X86/exp10-libcall-names.ll
M llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir
M llvm/test/CodeGen/X86/fast-isel-bc.ll
M llvm/test/CodeGen/X86/fast-isel-nontemporal.ll
M llvm/test/CodeGen/X86/fp-strict-libcalls-msvc32.ll
M llvm/test/CodeGen/X86/fsafdo_test1.ll
M llvm/test/CodeGen/X86/fsafdo_test4.ll
M llvm/test/CodeGen/X86/mmx-arg-passing-x86-64.ll
M llvm/test/CodeGen/X86/mmx-arg-passing.ll
M llvm/test/CodeGen/X86/mmx-arith.ll
M llvm/test/CodeGen/X86/mmx-bitcast-fold.ll
M llvm/test/CodeGen/X86/mmx-bitcast.ll
M llvm/test/CodeGen/X86/mmx-build-vector.ll
M llvm/test/CodeGen/X86/mmx-coalescing.ll
M llvm/test/CodeGen/X86/mmx-cvt.ll
M llvm/test/CodeGen/X86/mmx-fold-load.ll
M llvm/test/CodeGen/X86/mmx-fold-zero.ll
M llvm/test/CodeGen/X86/mmx-intrinsics.ll
M llvm/test/CodeGen/X86/mmx-only.ll
M llvm/test/CodeGen/X86/mxcsr-reg-usage.ll
M llvm/test/CodeGen/X86/nontemporal.ll
M llvm/test/CodeGen/X86/pr13859.ll
M llvm/test/CodeGen/X86/pr23246.ll
M llvm/test/CodeGen/X86/pr29222.ll
M llvm/test/CodeGen/X86/pr35982.ll
M llvm/test/CodeGen/X86/select-mmx.ll
M llvm/test/CodeGen/X86/stack-folding-mmx.ll
M llvm/test/CodeGen/X86/unaligned_extract_from_vector_through_stack.ll
M llvm/test/CodeGen/X86/vec-libcalls.ll
M llvm/test/CodeGen/X86/vec_extract-mmx.ll
M llvm/test/CodeGen/X86/vec_insert-5.ll
M llvm/test/CodeGen/X86/vec_insert-7.ll
M llvm/test/CodeGen/X86/vec_insert-mmx.ll
M llvm/test/CodeGen/X86/vector-shuffle-mmx.ll
M llvm/test/CodeGen/X86/x86-64-psub.ll
A llvm/test/DebugInfo/X86/loop-align-debug.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/vector_arith.ll
M llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll
M llvm/test/Instrumentation/MemorySanitizer/vector_pack.ll
M llvm/test/Instrumentation/MemorySanitizer/vector_shift.ll
A llvm/test/LTO/X86/print-pipeline-passes.ll
M llvm/test/MC/X86/x86-GCC-inline-asm-Y-constraints.ll
M llvm/test/Transforms/AggressiveInstCombine/AArch64/fptosisat.ll
R llvm/test/Transforms/GlobalOpt/x86_mmx_load.ll
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
M llvm/test/Transforms/InstCombine/X86/x86-movmsk.ll
M llvm/test/Transforms/InstCombine/cast.ll
M llvm/test/Transforms/InstCombine/ctpop-pow2.ll
M llvm/test/Transforms/InstCombine/ctpop.ll
M llvm/test/Transforms/InstCombine/icmp-ne-pow2.ll
M llvm/test/Transforms/InstCombine/ispow2.ll
A llvm/test/Transforms/InstCombine/lib-call-exit.ll
M llvm/test/Transforms/InstCombine/load.ll
M llvm/test/Transforms/InstCombine/multiple-uses-load-bitcast-select.ll
M llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll
A llvm/test/Transforms/InstCombine/select-load.ll
M llvm/test/Transforms/InstCombine/strnlen-2.ll
M llvm/test/Transforms/InstSimplify/ConstProp/gep-zeroinit-vector.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll
M llvm/test/Transforms/SCCP/crash.ll
A llvm/test/Transforms/SCCP/float-denormal-simplification.ll
A llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-used-across-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-extractelements-different-bbs.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-gather-non-scheduled-extracts.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SROA/phi-and-select.ll
M llvm/test/Transforms/SROA/phi-with-duplicate-pred.ll
M llvm/test/Transforms/SROA/pr57796.ll
M llvm/test/Transforms/SROA/select-load.ll
R llvm/test/Transforms/SimplifyCFG/AMDGPU/skip-threading.ll
M llvm/test/Transforms/SimplifyCFG/convergent.ll
M llvm/test/Verifier/atomics.ll
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/tools/llc/NewPMDriver.cpp
M llvm/tools/opt/NewPMDriver.cpp
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
M llvm/unittests/IR/PatternMatch.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauseOperands.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/include/mlir/Dialect/Ptr/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Dialect/Affine/Analysis/CMakeLists.txt
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMask.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M offload/test/offloading/bug51781.c
M openmp/runtime/src/kmp_affinity.cpp
M openmp/runtime/src/kmp_affinity.h
M polly/lib/Analysis/ScopBuilder.cpp
M polly/lib/Analysis/ScopDetection.cpp
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/config.bzl
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.5-bogner
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/d6a5fa256e56...ef2aa4f5bb82
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