[all-commits] [llvm/llvm-project] 71d85c: [RISCV][CFI] Emit cfi_offset for every callee-save...

[Brandon Wu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 71d85ca2f9dba7f08a7a84c6cff5396ed594cb3c
      https://github.com/llvm/llvm-project/commit/71d85ca2f9dba7f08a7a84c6cff5396ed594cb3c
  Author: Brandon Wu <brandon.wu at sifive.com>
  Date:   2024-07-29 (Mon, 29 Jul 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv-cfi-info.ll

  Log Message:
  -----------
  [RISCV][CFI] Emit cfi_offset for every callee-saved vector registers (#100455)

The grouped vector register is modeled as a single register, e.g. V2M2,
which is actually V2 and V3. We need to decompose the grouped vector
register(if any) to individual vector register when emitting CFIs in
prologue.

Fixed https://github.com/llvm/llvm-project/issues/94500



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