[all-commits] [llvm/llvm-project] ba8883: Fix buildbot failure by fixing the base pointer ty...

darkbuck via All-commits all-commits at lists.llvm.org
Thu Jul 25 11:10:09 PDT 2024


  Branch: refs/heads/users/darkbuck/spr/simplifycfg-skip-threading-if-the-target-may-have-divergent-branches
  Home:   https://github.com/llvm/llvm-project
  Commit: ba8883c46e3cb1782f66774a116bc0364ea68ce0
      https://github.com/llvm/llvm-project/commit/ba8883c46e3cb1782f66774a116bc0364ea68ce0
  Author: Mingming Liu <mingmingl at google.com>
  Date:   2024-07-24 (Wed, 24 Jul 2024)

  Changed paths:
    M llvm/lib/Transforms/IPO/FunctionImport.cpp

  Log Message:
  -----------
  Fix buildbot failure by fixing the base pointer type (#100508)

This should fix buildbot failures like
https://lab.llvm.org/buildbot/#/builders/169/builds/1448


  Commit: 8608cc1c89640bd3d8120f24c964af21310253b6
      https://github.com/llvm/llvm-project/commit/8608cc1c89640bd3d8120f24c964af21310253b6
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/lib/AST/Interp/Compiler.cpp
    M clang/test/AST/Interp/records.cpp

  Log Message:
  -----------
  [clang][Interp] Fix array element This chains

The previous test was too minimal. If we actually do something after
initializing the nested array element, we end up causing a stack element
type mismatch.


  Commit: 25482b356e51de1f259b3ac7c785ab34977781b4
      https://github.com/llvm/llvm-project/commit/25482b356e51de1f259b3ac7c785ab34977781b4
  Author: Chen Zheng <czhengsz at cn.ibm.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/lib/Basic/Targets/PPC.cpp
    M clang/lib/Driver/ToolChains/Arch/PPC.cpp
    M clang/lib/Driver/ToolChains/Arch/PPC.h
    M clang/lib/Driver/ToolChains/Clang.cpp
    M clang/lib/Driver/ToolChains/CommonArgs.cpp
    M clang/test/CodeGen/aix-builtin-cpu-is.c
    M clang/test/CodeGen/builtin-cpu-supports.c
    M clang/test/Misc/target-invalid-cpu-note.c
    M llvm/include/llvm/TargetParser/PPCTargetParser.def
    A llvm/include/llvm/TargetParser/PPCTargetParser.h
    M llvm/lib/TargetParser/CMakeLists.txt
    A llvm/lib/TargetParser/PPCTargetParser.cpp
    M llvm/utils/gn/secondary/llvm/lib/TargetParser/BUILD.gn

  Log Message:
  -----------
  [PowerPC] add TargetParser for PPC target (#97541)

For now only focus on the CPU type, will work on the CPU features part
later.

With the CPU handling in TargetParser, clang and llc/opt are able to
query common interfaces.

So we can set same default CPU and CPU features with same interfaces.


  Commit: fe8d1e61ac4104f48bbefc6959a084a8e16927e9
      https://github.com/llvm/llvm-project/commit/fe8d1e61ac4104f48bbefc6959a084a8e16927e9
  Author: Mariusz Sikora <mariusz.sikora at amd.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll

  Log Message:
  -----------
  [AMDGPU][NFC] Use GFX940 prefix in dpp64_combine test (#100459)


  Commit: 1b7631a699e6af7f497548a1ceb5be0570c60ed0
      https://github.com/llvm/llvm-project/commit/1b7631a699e6af7f497548a1ceb5be0570c60ed0
  Author: PeterChou1 <peter.chou at mail.utoronto.ca>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang-tools-extra/clang-doc/Mapper.cpp
    M clang-tools-extra/clang-doc/Mapper.h
    M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp

  Log Message:
  -----------
  [clang-doc] Improve clang-doc performance through memoization (#96809)


  Commit: 26b70707fc2cc0ab8883e6492a4808401a6a4bad
      https://github.com/llvm/llvm-project/commit/26b70707fc2cc0ab8883e6492a4808401a6a4bad
  Author: Shivam Gupta <shivam98.tkg at gmail.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/lib/CodeGen/CGOpenMPRuntime.cpp

  Log Message:
  -----------
  [Clang] Remove some dead code in getNumTeamsExprForTargetDirective (#95695)

This was reported in https://pvs-studio.com/en/blog/posts/cpp/1126/,
fragment N9.

V523 The 'then' statement is equivalent to the subsequent code fragment.
CGOpenMPRuntime.cpp:6040, 6036

---------

Co-authored-by: Shivam Gupta <shivma98.tkg at gmail.com>


  Commit: 2e0c2154a8dc5d8ab2a8cf360aa0184fb58c0860
      https://github.com/llvm/llvm-project/commit/2e0c2154a8dc5d8ab2a8cf360aa0184fb58c0860
  Author: Freddy Ye <freddy.ye at intel.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrAsmAlias.td
    M llvm/test/MC/X86/apx/ctest-att.s
    M llvm/test/MC/X86/apx/ctest-intel.s

  Log Message:
  -----------
  [X86][MC] Support 'ctestX <reg>, <mem>' and 'ctextX <mem>, <reg>' as synonyms. (#97985)

relate gas discussion:
https://sourceware.org/pipermail/binutils/2024-July/135349.html


  Commit: 74fcb6aafddd56df1bd6d6841b2e0f289f8e54b0
      https://github.com/llvm/llvm-project/commit/74fcb6aafddd56df1bd6d6841b2e0f289f8e54b0
  Author: Kazu Hirata <kazu at google.com>
  Date:   2024-07-24 (Wed, 24 Jul 2024)

  Changed paths:
    M llvm/lib/TargetParser/PPCTargetParser.cpp

  Log Message:
  -----------
  [TargetParser] Fix warnings

This patch fixes:

  llvm/include/llvm/TargetParser/PPCTargetParser.def:109:9: error:
  suggest braces around initialization of subobject
  [-Werror,-Wmissing-braces]

  llvm/lib/TargetParser/PPCTargetParser.cpp:96:16: error: address of
  stack memory associated with local variable 'CPU' returned
  [-Werror,-Wreturn-stack-address]


  Commit: 2914a4b88837177d4a91a99525c1a3117242236d
      https://github.com/llvm/llvm-project/commit/2914a4b88837177d4a91a99525c1a3117242236d
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M lldb/include/lldb/Core/PluginManager.h
    M lldb/include/lldb/Interpreter/Interfaces/ScriptedInterface.h
    A lldb/include/lldb/Interpreter/Interfaces/ScriptedInterfaceUsages.h
    M lldb/include/lldb/lldb-private-interfaces.h
    M lldb/source/Commands/CommandObjectScripting.cpp
    M lldb/source/Commands/Options.td
    M lldb/source/Core/PluginManager.cpp
    M lldb/source/Interpreter/CMakeLists.txt
    A lldb/source/Interpreter/Interfaces/CMakeLists.txt
    A lldb/source/Interpreter/Interfaces/ScriptedInterfaceUsages.cpp
    M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/CMakeLists.txt
    R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface.cpp
    R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface.h
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface/CMakeLists.txt
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface/OperatingSystemPythonInterface.cpp
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface/OperatingSystemPythonInterface.h
    R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface.cpp
    R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface.h
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface/CMakeLists.txt
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface/ScriptedPlatformPythonInterface.cpp
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface/ScriptedPlatformPythonInterface.h
    R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
    R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.h
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/CMakeLists.txt
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.cpp
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.h
    R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface.cpp
    R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface.h
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface/CMakeLists.txt
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface/ScriptedThreadPlanPythonInterface.cpp
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface/ScriptedThreadPlanPythonInterface.h
    M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp

  Log Message:
  -----------
  [lldb/Commands] Add `scripting template list` command with auto discovery

This patch introduces a new `template` multiword sub-command to the
`scripting` top-level command. As the name suggests, this sub-command
operates on scripting templates, and currently has the ability to
automatically discover the various scripting extensions that lldb
supports.

This was previously reviewed in #97273.

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


  Commit: 693d757b63e5020e0fa78bb71fc16acdad5f8232
      https://github.com/llvm/llvm-project/commit/693d757b63e5020e0fa78bb71fc16acdad5f8232
  Author: Fangrui Song <i at maskray.me>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/lib/Basic/Sarif.cpp

  Log Message:
  -----------
  Internalize a clang Sarif function


  Commit: 6d12b3f67df429bffff6e1953d9f55867d7e2469
      https://github.com/llvm/llvm-project/commit/6d12b3f67df429bffff6e1953d9f55867d7e2469
  Author: Mel Chen <mel.chen at sifive.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicInst.h
    M llvm/include/llvm/IR/VectorBuilder.h
    M llvm/include/llvm/Transforms/Utils/LoopUtils.h
    M llvm/lib/IR/IntrinsicInst.cpp
    M llvm/lib/IR/VectorBuilder.cpp
    M llvm/lib/Transforms/Utils/LoopUtils.cpp
    M llvm/unittests/IR/VPIntrinsicTest.cpp

  Log Message:
  -----------
  [VP] Refactor VectorBuilder to avoid layering violation. NFC (#99276)

This patch refactors the handling of reduction to eliminate layering
violations.

* Introduced `getReductionIntrinsicID` in LoopUtils.h for mapping
recurrence kinds to llvm.vector.reduce.* intrinsic IDs.
* Updated `VectorBuilder::createSimpleTargetReduction` to accept
llvm.vector.reduce.* intrinsic directly.
* New function `VPIntrinsic::getForIntrinsic` for mapping intrinsic ID
to the same functional VP intrinsic ID.


  Commit: 73d862e478738675f5d919c6a196429acd7b5f50
      https://github.com/llvm/llvm-project/commit/73d862e478738675f5d919c6a196429acd7b5f50
  Author: Muhammad Omair Javaid <omair.javaid at linaro.org>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/cmake/modules/LLVMExternalProjectUtils.cmake

  Log Message:
  -----------
  Revert "[LLVM] Silence compiler-rt warning in runtimes build (#99525)"

This patch broke LLVM Flang build on Windows. PR #100202
This reverts commit f6f88f4b99638821af803d1911ab6a7dac04880b.


  Commit: dfe650cdc884af3298cb3378aa1631545a13b720
      https://github.com/llvm/llvm-project/commit/dfe650cdc884af3298cb3378aa1631545a13b720
  Author: Antonio Frighetto <me at antoniofrighetto.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    A llvm/test/Transforms/InstCombine/struct-assign-tbaa-2.ll

  Log Message:
  -----------
  [TBAA] Introduce test for PR96483 (NFC)


  Commit: 6ce7b1f86115f475ee00003ee04833781a675e3e
      https://github.com/llvm/llvm-project/commit/6ce7b1f86115f475ee00003ee04833781a675e3e
  Author: Antonio Frighetto <me at antoniofrighetto.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/include/llvm/IR/Metadata.h
    M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/test/Transforms/InstCombine/struct-assign-tbaa-2.ll
    M llvm/test/Transforms/InstCombine/struct-assign-tbaa.ll
    R llvm/test/Transforms/SROA/tbaa-struct.ll
    M llvm/test/Transforms/SROA/tbaa-struct3.ll

  Log Message:
  -----------
  [TBAA] Do not rewrite TBAA if exists, always null out `!tbaa.struct`

Retrieve `!tbaa` metadata via `!tbaa.struct` in `adjustForAccess`
unless it already exists, as struct-path aware `MDNodes` emitted
via `new-struct-path-tbaa` may be leveraged. As `!tbaa.struct`
carries memcpy padding semantics among struct fields and `!tbaa`
is already meant to aid to alias semantics, it should be possible
to zero out `!tbaa.struct` once the memcpy has been simplified.
`SROA/tbaa-struct.ll` test has gone out of scope, as `!tbaa` has
already replaced `!tbaa.struct` in SROA.

Fixes: https://github.com/llvm/llvm-project/issues/95661.


  Commit: 91450f1b57b34034376662dae5452af8c992c103
      https://github.com/llvm/llvm-project/commit/91450f1b57b34034376662dae5452af8c992c103
  Author: PeterChou1 <peter.chou at mail.utoronto.ca>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang-tools-extra/clang-doc/HTMLGenerator.cpp
    M clang-tools-extra/clang-doc/assets/index.js
    A clang-tools-extra/test/clang-doc/test-path-abs.cpp

  Log Message:
  -----------
  [clang-doc] switched from using relative to absolute paths (#93281)

fixes https://github.com/llvm/llvm-project/issues/92867

This patches changes the way clang-doc index navigation works,
previously it was based a relative path approach, this approach is error
prone and lead to wrong paths for the anchor tag. The new navigation way
is based on absolute paths and should work and be less confusing
codewise.
Because the differences with serving over a http server and viewing via
file system I also added export a RootPath variable to the index_json.js
file


  Commit: dc1c00f6b13f724154f9883990f8b21fb8dcccef
      https://github.com/llvm/llvm-project/commit/dc1c00f6b13f724154f9883990f8b21fb8dcccef
  Author: Hari Limaye <hari.limaye at arm.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetFrameLowering.h
    M llvm/lib/CodeGen/StackFrameLayoutAnalysisPass.cpp
    M llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.h
    M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll

  Log Message:
  -----------
  [StackFrameLayoutAnalysis] Use target-specific hook for SP offsets (#100386)

StackFrameLayoutAnalysis currently calculates SP-relative offsets in a
target-independent way via MachineFrameInfo offsets. This is incorrect
for some Targets, e.g. AArch64, when there are scalable vector stack
slots.

This patch adds a virtual function to TargetFrameLowering to provide
offsets from SP, with a default implementation matching what is
currently used in StackFrameLayoutAnalysis, and refactors
StackFrameLayoutAnalysis to use this function. Only non-zero scalable
offsets are output by the analysis pass.

An implementation of this function is added for AArch64 targets, which
aims to provide correct SP offsets in most cases.


  Commit: f48c16631de07b47e0721b88bd8004e63897f29a
      https://github.com/llvm/llvm-project/commit/f48c16631de07b47e0721b88bd8004e63897f29a
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M lldb/source/Host/linux/Host.cpp

  Log Message:
  -----------
  [lldb][Linux] Parse, but don't store "comm" from /proc/stat file (#100387)

As reported in https://github.com/llvm/llvm-project/issues/89710, the %s
code used for `comm` could and probably does, overflow the buffer.
Likely we haven't seen it cause problems because the following data is
overwritten right afterwards.

Also scanf isn't a great choice here as this `comm` can include many
characters that might trip up %s.

We don't actually use `comm`, so parse but don't store it so we're not
overflowing anything.


  Commit: c3a2efceb53e1e3ab9b92e5bf6518ab51f4713a9
      https://github.com/llvm/llvm-project/commit/c3a2efceb53e1e3ab9b92e5bf6518ab51f4713a9
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface/OperatingSystemPythonInterface.h
    M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface/ScriptedPlatformPythonInterface.cpp
    M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.cpp
    M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface/ScriptedThreadPlanPythonInterface.h

  Log Message:
  -----------
  [lldb/Plugins] Fix build failure on windows following 2914a4b88837

This patch tries to fix the following build failure on windows:

https://lab.llvm.org/buildbot/#/builders/141/builds/1083

This started happening following 2914a4b88837, and it seems to be caused
by some special `#include` ordering for the lldb-python header on Windows.

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


  Commit: 6a5a64c56bc6c7183935367d3cf915ccdd103882
      https://github.com/llvm/llvm-project/commit/6a5a64c56bc6c7183935367d3cf915ccdd103882
  Author: Christian Ulmann <christianulmann at gmail.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M mlir/lib/Dialect/Bufferization/Transforms/BufferDeallocationSimplification.cpp
    M mlir/lib/Transforms/Utils/RegionUtils.cpp
    M mlir/test/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation/dealloc-branchop-interface.mlir
    M mlir/test/Dialect/Linalg/detensorize_entry_block.mlir
    M mlir/test/Dialect/Linalg/detensorize_if.mlir
    M mlir/test/Dialect/Linalg/detensorize_while.mlir
    M mlir/test/Dialect/Linalg/detensorize_while_impure_cf.mlir
    M mlir/test/Dialect/Linalg/detensorize_while_pure_cf.mlir
    M mlir/test/Transforms/canonicalize-block-merge.mlir
    M mlir/test/Transforms/canonicalize-dce.mlir
    M mlir/test/Transforms/make-isolated-from-above.mlir
    R mlir/test/Transforms/test-canonicalize-merge-large-blocks.mlir

  Log Message:
  -----------
  Revert "[mlir] Fix block merging" (#100510)

Reverts llvm/llvm-project#97697

This commit introduced non-trivial bugs related to type consistency.


  Commit: d82df1b891fecae0af7de5e970b592ce37178a30
      https://github.com/llvm/llvm-project/commit/d82df1b891fecae0af7de5e970b592ce37178a30
  Author: Edd Dawson <edd.dawson at sony.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/lib/Driver/ToolChains/PS4CPU.cpp
    M clang/test/Driver/lto-jobs.c
    M clang/test/Driver/ps4-linker.c
    M clang/test/Driver/ps5-linker.c
    M clang/test/Driver/unified-lto.c

  Log Message:
  -----------
  [PS4/PS5][Driver] Always pass LTO options to the linker (#100423)

The driver doesn't know if LTO will occur at link time. That's
determined by the presence or absence of LLVM bitcode objects among
those ingested by the linker.

For this reason, LTO options for codegen etc must be passed to the
linker unconditionally. If LTO does not occur, these options have no
effect.

Also simplify the way LTO options are supplied to the PS4 linker.
`-lto-debug-options` and `-lto-thin-debug-options` are combined and
routed to the same place. So, always use the former, regardless of
full/thin LTO mode.

SIE tracker: TOOLCHAIN-16575


  Commit: c7a3346ab6a8fbd551a80bd4028ec8624daa35e4
      https://github.com/llvm/llvm-project/commit/c7a3346ab6a8fbd551a80bd4028ec8624daa35e4
  Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
    M mlir/test/Dialect/Linalg/vectorize-tensor-extract-masked.mlir

  Log Message:
  -----------
  [mlir][linalg] Fix scalable vectorisation of tensor.extract (#100325)

This PR fixes one very specific aspect of vectorising `tensor.extract`
Ops when targeting scalable vectors. Namely, it makes sure that the
scalable flag is correctly propagated when creating
`vector::ShapeCastOp`.

BEFORE:
```mlir
vector.shape_cast %idx_vec : vector<1x1x[4]xindex> to vector<4xindex>
```

AFTER:
```mlir
vector.shape_cast %idx_vec : vector<1x1x[4]xindex> to vector<[4]xindex>
```

This particular ShapeCastOp is created when generating an index for
`vector.transfer_read` operations. Strictly speaking, casting is not
really required. However, it makes the subsequent address calculation
much simpler (*).

The following test is updated to demonstrate the use of
`vector.shape_cast` by the vectoriser:
*
@masked_static_vectorize_nd_tensor_extract_with_affine_apply_contiguous

Similar test with scalable vectors is also added.

(*) At this point in the vectoriser it is known
that all leading dims in the index vector are "1").


  Commit: 98c73d5df7ff0b5d9c10bc9d44a584d631def1e6
      https://github.com/llvm/llvm-project/commit/98c73d5df7ff0b5d9c10bc9d44a584d631def1e6
  Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M mlir/include/mlir/IR/BuiltinTypes.td
    M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
    M mlir/test/Dialect/Vector/invalid.mlir

  Log Message:
  -----------
  [mlir][vector] Restrict vector.shape_cast (scalable vectors) (#100331)

Updates the verifier for `vector.shape_cast` so that incorrect cases
where "scalability" is dropped are immediately rejected. For example:
```mlir
  vector.shape_cast %vec : vector<1x1x[4]xindex> to vector<4xindex>
```

Also, as a separate PR, I've prepared a fix for the Linalg vectorizer to
avoid generating such shape casts (*):
* https://github.com/llvm/llvm-project/pull/100325

(*) Note, that's just one specific case that I've identified so far.


  Commit: 4ca1a901dc6ca1926a594f57e6c4997ea9d185a4
      https://github.com/llvm/llvm-project/commit/4ca1a901dc6ca1926a594f57e6c4997ea9d185a4
  Author: kadir çetinkaya <kadircet at google.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/lib/Sema/SemaDecl.cpp
    M clang/unittests/Tooling/ToolingTest.cpp

  Log Message:
  -----------
  [clang][CUDA] Assume unknown emission status for skipped function definitions (#100124)

Emission status seems to be only used by cuda/openmp/hip compiles, to
figure out
when to emit diagnostics. Current logic emits "uknown" when definition
is
missing, so i extended that to skipped-function-bodies as well.


  Commit: f87e9d42c70476b63f4c87e52651f653f7e2f036
      https://github.com/llvm/llvm-project/commit/f87e9d42c70476b63f4c87e52651f653f7e2f036
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M libcxx/test/std/language.support/support.runtime/ctime.timespec.compile.pass.cpp
    M libcxx/utils/ci/build-picolibc.sh

  Log Message:
  -----------
  [libcxx][test] Update picolibc version (#100348)

This is the latest as of today, and it fixes one of the xfails.

Since
https://github.com/picolibc/picolibc/commit/5e4d0c80f49b4efe8be85e36b5e85d65bd343214,
TIME_UTC is defined.


  Commit: 456c5121f8e6f37881f236bdf573ef29cad5af1e
      https://github.com/llvm/llvm-project/commit/456c5121f8e6f37881f236bdf573ef29cad5af1e
  Author: kadir çetinkaya <kadircet at google.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/include/clang/Driver/Options.td
    A clang/test/Frontend/skip-function-bodies.cpp

  Log Message:
  -----------
  [clang][Driver] Add cc1 flag for setting SkipFunctionBodies (#100135)

This is an option set by certain tools (clangd and ASTUnit). Sometimes
there are crashes in clang, unique to this configuration and it's really
hard to provide reproducers without invoking the tool.


  Commit: 74e964c7c17cae6fd523bc93b3644893853989fc
      https://github.com/llvm/llvm-project/commit/74e964c7c17cae6fd523bc93b3644893853989fc
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.prim.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll

  Log Message:
  -----------
  [AMDGPU] Add GFX12 test coverage for export instructions (#100415)


  Commit: e24dc34aa085b9e8d3ea58cc5f59f80bc4c7cdb4
      https://github.com/llvm/llvm-project/commit/e24dc34aa085b9e8d3ea58cc5f59f80bc4c7cdb4
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll

  Log Message:
  -----------
  AMDGPU: Fix asserting in DAG kernel argument lowering on v6i32 (#100528)

Remove this pointless assertion for the number of vector elements.


  Commit: 6f37d42a33ba09add14a9a1f422cb489ba02336e
      https://github.com/llvm/llvm-project/commit/6f37d42a33ba09add14a9a1f422cb489ba02336e
  Author: chuongg3 <chuong.goh at arm.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/regbank-dup.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-dup.mir
    M llvm/test/CodeGen/AArch64/arm64-dup.ll
    M llvm/test/CodeGen/AArch64/neon-mov.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Reland Make G_DUP immediate 32-bits or larger (#96780) (#99014)

Immediate operand gets extended in RegBankSelect to at least 32 bits to
allow for better pattern matching in TableGen

The previous patch was erasing a constant without checking if it has
more than one use

Changes:
 - Does not erase the constant
 - Added @v_dup16_const test


  Commit: ba461f8c6278a7b2fd7695454c1f184c38897ecd
      https://github.com/llvm/llvm-project/commit/ba461f8c6278a7b2fd7695454c1f184c38897ecd
  Author: Him188 <tguan at nvidia.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/test/CodeGen/AArch64/arm64-ccmp.ll
    A llvm/test/CodeGen/AArch64/fcmp-fp128.ll
    M llvm/test/CodeGen/AArch64/fcmp.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Legalize fp128 types as libcalls for G_FCMP (#98452)

- Generate libcall for supported predicates.
- Generate unsupported predicates as combinations of supported
predicates.
- Vectors are scalarized, however some cases like `v3f128_fp128` are still failing, because we failed to legalize G_OR for these types.

GISel now generates the same code as SDAG, however, note the difference
in the `one` case.


  Commit: b72689a5cbd8645c183476cd87e32948308c5b64
      https://github.com/llvm/llvm-project/commit/b72689a5cbd8645c183476cd87e32948308c5b64
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll

  Log Message:
  -----------
  [LV] Ignore live-out users in cost model if scalar epilogue is required.

Follow-up to ba8126b6fef79.

If a scalar epilogue is required, users outside the loop won't use
live-outs from the vector loop but from the scalar epilogue. Ignore them if
that is the case.

This fixes another case where the VPlan-based cost-model more accurately
computes cost.

Fixes https://github.com/llvm/llvm-project/issues/100464.


  Commit: 91073380ac5a0dceebdd09f360a1dc194d7ee93f
      https://github.com/llvm/llvm-project/commit/91073380ac5a0dceebdd09f360a1dc194d7ee93f
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/include/llvm/Analysis/AliasAnalysis.h
    M llvm/lib/Analysis/BasicAliasAnalysis.cpp
    A llvm/test/Transforms/SLPVectorizer/X86/pr98978.ll

  Log Message:
  -----------
  [BasicAA] Fix handling of indirect assumption based results (#100130)

If a result is potentially based on a not yet proven assumption,
BasicAA will remember it inside AssumptionBasedResults and remove
the cache entry if an assumption higher up is later disproved.
However, we currently miss the case where another cache entry ends
up depending on such an AssumptionBased result.

Fix this by introducing an additional AssumptionBased state for
cache entries. If such a result is used, we'll still increment
AAQI.NumAssumptionUses, which means that the using entry will
also become AssumptionBased and be cleared if the assumption is
disproved.

At the end of the root query, convert remaining AssumptionBased
results into definitive results.

Fixes https://github.com/llvm/llvm-project/issues/98978.


  Commit: ca69444cef0858ad4facecbfc2232a02422aca9f
      https://github.com/llvm/llvm-project/commit/ca69444cef0858ad4facecbfc2232a02422aca9f
  Author: Shivam Gupta <shivam98.tkg at gmail.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/include/clang/Analysis/FlowSensitive/MapLattice.h

  Log Message:
  -----------
  [Clang] Fix a variable shadowing in MapLattice (NFC) (#95697)

Reported in https://pvs-studio.com/en/blog/posts/cpp/1126/, fragment
N10.

The PVS-Studio warning:
V570 The 'C' variable is assigned to itself. MapLattice.h:52


  Commit: 90a997988279ecd0e9aefcf14ee0642093b03398
      https://github.com/llvm/llvm-project/commit/90a997988279ecd0e9aefcf14ee0642093b03398
  Author: Kai Yan <aklkaiyan at tencent.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/CodeGen/WindowScheduler.cpp
    A llvm/test/CodeGen/Hexagon/swp-ws-stall-cycle.mir

  Log Message:
  -----------
  [llvm][CodeGen] Fixed a bug in stall cycle calculation for window scheduler (#99451)

Fixed a bug in stall cycle calculation.
When a register defined by an instruction in the current iteration is
used by an instruction in the next iteration, we have modified the
number of stall cycle that need to be inserted.


  Commit: 72532c921989990180b11d46e38a92874008f51a
      https://github.com/llvm/llvm-project/commit/72532c921989990180b11d46e38a92874008f51a
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
    M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
    M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll

  Log Message:
  -----------
  [LV] Don't predicate divs with invariant divisor when folding tail (#98904)

When folding the tail, at least one of the lanes must execute
unconditionally. If the divisor is loop-invariant no predication is
needed, as predication would not prevent the divide-by-0 on the executed
lane.

Depends on https://github.com/llvm/llvm-project/pull/98892.

PR: https://github.com/llvm/llvm-project/pull/98904


  Commit: f8006a5932b1ccdf3a1eed7b20b5cb608c0a020c
      https://github.com/llvm/llvm-project/commit/f8006a5932b1ccdf3a1eed7b20b5cb608c0a020c
  Author: Kristóf Umann <dkszelethus at gmail.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h

  Log Message:
  -----------
  [analyzer][NFC] Add some docs for LazyCompoundValue (#97407)

Yes, I basically copy-pasted some posts from discord and Artem's book,
but these make for a rather decent docs.

---------

Co-authored-by: Artem Dergachev <noqnoqneo at gmail.com>
Co-authored-by: Donát Nagy <donat.nagy at ericsson.com>
Co-authored-by: Balazs Benics <benicsbalazs at gmail.com>


  Commit: 2ba3fe7356f065757a2279f65e4ef5c8f1476293
      https://github.com/llvm/llvm-project/commit/2ba3fe7356f065757a2279f65e4ef5c8f1476293
  Author: Shivam Gupta <shivam98.tkg at gmail.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h

  Log Message:
  -----------
  [lldb] Fix incorrect uses of logical operator in 'if' condition check (NFC) (#94779)

The condition checking for missing class name, interpreter dictionary,
and script object incorrectly used logical AND (&&), which could never
be true to enter the 'if' block.

This commit uses separate if conditions for each class name, interpreter
dictionary, and script object.

Cought by cppcheck -

lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h:89:11:
warning: Identical inner 'if' condition is always true.
[identicalInnerCondition]

lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h:91:16:
warning: Identical inner 'if' condition is always true.
[identicalInnerCondition]

Fix #89195

---------

Co-authored-by: Shivam Gupta <shivma98.tkg at gmail.com>


  Commit: 90929dd97a8f2c00148bee676bf8b44bec063d9b
      https://github.com/llvm/llvm-project/commit/90929dd97a8f2c00148bee676bf8b44bec063d9b
  Author: Balazs Benics <benicsbalazs at gmail.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/lib/StaticAnalyzer/Core/CallEvent.cpp
    M clang/test/Analysis/call-invalidation.cpp

  Log Message:
  -----------
  [analyzer] Don't invalidate the super region when a std object ctor runs (#100405)

CPP-5269


  Commit: 534e2dd29f252cc13b94312895d2f4b39b54b9d4
      https://github.com/llvm/llvm-project/commit/534e2dd29f252cc13b94312895d2f4b39b54b9d4
  Author: yronglin <yronglin777 at gmail.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/lib/AST/Interp/Compiler.cpp
    M clang/test/SemaCXX/cxx1z-decomposition.cpp

  Log Message:
  -----------
  [Clang][Interp] Visit `DecompositionDecl` and create a local variable (#100400)

The following code should be well-formed:
```C++
float decompose_complex(_Complex float cf) {
  static _Complex float scf;
  auto &[sre, sim] = scf;
  // ok, this is references initialized by constant expressions all the way down
  static_assert(&sre == &__real scf);
  static_assert(&sim == &__imag scf);

  auto [re, im] = cf;
  return re*re + im*im;
}

```
We should visit `DecompositionDecl` and create a local variable but not
a create a dummy value directly.

---------

Signed-off-by: yronglin <yronglin777 at gmail.com>


  Commit: f6431f0c52689be4d6a4753d261cb6c415eff5a1
      https://github.com/llvm/llvm-project/commit/f6431f0c52689be4d6a4753d261cb6c415eff5a1
  Author: runseny <145632023+runseny at users.noreply.github.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
    M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
    M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
    M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir

  Log Message:
  -----------
  [MLIR][GPUToNVVM] support fastMath and other non-supported mathOp (#99890)

Support fastMath and other non-supported mathOp which only require float
operands and call libdevice function directly to nvvm.

1. lowering mathOp with fastMath attribute to correct libdevice
intrinsic.
2. some mathOp in math dialect has been lowered to libdevice now, but it
doesn't cover all mathOp. so this mr lowers all the remaining mathOp
which only require float operands.


  Commit: fc9b9e809381cf9232e5c81439f693d4db47efb3
      https://github.com/llvm/llvm-project/commit/fc9b9e809381cf9232e5c81439f693d4db47efb3
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/CodeGen/MachineTraceMetrics.cpp

  Log Message:
  -----------
  Revert "MTM: fix issues after cursory reading" (#100559)

Reverts llvm/llvm-project#100404

This broke the gcc7 build here:
https://lab.llvm.org/buildbot/#/builders/116/builds/1724


  Commit: f916cb6184fb04b27ae7b867edcfd162c3a49694
      https://github.com/llvm/llvm-project/commit/f916cb6184fb04b27ae7b867edcfd162c3a49694
  Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Sema/SemaExprCXX.cpp
    M clang/test/SemaCXX/cxx2a-destroying-delete.cpp

  Log Message:
  -----------
  [Clang] fix assertion failure in invalid delete operator declaration check (#99308)

Fixes #96191


  Commit: a466db2b32cccfdbd8bbd27cfa2fb51651192075
      https://github.com/llvm/llvm-project/commit/a466db2b32cccfdbd8bbd27cfa2fb51651192075
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h

  Log Message:
  -----------
  Revert "[lldb] Fix incorrect logical operator in 'if' condition check (NFC)" (#100561)

Reverts llvm/llvm-project#94779

Due to bot failures:
https://lab.llvm.org/buildbot/#/builders/18/builds/1371


  Commit: af1d2b9fb1c6065d3a4611f086b8c83a0c05795c
      https://github.com/llvm/llvm-project/commit/af1d2b9fb1c6065d3a4611f086b8c83a0c05795c
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/CodeGen/MachineModuleInfo.cpp
    R llvm/test/CodeGen/Generic/disable-debug-info-print.ll
    R llvm/test/CodeGen/X86/disable-debug-info-print-codeview.ll
    M llvm/test/CodeGen/X86/frame-order.ll

  Log Message:
  -----------
  CodeGen: Remove -disable-debug-info-print cl::opt (#100319)

This was first introduced way back in in 2010 by
6c74a872a8d34d41b751efb68e335cbe91b5a5cc, and has little evidence
of use. Only one test attempts to make use of this, but it's
also redundant since it's also using strip to drop debug info anyway
(and that also makes the test buggy, since it's intended to test
with and without debug info).

The other tests using it were only added to test the option after
discovering it was untested and moved, in later commits.


  Commit: bf76290de48512f59f62eff20d28135c3f918ea5
      https://github.com/llvm/llvm-project/commit/bf76290de48512f59f62eff20d28135c3f918ea5
  Author: Abid Qadeer <haqadeer at amd.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
    A flang/test/Transforms/debug-96314.fir

  Log Message:
  -----------
  [flang][debug] Set scope of internal functions correctly. (#99531)

The functions internal to subroutine should have the scope set to the
parent function. This allows a user to evaluate local variables of
parent function when control is stopped in the child.

Fixes #96314


  Commit: 0fedfd83d75415837eb91f56ec24f4b392bf6c57
      https://github.com/llvm/llvm-project/commit/0fedfd83d75415837eb91f56ec24f4b392bf6c57
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/lib/AST/Interp/Interp.h

  Log Message:
  -----------
  [clang][Interp][NFC] Protect getPtrBase{,Pop} ops from past-end ptrs


  Commit: dfeb3991fb489a703f631ab0c34b58f80568038d
      https://github.com/llvm/llvm-project/commit/dfeb3991fb489a703f631ab0c34b58f80568038d
  Author: James Y Knight <jyknight at google.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/bindings/ocaml/llvm/llvm.mli
    M llvm/bindings/ocaml/llvm/llvm_ocaml.c
    M llvm/docs/BitCodeFormat.rst
    M llvm/docs/LangRef.rst
    M llvm/docs/ReleaseNotes.rst
    M llvm/include/llvm-c/Core.h
    M llvm/include/llvm/IR/DataLayout.h
    M llvm/include/llvm/IR/Type.h
    M llvm/lib/Analysis/ConstantFolding.cpp
    M llvm/lib/AsmParser/LLLexer.cpp
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
    M llvm/lib/CodeGen/ValueTypes.cpp
    M llvm/lib/IR/AsmWriter.cpp
    M llvm/lib/IR/ConstantFold.cpp
    M llvm/lib/IR/Core.cpp
    M llvm/lib/IR/DataLayout.cpp
    M llvm/lib/IR/Function.cpp
    M llvm/lib/IR/Instructions.cpp
    M llvm/lib/IR/LLVMContextImpl.cpp
    M llvm/lib/IR/LLVMContextImpl.h
    M llvm/lib/IR/Type.cpp
    M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
    M llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp
    M llvm/lib/Target/X86/X86CallingConv.td
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
    M llvm/lib/Target/X86/X86IntrinsicsInfo.h
    M llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
    M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
    R llvm/test/Assembler/x86mmx.ll
    M llvm/test/Bitcode/bcanalyzer-types.ll
    M llvm/test/Bitcode/compatibility-3.6.ll
    M llvm/test/Bitcode/compatibility-3.7.ll
    M llvm/test/Bitcode/compatibility-3.8.ll
    M llvm/test/Bitcode/compatibility-3.9.ll
    M llvm/test/Bitcode/compatibility-4.0.ll
    M llvm/test/Bitcode/compatibility-5.0.ll
    M llvm/test/Bitcode/compatibility-6.0.ll
    M llvm/test/Bitcode/compatibility.ll
    M llvm/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll
    M llvm/test/CodeGen/X86/avx-vbroadcast.ll
    M llvm/test/CodeGen/X86/avx2-vbroadcast.ll
    M llvm/test/CodeGen/X86/fast-isel-bc.ll
    M llvm/test/CodeGen/X86/mmx-arg-passing-x86-64.ll
    M llvm/test/CodeGen/X86/mmx-arg-passing.ll
    M llvm/test/CodeGen/X86/mmx-arith.ll
    M llvm/test/CodeGen/X86/mmx-bitcast-fold.ll
    M llvm/test/CodeGen/X86/mmx-bitcast.ll
    M llvm/test/CodeGen/X86/mmx-cvt.ll
    M llvm/test/CodeGen/X86/mmx-fold-load.ll
    M llvm/test/CodeGen/X86/mmx-intrinsics.ll
    M llvm/test/CodeGen/X86/pr23246.ll
    M llvm/test/CodeGen/X86/pr29222.ll
    M llvm/test/CodeGen/X86/select-mmx.ll
    M llvm/test/CodeGen/X86/stack-folding-mmx.ll
    M llvm/test/CodeGen/X86/vec_extract-mmx.ll
    M llvm/test/CodeGen/X86/vec_insert-7.ll
    M llvm/test/CodeGen/X86/vec_insert-mmx.ll
    M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
    M llvm/test/Instrumentation/MemorySanitizer/vector_arith.ll
    M llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll
    M llvm/test/Instrumentation/MemorySanitizer/vector_pack.ll
    M llvm/test/Instrumentation/MemorySanitizer/vector_shift.ll
    M llvm/test/Transforms/InstCombine/X86/x86-movmsk.ll
    M llvm/test/Transforms/InstCombine/bitcast-vec-canon-inseltpoison.ll
    M llvm/test/Transforms/InstCombine/bitcast-vec-canon.ll
    M llvm/test/Transforms/InstSimplify/ConstProp/loads.ll
    R llvm/test/Transforms/LoopUnroll/X86/mmx.ll
    M llvm/test/Transforms/SLPVectorizer/X86/bad_types.ll
    M llvm/test/Transforms/SROA/pr57796.ll
    M llvm/tools/llvm-c-test/echo.cpp
    M llvm/tools/llvm-stress/llvm-stress.cpp
    M llvm/unittests/IR/InstructionsTest.cpp
    M mlir/docs/Dialects/LLVM.md
    M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h
    M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
    M mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp
    M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
    M mlir/lib/Target/LLVMIR/TypeFromLLVM.cpp
    M mlir/lib/Target/LLVMIR/TypeToLLVM.cpp
    M mlir/test/Dialect/LLVMIR/types.mlir
    M mlir/test/Target/LLVMIR/llvmir-types.mlir

  Log Message:
  -----------
  Remove the `x86_mmx` IR type. (#98505)

It is now translated to `<1 x i64>`, which allows the removal of a bunch
of special casing.

This _incompatibly_ changes the ABI of any LLVM IR function with
`x86_mmx` arguments or returns: instead of passing in mmx registers,
they will now be passed via integer registers. However, the real-world
incompatibility caused by this is expected to be minimal, because Clang
never uses the x86_mmx type -- it lowers `__m64` to either `<1 x i64>`
or `double`, depending on ABI.

This change does _not_ eliminate the SelectionDAG `MVT::x86mmx` type.
That type simply no longer corresponds to an IR type, and is used only
by MMX intrinsics and inline-asm operands.

Because SelectionDAGBuilder only knows how to generate the
operands/results of intrinsics based on the IR type, it thus now
generates the intrinsics with the type MVT::v1i64, instead of
MVT::x86mmx. We need to fix this before the DAG LegalizeTypes, and thus
have the X86 backend fix them up in DAGCombine. (This may be a
short-lived hack, if all the MMX intrinsics can be removed in upcoming
changes.)

Works towards issue #98272.


  Commit: fd17064dfa08c252c12b71167bc588f57e6a082c
      https://github.com/llvm/llvm-project/commit/fd17064dfa08c252c12b71167bc588f57e6a082c
  Author: Zibi Sarbinowski <zibi at ca.ibm.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.copy_file/copy_file_large.pass.cpp

  Log Message:
  -----------
  Fix fs.op.copy_file/copy_file_large.pass.cpp on z/OS (#100382)

This PR is required to fix copy_file_large.pass.cpp which is failing on
z/OS in all ASCII variations. The problem is that a destination file is
opened in binary mode and auto-conversion does not happen when this lit
is compiled with -fzos-le-char-mode=ascii.

In addition opening a destination file will match a text mode of
`fopen()` of a source file.


  Commit: ca00cec997c2a22dd6603cddb8bab789e1b01d34
      https://github.com/llvm/llvm-project/commit/ca00cec997c2a22dd6603cddb8bab789e1b01d34
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/IR/ConstantRange.cpp
    M llvm/test/Transforms/CorrelatedValuePropagation/mul.ll
    M llvm/unittests/IR/ConstantRangeTest.cpp

  Log Message:
  -----------
  [ConstantRange] Infer nonnegative for mul nuw nsw (#100554)

Alive2: https://alive2.llvm.org/ce/z/byzmsV


  Commit: 63a7ed45e89799adcca5c0493e184ed946c4a470
      https://github.com/llvm/llvm-project/commit/63a7ed45e89799adcca5c0493e184ed946c4a470
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/lib/AST/Interp/Compiler.cpp
    M clang/lib/AST/Interp/Compiler.h
    M clang/lib/AST/Interp/Interp.h
    M clang/lib/AST/Interp/Opcodes.td
    M clang/test/SemaCXX/new-delete-0x.cpp

  Log Message:
  -----------
  [clang][Interp] Reject non-literal values


  Commit: 430cf6537b1e872faabf7b6859b1f7d556dc0da9
      https://github.com/llvm/llvm-project/commit/430cf6537b1e872faabf7b6859b1f7d556dc0da9
  Author: Ivan Kosarev <ivan.kosarev at amd.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/DSInstructions.td
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td

  Log Message:
  -----------
  [AMDGPU][NFCI] Declare offset0/1 operands to be i32. (#100560)

Being of type i8 makes them signed, which they aren't, and requires
extra work masking them on verbalisation.

Part of <https://github.com/llvm/llvm-project/issues/62629>.


  Commit: de792d6d92c3d4fde7065f2590133acf81f1a93e
      https://github.com/llvm/llvm-project/commit/de792d6d92c3d4fde7065f2590133acf81f1a93e
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/test/Transforms/SLPVectorizer/X86/arith-add-ssat.ll
    M llvm/test/Transforms/SLPVectorizer/X86/arith-add-usat.ll
    M llvm/test/Transforms/SLPVectorizer/X86/arith-sub-ssat.ll
    M llvm/test/Transforms/SLPVectorizer/X86/arith-sub-usat.ll

  Log Message:
  -----------
  [SLP][X86] Update add/sub sat test checks to share common SSE prefixes


  Commit: b2b68c241a61bbbe0e2f89cb2182f1b1bec564b6
      https://github.com/llvm/llvm-project/commit/b2b68c241a61bbbe0e2f89cb2182f1b1bec564b6
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/X86/arith-ssat-codesize.ll
    M llvm/test/Analysis/CostModel/X86/arith-ssat-latency.ll
    M llvm/test/Analysis/CostModel/X86/arith-ssat-sizelatency.ll
    M llvm/test/Analysis/CostModel/X86/arith-ssat.ll
    M llvm/test/Analysis/CostModel/X86/arith-usat-codesize.ll
    M llvm/test/Analysis/CostModel/X86/arith-usat-latency.ll
    M llvm/test/Analysis/CostModel/X86/arith-usat-sizelatency.ll
    M llvm/test/Analysis/CostModel/X86/arith-usat.ll
    M llvm/test/Transforms/SLPVectorizer/X86/arith-add-ssat.ll
    M llvm/test/Transforms/SLPVectorizer/X86/arith-add-usat.ll
    M llvm/test/Transforms/SLPVectorizer/X86/arith-sub-ssat.ll
    M llvm/test/Transforms/SLPVectorizer/X86/arith-sub-usat.ll

  Log Message:
  -----------
  [CostModel][X86] Add add/sat sat intrinsic costs

Fixes regressions from #97463 due to missing costs for custom lowered ops


  Commit: a79db96ec0decca4fe45579e039cf5589345b3ed
      https://github.com/llvm/llvm-project/commit/a79db96ec0decca4fe45579e039cf5589345b3ed
  Author: Kai Nacke <kai.peter.nacke at ibm.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.h
    M llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp
    M llvm/lib/Target/ARM/ARMRegisterBankInfo.h
    M llvm/lib/Target/M68k/GISel/M68kRegisterBankInfo.cpp
    M llvm/lib/Target/M68k/GISel/M68kRegisterBankInfo.h
    M llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
    M llvm/lib/Target/Mips/MipsRegisterBankInfo.h
    M llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp
    M llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.h
    M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
    M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.h
    M llvm/lib/Target/SPIRV/SPIRVRegisterBankInfo.cpp
    M llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp
    M llvm/lib/Target/X86/GISel/X86RegisterBankInfo.h
    A llvm/test/TableGen/RegBankFromRegClass.td
    M llvm/utils/TableGen/RegisterBankEmitter.cpp

  Log Message:
  -----------
  [GISel][TableGen] Generate getRegBankFromRegClass (#99896)

Generating the mapping from a register class to a register bank is
complex:
 - there can be lots of register classes
 - the mapping may be ambiguos
- a register class can span several register banks (e.g. a register
class containing all registers)
- the type information is not enough to decide which register bank to
map to (e.g. a register class containing floating point and vector
registers, and all register can represent a f64 value)

The approach taken here is to encode the register banks in an array
indexed by the ID of the register class. To save space, the entries are
packed into chunks of size 2^n.


  Commit: d311edd0eff2095b1e5e73b4e612e7ddd8d93d70
      https://github.com/llvm/llvm-project/commit/d311edd0eff2095b1e5e73b4e612e7ddd8d93d70
  Author: Chen Zheng <czhengsz at cn.ibm.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/TargetParser/PPCTargetParser.cpp

  Log Message:
  -----------
  [PowerPC] fix default cpu setting

for platform that returns nothing for getHostCPUName()
For example for target ARM on windows. For this case, -mcpu=native
should set CPU to the default according to triple instead of setting
CPU to "native"

Fixes https://lab.llvm.org/buildbot/#/builders/161/builds/873 caused by
https://github.com/llvm/llvm-project/pull/97541


  Commit: 9ad92c476907451bdc95a6c2b6a6bbba03815b4b
      https://github.com/llvm/llvm-project/commit/9ad92c476907451bdc95a6c2b6a6bbba03815b4b
  Author: Donát Nagy <donat.nagy at ericsson.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/test/Analysis/ctor-array.cpp
    M clang/test/Analysis/ctor.mm

  Log Message:
  -----------
  [analyzer][NFC] Minor cleanup in two test files. (#100570)

This commit contains two unrelated trivial changes:

(1) Three unused variables are removed from `ctor.mm`.
(2) A FIXME block is removed from `ctor-array.cpp` because it described
    an issue that was resolved since then.


  Commit: 12dba4d48461c571cb5bdb7c3ac6078b9a357a02
      https://github.com/llvm/llvm-project/commit/12dba4d48461c571cb5bdb7c3ac6078b9a357a02
  Author: weiwei chen <weiwei.chen at modular.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M mlir/docs/Diagnostics.md
    M mlir/include/mlir/IR/Diagnostics.h
    A mlir/test/IR/diagnostic-handler-metadata.mlir
    M mlir/test/lib/IR/CMakeLists.txt
    A mlir/test/lib/IR/TestDiagnosticsMetadata.cpp
    M mlir/tools/mlir-opt/mlir-opt.cpp

  Log Message:
  -----------
  [mlir] Add metadata to Diagnostic. (#99398)

Add metadata to Diagnostic. 

Motivation: we have a use case where we want to do some filtering in our
customized Diagnostic Handler based on some customized info that is not
`location` or `severity` or `diagnostic arguments` that are member
variables of `Diagnostic`. Specifically, we want to add a unique ID to
the `Diagnostic` for the handler to filter in a compiler pass that emits
errors in async tasks with multithreading and the diagnostic handling is
associated to the task.

This patch adds a field of `metadata` to `mlir::Diagnostics` as a
general solution. `metadata` is of type `SmallVector<DiagnosticArgument,
0>` to save memory size and reuse existing `DiagnosticArgument` for
metadata type.


  Commit: daf9d7f3881e4ffd1fd5988dc1b6223c733b6bef
      https://github.com/llvm/llvm-project/commit/daf9d7f3881e4ffd1fd5988dc1b6223c733b6bef
  Author: Chen Zheng <czhengsz at cn.ibm.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/test/Sema/builtin-cpu-supports.c

  Log Message:
  -----------
  [PowerPC] add testcaseis for PPC, NFC

For builtin __builtin_cpu_is and __builtin_cpu_supports


  Commit: a0c590795eae48903a013699fe84db335854fa80
      https://github.com/llvm/llvm-project/commit/a0c590795eae48903a013699fe84db335854fa80
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
    M llvm/unittests/Frontend/OpenMPDecompositionTest.cpp

  Log Message:
  -----------
  [Frontend][OpenMP] Allow implicit clauses to fail to apply (#100460)

The `linear(x)` clause implies `firstprivate(x)` on the compound
construct if `x` is not an induction variable. With more construct
combinations coming in OpenMP 6.0, the `firstprivate` clause may not be
possible to apply, e.g. in "masked simd".
An additional benefit from this change is that it allows treating leaf
constructs as combined constructs with a single constituent. Otherwise,
a `linear` clause on a lone `simd` construct could imply a
`firstprivate` clause that can't be applied.


  Commit: 8758091a70393f71c5a75805f5cbde556f6dce22
      https://github.com/llvm/llvm-project/commit/8758091a70393f71c5a75805f5cbde556f6dce22
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/Passes/PassBuilderPipelines.cpp
    M llvm/test/Other/new-pm-lto-defaults.ll
    A llvm/test/Transforms/PhaseOrdering/varargs.ll

  Log Message:
  -----------
  [LLVM] Add 'ExpandVariadicsPass' to LTO default pipeline (#100479)

Summary:
This pass expands variadic functions into non-variadic function calls
according to the target ABI. Currently, this is used as the lowering for
the NVPTX and AMDGPU targets.

This pass is currently only run late in the target's backend. However,
during LTO we want to run it before the inliner pass so that the
expanded functions can be inlined using standard heuristics. This pass
is a no-op for unsupported targets, so this won't apply to any code that
isn't already using it.


  Commit: 4db37a49a72bb9cff7a78e77439008c058383099
      https://github.com/llvm/llvm-project/commit/4db37a49a72bb9cff7a78e77439008c058383099
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/test/Transforms/PhaseOrdering/varargs.ll

  Log Message:
  -----------
  [LLVM] Only run vararg test with the amdgpu target


  Commit: 010dcfd85fb8b8c8826f25f27324e3a958dba5f8
      https://github.com/llvm/llvm-project/commit/010dcfd85fb8b8c8826f25f27324e3a958dba5f8
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/X86/arith-overflow.ll
    M llvm/test/Analysis/CostModel/X86/costmodel.ll
    M llvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll
    M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
    M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
    M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll

  Log Message:
  -----------
  [CostModel][X86] Improve add/sub/mul overflow intrinsic costs

Noticed due to x86 changes in #97463


  Commit: 51d4980a133db12888207698e39c469cb7055cac
      https://github.com/llvm/llvm-project/commit/51d4980a133db12888207698e39c469cb7055cac
  Author: Mike Rice <michael.p.rice at intel.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/lib/Sema/SemaDeclCXX.cpp

  Log Message:
  -----------
  [clang][NFC] remove unneeded nullptr checks after dereference (#100489)

Fix static verifer concerns of null pointer checks after dereferencing  
the pointer. Update the assert to make it super clear it is not null and
remove the checks.


  Commit: abc2eae68290c453e1899a94eccc4ed5ea3b69c1
      https://github.com/llvm/llvm-project/commit/abc2eae68290c453e1899a94eccc4ed5ea3b69c1
  Author: Tristan Ross <tristan.ross at midstall.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M bolt/CMakeLists.txt
    M bolt/include/bolt/RuntimeLibs/RuntimeLibrary.h
    M bolt/lib/CMakeLists.txt
    M bolt/lib/RuntimeLibs/HugifyRuntimeLibrary.cpp
    M bolt/lib/RuntimeLibs/InstrumentationRuntimeLibrary.cpp
    M bolt/lib/RuntimeLibs/RuntimeLibrary.cpp
    M bolt/lib/Target/AArch64/CMakeLists.txt
    M bolt/lib/Target/RISCV/CMakeLists.txt
    M bolt/lib/Target/X86/CMakeLists.txt
    M bolt/lib/Utils/CMakeLists.txt
    M bolt/lib/Utils/CommandLineOpts.cpp
    M bolt/runtime/CMakeLists.txt
    M bolt/test/lit.cfg.py
    M bolt/test/lit.site.cfg.py.in

  Log Message:
  -----------
  [BOLT] Enable standalone build (#97130)

Continue from #87196 as author did not have much time, I have taken over
working on this PR. We would like to have this so it'll be easier to
package for Nix.

Can be tested by copying cmake, bolt, third-party, and llvm directories
out into their own directory with this PR applied and then build bolt.

---------

Co-authored-by: pca006132 <john.lck40 at gmail.com>


  Commit: ffd624024865cf98644c4f9357ef369327ac0995
      https://github.com/llvm/llvm-project/commit/ffd624024865cf98644c4f9357ef369327ac0995
  Author: Tristan Ross <tristan.ross at midstall.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M bolt/utils/docker/Dockerfile

  Log Message:
  -----------
  [BOLT] Update Docker to use Ubuntu 24.04 (#99421)

Updates the Dockerfile to use Ubuntu 24.04 due to CMake wanting a newer
version. Can be tested by trying to build the Docker image currently in
main and then try building the Docker image in this PR.


  Commit: 0762db6533eda3453158c7b9b0631542c47093a8
      https://github.com/llvm/llvm-project/commit/0762db6533eda3453158c7b9b0631542c47093a8
  Author: Nathan James <n.james93 at hotmail.co.uk>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang-tools-extra/clang-tidy/utils/UseRangesCheck.cpp
    M clang-tools-extra/clang-tidy/utils/UseRangesCheck.h
    M clang-tools-extra/test/clang-tidy/checkers/modernize/Inputs/use-ranges/fake_std.h

  Log Message:
  -----------
  [clang-tidy] Fix crash in modernize-use-ranges (#100427)

Crash seems to be caused by the check function not handling inline
namespaces correctly for some instances. Changed how the Replacer is got
from the MatchResult now which should alleviate any potential issues

Fixes #100406


  Commit: a27f816fe56af9cc7f4f296ad6c577f6ea64349f
      https://github.com/llvm/llvm-project/commit/a27f816fe56af9cc7f4f296ad6c577f6ea64349f
  Author: Piotr Zegar <me at piotrzegar.pl>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang-tools-extra/clang-tidy/readability/NonConstParameterCheck.cpp
    A clang-tools-extra/test/clang-tidy/checkers/readability/non-const-parameter.c

  Log Message:
  -----------
  [clang-tidy] Fix crash in C language in readability-non-const-parameter (#100461)

Fix crash that happen when redeclaration got
different number of parameters than definition.

Fixes #100340


  Commit: 24a18aafa337b70a5a6c30f077bddc64e8677b48
      https://github.com/llvm/llvm-project/commit/24a18aafa337b70a5a6c30f077bddc64e8677b48
  Author: Ivan Kosarev <ivan.kosarev at amd.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll

  Log Message:
  -----------
  [AMDGPU] Simplify printing row/bank_mask modifiers. (#100575)

And fix a codegen test to use mask values that fit their encoding
fields.

Part of <https://github.com/llvm/llvm-project/issues/62629>.


  Commit: 98e733eaf2af1a5c1d9392e279d21182ffdf560d
      https://github.com/llvm/llvm-project/commit/98e733eaf2af1a5c1d9392e279d21182ffdf560d
  Author: Tom Eccles <tom.eccles at arm.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M flang/include/flang/Lower/ConvertVariable.h
    M flang/lib/Lower/ConvertVariable.cpp
    M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
    A flang/test/Lower/OpenMP/private-derived-type.f90

  Log Message:
  -----------
  [flang][OpenMP] Initialize privatised derived type variables (#100417)

Fixes #91928


  Commit: abacc5220e228012b0b86ca2ed540ef1a715f1ee
      https://github.com/llvm/llvm-project/commit/abacc5220e228012b0b86ca2ed540ef1a715f1ee
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp

  Log Message:
  -----------
  Fix unused variable warning. NFC.


  Commit: 9398cc2ec57721a57af98f6206c816038375ac6e
      https://github.com/llvm/llvm-project/commit/9398cc2ec57721a57af98f6206c816038375ac6e
  Author: Acim Maravic <Acim.Maravic at Syrmia.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/BUFInstructions.td
    M llvm/lib/Target/AMDGPU/DSInstructions.td
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/lib/Target/AMDGPU/SMInstructions.td
    M llvm/lib/Target/AMDGPU/SOPInstructions.td
    M llvm/lib/Target/AMDGPU/VOP1Instructions.td
    M llvm/lib/Target/AMDGPU/VOP2Instructions.td
    M llvm/lib/Target/AMDGPU/VOPCInstructions.td
    M llvm/lib/Target/AMDGPU/VOPInstructions.td

  Log Message:
  -----------
  [LLVM][AMDGPU] Copy isConvergent from Pseudo to Real instructions (#99658)

This patch copies the flag isConvergent from pseudo instructions to the
corresponding real instructions, so that isConvergent flag is also
defined for real instructions.

Flags are not required by the compiler, but for consistency it would be
nice to have them.

Co-authored-by: Acim Maravic <Acim.Maravic at amd.com>


  Commit: d8b672dac9f8945ab35cffaa4e196e3d3e61da1f
      https://github.com/llvm/llvm-project/commit/d8b672dac9f8945ab35cffaa4e196e3d3e61da1f
  Author: jeanPerier <jperier at nvidia.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M flang/include/flang/Optimizer/CodeGen/CGOps.td
    M flang/include/flang/Optimizer/Dialect/FIROps.td
    M flang/lib/Optimizer/CodeGen/CodeGen.cpp

  Log Message:
  -----------
  [flang][NFC] rename fircg op operand index accessors (#100584)

fircg operations have xxxOffset members to give the operand index of
operand xxx. This is a bit weird when looking at usage (e.g.
`arrayCoor.shiftOffset` reads like it is shifting some offset). Rename
them to getXxxOperandIndex.


  Commit: 3295d377f37a60597321f502d164b5d6b1948e28
      https://github.com/llvm/llvm-project/commit/3295d377f37a60597321f502d164b5d6b1948e28
  Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/lib/Parse/ParseExpr.cpp

  Log Message:
  -----------
  [clang] Remove `__is_layout_compatible` from revertible type traits list (#100572)

`__is_layout_compatible` was added in Clang 19 (#81506), and at that
time it wasn't entirely clear whether it should be a revertible type
trait or not. We decided to follow the example of other type traits.
Since then #95969 happened, and now we know that we don't want new
revertible type traits.

This patch removes `__is_layout_compatible` from revertible type traits
list, and leaves a comment what revertible type traits are, and that new
type traits should not be added there.

The intention is to also cherry-pick this to 19 branch.


  Commit: 817cd726454f01e990cd84e5e1d339b120b5ebaa
      https://github.com/llvm/llvm-project/commit/817cd726454f01e990cd84e5e1d339b120b5ebaa
  Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
    A llvm/test/CodeGen/AMDGPU/si-fold-scalar-clamp.mir

  Log Message:
  -----------
  [AMDGPU] Fix folding clamp into pseudo scalar instructions (#100568)

Clamp is canonically a v_max* instruction with a VGPR dst. Folding clamp
into a pseudo scalar instruction can cause issues due to a change in
regbank. We fix this with a copy.


  Commit: e90d552c77428b93b435eaafa81e396cdaf60694
      https://github.com/llvm/llvm-project/commit/e90d552c77428b93b435eaafa81e396cdaf60694
  Author: Mikhail R. Gadelha <mikhail at igalia.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M libc/docs/date_and_time.rst
    M libc/docs/math/index.rst

  Log Message:
  -----------
  [libc][NFC] Update riscv documentation (#100578)

This adds linux-riscv32 to the documentation and fixes riscv's
entrypoint broken link.


  Commit: 1db7d2ae226c96e0243309e1688c6e0cfb9236bd
      https://github.com/llvm/llvm-project/commit/1db7d2ae226c96e0243309e1688c6e0cfb9236bd
  Author: Noah Goldstein <goldstein.w.n at gmail.com>
  Date:   2024-07-26 (Fri, 26 Jul 2024)

  Changed paths:
    M llvm/include/llvm/Object/ELF.h

  Log Message:
  -----------
  [ELF] Add missing `static` decl on several helpers; NFC


  Commit: 342328db6b2a69cf59c01a6115b1baab925c0736
      https://github.com/llvm/llvm-project/commit/342328db6b2a69cf59c01a6115b1baab925c0736
  Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/lib/Sema/SemaChecking.cpp
    M clang/test/Headers/float.c
    M clang/test/Sema/warn-infinity-nan-disabled-lnx.cpp

  Log Message:
  -----------
  [CLANG] Emit warning in finite math mode when INF and NAN are used. (#99672)

In finite math mode when special math builtins `__builtin_inf` and
`__builtin_nan` are used a warning is emitted when the builtin is
expanded and at call point.
This warning at call point was missing for` __builtin_inf` and this
patch fixes the issue
(https://github.com/llvm/llvm-project/issues/98018).


  Commit: 3ce6f68ee736e2e6afaa2fe5fcde71f26b21d0cf
      https://github.com/llvm/llvm-project/commit/3ce6f68ee736e2e6afaa2fe5fcde71f26b21d0cf
  Author: Mark de Wever <koraq at xs4all.nl>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M libcxx/docs/FeatureTestMacroTable.rst
    M libcxx/docs/ReleaseNotes/19.rst
    M libcxx/docs/Status/Cxx20.rst
    M libcxx/docs/Status/Cxx20Papers.csv
    M libcxx/docs/Status/SpaceshipPapers.csv
    M libcxx/include/version
    M libcxx/test/std/language.support/support.limits/support.limits.general/compare.version.compile.pass.cpp
    M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
    M libcxx/utils/generate_feature_test_macro_components.py

  Log Message:
  -----------
  [libc++][spaceship] Marks P1614 as complete. (#99375)

Implements parts of:
- P1902R1 Missing feature-test macros 2017-2019

Completes:
- P1614R2 The Mothership has Landed

Fixes #100018


  Commit: 06134540126e3b82b66e82d577ac194584e76153
      https://github.com/llvm/llvm-project/commit/06134540126e3b82b66e82d577ac194584e76153
  Author: Akash Banerjee <akash.banerjee at amd.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp

  Log Message:
  -----------
  [OpenMP] Fix OpenMPIRBuilder generating incorrect duplicate SrcLocInfo (#100364)

This should further fix some of the incorrect debug info being generated
related to #97458


  Commit: f67fa3be4db68afc08c7f3d9523f1533fa5687b7
      https://github.com/llvm/llvm-project/commit/f67fa3be4db68afc08c7f3d9523f1533fa5687b7
  Author: David Green <david.green at arm.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/AArch64/shuffle-other.ll
    M llvm/test/Transforms/VectorCombine/AArch64/select-shuffle.ll

  Log Message:
  -----------
  [AArch64] Remove special-case inserted shuffle cost.

This special case tried to measure if the shuffle vector will be multiple
inserts into an existing vector, with one of the lanes already in-place. If so
it reduces the cost by 1 to to represent it will can insert n-1 vector lanes.
This isn't always true though as the original vector may need to be moved to a
new value to start inserting new values into it, if other values from the
original are still needed.

This didn't effect performance much when I tried it, but should hopefully start
to address a regression we see from differences in SLP vectorization lane
orders.


  Commit: 7304936479a7eb61adc9edcaf6ce56e4792590ad
      https://github.com/llvm/llvm-project/commit/7304936479a7eb61adc9edcaf6ce56e4792590ad
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/lib/AST/Interp/ByteCodeEmitter.cpp
    M clang/lib/AST/Interp/InterpBuiltin.cpp
    A clang/test/AST/Interp/builtin-constant-p.cpp

  Log Message:
  -----------
  [clang][Interp] Add preliminary __builtin_constant_p implementation

This is not perfect or complete, but it helps us pass the simple tests
and those tests where __builtin_constant_p is not the main subject of
testing.


  Commit: 3eaf9f7237b088e9382739808d4f723b2c11dd8c
      https://github.com/llvm/llvm-project/commit/3eaf9f7237b088e9382739808d4f723b2c11dd8c
  Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
    M llvm/lib/Analysis/LoopAccessAnalysis.cpp

  Log Message:
  -----------
  LAA: fix style after cursory reading (NFC) (#100447)


  Commit: 99bb9a719cec9513e72ad275c1c0302b76b6c408
      https://github.com/llvm/llvm-project/commit/99bb9a719cec9513e72ad275c1c0302b76b6c408
  Author: Jon Roelofs <jonathan_roelofs at apple.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M compiler-rt/test/profile/ContinuousSyncMode/darwin-proof-of-concept.c

  Log Message:
  -----------
  [compiler-rt][Profile][Darwin] Fix a test that expected an alignment … (#100469)

…greater than the maximum for a segment

This test was failing with:
```
--
Exit Code: 1

Command Output (stderr):
--
ld: warning: reducing alignment of section __DATA,__pcnts from 0x4000 to 0x1000 because it exceeds segment maximum alignment ld: warning: reducing alignment of section __DATA,__pdata from 0x4000 to 0x1000 because it exceeds segment maximum alignment __pdata not ordered after __pcnts.

--
```


  Commit: c194bc77a21d68dd321588c9d726ef2d6c556a30
      https://github.com/llvm/llvm-project/commit/c194bc77a21d68dd321588c9d726ef2d6c556a30
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/ArmSME/Transforms/Passes.td
    M mlir/include/mlir/Dialect/Vector/Utils/VectorUtils.h
    M mlir/lib/Dialect/ArmSME/Transforms/CMakeLists.txt
    M mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
    M mlir/test/Dialect/ArmSME/vector-legalization.mlir

  Log Message:
  -----------
  [mlir][ArmSME] Add rewrite to handle unsupported SVE transposes via SME/ZA (#98620)

This adds a workaround rewrite that allows stores of unsupported SVE
transposes such as:

```mlir
%tr = vector.transpose %vec, [1, 0]
  : vector<2x[4]xf32> to vector<[4]x2xf32>
vector.transfer_write %tr, %dest[%i, %j] {in_bounds = [true, true]}
  : vector<[4]x2xf32>,  memref<?x?xf32>
```

To use SME tiles, which are possible to lower (when SME is available):

```mlir
// Insert vector<2x[4]xf32> into an SME tile:
%0 = arm_sme.get_tile : vector<[4]x[4]xf32>
%1 = vector.extract %vec[0] : vector<[4]xf32> from vector<2x[4]xf32>
%2 = vector.insert %1, %0 [0] : vector<[4]xf32> into vector<[4]x[4]xf32>
%3 = vector.extract %vec[1] : vector<[4]xf32> from vector<2x[4]xf32>
%4 = vector.insert %3, %2 [1] : vector<[4]xf32> into vector<[4]x[4]xf32>
// Store the tile with a transpose + mask:
%c4_vscale = arith.muli %vscale, %c4 : index
%mask = vector.create_mask %c4_vscale, %c2 : vector<[4]x[4]xi1>
vector.transfer_write %4, %arg1[%arg2, %arg3], %mask
   {permutation_map = affine_map<(d0, d1) -> (d1, d0)>}
   : vector<[4]x[4]xf32>, memref<?x?xf32>
```


  Commit: a55df237375e98cfc2520d5eb1a23b302ef02ba0
      https://github.com/llvm/llvm-project/commit/a55df237375e98cfc2520d5eb1a23b302ef02ba0
  Author: Louis Dionne <ldionne.2 at gmail.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M libcxx/include/locale

  Log Message:
  -----------
  [libc++] Add missing xlocale.h include on Apple and FreeBSD (#99689)

The `<locale>` header uses `strtoll_l` and friends which are defined in
`<xlocale.h>` on these platforms. While this works via transitive
includes when modules are disabled, this doesn't work anymore if the
platforms are modularized properly.


  Commit: db8c84fc7a75dd60bcfff7160b51e1a55e7e0f73
      https://github.com/llvm/llvm-project/commit/db8c84fc7a75dd60bcfff7160b51e1a55e7e0f73
  Author: Thorsten Schütt <schuett at gmail.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
    M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
    M llvm/include/llvm/Target/GlobalISel/Combine.td
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    M llvm/lib/CodeGen/GlobalISel/CombinerHelperCasts.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/combine-cast.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
    M llvm/test/CodeGen/AMDGPU/ctlz.ll
    M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
    M llvm/test/CodeGen/AMDGPU/cttz.ll

  Log Message:
  -----------
  [GlobalIsel] Push cast through select. (#100539)


  Commit: edf9756e2e658ac8faa8635e15acb428d5b103f6
      https://github.com/llvm/llvm-project/commit/edf9756e2e658ac8faa8635e15acb428d5b103f6
  Author: Nico Weber <thakis at chromium.org>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/utils/gn/secondary/bolt/lib/RuntimeLibs/BUILD.gn
    M llvm/utils/gn/secondary/bolt/lib/Utils/BUILD.gn
    M llvm/utils/gn/secondary/bolt/test/BUILD.gn

  Log Message:
  -----------
  [gn] port abc2eae6829 (bolt standalone)


  Commit: 08b3556c2ff8948932bcbbc77781fe41388e4e63
      https://github.com/llvm/llvm-project/commit/08b3556c2ff8948932bcbbc77781fe41388e4e63
  Author: Nico Weber <thakis at chromium.org>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/utils/gn/secondary/lldb/source/Interpreter/BUILD.gn
    A llvm/utils/gn/secondary/lldb/source/Interpreter/Interfaces/BUILD.gn

  Log Message:
  -----------
  [gn] port enough of 2914a4b88837 (lldb Interfaces)

gn's lldb does not have the Python plugin, so most of the changes
from 2914a4b88837 aren't necessary here.


  Commit: 319d29d21ea9f04cd8530c77b558796bf5db0197
      https://github.com/llvm/llvm-project/commit/319d29d21ea9f04cd8530c77b558796bf5db0197
  Author: Kazu Hirata <kazu at google.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M clang/lib/Sema/SemaChecking.cpp

  Log Message:
  -----------
  [Sema] Fix a warning

This patch fixes:

  clang/lib/Sema/SemaChecking.cpp:8220:3: error: default label in
  switch which covers all enumeration values
  [-Werror,-Wcovered-switch-default]


  Commit: e31794f99d72dd764c4bc5c5583a0a4c89df22c3
      https://github.com/llvm/llvm-project/commit/e31794f99d72dd764c4bc5c5583a0a4c89df22c3
  Author: Hari Limaye <hari.limaye at arm.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M llvm/lib/CodeGen/StackFrameLayoutAnalysisPass.cpp
    M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll
    M llvm/test/CodeGen/X86/stack-frame-layout-remarks.ll

  Log Message:
  -----------
  [StackFrameLayoutAnalysis] Support more SlotTypes (#100562)

Add new SlotTypes to StackFrameLayoutAnalysis to disambiguate Fixed and
Variable-Sized stack slots from Variable slots. As Offsets are
unreliable for VLA-area objects, sort these to the end of the list -
using the Frame Index to ensure a deterministic order when Offsets are
equal.


  Commit: 88fb56ebf25de6288510364a4be3fbd7ae9a7246
      https://github.com/llvm/llvm-project/commit/88fb56ebf25de6288510364a4be3fbd7ae9a7246
  Author: Mikhail R. Gadelha <mikhail at igalia.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M libc/docs/date_and_time.rst

  Log Message:
  -----------
  [libc] Fix broken table introduced by PR #100578


  Commit: c003136e0c6b3a76fe4ce0c51d602cfbb87661ef
      https://github.com/llvm/llvm-project/commit/c003136e0c6b3a76fe4ce0c51d602cfbb87661ef
  Author: Michael Liao <michael.hliao at gmail.com>
  Date:   2024-07-25 (Thu, 25 Jul 2024)

  Changed paths:
    M bolt/CMakeLists.txt
    M bolt/include/bolt/RuntimeLibs/RuntimeLibrary.h
    M bolt/lib/CMakeLists.txt
    M bolt/lib/RuntimeLibs/HugifyRuntimeLibrary.cpp
    M bolt/lib/RuntimeLibs/InstrumentationRuntimeLibrary.cpp
    M bolt/lib/RuntimeLibs/RuntimeLibrary.cpp
    M bolt/lib/Target/AArch64/CMakeLists.txt
    M bolt/lib/Target/RISCV/CMakeLists.txt
    M bolt/lib/Target/X86/CMakeLists.txt
    M bolt/lib/Utils/CMakeLists.txt
    M bolt/lib/Utils/CommandLineOpts.cpp
    M bolt/runtime/CMakeLists.txt
    M bolt/test/lit.cfg.py
    M bolt/test/lit.site.cfg.py.in
    M bolt/utils/docker/Dockerfile
    M clang-tools-extra/clang-doc/HTMLGenerator.cpp
    M clang-tools-extra/clang-doc/Mapper.cpp
    M clang-tools-extra/clang-doc/Mapper.h
    M clang-tools-extra/clang-doc/assets/index.js
    M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
    M clang-tools-extra/clang-tidy/readability/NonConstParameterCheck.cpp
    M clang-tools-extra/clang-tidy/utils/UseRangesCheck.cpp
    M clang-tools-extra/clang-tidy/utils/UseRangesCheck.h
    A clang-tools-extra/test/clang-doc/test-path-abs.cpp
    M clang-tools-extra/test/clang-tidy/checkers/modernize/Inputs/use-ranges/fake_std.h
    A clang-tools-extra/test/clang-tidy/checkers/readability/non-const-parameter.c
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/Analysis/FlowSensitive/MapLattice.h
    M clang/include/clang/Driver/Options.td
    M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h
    M clang/lib/AST/Interp/ByteCodeEmitter.cpp
    M clang/lib/AST/Interp/Compiler.cpp
    M clang/lib/AST/Interp/Compiler.h
    M clang/lib/AST/Interp/Interp.h
    M clang/lib/AST/Interp/InterpBuiltin.cpp
    M clang/lib/AST/Interp/Opcodes.td
    M clang/lib/Basic/Sarif.cpp
    M clang/lib/Basic/Targets/PPC.cpp
    M clang/lib/CodeGen/CGOpenMPRuntime.cpp
    M clang/lib/Driver/ToolChains/Arch/PPC.cpp
    M clang/lib/Driver/ToolChains/Arch/PPC.h
    M clang/lib/Driver/ToolChains/Clang.cpp
    M clang/lib/Driver/ToolChains/CommonArgs.cpp
    M clang/lib/Driver/ToolChains/PS4CPU.cpp
    M clang/lib/Parse/ParseExpr.cpp
    M clang/lib/Sema/SemaChecking.cpp
    M clang/lib/Sema/SemaDecl.cpp
    M clang/lib/Sema/SemaDeclCXX.cpp
    M clang/lib/Sema/SemaExprCXX.cpp
    M clang/lib/StaticAnalyzer/Core/CallEvent.cpp
    A clang/test/AST/Interp/builtin-constant-p.cpp
    M clang/test/AST/Interp/records.cpp
    M clang/test/Analysis/call-invalidation.cpp
    M clang/test/Analysis/ctor-array.cpp
    M clang/test/Analysis/ctor.mm
    M clang/test/CodeGen/aix-builtin-cpu-is.c
    M clang/test/CodeGen/builtin-cpu-supports.c
    M clang/test/Driver/lto-jobs.c
    M clang/test/Driver/ps4-linker.c
    M clang/test/Driver/ps5-linker.c
    M clang/test/Driver/unified-lto.c
    A clang/test/Frontend/skip-function-bodies.cpp
    M clang/test/Headers/float.c
    M clang/test/Misc/target-invalid-cpu-note.c
    M clang/test/Sema/builtin-cpu-supports.c
    M clang/test/Sema/warn-infinity-nan-disabled-lnx.cpp
    M clang/test/SemaCXX/cxx1z-decomposition.cpp
    M clang/test/SemaCXX/cxx2a-destroying-delete.cpp
    M clang/test/SemaCXX/new-delete-0x.cpp
    M clang/unittests/Tooling/ToolingTest.cpp
    M compiler-rt/test/profile/ContinuousSyncMode/darwin-proof-of-concept.c
    M flang/include/flang/Lower/ConvertVariable.h
    M flang/include/flang/Optimizer/CodeGen/CGOps.td
    M flang/include/flang/Optimizer/Dialect/FIROps.td
    M flang/lib/Lower/ConvertVariable.cpp
    M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
    M flang/lib/Optimizer/CodeGen/CodeGen.cpp
    M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
    A flang/test/Lower/OpenMP/private-derived-type.f90
    A flang/test/Transforms/debug-96314.fir
    M libc/docs/date_and_time.rst
    M libc/docs/math/index.rst
    M libcxx/docs/FeatureTestMacroTable.rst
    M libcxx/docs/ReleaseNotes/19.rst
    M libcxx/docs/Status/Cxx20.rst
    M libcxx/docs/Status/Cxx20Papers.csv
    M libcxx/docs/Status/SpaceshipPapers.csv
    M libcxx/include/locale
    M libcxx/include/version
    M libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.copy_file/copy_file_large.pass.cpp
    M libcxx/test/std/language.support/support.limits/support.limits.general/compare.version.compile.pass.cpp
    M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
    M libcxx/test/std/language.support/support.runtime/ctime.timespec.compile.pass.cpp
    M libcxx/utils/ci/build-picolibc.sh
    M libcxx/utils/generate_feature_test_macro_components.py
    M lldb/include/lldb/Core/PluginManager.h
    M lldb/include/lldb/Interpreter/Interfaces/ScriptedInterface.h
    A lldb/include/lldb/Interpreter/Interfaces/ScriptedInterfaceUsages.h
    M lldb/include/lldb/lldb-private-interfaces.h
    M lldb/source/Commands/CommandObjectScripting.cpp
    M lldb/source/Commands/Options.td
    M lldb/source/Core/PluginManager.cpp
    M lldb/source/Host/linux/Host.cpp
    M lldb/source/Interpreter/CMakeLists.txt
    A lldb/source/Interpreter/Interfaces/CMakeLists.txt
    A lldb/source/Interpreter/Interfaces/ScriptedInterfaceUsages.cpp
    M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/CMakeLists.txt
    R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface.cpp
    R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface.h
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface/CMakeLists.txt
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface/OperatingSystemPythonInterface.cpp
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface/OperatingSystemPythonInterface.h
    R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface.cpp
    R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface.h
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface/CMakeLists.txt
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface/ScriptedPlatformPythonInterface.cpp
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface/ScriptedPlatformPythonInterface.h
    R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
    R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.h
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/CMakeLists.txt
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.cpp
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.h
    R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface.cpp
    R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface.h
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface/CMakeLists.txt
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface/ScriptedThreadPlanPythonInterface.cpp
    A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface/ScriptedThreadPlanPythonInterface.h
    M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
    M llvm/bindings/ocaml/llvm/llvm.mli
    M llvm/bindings/ocaml/llvm/llvm_ocaml.c
    M llvm/cmake/modules/LLVMExternalProjectUtils.cmake
    M llvm/docs/BitCodeFormat.rst
    M llvm/docs/LangRef.rst
    M llvm/docs/ReleaseNotes.rst
    M llvm/include/llvm-c/Core.h
    M llvm/include/llvm/Analysis/AliasAnalysis.h
    M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
    M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
    M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
    M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
    M llvm/include/llvm/CodeGen/TargetFrameLowering.h
    M llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
    M llvm/include/llvm/IR/DataLayout.h
    M llvm/include/llvm/IR/IntrinsicInst.h
    M llvm/include/llvm/IR/Metadata.h
    M llvm/include/llvm/IR/Type.h
    M llvm/include/llvm/IR/VectorBuilder.h
    M llvm/include/llvm/Object/ELF.h
    M llvm/include/llvm/Target/GlobalISel/Combine.td
    M llvm/include/llvm/TargetParser/PPCTargetParser.def
    A llvm/include/llvm/TargetParser/PPCTargetParser.h
    M llvm/include/llvm/Transforms/Utils/LoopUtils.h
    M llvm/lib/Analysis/BasicAliasAnalysis.cpp
    M llvm/lib/Analysis/ConstantFolding.cpp
    M llvm/lib/Analysis/LoopAccessAnalysis.cpp
    M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
    M llvm/lib/AsmParser/LLLexer.cpp
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    M llvm/lib/CodeGen/GlobalISel/CombinerHelperCasts.cpp
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/CodeGen/MachineModuleInfo.cpp
    M llvm/lib/CodeGen/MachineTraceMetrics.cpp
    M llvm/lib/CodeGen/StackFrameLayoutAnalysisPass.cpp
    M llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
    M llvm/lib/CodeGen/ValueTypes.cpp
    M llvm/lib/CodeGen/WindowScheduler.cpp
    M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
    M llvm/lib/IR/AsmWriter.cpp
    M llvm/lib/IR/ConstantFold.cpp
    M llvm/lib/IR/ConstantRange.cpp
    M llvm/lib/IR/Core.cpp
    M llvm/lib/IR/DataLayout.cpp
    M llvm/lib/IR/Function.cpp
    M llvm/lib/IR/Instructions.cpp
    M llvm/lib/IR/IntrinsicInst.cpp
    M llvm/lib/IR/LLVMContextImpl.cpp
    M llvm/lib/IR/LLVMContextImpl.h
    M llvm/lib/IR/Type.cpp
    M llvm/lib/IR/VectorBuilder.cpp
    M llvm/lib/Passes/PassBuilderPipelines.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.h
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.h
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/lib/Target/AMDGPU/BUFInstructions.td
    M llvm/lib/Target/AMDGPU/DSInstructions.td
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
    M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AMDGPU/SMInstructions.td
    M llvm/lib/Target/AMDGPU/SOPInstructions.td
    M llvm/lib/Target/AMDGPU/VOP1Instructions.td
    M llvm/lib/Target/AMDGPU/VOP2Instructions.td
    M llvm/lib/Target/AMDGPU/VOPCInstructions.td
    M llvm/lib/Target/AMDGPU/VOPInstructions.td
    M llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp
    M llvm/lib/Target/ARM/ARMRegisterBankInfo.h
    M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
    M llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp
    M llvm/lib/Target/M68k/GISel/M68kRegisterBankInfo.cpp
    M llvm/lib/Target/M68k/GISel/M68kRegisterBankInfo.h
    M llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
    M llvm/lib/Target/Mips/MipsRegisterBankInfo.h
    M llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp
    M llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.h
    M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
    M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.h
    M llvm/lib/Target/SPIRV/SPIRVRegisterBankInfo.cpp
    M llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp
    M llvm/lib/Target/X86/GISel/X86RegisterBankInfo.h
    M llvm/lib/Target/X86/X86CallingConv.td
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
    M llvm/lib/Target/X86/X86InstrAsmAlias.td
    M llvm/lib/Target/X86/X86IntrinsicsInfo.h
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/lib/TargetParser/CMakeLists.txt
    A llvm/lib/TargetParser/PPCTargetParser.cpp
    M llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
    M llvm/lib/Transforms/IPO/FunctionImport.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
    M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
    M llvm/lib/Transforms/Utils/LoopUtils.cpp
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/test/Analysis/CostModel/AArch64/shuffle-other.ll
    M llvm/test/Analysis/CostModel/X86/arith-overflow.ll
    M llvm/test/Analysis/CostModel/X86/arith-ssat-codesize.ll
    M llvm/test/Analysis/CostModel/X86/arith-ssat-latency.ll
    M llvm/test/Analysis/CostModel/X86/arith-ssat-sizelatency.ll
    M llvm/test/Analysis/CostModel/X86/arith-ssat.ll
    M llvm/test/Analysis/CostModel/X86/arith-usat-codesize.ll
    M llvm/test/Analysis/CostModel/X86/arith-usat-latency.ll
    M llvm/test/Analysis/CostModel/X86/arith-usat-sizelatency.ll
    M llvm/test/Analysis/CostModel/X86/arith-usat.ll
    M llvm/test/Analysis/CostModel/X86/costmodel.ll
    M llvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll
    R llvm/test/Assembler/x86mmx.ll
    M llvm/test/Bitcode/bcanalyzer-types.ll
    M llvm/test/Bitcode/compatibility-3.6.ll
    M llvm/test/Bitcode/compatibility-3.7.ll
    M llvm/test/Bitcode/compatibility-3.8.ll
    M llvm/test/Bitcode/compatibility-3.9.ll
    M llvm/test/Bitcode/compatibility-4.0.ll
    M llvm/test/Bitcode/compatibility-5.0.ll
    M llvm/test/Bitcode/compatibility-6.0.ll
    M llvm/test/Bitcode/compatibility.ll
    A llvm/test/CodeGen/AArch64/GlobalISel/combine-cast.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/regbank-dup.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-dup.mir
    M llvm/test/CodeGen/AArch64/arm64-ccmp.ll
    M llvm/test/CodeGen/AArch64/arm64-dup.ll
    A llvm/test/CodeGen/AArch64/fcmp-fp128.ll
    M llvm/test/CodeGen/AArch64/fcmp.ll
    M llvm/test/CodeGen/AArch64/neon-mov.ll
    M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
    M llvm/test/CodeGen/AMDGPU/ctlz.ll
    M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
    M llvm/test/CodeGen/AMDGPU/cttz.ll
    M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
    M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.prim.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
    A llvm/test/CodeGen/AMDGPU/si-fold-scalar-clamp.mir
    R llvm/test/CodeGen/Generic/disable-debug-info-print.ll
    A llvm/test/CodeGen/Hexagon/swp-ws-stall-cycle.mir
    M llvm/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll
    M llvm/test/CodeGen/X86/avx-vbroadcast.ll
    M llvm/test/CodeGen/X86/avx2-vbroadcast.ll
    R llvm/test/CodeGen/X86/disable-debug-info-print-codeview.ll
    M llvm/test/CodeGen/X86/fast-isel-bc.ll
    M llvm/test/CodeGen/X86/frame-order.ll
    M llvm/test/CodeGen/X86/mmx-arg-passing-x86-64.ll
    M llvm/test/CodeGen/X86/mmx-arg-passing.ll
    M llvm/test/CodeGen/X86/mmx-arith.ll
    M llvm/test/CodeGen/X86/mmx-bitcast-fold.ll
    M llvm/test/CodeGen/X86/mmx-bitcast.ll
    M llvm/test/CodeGen/X86/mmx-cvt.ll
    M llvm/test/CodeGen/X86/mmx-fold-load.ll
    M llvm/test/CodeGen/X86/mmx-intrinsics.ll
    M llvm/test/CodeGen/X86/pr23246.ll
    M llvm/test/CodeGen/X86/pr29222.ll
    M llvm/test/CodeGen/X86/select-mmx.ll
    M llvm/test/CodeGen/X86/stack-folding-mmx.ll
    M llvm/test/CodeGen/X86/stack-frame-layout-remarks.ll
    M llvm/test/CodeGen/X86/vec_extract-mmx.ll
    M llvm/test/CodeGen/X86/vec_insert-7.ll
    M llvm/test/CodeGen/X86/vec_insert-mmx.ll
    M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
    M llvm/test/Instrumentation/MemorySanitizer/vector_arith.ll
    M llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll
    M llvm/test/Instrumentation/MemorySanitizer/vector_pack.ll
    M llvm/test/Instrumentation/MemorySanitizer/vector_shift.ll
    M llvm/test/MC/X86/apx/ctest-att.s
    M llvm/test/MC/X86/apx/ctest-intel.s
    M llvm/test/Other/new-pm-lto-defaults.ll
    A llvm/test/TableGen/RegBankFromRegClass.td
    M llvm/test/Transforms/CorrelatedValuePropagation/mul.ll
    M llvm/test/Transforms/InstCombine/X86/x86-movmsk.ll
    M llvm/test/Transforms/InstCombine/bitcast-vec-canon-inseltpoison.ll
    M llvm/test/Transforms/InstCombine/bitcast-vec-canon.ll
    A llvm/test/Transforms/InstCombine/struct-assign-tbaa-2.ll
    M llvm/test/Transforms/InstCombine/struct-assign-tbaa.ll
    M llvm/test/Transforms/InstSimplify/ConstProp/loads.ll
    R llvm/test/Transforms/LoopUnroll/X86/mmx.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
    M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
    M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
    M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
    M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
    M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
    A llvm/test/Transforms/PhaseOrdering/varargs.ll
    M llvm/test/Transforms/SLPVectorizer/X86/arith-add-ssat.ll
    M llvm/test/Transforms/SLPVectorizer/X86/arith-add-usat.ll
    M llvm/test/Transforms/SLPVectorizer/X86/arith-sub-ssat.ll
    M llvm/test/Transforms/SLPVectorizer/X86/arith-sub-usat.ll
    M llvm/test/Transforms/SLPVectorizer/X86/bad_types.ll
    A llvm/test/Transforms/SLPVectorizer/X86/pr98978.ll
    M llvm/test/Transforms/SROA/pr57796.ll
    R llvm/test/Transforms/SROA/tbaa-struct.ll
    M llvm/test/Transforms/SROA/tbaa-struct3.ll
    M llvm/test/Transforms/VectorCombine/AArch64/select-shuffle.ll
    M llvm/tools/llvm-c-test/echo.cpp
    M llvm/tools/llvm-stress/llvm-stress.cpp
    M llvm/unittests/Frontend/OpenMPDecompositionTest.cpp
    M llvm/unittests/IR/ConstantRangeTest.cpp
    M llvm/unittests/IR/InstructionsTest.cpp
    M llvm/unittests/IR/VPIntrinsicTest.cpp
    M llvm/utils/TableGen/RegisterBankEmitter.cpp
    M llvm/utils/gn/secondary/bolt/lib/RuntimeLibs/BUILD.gn
    M llvm/utils/gn/secondary/bolt/lib/Utils/BUILD.gn
    M llvm/utils/gn/secondary/bolt/test/BUILD.gn
    M llvm/utils/gn/secondary/lldb/source/Interpreter/BUILD.gn
    A llvm/utils/gn/secondary/lldb/source/Interpreter/Interfaces/BUILD.gn
    M llvm/utils/gn/secondary/llvm/lib/TargetParser/BUILD.gn
    M mlir/docs/Diagnostics.md
    M mlir/docs/Dialects/LLVM.md
    M mlir/include/mlir/Dialect/ArmSME/Transforms/Passes.td
    M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h
    M mlir/include/mlir/Dialect/Vector/Utils/VectorUtils.h
    M mlir/include/mlir/IR/BuiltinTypes.td
    M mlir/include/mlir/IR/Diagnostics.h
    M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
    M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
    M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
    M mlir/lib/Dialect/ArmSME/Transforms/CMakeLists.txt
    M mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
    M mlir/lib/Dialect/Bufferization/Transforms/BufferDeallocationSimplification.cpp
    M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
    M mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp
    M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
    M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
    M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
    M mlir/lib/Target/LLVMIR/TypeFromLLVM.cpp
    M mlir/lib/Target/LLVMIR/TypeToLLVM.cpp
    M mlir/lib/Transforms/Utils/RegionUtils.cpp
    M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
    M mlir/test/Dialect/ArmSME/vector-legalization.mlir
    M mlir/test/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation/dealloc-branchop-interface.mlir
    M mlir/test/Dialect/LLVMIR/types.mlir
    M mlir/test/Dialect/Linalg/detensorize_entry_block.mlir
    M mlir/test/Dialect/Linalg/detensorize_if.mlir
    M mlir/test/Dialect/Linalg/detensorize_while.mlir
    M mlir/test/Dialect/Linalg/detensorize_while_impure_cf.mlir
    M mlir/test/Dialect/Linalg/detensorize_while_pure_cf.mlir
    M mlir/test/Dialect/Linalg/vectorize-tensor-extract-masked.mlir
    M mlir/test/Dialect/Vector/invalid.mlir
    A mlir/test/IR/diagnostic-handler-metadata.mlir
    M mlir/test/Target/LLVMIR/llvmir-types.mlir
    M mlir/test/Transforms/canonicalize-block-merge.mlir
    M mlir/test/Transforms/canonicalize-dce.mlir
    M mlir/test/Transforms/make-isolated-from-above.mlir
    R mlir/test/Transforms/test-canonicalize-merge-large-blocks.mlir
    M mlir/test/lib/IR/CMakeLists.txt
    A mlir/test/lib/IR/TestDiagnosticsMetadata.cpp
    M mlir/tools/mlir-opt/mlir-opt.cpp

  Log Message:
  -----------
  rebase

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