[all-commits] [llvm/llvm-project] 3db78f: [NVPTX] Add Volta Load/Store Atomics (.relaxed, .a...

[gonzalobg via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3db78fa1dd639ba5db761023e04f97418cfcd00e
      https://github.com/llvm/llvm-project/commit/3db78fa1dd639ba5db761023e04f97418cfcd00e
  Author: gonzalobg <65027571+gonzalobg at users.noreply.github.com>
  Date:   2024-07-24 (Wed, 24 Jul 2024)

  Changed paths:
    M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
    M llvm/lib/Target/NVPTX/NVPTX.h
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
    A llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
    M llvm/test/CodeGen/NVPTX/load-store.ll

  Log Message:
  -----------
  [NVPTX] Add Volta Load/Store Atomics (.relaxed, .acquire, .release) and Volatile (.mmio/.volatile) support  (#99709)

Followup to https://github.com/llvm/llvm-project/pull/98022 which broke
support for LLVM `unordered` atomic ordering.

This PR lowers `atomic unordered` to PTX volatile operations to preserve
atomicity, and adds a bunch of tests for this ordering to the NVPTX
backend (we had none).



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