[all-commits] [llvm/llvm-project] 0c274d: [RISCV][TTI] Add coverage of odd sized vector load...

Philip Reames via All-commits all-commits at lists.llvm.org
Wed Jul 24 09:39:34 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0c274d527ae36db420c4273f83fcb6c859b28f1b
      https://github.com/llvm/llvm-project/commit/0c274d527ae36db420c4273f83fcb6c859b28f1b
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-07-24 (Wed, 24 Jul 2024)

  Changed paths:
    M llvm/test/Analysis/CostModel/RISCV/rvv-load-store.ll

  Log Message:
  -----------
  [RISCV][TTI] Add coverage of odd sized vector loads and stores



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