[all-commits] [llvm/llvm-project] 63ae1e: [RISCV] Emit VP strided loads/stores in RISCVGathe...

Luke Lau via All-commits all-commits at lists.llvm.org
Tue Jul 23 22:56:43 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 63ae1e955007287ecf048d706ce3e025d20f52b8
      https://github.com/llvm/llvm-project/commit/63ae1e955007287ecf048d706ce3e025d20f52b8
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-07-24 (Wed, 24 Jul 2024)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    R llvm/test/CodeGen/RISCV/pr89833.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store.ll
    R llvm/test/CodeGen/RISCV/rvv/strided-load-store-intrinsics.ll
    M llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll

  Log Message:
  -----------
  [RISCV] Emit VP strided loads/stores in RISCVGatherScatterLowering (#98111)

RISCVGatherScatterLowering is the last user of
riscv_masked_strided_{load,store} after #98131 and #98112, this patch
changes it to emit the VP equivalent instead. This allows us to remove
the masked_strided intrinsics so we have only have one lowering path.

riscv_masked_strided_{load,store} didn't have AVL operands and were
always VLMAX, so this passes in the fixed or scalable element count to
the EVL instead, which RISCVVectorPeephole should now convert to VLMAX
after #97800.
For loads we also use a vp_select to get passthru (mask undisturbed)
behaviour



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