[all-commits] [llvm/llvm-project] 464ea8: [LoongArch][CodeGen] Implement 128-bit and 256-bit...

[Zhaoxin Yang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 464ea880cf7710cc8675c83001d7ae020406cf42
      https://github.com/llvm/llvm-project/commit/464ea880cf7710cc8675c83001d7ae020406cf42
  Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
  Date:   2024-07-23 (Tue, 23 Jul 2024)

  Changed paths:
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
    M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
    M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvilv.ll
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvpack.ll
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvpick.ll
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvrepl128vei.ll
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf.ll
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vilv.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vpack.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vpick.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vreplvei.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf4i.ll

  Log Message:
  -----------
  [LoongArch][CodeGen] Implement 128-bit and 256-bit vector shuffle. (#100054)

[LoongArch][CodeGen] Implement 128-bit and 256-bit vector shuffle
operations.

In LoongArch, shuffle operations can be divided into two types:
- Single-vector shuffle: Shuffle using only one vector, with the other
vector being `undef` or not selected by mask. This can be expanded to
instructions such as `vreplvei` and `vshuf4i`.
- Two-vector shuffle: Shuflle using two vectors. This can be expanded to
instructions like `vilv[l/h]`, `vpack[ev/od]`, `vpick[ev/od]` and the
basic `vshuf`.

In the future, more optimizations may be added, such as handling 1-bit
vectors and processing single element patterns, etc.



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