[all-commits] [llvm/llvm-project] 62aa59: [AMDGPU] Add no return image_sample intrinsics and...

[Carl Ritson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 62aa596ba19af26f73c292c00d9c7f50df71d836
      https://github.com/llvm/llvm-project/commit/62aa596ba19af26f73c292c00d9c7f50df71d836
  Author: Carl Ritson <carl.ritson at amd.com>
  Date:   2024-07-20 (Sat, 20 Jul 2024)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/MIMGInstructions.td
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.noret.ll

  Log Message:
  -----------
  [AMDGPU] Add no return image_sample intrinsics and instructions (#97542)

An appropriately configured image resource descriptor can trigger
image_sample instructions to store outputs directly to a linked memory
location instead of returning to VGPRs.

This is opaque to the backend as instruction encoding is unchanged;
however, a mechanism is require to allow frontends to communicate that
these instructions do not require destination VGPRs and store to memory.
Flagging these as stores means they will not be optimized away.



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