[all-commits] [llvm/llvm-project] e2f463: [aarch64] Add hyperbolic and arc trig intrinsic lo...

[Farzon Lotfi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e2f463b5b64a3574e90be7375b2d2c87fa7e92c1
      https://github.com/llvm/llvm-project/commit/e2f463b5b64a3574e90be7375b2d2c87fa7e92c1
  Author: Farzon Lotfi <1802579+farzonl at users.noreply.github.com>
  Date:   2024-07-19 (Fri, 19 Jul 2024)

  Changed paths:
    M llvm/include/llvm/Analysis/VecFuncs.def
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
    A llvm/test/CodeGen/AArch64/GlobalISel/legalize-acos.mir
    A llvm/test/CodeGen/AArch64/GlobalISel/legalize-asin.mir
    A llvm/test/CodeGen/AArch64/GlobalISel/legalize-atan.mir
    A llvm/test/CodeGen/AArch64/GlobalISel/legalize-cosh.mir
    A llvm/test/CodeGen/AArch64/GlobalISel/legalize-sinh.mir
    A llvm/test/CodeGen/AArch64/GlobalISel/legalize-tanh.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
    M llvm/test/CodeGen/AArch64/f16-instructions.ll
    M llvm/test/CodeGen/AArch64/fp-intrinsics-fp16.ll
    M llvm/test/CodeGen/AArch64/fp-intrinsics.ll
    M llvm/test/CodeGen/AArch64/illegal-float-ops.ll
    M llvm/test/CodeGen/AArch64/replace-with-veclib-armpl.ll
    M llvm/test/CodeGen/AArch64/replace-with-veclib-sleef-scalable.ll
    M llvm/test/CodeGen/AArch64/replace-with-veclib-sleef.ll
    M llvm/test/CodeGen/AArch64/vec-libcalls.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll

  Log Message:
  -----------
  [aarch64] Add hyperbolic and arc trig intrinsic lowering (#98937)

## The change(s)
- `VecFuncs.def`: define intrinsic to  sleef/armpl mapping
- `LegalizerHelper.cpp`: add missing `fewerElementsVector` handling for
the new trig intrinsics
- `AArch64ISelLowering.cpp`: Add arch64 specializations for lowering
like neon instructions
- `AArch64LegalizerInfo.cpp`: Legalize the new trig intrinsics. aarch64
has specail legalization requirments in `AArch64LegalizerInfo.cpp`. If
we redirect the clang builtin without handling this we will break the
aarch64 compiler

## History
This change is part of an implementation of
https://github.com/llvm/llvm-project/issues/87367's investigation on
supporting IEEE math operations as intrinsics.
Which was discussed in this RFC:
https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294

This change adds wasm lowering cases for `acos`, `asin`, `atan`, `cosh`,
`sinh`, and `tanh`.

https://github.com/llvm/llvm-project/issues/70079
https://github.com/llvm/llvm-project/issues/70080
https://github.com/llvm/llvm-project/issues/70081
https://github.com/llvm/llvm-project/issues/70083
https://github.com/llvm/llvm-project/issues/70084
https://github.com/llvm/llvm-project/issues/95966

## Why is aarch64 needed
The last step is to redirect the `acos`, `asin`, `atan`, `cosh`, `sinh`,
and `tanh` to emit the intrinsic. We can't emit the intrinsic without
the intrinsics becoming legal for aarch64 in `AArch64LegalizerInfo.cpp`



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