[all-commits] [llvm/llvm-project] d28ed2: [TTI][WebAssembly] Pairwise reduction expansion (#...

[Sam Parker via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d28ed29d6bd9f0389092775406fff7e6205d4d5f
      https://github.com/llvm/llvm-project/commit/d28ed29d6bd9f0389092775406fff7e6205d4d5f
  Author: Sam Parker <sam.parker at arm.com>
  Date:   2024-07-17 (Wed, 17 Jul 2024)

  Changed paths:
    M llvm/include/llvm/Analysis/TargetTransformInfo.h
    M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
    M llvm/include/llvm/Transforms/Utils/LoopUtils.h
    M llvm/lib/Analysis/TargetTransformInfo.cpp
    M llvm/lib/CodeGen/ExpandReductions.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
    M llvm/lib/Transforms/Utils/LoopUtils.cpp
    A llvm/test/CodeGen/WebAssembly/vector-reduce.ll

  Log Message:
  -----------
  [TTI][WebAssembly] Pairwise reduction expansion (#93948)

WebAssembly doesn't support horizontal operations nor does it have a way
of expressing fast-math or reassoc flags, so runtimes are currently
unable to use pairwise operations when generating code from the existing
shuffle patterns.

This patch allows the backend to select which, arbitary, shuffle pattern
to be used per reduction intrinsic. The default behaviour is the same as
the existing, which is by splitting the vector into a top and bottom
half. The other pattern introduced is for a pairwise shuffle.

WebAssembly enables pairwise reductions for int/fp add/sub.



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