[all-commits] [llvm/llvm-project] 7c15fb: [Linker] Use a range-based for loop (NFC) (#98785)
Fangrui Song via All-commits
all-commits at lists.llvm.org
Tue Jul 16 09:30:10 PDT 2024
Branch: refs/heads/users/MaskRay/spr/elf-output_format-support-binary-and-ignore-extra-output_format-commands
Home: https://github.com/llvm/llvm-project
Commit: 7c15fbae31ab065a370a4f90a5f5b0d51cb11cf8
https://github.com/llvm/llvm-project/commit/7c15fbae31ab065a370a4f90a5f5b0d51cb11cf8
Author: Kazu Hirata <kazu at google.com>
Date: 2024-07-14 (Sun, 14 Jul 2024)
Changed paths:
M llvm/lib/Linker/IRMover.cpp
Log Message:
-----------
[Linker] Use a range-based for loop (NFC) (#98785)
Commit: 73acf8d755e04996f17b7694b4794459e492dede
https://github.com/llvm/llvm-project/commit/73acf8d755e04996f17b7694b4794459e492dede
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-14 (Sun, 14 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/test/Driver/riscv-features.c
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/test/TableGen/riscv-target-def.td
M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
Log Message:
-----------
[RISCV] Add -m[no-]scalar-strict-align and -m[no-]vector-strict-align. (#95024)
Commit: ca4ebae38c09b48c78789b77e7a98ec149957716
https://github.com/llvm/llvm-project/commit/ca4ebae38c09b48c78789b77e7a98ec149957716
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2024-07-14 (Sun, 14 Jul 2024)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
Log Message:
-----------
[clang][NFC] Fix a warning (#98611)
enumerated and non-enumerated type in conditional expression
Commit: 2f55e551011d4ff2227be35bf8b64516d8dcb700
https://github.com/llvm/llvm-project/commit/2f55e551011d4ff2227be35bf8b64516d8dcb700
Author: Kazu Hirata <kazu at google.com>
Date: 2024-07-14 (Sun, 14 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
Log Message:
-----------
[Transforms] Use range-based for loops (NFC) (#98725)
Commit: 6ffa995517a9b4c15aba0eb511cba309e21808cf
https://github.com/llvm/llvm-project/commit/6ffa995517a9b4c15aba0eb511cba309e21808cf
Author: Petr Hosek <phosek at google.com>
Date: 2024-07-14 (Sun, 14 Jul 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[Fuchsia][CMake] Use MinSizeRel for baremetal runtimes (#98835)
Size matters more than performance for these targets.
Commit: 0fc4e3052454391b7e54a05c1918527cf36c74cc
https://github.com/llvm/llvm-project/commit/0fc4e3052454391b7e54a05c1918527cf36c74cc
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-07-14 (Sun, 14 Jul 2024)
Changed paths:
M llvm/lib/Support/Unix/Path.inc
Log Message:
-----------
[Support] Don't use StringRef::equals in Path.inc (#98839)
The removal of StringRef::equals in
3fa409f2318ef790cc44836afe9a72830715ad84 broke the
[Solaris/sparcv9](https://lab.llvm.org/buildbot/#/builders/13/builds/724)
and
[Solaris/amd64](https://lab.llvm.org/staging/#/builders/94/builds/5176)
buildbots:
```
In file included from /vol/llvm/src/llvm-project/git/llvm/lib/Support/Path.cpp:1200:
/vol/llvm/src/llvm-project/git/llvm/lib/Support/Unix/Path.inc:519:18: error: no member named 'equals' in 'llvm::StringRef'
519 | return !fstype.equals("nfs");
| ~~~~~~ ^
```
Fixed by switching to `operator!=` instead.
Tested on sparcv9-sun-solaris2.11 and amd64-pc-solaris2.11.
Commit: 6441df3b5930ff9f8b3b9af6fd5d2684cf9a337b
https://github.com/llvm/llvm-project/commit/6441df3b5930ff9f8b3b9af6fd5d2684cf9a337b
Author: realqhc <caiqihan021 at hotmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsRISCVXCV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
A llvm/test/CodeGen/RISCV/xcvmac.ll
Log Message:
-----------
[RISCV] Implement Intrinsics for XCVmac Extension in CV32E40P (#83112)
Implement XCVmac intrinsics for CV32E40P according to the specification.
This commit is part of a patch-set to upstream the vendor specific
extensions of CV32E40P that need LLVM intrinsics to implement Clang
builtins.
Contributors: @CharKeaney, @ChunyuLiao, @jeremybennett, @lewis-revill,
@NandniJamnadas, @PaoloS02, @serkm, @simonpcook, @xingmingjie.
Commit: d83d09facdc37bd1bd8c697e16d889ff8a4f369b
https://github.com/llvm/llvm-project/commit/d83d09facdc37bd1bd8c697e16d889ff8a4f369b
Author: Shan Huang <52285902006 at stu.ecnu.edu.cn>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
A llvm/test/Transforms/LoopStrengthReduce/X86/preserving-debugloc-phi-binop.ll
Log Message:
-----------
[DebugInfo][LoopStrengthReduce] Fix missing debug location updates (#97519)
Fix #97510 .
Note that, for the new phi instruction `NewPH`, which replaces the old
phi `PH` and the cast `ShadowUse`, I choose to propagate the debug
location of `PH` to it, because the cast is eliminated according to the
optimization semantics.
Commit: 33bdb87adc16e2890beeeb64a980317e7c4292d7
https://github.com/llvm/llvm-project/commit/33bdb87adc16e2890beeeb64a980317e7c4292d7
Author: Shan Huang <52285902006 at stu.ecnu.edu.cn>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
A llvm/test/Transforms/SimpleLoopUnswitch/preserving-dropping-debugloc-nontrivial.ll
Log Message:
-----------
[DebugInfo][SimpleLoopUnswitch] Fix missing debug location updates (#97662)
Fix #97559 .
For the change at line 1253, I propagate the debug location of the
terminator (i.e., the insertion point) to the new phi. because `MergeBB`
is generated by splitting `ExitBB` several lines above, it only has the
terminator, which could provide a reasonable debug location.
For the change at line 2348, I switch the order of moving and cloning
`TI`. Because `NewTI` cloned from `TI` is inserted into the original
place where `TI` is, `NewTI` should preserve the origianl debug
location. At the same time, doing this allows us to propagate the debug
location to the new branch instruction replacing `NewTI` (the change at
line 2446).
Commit: adaff46d087799072438dd744b038e6fd50a2d78
https://github.com/llvm/llvm-project/commit/adaff46d087799072438dd744b038e6fd50a2d78
Author: dyung <douglas.yung at sony.com>
Date: 2024-07-14 (Sun, 14 Jul 2024)
Changed paths:
M clang/test/CodeGenHIP/default-attributes.hip
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel-system-sgprs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdpal-elf.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bfe-combine.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/call-reqd-group-size.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cc-update.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/codegen-internal-only-func.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine-reg-or-const.ll
M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg-scc-clobber.ll
M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-sext-inreg.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll
M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-large-stride.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/early-inline.ll
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/fma-combine.ll
M llvm/test/CodeGen/AMDGPU/fma.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp32.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp64.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll
M llvm/test/CodeGen/AMDGPU/gds-allocation.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-constant.ll
M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/global_smrd.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-heap-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v4.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-multigrid-sync-arg-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queueptr-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-resource-usage-function-ordering.ll
M llvm/test/CodeGen/AMDGPU/hsa.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-attributes.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/inline-attr.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-packed.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/ipra.ll
M llvm/test/CodeGen/AMDGPU/kernarg-size.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
M llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/large-alloca-compute.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.cond.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.kernel.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.queue.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.fpmode.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.read.local.size.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/local-64.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/max-hard-clause-length.ll
M llvm/test/CodeGen/AMDGPU/max.i16.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memcpy-scalar-load.ll
M llvm/test/CodeGen/AMDGPU/memmove-scalar-load.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/mfma-bf16-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select-gfx940.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/CodeGen/AMDGPU/mubuf-offset-private.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/optimize-compare.ll
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/packed-op-sel.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/partial-shift-shrink.ll
M llvm/test/CodeGen/AMDGPU/permlane-op-sel.ll
M llvm/test/CodeGen/AMDGPU/permlane16_opsel.ll
M llvm/test/CodeGen/AMDGPU/permute.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/post-ra-soft-clause-dbg-info.ll
M llvm/test/CodeGen/AMDGPU/preload-kernarg-header.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/ptr-buffer-alias-scheduling.ll
M llvm/test/CodeGen/AMDGPU/rcp-pattern.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-extended-image-insts.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-functions.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-gws.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-s-time.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/rsq.f32.ll
M llvm/test/CodeGen/AMDGPU/s_addk_i32.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.v8i16.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/setcc.ll
M llvm/test/CodeGen/AMDGPU/sext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-local-cse.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-multiple-unreachables.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/sign_extend.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/sopk-compares.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-offset-calculation.ll
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/spill-sgpr-stack-no-sgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/spill-writelane-vgprs.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/stack-realign-kernel.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-on.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/trap.ll
M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
M llvm/test/CodeGen/AMDGPU/trunc-store.ll
M llvm/test/CodeGen/AMDGPU/trunc.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-select.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_cmp_gfx11.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/v_sub_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/vector-extract-insert.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/waterfall_kills_scc.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
M llvm/test/CodeGen/AMDGPU/zext-divergence-driven-isel.ll
M llvm/test/CodeGen/MIR/AMDGPU/long-branch-reg-all-sgpr-used.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
Log Message:
-----------
Revert "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
This reverts commits 677cc15e0ff2e0e6aa30538eb187990a6a8f53c0 and
78bc1b64a6dc3fb6191355a5e1b502be8b3668e7.
The test CodeGenHIP/default-attributes.hip is failing on multiple bots
even after the attempted fix including the following:
- https://lab.llvm.org/buildbot/#/builders/3/builds/1473
- https://lab.llvm.org/buildbot/#/builders/65/builds/1380
- https://lab.llvm.org/buildbot/#/builders/161/builds/595
- https://lab.llvm.org/buildbot/#/builders/154/builds/1372
- https://lab.llvm.org/buildbot/#/builders/133/builds/1547
- https://lab.llvm.org/buildbot/#/builders/81/builds/755
- https://lab.llvm.org/buildbot/#/builders/40/builds/570
- https://lab.llvm.org/buildbot/#/builders/13/builds/748
- https://lab.llvm.org/buildbot/#/builders/12/builds/1845
- https://lab.llvm.org/buildbot/#/builders/11/builds/1695
- https://lab.llvm.org/buildbot/#/builders/190/builds/1829
- https://lab.llvm.org/buildbot/#/builders/193/builds/962
- https://lab.llvm.org/buildbot/#/builders/23/builds/991
- https://lab.llvm.org/buildbot/#/builders/144/builds/2256
- https://lab.llvm.org/buildbot/#/builders/46/builds/1614
These bots have been broken for a day, so reverting to get everything
back to green.
Commit: 4ca024c877e3eb20c0af518d3335883fb7b4b910
https://github.com/llvm/llvm-project/commit/4ca024c877e3eb20c0af518d3335883fb7b4b910
Author: Oleksandr T <oleksandr.tarasiuk at outlook.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/CXX/class/class.compare/class.compare.default/p1.cpp
Log Message:
-----------
[Clang] Fix cast failures by adjusting the resolution of record declaration contexts to handle semantic and lexical distinctions (#96228)
Fixes #96043
Commit: 5c8eb83ce8e4ef40fbd61a05f1de6394eb908da4
https://github.com/llvm/llvm-project/commit/5c8eb83ce8e4ef40fbd61a05f1de6394eb908da4
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
Log Message:
-----------
[AMDGPU] Generate test fix-wwm-vgpr-copy.ll (NFC)
Commit: 8da3852f44c64ac4535128741695b9e9d8ee27ef
https://github.com/llvm/llvm-project/commit/8da3852f44c64ac4535128741695b9e9d8ee27ef
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
Log Message:
-----------
Revert "[AMDGPU] Generate test fix-wwm-vgpr-copy.ll (NFC)"
This reverts commit 5c8eb83ce8e4ef40fbd61a05f1de6394eb908da4.
Commit: e025e5ef44b736b48b8a2ee230a11f674b734b32
https://github.com/llvm/llvm-project/commit/e025e5ef44b736b48b8a2ee230a11f674b734b32
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
Log Message:
-----------
[AMDGPU] Reland generated test fix-wwm-vgpr-copy.ll (NFC)
Fix issues left over after generation.
Commit: c09ed6a29e392e406623f7c4dc0a8240d2cbc9f2
https://github.com/llvm/llvm-project/commit/c09ed6a29e392e406623f7c4dc0a8240d2cbc9f2
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
A llvm/include/llvm/CodeGen/MachineVerifier.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/test/CodeGen/AMDGPU/verifier-sdwa-cvt.mir
M llvm/test/CodeGen/AMDGPU/verify-constant-bus-violations.mir
M llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
M llvm/test/CodeGen/AMDGPU/verify-duplicate-literal.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
M llvm/test/CodeGen/AMDGPU/verify-image-vaddr-align.mir
M llvm/test/CodeGen/AMDGPU/verify-image.mir
M llvm/test/CodeGen/AMDGPU/verify-scalar-store.mir
M llvm/test/CodeGen/AMDGPU/verify-sop.mir
M llvm/test/CodeGen/AMDGPU/verify-vimage-vsample.mir
M llvm/test/CodeGen/AMDGPU/verify-vopd-gfx12.mir
M llvm/test/CodeGen/AMDGPU/verify-vopd.mir
M llvm/test/CodeGen/MIR/Generic/dbg-value-missing-loc.mir
M llvm/test/CodeGen/MIR/X86/dbg-value-list.mir
M llvm/test/CodeGen/RISCV/verify-instr.mir
M llvm/tools/llc/NewPMDriver.cpp
Log Message:
-----------
[CodeGen][NewPM] Port `MachineVerifier` to new pass manager (#98628)
- Add `MachineVerifierPass`.
- Use complete `MachineVerifierPass` in `VerifyInstrumentation` if
possible.
`LiveStacksAnalysis` will be added in future, all other analyses are
done.
Commit: 36984536be147ce4f53d7b05a77c8ccc79227271
https://github.com/llvm/llvm-project/commit/36984536be147ce4f53d7b05a77c8ccc79227271
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
Log Message:
-----------
[AMDGPU] SIWholeQuadMode: remove unnecessary map access (NFCI)
Commit: 662c6fc74c1ae7fdefd27524dfaeb7f3e9a1f553
https://github.com/llvm/llvm-project/commit/662c6fc74c1ae7fdefd27524dfaeb7f3e9a1f553
Author: donald chen <chenxunyu1993 at gmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
M mlir/lib/Conversion/BufferizationToMemRef/BufferizationToMemRef.cpp
M mlir/lib/Dialect/Bufferization/Transforms/LowerDeallocations.cpp
M mlir/test/Dialect/Bufferization/Transforms/lower-deallocations.mlir
Log Message:
-----------
[mlir] [bufferize] fix bufferize deallocation error in nest symbol table (#98476)
In nested symbols, the dealloc_helper function generated by lower
deallocations pass was incorrectly positioned, causing calls fail. This
patch fixes this issue.
Commit: 34bfed63313d1340378fc1be931253333db8c36c
https://github.com/llvm/llvm-project/commit/34bfed63313d1340378fc1be931253333db8c36c
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/EarlyCSE/math-2.ll
Log Message:
-----------
[ConstantFold] Fix result type when folding powi.f16 (#98681)
Fixes #98665.
Commit: 557ef043afd04da91e79425133f14c94831a646c
https://github.com/llvm/llvm-project/commit/557ef043afd04da91e79425133f14c94831a646c
Author: Luke Lau <luke at igalia.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
M llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-drop-solution.ll
Log Message:
-----------
[RISCV] Copy AVLs whose LiveIntervals aren't extendable in insertVSETVLI (#98342)
Currently before forwarding an AVL we do a simple non-exhaustive check
to see if its LiveInterval is extendable. But we also need to check for
this when we're extending an AVL's LiveInterval via merging the
VSETVLIInfos in transferBefore with equally zero AVLs.
Rather than trying to conservatively prevent these cases, this inserts a
copy of the AVL instead if we don't know we'll be able to extend it.
This is likely to be more robust, and even if the extra copy is
undesirable these cases should be rare in practice.
Commit: 37211d17f9f237e8a820ed81c1b5e92c22b45d5e
https://github.com/llvm/llvm-project/commit/37211d17f9f237e8a820ed81c1b5e92c22b45d5e
Author: PeterChou1 <peter.chou at mail.utoronto.ca>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang-tools-extra/test/clang-doc/basic-project.test
Log Message:
-----------
[clang-doc] Support markdown and simplify checks (#97684)
This patch modifies the basic-project in clang-doc. Currently we're
matching the entire html output. This patch modifies it so that we only
match the parts relevant to the documentation logic instead just
matching the boilerplate code. This patch also adds the markdown output
to the basic-project test
Commit: 587308c3436b3fb757d3ba4343ccd4bd0c90f429
https://github.com/llvm/llvm-project/commit/587308c3436b3fb757d3ba4343ccd4bd0c90f429
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/AArch64/dummy-return.s
Log Message:
-----------
[BOLT][AArch64] Provide createDummyReturnFunction (#96626)
AArch64 needs this function when instrumenting statically-linked binaries.
Sample commands:
```bash
clang -Wl,-q test.c -static -o out
llvm-bolt -instrument -instrumentation-sleep-time=5 out -o out.instr
```
Commit: a5a29a26aaf0d7e63101471250d32e9b7230fe73
https://github.com/llvm/llvm-project/commit/a5a29a26aaf0d7e63101471250d32e9b7230fe73
Author: Michael Klemm <michael.klemm at amd.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M flang/docs/Intrinsics.md
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Intrinsics.h
M flang/include/flang/Runtime/misc-intrinsic.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
M flang/runtime/misc-intrinsic.cpp
A flang/test/Lower/Intrinsics/rename.f90
M flang/test/Lower/namelist.f90
Log Message:
-----------
[Flang] Implement RENAME intrinsic (code-gen + runtime entry point) (#98359)
This PR implements the RENAME intrinsic, which is a GFortran extension
(see
https://gcc.gnu.org/onlinedocs/gfortran/intrinsic-procedures/rename.html).
Commit: 18c70b070b6dd7cead8f049dde0542dc75ed28fd
https://github.com/llvm/llvm-project/commit/18c70b070b6dd7cead8f049dde0542dc75ed28fd
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/CMakeLists.txt
M clang/lib/Sema/SemaTemplate.cpp
A clang/lib/Sema/SemaTemplateDeductionGuide.cpp
Log Message:
-----------
[clang] Refactor: Move CTAD code from SemaTemplate.cpp to a dedicated file, NFC (#98524)
Split out the deduction guide related code from SemaTemplate.cpp to a
dedicated file.
These code has grown significantly, and moving it to a separate file
will improve code organization.
Commit: 5555a9e657939dafb569a825fecd1d0f4202b21d
https://github.com/llvm/llvm-project/commit/5555a9e657939dafb569a825fecd1d0f4202b21d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
Log Message:
-----------
[gn build] Port 18c70b070b6d
Commit: caa0e42ceb6e671d68b8b8e1d04f136696a4228b
https://github.com/llvm/llvm-project/commit/caa0e42ceb6e671d68b8b8e1d04f136696a4228b
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/EarlyCSE/math-2.ll
Log Message:
-----------
Fix assertion failure in PR98681 (#98860)
See https://en.cppreference.com/w/cpp/numeric/math/pow:
```
C++98 added overloads where exp has type int on top of C [pow()](https://en.cppreference.com/w/c/numeric/math/pow), and the return type of std::pow(float, int) was float. However, the additional overloads introduced in C++11 specify that std::pow(float, int) should return double. [LWG issue 550](https://cplusplus.github.io/LWG/issue550) was raised to target this conflict, and the resolution is to removed the extra int exp overloads.
```
Commit: 01191874f9011d3ce8b7c2830ece1f030c60da7f
https://github.com/llvm/llvm-project/commit/01191874f9011d3ce8b7c2830ece1f030c60da7f
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
A llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AArch64/statepoint-twoaddr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/twoaddr-extract-dyn-v7f64.mir
M llvm/test/CodeGen/AMDGPU/early-lis-two-address-partial-def.mir
M llvm/test/CodeGen/AMDGPU/gfx10-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-fma-f64.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-wmma.mir
M llvm/test/CodeGen/Hexagon/two-addr-tied-subregs.mir
M llvm/test/CodeGen/X86/distancemap.mir
M llvm/test/CodeGen/X86/statepoint-vreg-twoaddr.mir
M llvm/test/CodeGen/X86/twoaddr-mul2.mir
Log Message:
-----------
[CodeGen] Port `two-address-instructions` to new pass manager (#98632)
Add `TwoAddressInstructionPass`.
Commit: 0d7403184d3b20d16104a36cf78457ddce2af9ba
https://github.com/llvm/llvm-project/commit/0d7403184d3b20d16104a36cf78457ddce2af9ba
Author: David Green <david.green at arm.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64PBQPRegAlloc.cpp
Log Message:
-----------
[AArch64] Add a AArch64InstrInfo::isFpOrNEON method for checking physical register call. NFC
Commit: 34433fdceb63cb14b69f847a39f6ce98459f3129
https://github.com/llvm/llvm-project/commit/34433fdceb63cb14b69f847a39f6ce98459f3129
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M bolt/docs/CommandLineArgumentReference.md
M bolt/docs/Heatmaps.md
M bolt/include/bolt/Utils/CommandLineOpts.h
M bolt/lib/Profile/Heatmap.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
Log Message:
-----------
[BOLT] Add -print-mappings option to heatmaps (#97567)
Emit a mapping in the legend between the characters/buckets and the text
sections, using:
```sh
llvm-heatmap-bolt -print-mappings ..
```
Example:
```
Legend:
..
Sections:
a/A : .init 0x00000100-0x00000200
b/B : .plt 0x00000200-0x00000500
c/C : .text 0x00010000-0x000a0000
d/D : .fini 0x000a0000-0x000f0000
..
```
Commit: 297fab1b3075a9dcd65213176add34ad7d744bde
https://github.com/llvm/llvm-project/commit/297fab1b3075a9dcd65213176add34ad7d744bde
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/typepromotion-overflow.ll
Log Message:
-----------
[LoongArch] Copy typepromotion-overflow.ll from AArch64. NFC
Commit: 9d34b673c0abea4ee0a3dd4c399314411b02f1cc
https://github.com/llvm/llvm-project/commit/9d34b673c0abea4ee0a3dd4c399314411b02f1cc
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstSimplify/ptrtoint.ll
Log Message:
-----------
[InstSimplify] Fold ptrtoint(ptradd(P,X-ptrtoint(P))) to X (#98649)
This is a special case of the general ptrtoint(gep) to add(ptrtoint)
transform that is particularly profitable, as everything folds away.
Proof: https://alive2.llvm.org/ce/z/fwv8_L
Fixes https://github.com/llvm/llvm-project/issues/86417.
Commit: 9ac2b8965264a7f20a3e07c913b25c375a080c0f
https://github.com/llvm/llvm-project/commit/9ac2b8965264a7f20a3e07c913b25c375a080c0f
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.cpp
M clang/test/AST/Interp/literals.cpp
Log Message:
-----------
[clang][Interp] Diagnose volatile reads
Commit: 9ad72df55cb74b29193270c28f6974d2af8e0b71
https://github.com/llvm/llvm-project/commit/9ad72df55cb74b29193270c28f6974d2af8e0b71
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGRecordLayoutBuilder.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/CodeGenTypes.h
M clang/test/CodeGen/aarch64-byval-temp.c
M clang/test/CodeGen/attr-noundef.cpp
M clang/test/CodeGen/builtins-bitint.c
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/CodeGen/builtins-overflow.c
M clang/test/CodeGen/ext-int-cc.c
M clang/test/CodeGen/ext-int-sanitizer.cpp
M clang/test/CodeGen/ext-int.c
M clang/test/CodeGen/extend-arg-64.c
M clang/test/CodeGen/ubsan-shift-bitint.c
M clang/test/CodeGenCXX/ext-int.cpp
M clang/test/CodeGenHIP/printf_nonhostcall.cpp
M clang/test/CodeGenHLSL/builtins/dot-builtin.hlsl
M clang/test/Frontend/fixed_point_comparisons.c
M clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_codegen.cpp
Log Message:
-----------
[clang] Use different memory layout type for _BitInt(N) in LLVM IR (#91364)
There are two problems with _BitInt prior to this patch:
1. For at least some values of N, we cannot use LLVM's iN for the type
of struct elements, array elements, allocas, global variables, and so
on, because the LLVM layout for that type does not match the high-level
layout of _BitInt(N).
Example: Currently for i128:128 targets correct implementation is
possible either for __int128 or for _BitInt(129+) with lowering to iN,
but not both, since we have now correct implementation of __int128 in
place after a21abc7.
When this happens, opaque [M x i8] types used, where M =
sizeof(_BitInt(N)).
2. LLVM doesn't guarantee any particular extension behavior for integer
types that aren't a multiple of 8. For this reason, all _BitInt types
are now have in-memory representation that is a whole number of bytes.
I.e. for example _BitInt(17) now will have memory layout type i32.
This patch also introduces concept of load/store type and adds an API to
CodeGenTypes that returns the IR type that should be used for load and
store operations. This is particularly useful for the case when a
_BitInt ends up having array of bytes as memory layout type. For
_BitInt(N), let M = sizeof(_BitInt(N)), and let BITS = M * 8. Loads and
stores of iM would both (1) produce far better code from the backends
and (2) be far more optimizable by IR passes than loads and stores of [M
x i8].
Fixes https://github.com/llvm/llvm-project/issues/85139
Fixes https://github.com/llvm/llvm-project/issues/83419
---------
Co-authored-by: John McCall <rjmccall at gmail.com>
Commit: 71051deff27928cff908ea794e09806eee662801
https://github.com/llvm/llvm-project/commit/71051deff27928cff908ea794e09806eee662801
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/test/Transforms/MemCpyOpt/memcpy-zero-size.ll
M llvm/test/Transforms/MemCpyOpt/memset-memcpy-dbgloc.ll
M llvm/test/Transforms/MemCpyOpt/memset-memcpy-redundant-memset.ll
M llvm/test/Transforms/MemCpyOpt/opaque-ptr.ll
Log Message:
-----------
[MemCpyOpt] Fix infinite loop in memset+memcpy fold (#98638)
For the case where the memcpy size is zero, this transform is a complex
no-op. This can lead to an infinite loop when the size is zero in a way
that BasicAA understands, because it can still understand that dst and
dst + src_size are MustAlias.
I've tried to mitigate this before using the isZeroSize() check, but we
can hit cases where InstSimplify doesn't understand that the size is
zero, but BasicAA does.
As such, this bites the bullet and adds an explicit isKnownNonZero()
check to guard against no-op transforms.
Fixes https://github.com/llvm/llvm-project/issues/98610.
Commit: b1bcb7ca460fcd317bbc8309e14c8761bf8394e0
https://github.com/llvm/llvm-project/commit/b1bcb7ca460fcd317bbc8309e14c8761bf8394e0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/test/CodeGenHIP/default-attributes.hip
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel-system-sgprs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdpal-elf.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bfe-combine.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/call-reqd-group-size.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cc-update.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/codegen-internal-only-func.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine-reg-or-const.ll
M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg-scc-clobber.ll
M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-sext-inreg.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll
M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-large-stride.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/early-inline.ll
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/fma-combine.ll
M llvm/test/CodeGen/AMDGPU/fma.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp32.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp64.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll
M llvm/test/CodeGen/AMDGPU/gds-allocation.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-constant.ll
M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/global_smrd.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-heap-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v4.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-multigrid-sync-arg-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queueptr-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-resource-usage-function-ordering.ll
M llvm/test/CodeGen/AMDGPU/hsa.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-attributes.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/inline-attr.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-packed.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/ipra.ll
M llvm/test/CodeGen/AMDGPU/kernarg-size.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
M llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/large-alloca-compute.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.cond.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.kernel.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.queue.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.fpmode.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.read.local.size.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/local-64.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/max-hard-clause-length.ll
M llvm/test/CodeGen/AMDGPU/max.i16.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memcpy-scalar-load.ll
M llvm/test/CodeGen/AMDGPU/memmove-scalar-load.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/mfma-bf16-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select-gfx940.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/CodeGen/AMDGPU/mubuf-offset-private.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/optimize-compare.ll
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/packed-op-sel.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/partial-shift-shrink.ll
M llvm/test/CodeGen/AMDGPU/permlane-op-sel.ll
M llvm/test/CodeGen/AMDGPU/permlane16_opsel.ll
M llvm/test/CodeGen/AMDGPU/permute.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/post-ra-soft-clause-dbg-info.ll
M llvm/test/CodeGen/AMDGPU/preload-kernarg-header.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/ptr-buffer-alias-scheduling.ll
M llvm/test/CodeGen/AMDGPU/rcp-pattern.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-extended-image-insts.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-functions.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-gws.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-s-time.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/rsq.f32.ll
M llvm/test/CodeGen/AMDGPU/s_addk_i32.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.v8i16.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/setcc.ll
M llvm/test/CodeGen/AMDGPU/sext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-local-cse.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-multiple-unreachables.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/sign_extend.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/sopk-compares.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-offset-calculation.ll
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/spill-sgpr-stack-no-sgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/spill-writelane-vgprs.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/stack-realign-kernel.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-on.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/trap.ll
M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
M llvm/test/CodeGen/AMDGPU/trunc-store.ll
M llvm/test/CodeGen/AMDGPU/trunc.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-select.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_cmp_gfx11.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/v_sub_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/vector-extract-insert.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/waterfall_kills_scc.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
M llvm/test/CodeGen/AMDGPU/zext-divergence-driven-isel.ll
M llvm/test/CodeGen/MIR/AMDGPU/long-branch-reg-all-sgpr-used.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
Log Message:
-----------
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
This reverts commit adaff46d087799072438dd744b038e6fd50a2d78.
Drop the -O3 checks from default-attributes.hip. I don't know why they
are different on some bots but reverting this is far too disruptive.
Commit: b037d0f0e5f6c7ab528fe3ed9d855f0d770c6709
https://github.com/llvm/llvm-project/commit/b037d0f0e5f6c7ab528fe3ed9d855f0d770c6709
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
A bolt/docs/HeatmapHeader.png
M bolt/docs/Heatmaps.md
Log Message:
-----------
[BOLT][docs] Expand Heatmaps.md (#98162)
Improve documentation on heatmaps.
Add example for X axis labels.
Commit: 94279ae4ca2f6bca7eac4c5e7f572ec66b1c4e0f
https://github.com/llvm/llvm-project/commit/94279ae4ca2f6bca7eac4c5e7f572ec66b1c4e0f
Author: Yeting Kuo <46629943+yetingk at users.noreply.github.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
Log Message:
-----------
[RISCV] Recommit "Expand vp.stride.load to splat of a scalar load." (#98579)
This is a recommit of #98140. The old commit should be rebased on #98205
which changes the feature of hardware zero stride optimization.
It's a similar patch as a214c521f8763b36dd400b89017f74ad5ae4b6c7 for
vp.stride.load. Some targets prefer pattern (vmv.v.x (load)) instead of
vlse with zero stride.
Commit: de3e9d4138abeb92428bba5014af2f3d9ac21323
https://github.com/llvm/llvm-project/commit/de3e9d4138abeb92428bba5014af2f3d9ac21323
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/python/mlir/dialects/linalg/opdsl/lang/comprehension.py
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
Log Message:
-----------
[MLIR][Linalg] Fix named structured ops yaml file (#98865)
Added missing reciprocal to Python file and fixed ErfOp name in yaml
file. Now running the bash script yields the same output.
Commit: 9f4a25e2a7cd176bd4f946dc651bc18c7a2e8c92
https://github.com/llvm/llvm-project/commit/9f4a25e2a7cd176bd4f946dc651bc18c7a2e8c92
Author: Dominik Steenken <dost at de.ibm.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M lld/test/ELF/systemz-gotent-relax-und-dso.s
M lld/test/ELF/systemz-gotent-relax.s
M lld/test/ELF/systemz-init-padding.s
M lld/test/ELF/systemz-plt.s
M llvm/lib/Target/SystemZ/SystemZInstrFormats.td
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ13.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ15.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ16.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ196.td
M llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td
M llvm/test/MC/Disassembler/SystemZ/insns.txt
M llvm/test/MC/SystemZ/insn-good-z15.s
M llvm/test/MC/SystemZ/insn-good-z196.s
M llvm/test/MC/SystemZ/insn-good-zEC12.s
M llvm/test/MC/SystemZ/insn-good.s
Log Message:
-----------
Add extended mnemonics (#97571)
This PR adds a number of thus-far missing extended mnemonics to the
assembler and disassembler for SystemZ.
The following mnemonics have been added and are supported for the
assembler and disassembler:
- `NOP(R)?`
- `LFI`
- `RISBG(N)?Z`
The following mnemonics have been added and are supported for the
assembler only:
- `JC(TH)?`
- `LLG(F|H)I`
- `NOT(G)?R`
Commit: 8fcb822da632ab4330b47641826ace01af0768e0
https://github.com/llvm/llvm-project/commit/8fcb822da632ab4330b47641826ace01af0768e0
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/X86/pointer-runtime-checks-unprofitable.ll
Log Message:
-----------
[LV] Add uses of result to pointer-runtime-checks-unprofitable.ll test.
Otherwise %p.2 is not used and will be removed by VPlan transforms,
leading to a difference between legacy and VPlan-based cost.
Commit: e8e406041e93e50d6f8259d2793dfbd08dd43b4a
https://github.com/llvm/llvm-project/commit/e8e406041e93e50d6f8259d2793dfbd08dd43b4a
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
A llvm/test/CodeGen/SystemZ/vec-cmp-08.ll
Log Message:
-----------
Fix sext_in_reg from i1 to i128
The combineSIGN_EXTEND_INREG routine was using
DAG.getConstant(-1, DL, VT), which does not result in
the expected value when VT has more than 64 bits.
Fix this by using DAG.getAllOnesConstant(DL, VT) instead.
Also add test cases for v1i128 comparisons (which triggers
the bug).
Commit: e027017337cc8ae6ed03dc2a3d1c9903ea2f33b2
https://github.com/llvm/llvm-project/commit/e027017337cc8ae6ed03dc2a3d1c9903ea2f33b2
Author: goldsteinn <35538541+goldsteinn at users.noreply.github.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/unittests/IR/PatternMatch.cpp
Log Message:
-----------
[PatternMatch] Fix issue of stale reference in new `m_{I,F,}Cmp` matchers (#98866)
The new matchers don't output pred. Previously we where just creating
a value on the stack and using it as a dummy output for the matchers,
but this results in a stale reference upon return.
To fix, this patch changes the output variable to a pointer, and
passes in `nullptr` for the matchers that don't output `pred.`
Commit: 9cc599b7ebd0d0dec31f2b384b61f679abbf2ce5
https://github.com/llvm/llvm-project/commit/9cc599b7ebd0d0dec31f2b384b61f679abbf2ce5
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M mlir/test/Dialect/Vector/vector-transfer-collapse-inner-most-dims.mlir
Log Message:
-----------
[mlir][vector] Update tests for collapse 5/n (nfc) (#96227)
The main goal of this PR (and subsequent PRs), is to add more tests with
scalable vectors to:
* vector-transfer-collapse-inner-most-dims.mlir
There's quite a few cases to consider, hence this is split into multiple
PRs. In this PR, I am simply adding more tests for
`vector.transfer_write` so that for every test for `xfer_read`, there's
a corresponding test for `xfer_write`.
This is a follow-up for: #94490, #94604, #94906, #96214
Commit: eb656ea6d7d2284fc7a8f5f9ef46fc19a18f7f3f
https://github.com/llvm/llvm-project/commit/eb656ea6d7d2284fc7a8f5f9ef46fc19a18f7f3f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
Log Message:
-----------
[VectorCombine] Add vectorcombine specific test coverage for #98334
Don't rely on phaseordering tests alone
Commit: 054d7b1283a5ebdf724f3ebc38b47e419f8f7a7f
https://github.com/llvm/llvm-project/commit/054d7b1283a5ebdf724f3ebc38b47e419f8f7a7f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
A llvm/test/CodeGen/X86/huge-stack.ll
Log Message:
-----------
[X86] Add huge-stack.ll test coverage from #84114
Ensure we have -verify-machineinstrs to avoid EXPENSIVE_CHECKS fails
Commit: c2580afed7e55f13762d56400dc346f222ea5884
https://github.com/llvm/llvm-project/commit/c2580afed7e55f13762d56400dc346f222ea5884
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Convert shift+clamp -> avx2 shift folds to use SDPatternMatch::m_SetCC. NFC.
Commit: 967eba07549d64f15e7a91e798aa46214704f62b
https://github.com/llvm/llvm-project/commit/967eba07549d64f15e7a91e798aa46214704f62b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
A llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
Log Message:
-----------
[LV] Add test cases for tail-folding sdiv/udiv/urem feeding geps.
Based on reduced tests from
https://github.com/llvm/llvm-project/issues/94328.
Commit: 03d8f9588f143972c0d6af16a8dd8b6a2bfbf1f8
https://github.com/llvm/llvm-project/commit/03d8f9588f143972c0d6af16a8dd8b6a2bfbf1f8
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
Log Message:
-----------
[MLIR][OpenMP] NFC: Address tablegen warnings (#98485)
After the addition of the `-verify-openmp-ops` tablegen pseudo-backend
to report suspected issues with the definition of an operation, some
warnings were triggered in the current implementation of OpenMPOps.td.
These are related to known limitations for which TODO messages exist
within these operation's definitions. This patch explicitly inhibits the
inheritance of the `assemblyFormat` property of all clauses added to the
`omp.parallel` and `omp.wsloop` operations to avoid these warnings. This
should help identifying actual issues that may arise later as the
dialect continues to be developed.
Commit: 0d5db4e7ba59bd9cbd956beff8d672a239c9ea12
https://github.com/llvm/llvm-project/commit/0d5db4e7ba59bd9cbd956beff8d672a239c9ea12
Author: chuongg3 <chuong.goh at arm.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-concat-vectors.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
Log Message:
-----------
[AArch64][GlobalISel] Bitcast and Build Illegal G_CONCAT_VECTOR Instructions (#96492)
Attempts to handle illegal G_CONCAT_VECTOR instructions by bitcasting the source
into scalar values and using G_BUILD_VECTOR instead
Treating the G_CONCAT_VECTORS instruction in the legalization artefact by folding
away concat(bitcast, ...) into buildvector(...) would require check for ImpDef created
by the shuffles in llvm.
Commit: 2b5595b06c0b7fff4a8dd768612b9a52727c38ab
https://github.com/llvm/llvm-project/commit/2b5595b06c0b7fff4a8dd768612b9a52727c38ab
Author: Kazu Hirata <kazu at google.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/include/llvm/IR/Instruction.h
Log Message:
-----------
[IR] Remove variants of dropUnknownNonDebugMetadata (#98854)
This patch removes:
- dropUnknownNonDebugMetadata()
- dropUnknownNonDebugMetadata(ID1)
- dropUnknownNonDebugMetadata(ID1, ID2)
The first variant has existing uses, but we can accommodate those by
adding a default parameter to the main variant.
The second and third variant do not have any existing use AFAICT.
Commit: 6484655f9dd07c6d5669dd540feef3c80af84827
https://github.com/llvm/llvm-project/commit/6484655f9dd07c6d5669dd540feef3c80af84827
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.cpp
M clang/test/AST/Interp/literals.cpp
Log Message:
-----------
[clang][Interp] Allow initialization of extern variables via ctors
Commit: 59e56eeb1d9c0d25a522ae09f501a350981a31de
https://github.com/llvm/llvm-project/commit/59e56eeb1d9c0d25a522ae09f501a350981a31de
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/Stmt.h
M clang/include/clang/AST/UnresolvedSet.h
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/DeclSpec.h
M clang/include/clang/Sema/Lookup.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmtAsm.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/test/CXX/basic/basic.lookup/basic.lookup.classref/p1-cxx11.cpp
M clang/test/CXX/basic/basic.lookup/basic.lookup.classref/p1.cpp
R clang/test/CXX/basic/basic.lookup/basic.lookup.qual/basic.lookup.qual.general/p3-example3.cpp
R clang/test/CXX/basic/basic.lookup/basic.lookup.qual/basic.lookup.qual.general/p3.cpp
M clang/test/CXX/class.derived/class.member.lookup/p8.cpp
M clang/test/CXX/drs/cwg1xx.cpp
R clang/test/CXX/temp/temp.names/p3-23.cpp
M clang/test/CXX/temp/temp.res/p3.cpp
M clang/test/FixIt/fixit.cpp
M clang/test/Misc/warning-flags.c
M clang/test/Parser/cxx2a-concepts-requires-expr.cpp
M clang/test/SemaCXX/cxx0x-noexcept-expression.cpp
M clang/test/SemaCXX/pseudo-destructors.cpp
M clang/test/SemaCXX/static-assert-cxx17.cpp
M clang/test/SemaTemplate/dependent-base-classes.cpp
M clang/test/SemaTemplate/dependent-template-recover.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
M clang/test/SemaTemplate/template-id-expr.cpp
M clang/test/SemaTemplate/typename-specifier-3.cpp
M libcxx/include/regex
M llvm/include/llvm/ADT/ArrayRef.h
Log Message:
-----------
Revert "Reapply "[Clang] Implement resolution for CWG1835 (#92957)" (#98547)"
This reverts commit ce4aada6e2135e29839f672a6599db628b53295d and a
follow-up patch 8ef26f1289bf069ccc0d6383f2f4c0116a1206c1.
This new warning can not be fully suppressed by the
`-Wno-missing-dependent-template-keyword` flag, this gives developer no
time to do the cleanup in a large codebase, see https://github.com/llvm/llvm-project/pull/98547#issuecomment-2228250884
Commit: 1663ac523cae7c8e5818e0fb742591a6ee09a56c
https://github.com/llvm/llvm-project/commit/1663ac523cae7c8e5818e0fb742591a6ee09a56c
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/gfx10-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-fma-f64.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-wmma.mir
Log Message:
-----------
[AMDGPU] Remove some invalid tests (#98796)
`-early-live-intervals` only affects default pipeline. If
`LiveIntervalsAnalysis` happens before `TwoAddressInstructionPass`,
`llc` will crash, by adding `-run-pass liveintervals`.
Commit: b42c332d734319c8a522fa3a24642550bac5d653
https://github.com/llvm/llvm-project/commit/b42c332d734319c8a522fa3a24642550bac5d653
Author: jameshu15869 <55058507+jameshu15869 at users.noreply.github.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M libc/benchmarks/gpu/CMakeLists.txt
M libc/benchmarks/gpu/LibcGpuBenchmark.cpp
M libc/benchmarks/gpu/LibcGpuBenchmark.h
Log Message:
-----------
[libc] Use Atomics in GPU Benchmarks (#98842)
This PR replaces our old method of reducing the benchmark results by
using an array to using atomics instead. This should help us implement
single threaded benchmarks.
Commit: cf230e7799472f9a920052e1ef7f1e70e8b0b938
https://github.com/llvm/llvm-project/commit/cf230e7799472f9a920052e1ef7f1e70e8b0b938
Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/global_atomic_optimizer_fp_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_optimizer_fp_no_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
Log Message:
-----------
[AMDGPU] Enable atomic optimizer for divergent i64 and double values (#96934)
Commit: 0bfdc4d49285edca17a364a8d58cd60d5757c128
https://github.com/llvm/llvm-project/commit/0bfdc4d49285edca17a364a8d58cd60d5757c128
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/X86/math-builtins.c
M clang/test/CodeGen/constrained-math-builtins.c
Log Message:
-----------
Add __builtin_fmaf16. (#97424)
Commit: 93d7d9bfd4aede19dda0ebaf8aead12c2adbd13b
https://github.com/llvm/llvm-project/commit/93d7d9bfd4aede19dda0ebaf8aead12c2adbd13b
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/test/Transforms/InstSimplify/and-or-implied-cond.ll
Log Message:
-----------
[InstSimplify] Add test for #98753 (NFC)
Commit: 1af3a89a4b384cbc5a6b111a0f7756085de818cd
https://github.com/llvm/llvm-project/commit/1af3a89a4b384cbc5a6b111a0f7756085de818cd
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/test/C/C2y/n3244.c
Log Message:
-----------
Correct test for 32-bit systems
Addresses an issue found in post-commit.
Commit: a972a394afcb276abb3029d0f2753d4403e379c2
https://github.com/llvm/llvm-project/commit/a972a394afcb276abb3029d0f2753d4403e379c2
Author: Thomas Wucher <30866545+thomaswucher at users.noreply.github.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_cursor.py
M clang/bindings/python/tests/cindex/test_enums.py
M clang/docs/ReleaseNotes.rst
M clang/include/clang-c/Index.h
A clang/test/Index/binop.cpp
M clang/test/Index/blocks.c
M clang/test/Index/c-index-api-loadTU-test.m
M clang/test/Index/index-concepts.cpp
M clang/test/Index/load-staticassert.cpp
M clang/test/Index/nested-binaryoperators.cpp
M clang/test/Index/preamble.c
M clang/test/Index/print-type.c
M clang/test/Index/print-type.cpp
M clang/test/Index/recursive-cxx-member-calls.cpp
M clang/test/Index/remap-load.c
M clang/test/Index/usrs.m
M clang/tools/c-index-test/c-index-test.c
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/libclang.map
Log Message:
-----------
Retrieve BinaryOperator::getOpcode and BinaryOperator::getOpcodeStr via libclang and its python interface (#98489)
This is a rework of patch [D10833](https://reviews.llvm.org/D10833)
previously posted on LLVM Phabricator by arthurp in 2015. It allows to
retrieve the type of binary operator via libclangs python bindings.
I did clean up the changes, removed unrelated changes and rebased the
changeset to the latest main branch. As this is my first contribution to
the LLVM project, let me know if any required tests or documentation are
missing.
Commit: 861a8ed68be7c6d5e2605b1ab3810fde72b5f66a
https://github.com/llvm/llvm-project/commit/861a8ed68be7c6d5e2605b1ab3810fde72b5f66a
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
Log Message:
-----------
[clang][OpenMP] Remove compound directives from `checkNestingOfRegions` (#98387)
Express the constraints via constituent directives.
Commit: bd04ac0694cc9fb3c43a4acb2f7cd1db08eba673
https://github.com/llvm/llvm-project/commit/bd04ac0694cc9fb3c43a4acb2f7cd1db08eba673
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
Fix "default label in switch which covers all enumeration values" warning; NFC
Amends a972a394afcb276abb3029d0f2753d4403e379c2
Commit: 4ed0f84d3897ba2f3c05f94342d9423cab61f86b
https://github.com/llvm/llvm-project/commit/4ed0f84d3897ba2f3c05f94342d9423cab61f86b
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M offload/test/api/omp_dynamic_shared_memory_amdgpu.c
M offload/test/api/omp_dynamic_shared_memory_mixed_amdgpu.c
M offload/test/offloading/bug51781.c
M offload/test/offloading/bug51982.c
Log Message:
-----------
[Offload] XFAIL four tests while working on fix (#98899)
omp_dynamic_shared_memory_mixed_amdgpu.c
omp_dynamic_shared_memory_amdgpu.c
amdgcn-amd-amdhsa::bug51982.c
amdgcn-amd-amdhsa::bug51781.c
Commit: a1dfe15632170342ae073d7238294dfe224682ed
https://github.com/llvm/llvm-project/commit/a1dfe15632170342ae073d7238294dfe224682ed
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
Log Message:
-----------
[clang][OpenMP] Simplify check for taskloop in `ActOnOpenMPLoopInitia… (#98633)
…lization`
Replace the explicit list of compound directives ending with taskloop
with checking for the last leaf construct.
Commit: 075f7542f1b55695b871fb5d6359c2350af474f8
https://github.com/llvm/llvm-project/commit/075f7542f1b55695b871fb5d6359c2350af474f8
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
A llvm/test/tools/llvm-split/AMDGPU/declarations.ll
Log Message:
-----------
[AMDGPU][llvm-split] Fix division by zero (#98888)
An empty module, or one containing only declarations, would result in a
division by a zero cost.
Commit: e73cf2f0c5b437f944e9a796d96d550d6ae3d8cf
https://github.com/llvm/llvm-project/commit/e73cf2f0c5b437f944e9a796d96d550d6ae3d8cf
Author: Matthias Springer <me at m-sp.org>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M flang/include/flang/Tools/CLOptions.inc
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/TypeConverter.cpp
M flang/test/Fir/basic-program.fir
Log Message:
-----------
[flang] Remove materialization workaround in type converter (#98743)
This change is in preparation of #97903, which adds extra checks for
materializations: it is now enforced that they produce an SSA value of
the correct type, so the current workaround no longer works.
The original workaround avoided target materializations by directly
returning the to-be-converted SSA value from the materialization
callback. This can be avoided by initializing the lowering patterns that
insert the materializations without a type converter. For
`cg::XEmboxOp`, the existing workaround that skips
`unrealized_conversion_cast` ops is still in place.
Also remove the lowering pattern for `unrealized_conversion_cast`. This
pattern has no effect because `unrealized_conversion_cast` ops that are
inserted by the dialect conversion framework are never matched by the
pattern driver.
Commit: 97ebc9794941d9e73792ab9deab7abafaf750a17
https://github.com/llvm/llvm-project/commit/97ebc9794941d9e73792ab9deab7abafaf750a17
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
Log Message:
-----------
[clang[OpenMP] Revert accidentally included changes from previous commit
Commit: ef51e617c43ef4248973f07e0a711f69d85c948c
https://github.com/llvm/llvm-project/commit/ef51e617c43ef4248973f07e0a711f69d85c948c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/19.rst
M libcxx/include/barrier
M libcxx/include/future
M libcxx/include/ios
M libcxx/include/latch
M libcxx/include/locale
M libcxx/include/locale.h
M libcxx/include/semaphore
M libcxx/include/shared_mutex
M libcxx/include/stop_token
M libcxx/include/thread
Log Message:
-----------
[libc++] Handle _LIBCPP_HAS_NO_{THREADS,LOCALIZATION} consistently with other carve-outs (#98319)
Previously, we would issue an #error when using a header that requires
threading support or localization support in a configuration where that
is disabled. This is unlike what we do for all the other carve outs like
no-filesystem, no-wide-characters or no-random-device. Instead of
issuing an #error, we normally just remove the problematic parts of the
header.
This patch makes the handling of no-localization and no-threads
consistent with the other carve-outs. I dislike the fact that users
won't get an explicit error message when trying to use e.g. ios in a
build that doesn't support localization, but I think it is better to
handle things consistently. Note that besides the consistency argument,
the #error approach doesn't really work anyways since it would break
down if we moved towards assuming the C locale only in the
no-localization mode.
Commit: 1612e4a3510982692f22e3f8190fc7c977185cbe
https://github.com/llvm/llvm-project/commit/1612e4a3510982692f22e3f8190fc7c977185cbe
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
Log Message:
-----------
Revert "[AMDGPU] Do not use original PHIs in coercion chains (#98063)"
This reverts commit dc8ea046a516c3bdd0ece306f406c9ea833d4dac.
It generated broken IR as described here:
https://github.com/llvm/llvm-project/pull/98063#issuecomment-2225259451
Commit: 4420c57fc395385eb039cb7c30d71ee29628c7de
https://github.com/llvm/llvm-project/commit/4420c57fc395385eb039cb7c30d71ee29628c7de
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll
Log Message:
-----------
[AMDGPU] Add a test case for #98063
Add a test case to demonstrate broken IR caused by #98063 "[AMDGPU] Do
not use original PHIs in coercion chains" before it was reverted.
Commit: 9ba9e480fa4ef1f37a2b6b51603ac8e446cca5ff
https://github.com/llvm/llvm-project/commit/9ba9e480fa4ef1f37a2b6b51603ac8e446cca5ff
Author: Petr Hosek <phosek at google.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M libc/src/__support/OSUtil/baremetal/io.cpp
Log Message:
-----------
[libc] Mark external baremetal I/O symbols as extern "C" (#98871)
These need to use C ABI.
Commit: beccecaacde405a3b50891c67594eccbcd1c8b08
https://github.com/llvm/llvm-project/commit/beccecaacde405a3b50891c67594eccbcd1c8b08
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/select-reduction-op.ll
Log Message:
-----------
[SLP]Fix PR98838: do no replace condition of select-based logical op by poison.
If the reduction operation is a select-based logical op, the condition
should be replaced by the poison, better to replace by the non-poisoning
constant to prevent poison propagation in the vector code.
Fixes https://github.com/llvm/llvm-project/issues/98838
Commit: dd7d81ea49bf39e1d69bbb84bd3f31bd95519369
https://github.com/llvm/llvm-project/commit/dd7d81ea49bf39e1d69bbb84bd3f31bd95519369
Author: Johannes Reifferscheid <jreiffers at google.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M mlir/lib/IR/AffineExpr.cpp
M mlir/unittests/IR/AffineExprTest.cpp
Log Message:
-----------
Fix simplification of x + x//c*-c to x mod c. (#98909)
There was no check that rhs is actually a multiplication.
Commit: acc159aea1e641e3694ab8fe5faa231788077011
https://github.com/llvm/llvm-project/commit/acc159aea1e641e3694ab8fe5faa231788077011
Author: Matthias Springer <me at m-sp.org>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M mlir/docs/DialectConversion.md
M mlir/include/mlir/Dialect/SCF/TransformOps/SCFTransformOps.td
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
M mlir/lib/Dialect/SCF/TransformOps/CMakeLists.txt
M mlir/lib/Dialect/SCF/TransformOps/SCFTransformOps.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Conversion/FuncToLLVM/func-memref-return.mlir
A mlir/test/Transforms/test-block-legalization.mlir
Log Message:
-----------
[mlir][Transforms] Dialect conversion: Fix missing source materialization (#97903)
This commit fixes a bug in the dialect conversion. During a 1:N
signature conversion, the dialect conversion did not insert a cast back
to the original block argument type, producing invalid IR.
See `test-block-legalization.mlir`: Without this commit, the operand
type of the op changes because an `unrealized_conversion_cast` is
missing:
```
"test.consumer_of_complex"(%v) : (!llvm.struct<(f64, f64)>) -> ()
```
To implement this fix, it was necessary to change the meaning of
argument materializations. An argument materialization now maps from the
new block argument types to the original block argument type. (It now
behaves almost like a source materialization.) This also addresses a
`FIXME` in the code base:
```
// FIXME: The current argument materialization hook expects the original
// output type, even though it doesn't use that as the actual output type
// of the generated IR. The output type is just used as an indicator of
// the type of materialization to do. This behavior is really awkward in
// that it diverges from the behavior of the other hooks, and can be
// easily misunderstood. We should clean up the argument hooks to better
// represent the desired invariants we actually care about.
```
It is no longer necessary to distinguish between the "output type" and
the "original output type".
Most type converter are already written according to the new API. (Most
implementations use the same conversion functions as for source
materializations.) One exception is the MemRef-to-LLVM type converter,
which materialized an `!llvm.struct` based on the elements of a memref
descriptor. It still does that, but casts the `!llvm.struct` back to the
original memref type. The dialect conversion inserts a target
materialization (to `!llvm.struct`) which cancels out with the other
cast.
This commit also fixes a bug in `computeNecessaryMaterializations`. The
implementation did not account for the possibility that a value was
replaced multiple times. E.g., replace `a` by `b`, then `b` by `c`.
This commit also adds a transform dialect op to populate SCF-to-CF
patterns. This transform op was needed to write a test case. The bug
described here appears only during a complex interplay of 1:N signature
conversions and op replacements. (I was not able to trigger it with ops
and patterns from the `test` dialect without duplicating the `scf.if`
pattern.)
Note for LLVM integration: Make sure that all
`addArgument/Source/TargetMaterialization` functions produce an SSA of
the specified type.
Depends on #98743.
Commit: 94efdff84a8f6d52915b90b705fe991f4888c544
https://github.com/llvm/llvm-project/commit/94efdff84a8f6d52915b90b705fe991f4888c544
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/docs/CommandGuide/clang.rst
Log Message:
-----------
[AArch64][RISCV] Document option --print-supported-extensions (#98698)
Add documentation for the `--print-supported-extensions`
option which appears to be missing at present.
Commit: 88f0dc48d6f46e1677dc679ae649e9b291140b13
https://github.com/llvm/llvm-project/commit/88f0dc48d6f46e1677dc679ae649e9b291140b13
Author: OverMighty <its.overmighty at gmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M libc/test/src/__support/CPP/type_traits_test.cpp
M libc/test/src/__support/FPUtil/fpbits_test.cpp
M libc/test/src/__support/big_int_test.cpp
M libc/test/src/math/RoundToIntegerTest.h
M libc/test/src/math/smoke/FMaxTest.h
M libc/test/src/math/smoke/FMaximumMagNumTest.h
M libc/test/src/math/smoke/FMaximumMagTest.h
M libc/test/src/math/smoke/FMaximumNumTest.h
M libc/test/src/math/smoke/FMaximumTest.h
M libc/test/src/math/smoke/FMinTest.h
M libc/test/src/math/smoke/FMinimumMagNumTest.h
M libc/test/src/math/smoke/FMinimumMagTest.h
M libc/test/src/math/smoke/FMinimumNumTest.h
M libc/test/src/math/smoke/FMinimumTest.h
M libc/test/src/math/smoke/FModTest.h
M libc/test/src/math/smoke/FrexpTest.h
M libc/test/src/math/smoke/ILogbTest.h
M libc/test/src/math/smoke/LogbTest.h
M libc/test/src/stdio/sprintf_test.cpp
M libc/test/src/string/memory_utils/op_tests.cpp
Log Message:
-----------
[libc] Fix warnings emitted by GCC (#98751)
Fixes #98709.
Commit: 4e338dce4de4ca1476e2b8f9c907769691a9093b
https://github.com/llvm/llvm-project/commit/4e338dce4de4ca1476e2b8f9c907769691a9093b
Author: Xiaoyang Liu <siujoeng.lau at gmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/19.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/__mdspan/extents.h
M libcxx/include/mdspan
M libcxx/include/version
A libcxx/test/std/containers/views/mdspan/extents/dims.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/mdspan.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] P2389R2: `dextents` Index Type Parameter (#97393)
This patch implements P2389R2, which was adopted at the St. Louis meeting.
It builds upon previous enhancements from P2299R3, which introduced deduction
guides and the `dextents` alias template.
Commit: 365f5b4a1dfe84f2978a41d5a85672e749056620
https://github.com/llvm/llvm-project/commit/365f5b4a1dfe84f2978a41d5a85672e749056620
Author: Him188 <tguan at nvidia.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/select-fp-casts.mir
M llvm/test/CodeGen/AArch64/itofp.ll
Log Message:
-----------
[AArch64][GISel] Add fp128 and i128 sitofp/uitofp handling (#97691)
Legalize sitofp/uitofp involving fp128/i128 types into a libcall.
Vector with i128/fp128 types are scalarized.
Commit: 82af55983d75d4a821b76ee926b19725ec7fa889
https://github.com/llvm/llvm-project/commit/82af55983d75d4a821b76ee926b19725ec7fa889
Author: Vincent Belliard <81770341+v-bulle at users.noreply.github.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M lldb/include/lldb/API/SBValue.h
M lldb/source/API/SBValue.cpp
M lldb/test/API/python_api/formatters/TestFormattersSBAPI.py
M lldb/test/API/python_api/formatters/main.cpp
M lldb/test/API/python_api/formatters/synth.py
Log Message:
-----------
[API] add GetSyntheticValue (#95959)
Adds GetSyntheticValue to the API on top of GetNonSyntheticValue.
---------
Co-authored-by: Vincent Belliard <v-bulle at github.com>
Commit: 6469faf9fd835a0fab6290168949d00e35556e75
https://github.com/llvm/llvm-project/commit/6469faf9fd835a0fab6290168949d00e35556e75
Author: Matthias Springer <me at m-sp.org>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir
M mlir/test/Integration/GPU/ROCM/printf.mlir
M mlir/test/Integration/GPU/ROCM/two-modules.mlir
M mlir/test/Integration/GPU/ROCM/vecadd.mlir
M mlir/test/Integration/GPU/ROCM/vector-transferops.mlir
Log Message:
-----------
[mlir] Fix GPU integration test (#98917)
Fix tests that were broken by #97903.
Commit: deff3afd35d4f301fe74d20cf9b180c79d2b7016
https://github.com/llvm/llvm-project/commit/deff3afd35d4f301fe74d20cf9b180c79d2b7016
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/Instrumentation.cpp
Log Message:
-----------
[NFC][BOLT] Rename createDummyReturnFunction to createReturnInstructi.. (#98448)
`createDummyReturnFunction` is not creating a function but instead only
a function body that is simply a return statement.
This patch renames it to: `createReturnInstructionList`
Commit: b320d3733dfb76c1b7d78fc499490d34b99e2284
https://github.com/llvm/llvm-project/commit/b320d3733dfb76c1b7d78fc499490d34b99e2284
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-shl.ll
M llvm/test/CodeGen/X86/combine-srl.ll
Log Message:
-----------
[X86] Add handling for select(icmp_uge(amt,BW),0,shift_logical(x,amt)) -> avx2 shift(x,amt)
We need to catch this otherwise pre-AVX512 targets will fold this to and(icmp_ult(amt,BW),shift_logical(x,amt))
Commit: 77e31000db8bd7103b0041b22e654537ceea95f6
https://github.com/llvm/llvm-project/commit/77e31000db8bd7103b0041b22e654537ceea95f6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
Log Message:
-----------
[DAG] SDPatternMatch::m_SetCC - rename operands. NFC.
Rename operands to make it easier to remember what they each represent.
Commit: ba8792b667a2bb167d6a8ce3b76e14d51258065c
https://github.com/llvm/llvm-project/commit/ba8792b667a2bb167d6a8ce3b76e14d51258065c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[X86] visitFCOPYSIGN - pull out repeated SDLoc. NFC.
Commit: 4fac1456d3132e2745ddbfacb326cf0afd613f3c
https://github.com/llvm/llvm-project/commit/4fac1456d3132e2745ddbfacb326cf0afd613f3c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineSelect - reuse existing SDLoc. NFC.
Commit: 903f6fceb86e68b0dbc11b13f808fc00a471e595
https://github.com/llvm/llvm-project/commit/903f6fceb86e68b0dbc11b13f808fc00a471e595
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
Log Message:
-----------
[RISCV] Prune dead LI in vsetvli coalescing with trivially dead vsetvli (#98647)
This is a follow up to ff8a03a7. On the review for that, I'd suggested a
stylistic rework, but after discussion we decided to move forward with
the fix as it was. This change is a small part of that suggested rework.
Once I sat down and wrote the code, I think I've convinced myself of an
entirely different approach (tbd), but for the moment, let's use a
lambda to share code so that we can pickup a missed optimization, and
reduce some duplication.
---------
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: 03fe7a83ce79d43b63052e7762573b57a8c52db8
https://github.com/llvm/llvm-project/commit/03fe7a83ce79d43b63052e7762573b57a8c52db8
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/PS4CPU.h
A clang/test/Driver/ps4-linker.c
R clang/test/Driver/ps4-ps5-linker.c
A clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS4/PS5][NFC] Split PScpu::Linker into PS4/PS5 classes (#98884)
It has long been the case on PlayStation that the linker itself has
taken on much of the responsibility that is traditionally the domain of
the C language driver elsewhere: which linker script to use, selection
of CRT objects, and so forth.
This is changing on PS5. The driver will assume responsibility for such
things. However, the situation on PS4 will remain as-is. To accommodate
this divergence, we must first separate how linker Jobs are created.
`clang/test/Driver/ps4-linker.c` has been similarly split for related
reasons.
In subsequent changes, PS5-specific linking behaviour can be moved from
SIE private patches in the PS5 linker to the (upstream) driver without
affecting the behaviour or implementation of PS4.
Commit: 7775be4d48e95385c1968d7f1826a11e08f5f954
https://github.com/llvm/llvm-project/commit/7775be4d48e95385c1968d7f1826a11e08f5f954
Author: Matthias Springer <me at m-sp.org>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M mlir/test/Integration/GPU/CUDA/async.mlir
Log Message:
-----------
[mlir] Fix GPU integration test (part 2) (#98918)
Fix tests that were broken by #97903.
Commit: 0309709a6786653da7164334c83b09c9f37b943a
https://github.com/llvm/llvm-project/commit/0309709a6786653da7164334c83b09c9f37b943a
Author: Chenguang Wang <w3cing at gmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dependency for mlir:SCFTransformOps (#98919)
Bazel build failure was introduced in commit acc159ae.
Commit: d5f4f084d29ce95fa27e5b7e80a630ae194df4bb
https://github.com/llvm/llvm-project/commit/d5f4f084d29ce95fa27e5b7e80a630ae194df4bb
Author: Luke Lau <luke at igalia.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
Log Message:
-----------
[RISCV] Always expand zero strided vp.strided.load (#98901)
This patch makes zero strided VP loads always be expanded to a scalar
load and splat even if +optimized-zero-stride-load is present.
Expanding it allows more .vx splat patterns to be matched, which is
needed to prevent regressions in #98111.
If the feature is present, RISCVISelDAGToDAG will combine it back to a
zero strided load.
The RV32 test diff also shows how need to emit a zero strided load
either way after expanding an SEW=64 strided load. We could maybe fix
this in a later patch by not doing the expand if SEW>XLEN.
Commit: a46d60ad32dbb14d82eda7d18ef7c418a51b22ff
https://github.com/llvm/llvm-project/commit/a46d60ad32dbb14d82eda7d18ef7c418a51b22ff
Author: Max Beck-Jones <max.beck-jones at arm.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[NFC] [AArch64] Refactor predicate register class decode functions (#97412)
In a previous PR #81716, a new decoder function was added to
llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp. During
code review it was suggested that, as most of the decoder functions were
very similar in structure, that they be refactored into a single,
templated function. I have added the refactored function, removed the
definitions of the replaced functions, and replaced the references to
the replaced functions in AArch64Disassembler.cpp and
llvm/lib/Target/AArch64/AArch64RegisterInfo.td. To reduce the number of
duplicate references in AArch64RegisterInfo.td, I have also made a small
change to llvm/utils/TableGen/DecoderEmitter.cpp.
Commit: c2fab5a4c69c857061b06b9a826bf4730821e483
https://github.com/llvm/llvm-project/commit/c2fab5a4c69c857061b06b9a826bf4730821e483
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/tools/c-index-test/c-index-test.c
Log Message:
-----------
Fix memory leak in unit test
Commit: 106621b601d7dc7c4929fba293f7e5ffe6b92c58
https://github.com/llvm/llvm-project/commit/106621b601d7dc7c4929fba293f7e5ffe6b92c58
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M libc/test/UnitTest/LibcTest.cpp
Log Message:
-----------
[libc][NFC] Fix printed test time in 32-bit systems (#98922)
clock() returns a clock_t, which is a long and might overflow in 32-bit
systems when the test takes a long time to run. Changing it to uint64_t
fixes this issue. Before:
[ RUN ] LlvmLibcHashTest.Avalanche
[ OK ] LlvmLibcHashTest.Avalanche (18446744073709551138 ms)
After this patch:
[ RUN ] LlvmLibcHashTest.Avalanche
[ OK ] LlvmLibcHashTest.Avalanche (4154 ms)
Commit: a78b19d8ea513a2e88fa431b549b65406384a12d
https://github.com/llvm/llvm-project/commit/a78b19d8ea513a2e88fa431b549b65406384a12d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/IR/Metadata.cpp
Log Message:
-----------
[IR] Use SmallSet with more inline elements in dropUnknownNonDebugMetadata (NFC) (#98853)
SmallSet here often ends up allocating memory via std::set inside
SmallSet because KnownIDs.size() goes up to 17 on an x86 host. This
patch switches to SmallSet<unsigned, 32> to avoid memory
allocations.
The increased inline elements here save 0.57% of heap allocations during
the compilation of X86ISelLowering.cpp.ii, a preprocessed version of
X86ISelLowering.cpp.
Commit: 3560e1d0cefa45285f3063c3f74270bcbd744da3
https://github.com/llvm/llvm-project/commit/3560e1d0cefa45285f3063c3f74270bcbd744da3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] visitADDLike - convert (A-B)+(C-D) --> (A+C)-(B+D) fold to sd_match. NFC.
Commit: 290537238b45106e30bb082b9affde345d8a5482
https://github.com/llvm/llvm-project/commit/290537238b45106e30bb082b9affde345d8a5482
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[X86] visitADDLike - pull out repeated SDLoc. NFC.
Commit: e6ec7c8f74d1be778f4ddf794d0e2fb63b0dc3be
https://github.com/llvm/llvm-project/commit/e6ec7c8f74d1be778f4ddf794d0e2fb63b0dc3be
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ForwardDeclarationNamespaceCheck.cpp
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclBase.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/tools/libclang/CXIndexDataConsumer.cpp
Log Message:
-----------
[Clang][AST] Move NamespaceDecl bits to DeclContext (#98567)
Currently, `NamespaceDecl` has a member `AnonOrFirstNamespaceAndFlags`
which stores a few pieces of data:
- a bit indicating whether the namespace was declared `inline`, and
- a bit indicating whether the namespace was declared as a
_nested-namespace-definition_, and
- a pointer a `NamespaceDecl` that either stores:
- a pointer to the first declaration of that namespace if the
declaration is no the first declaration, or
- a pointer to the unnamed namespace that inhabits the namespace
otherwise.
`Redeclarable` already stores a pointer to the first declaration of an
entity, so it's unnecessary to store this in `NamespaceDecl`.
`DeclContext` has 8 bytes in which various bitfields can be stored for a
declaration, so it's not necessary to store these in `NamespaceDecl`
either. We only need to store a pointer to the unnamed namespace that
inhabits the first declaration of a namespace. This patch moves the two
bits currently stored in `NamespaceDecl` to `DeclContext`, and only
stores a pointer to the unnamed namespace that inhabits a namespace in
the first declaration of that namespace. Since `getOriginalNamespace`
always returns the same `NamespaceDecl` as `getFirstDecl`, this function
is removed to avoid confusion.
Commit: 56ee6a172a8c17944c3b776159b45e15b31444ef
https://github.com/llvm/llvm-project/commit/56ee6a172a8c17944c3b776159b45e15b31444ef
Author: Dmitriy Chestnykh <dm.chestnykh at gmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M compiler-rt/lib/nsan/nsan.cpp
Log Message:
-----------
[compiler-rt][nsan] Disable coredump creation (#98807)
Disable core dump creation.
If NSAN_OPTIONS includes abort_on_error=1,
the process may hang as the kernel attempts
to create an excessively large core file.
Fix #98806
Commit: 148d90729e9fa132f170ba0627bcfb9ee90a0f38
https://github.com/llvm/llvm-project/commit/148d90729e9fa132f170ba0627bcfb9ee90a0f38
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/ifunc.c
M clang/test/CodeGen/kcfi.c
Log Message:
-----------
[CodeGen] Set attributes on resolvers emitted after ifuncs
Visiting the ifunc calls `GetOrCreateLLVMFunction` with
`NotForDefinition` while visiting the resolver calls
`GetOrCreateLLVMFunction` with `ForDefinition`.
When an ifunc is emitted before its resolver, the `ForDefinition` call
does not call `SetFunctionAttributes`, because the function prematurely
returns due to `(Entry->getValueType() == Ty)` and
`llvm::GlobalIFunc::getResolverFunctionType(DeclTy)`.
This leads to missing `!kcfi_type` with -fsanitize=kcfi.
```
extern void ifunc0(void) __attribute__ ((ifunc("resolver0")));
void *resolver0(void) { return 0; } // SetFunctionAttributes not called
extern void ifunc1(void) __attribute__ ((ifunc("resolver1")));
static void *resolver1(void) { return 0; } // SetFunctionAttributes not called
extern void ifunc2(void) __attribute__ ((ifunc("resolver2")));
static void *resolver2(void*) { return 0; }
```
Ensure `SetFunctionAttributes` is called by calling
`GetOrCreateLLVMFunction` with a dummy non-function type. Now that the
`F->takeName(Entry)` code path may be taken, the
`DisableSanitizerInstrumentation` code
(https://reviews.llvm.org/D150262) should be moved to `checkAliases`,
when the resolver function is finalized.
Pull Request: https://github.com/llvm/llvm-project/pull/98832
Commit: 266a5a9cb9daa96c1eeaebc18e10f5a37d638734
https://github.com/llvm/llvm-project/commit/266a5a9cb9daa96c1eeaebc18e10f5a37d638734
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/QuasiPolynomial.h
M mlir/lib/Analysis/Presburger/Barvinok.cpp
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/lib/Analysis/Presburger/LinearTransform.cpp
M mlir/lib/Analysis/Presburger/PWMAFunction.cpp
M mlir/lib/Analysis/Presburger/PresburgerRelation.cpp
M mlir/lib/Analysis/Presburger/QuasiPolynomial.cpp
M mlir/lib/Analysis/Presburger/Simplex.cpp
M mlir/lib/Analysis/Presburger/Utils.cpp
Log Message:
-----------
mlir/Presburger: optimize to avoid creating copies (#97897)
Optimize the Presburger library to avoid unnecessarily creating copies.
While at it, fix some other minor issues in the codebase.
Commit: 4797036fdbbe5d90e8639a0506fdcf9385d370d8
https://github.com/llvm/llvm-project/commit/4797036fdbbe5d90e8639a0506fdcf9385d370d8
Author: gonzalobg <65027571+gonzalobg at users.noreply.github.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/test/CodeGen/NVPTX/load-store.ll
Log Message:
-----------
[NVPTX] Adds float/double tests to load-store tests. (#96436)
Commit: 31d4c9750694fa3728e45cbd6f740063ee19a6fa
https://github.com/llvm/llvm-project/commit/31d4c9750694fa3728e45cbd6f740063ee19a6fa
Author: Dinar Temirbulatov <Dinar.Temirbulatov at arm.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/select-costs.ll
A llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
Log Message:
-----------
[LoopVectorize] LLVM fails to vectorise loops with multi-bool varables (#89226)
This change allows to consider compare instructions in the loop with
multiple use inside the loop and outside.
This change allows to vectorise this loop:
int foo(float* a, int n) {
_Bool any = 0;
_Bool all = 1;
for (int i = 0; i < n; i++) {
if (a[i] < 0.0f) {
any = 1;
} else {
all = 0;
}
}
return all ? 1 : any ? 2 : 3;
}
Commit: 87ca6386f9389f9d929d660e37701590092cefab
https://github.com/llvm/llvm-project/commit/87ca6386f9389f9d929d660e37701590092cefab
Author: Nathan James <n.james93 at hotmail.co.uk>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang-tools-extra/clang-tidy/boost/UseRangesCheck.cpp
M clang-tools-extra/clang-tidy/boost/UseRangesCheck.h
M clang-tools-extra/clang-tidy/modernize/UseRangesCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseRangesCheck.h
M clang-tools-extra/clang-tidy/utils/UseRangesCheck.cpp
M clang-tools-extra/clang-tidy/utils/UseRangesCheck.h
M clang-tools-extra/docs/clang-tidy/checks/boost/use-ranges.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-ranges.rst
A clang-tools-extra/test/clang-tidy/checkers/boost/Inputs/use-ranges/fake_boost.h
A clang-tools-extra/test/clang-tidy/checkers/boost/Inputs/use-ranges/fake_std.h
A clang-tools-extra/test/clang-tidy/checkers/boost/use-ranges-pipe.cpp
M clang-tools-extra/test/clang-tidy/checkers/boost/use-ranges.cpp
A clang-tools-extra/test/clang-tidy/checkers/modernize/Inputs/use-ranges/fake_std.h
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-ranges-pipe.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-ranges.cpp
Log Message:
-----------
[clang-tidy] Allow specifying pipe syntax for use-ranges checks (#98696)
Add `UseReversePipe` option to (boost|modernize)-use-ranges checks. This
controls whether to create a reverse view using function syntax
(`reverse(Range)`) or pipe syntax (`Range | reverse`)
Commit: 8e42e0d28aaaab8c4070857055689bee25d8a288
https://github.com/llvm/llvm-project/commit/8e42e0d28aaaab8c4070857055689bee25d8a288
Author: Vitaly Goldshteyn <VitalyGoldstein at gmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param-delayed.cpp
A clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param-templates.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param.cpp
Log Message:
-----------
[clang-tidy] Allow unnecessary-value-param to match templated functions including lambdas with auto. (#97767)
Clang-Tidy unnecessary-value-param value param will be triggered for
templated functions if at least one instantiontion with expensive to
copy type is present in translation unit.
It is relatively common mistake to write lambda functions with auto
arguments for expensive to copy types.
Commit: 1301cf486639c31353b2eede4596f3216c0d49ea
https://github.com/llvm/llvm-project/commit/1301cf486639c31353b2eede4596f3216c0d49ea
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/test/Preprocessor/ptrauth_feature.c
Log Message:
-----------
[PAC][clang] Enhance preprocessor ptrauth tests (#98862)
Test one feature at a time to make RUN lines shorter. See also
https://github.com/llvm/llvm-project/pull/96992#discussion_r1669394582
Commit: f964e8a3f9ef9789f9075694cb887d0b3986d304
https://github.com/llvm/llvm-project/commit/f964e8a3f9ef9789f9075694cb887d0b3986d304
Author: Chris Warner <73851242+cwarner-8702 at users.noreply.github.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ImplicitWideningOfMultiplicationResultCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/ImplicitWideningOfMultiplicationResultCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/implicit-widening-of-multiplication-result.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/implicit-widening-of-multiplication-result-constants.cpp
Log Message:
-----------
[clang-tidy] bugprone-implicit-widening ignores const exprs that fit (#98352)
Add an option to the
`bugprone-implicit-widening-of-multiplication-result` clang-tidy checker
to suppress warnings when the expression is made up of all compile-time
constants (literals, `constexpr` values or results, etc.) and the result
of the multiplication is guaranteed to fit in both the source and
destination types.
This currently only works for signed integer types:
* For unsigned integers, the well-defined rollover behavior on overflow
prevents the checker from detecting that the expression does not
actually fit in the source expr type, and would produce false negatives.
I have a somewhat-hacky stab at addressing this I'd like to submit as a
follow-on PR
* For floating-point types, there's probably a little additional work to
be done to `Expr` to calculate the result at compile time
Even still, this seems like a helpful addition just for signed types,
and additional types can be added.
Commit: c6b3f5019453bf08d4af1d8cec97ea7d96641a39
https://github.com/llvm/llvm-project/commit/c6b3f5019453bf08d4af1d8cec97ea7d96641a39
Author: Daniel Bertalan <dani at danielbertalan.dev>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M bolt/test/X86/match-functions-with-calls-as-anchors.test
Log Message:
-----------
[bolt][test] Require asserts in X86/match-functions-with-calls-as-anchors.test (#98882)
Otherwise, it fails due to the unsupported `--debug` flag in non-asserts
builds.
Commit: 4531f82c1ad905614c1df9359a77d48e6397fd97
https://github.com/llvm/llvm-project/commit/4531f82c1ad905614c1df9359a77d48e6397fd97
Author: OverMighty <its.overmighty at gmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M libc/cmake/modules/CheckCompilerFeatures.cmake
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/cmake/modules/LLVMLibCFlagRules.cmake
A libc/cmake/modules/compiler_features/check_builtin_ceil_floor_rint_trunc.cpp
A libc/cmake/modules/compiler_features/check_builtin_round.cpp
A libc/cmake/modules/compiler_features/check_builtin_roundeven.cpp
R libc/src/math/aarch64/CMakeLists.txt
R libc/src/math/aarch64/ceil.cpp
R libc/src/math/aarch64/ceilf.cpp
R libc/src/math/aarch64/floor.cpp
R libc/src/math/aarch64/floorf.cpp
R libc/src/math/aarch64/round.cpp
R libc/src/math/aarch64/roundf.cpp
R libc/src/math/aarch64/trunc.cpp
R libc/src/math/aarch64/truncf.cpp
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/ceil.cpp
M libc/src/math/generic/ceilf.cpp
M libc/src/math/generic/ceilf16.cpp
M libc/src/math/generic/floor.cpp
M libc/src/math/generic/floorf.cpp
M libc/src/math/generic/floorf16.cpp
M libc/src/math/generic/rint.cpp
M libc/src/math/generic/rintf.cpp
M libc/src/math/generic/rintf16.cpp
M libc/src/math/generic/round.cpp
M libc/src/math/generic/roundeven.cpp
M libc/src/math/generic/roundevenf.cpp
M libc/src/math/generic/roundevenf16.cpp
M libc/src/math/generic/roundf.cpp
M libc/src/math/generic/roundf16.cpp
M libc/src/math/generic/trunc.cpp
M libc/src/math/generic/truncf.cpp
M libc/src/math/generic/truncf16.cpp
M libc/test/src/math/performance_testing/CMakeLists.txt
M libc/test/src/math/performance_testing/nearest_integer_funcs_perf.cpp
Log Message:
-----------
[libc][math] Optimize nearest integer functions using builtins when available (#98376)
Commit: 8659c91b794dfc4366541e8b7d6a8e96b1861a0b
https://github.com/llvm/llvm-project/commit/8659c91b794dfc4366541e8b7d6a8e96b1861a0b
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/docs/RISCVUsage.rst
Log Message:
-----------
[RISCV][doc] Grammar fix
Fixes 884a07fee0ba36649561003e36d197323380f3d2
Commit: 2da30f89869c493f1bc1ffbd8b458975103af0ac
https://github.com/llvm/llvm-project/commit/2da30f89869c493f1bc1ffbd8b458975103af0ac
Author: gonzalobg <65027571+gonzalobg at users.noreply.github.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
A llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
M llvm/test/CodeGen/NVPTX/load-store.ll
Log Message:
-----------
[NVPTX] Add Volta Load/Store Atomics (.relaxed, .acquire, .release) and Volatile (.mmio/.volatile) support (#98022)
This PR adds initial support for some of Volta's (sm_70) load/store
atomic and volatile/MMIO operations, hopefully without breaking any
preexisting code. Only relaxed, acquire, and release operations w/
volatile are handled.
This PR does not aim to add support for any of the following:
- syncscope support
- read atomic ops to const, param, grid param
- local memory atomics
- sequentially consistent atomics
- atomicrmw
- ...
Commit: da286c8bf69684d1612d1fc440bd9c6f1a4326df
https://github.com/llvm/llvm-project/commit/da286c8bf69684d1612d1fc440bd9c6f1a4326df
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/PhaseOrdering/X86/blendv-select.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
Log Message:
-----------
[VectorCombine] foldShuffleToIdentity - peek through bitcasts to see if they come from the same value to form identity sequence (#98334)
Workaround until I can get #96884 fixed properly - when trying to find identity sequences, peek through any bitcasts to see if the values all came from the same source. We don't run CSE frequently enough to merge all the bitcasts that we end up with.
Commit: 466c1b65e41dafd8d71da230e44b6460e5c132e1
https://github.com/llvm/llvm-project/commit/466c1b65e41dafd8d71da230e44b6460e5c132e1
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/include/llvm/ADT/PackedVector.h
Log Message:
-----------
Provide access to raw bits in PackedVector. NFC. (#98944)
Needed for future patch to access vector as an integer mask.
Commit: 4a23d41750f54b7f32bf95148e5fa4b1dd12c4b5
https://github.com/llvm/llvm-project/commit/4a23d41750f54b7f32bf95148e5fa4b1dd12c4b5
Author: vporpo <vporpodas at google.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
A llvm/docs/SandboxIR.md
M llvm/docs/UserGuides.rst
Log Message:
-----------
[SandboxIR][Doc] Add a Doc file for Sandbox IR (#98691)
This is under User Guides > Additional Topics > Sandbox IR.
Commit: 63b16afc54527d8976571d36b17d85f401e4f6a1
https://github.com/llvm/llvm-project/commit/63b16afc54527d8976571d36b17d85f401e4f6a1
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
Log Message:
-----------
[TableGen] Use std::move. NFC
Fix #98719
Commit: 44d9692e6a657ec46e98e4912ac56417da67cfee
https://github.com/llvm/llvm-project/commit/44d9692e6a657ec46e98e4912ac56417da67cfee
Author: jimingham <jingham at apple.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Utility/Event.h
M lldb/source/Target/Process.cpp
M lldb/source/Utility/Event.cpp
M lldb/test/API/python_api/event/TestEvents.py
Log Message:
-----------
Private process events were being delivered to the secondary listener (#98571)
This fixes a bug where Process events were being delivered to secondary
listeners when the Private state thread listener was processing the
event. That meant the secondary listener could get an event before the
Primary listener did. That in turn meant the state when the secondary
listener got the event wasn't right yet. Plus it meant that the
secondary listener saw more events than the primary (not all events get
forwarded from the private to the public Process listener.)
This bug became much more evident when we had a stop hook that did some
work, since that delays the Primary listener event delivery. So I also
added a stop-hook to the test, and put a little delay in as well.
Commit: 1347b9a3aa671d610e812579ab5e5f05870586cf
https://github.com/llvm/llvm-project/commit/1347b9a3aa671d610e812579ab5e5f05870586cf
Author: DianQK <dianqk at dianqk.net>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/docs/Frontend/PerformanceTips.rst
Log Message:
-----------
[Docs] Store to poison is the canonical form for non-terminator unreachable (#98910)
Add the content from
https://github.com/llvm/llvm-project/pull/96639#issuecomment-2189111902.
Commit: bc1c84aee5b33c30e7bfe1e4a65a64650ec357db
https://github.com/llvm/llvm-project/commit/bc1c84aee5b33c30e7bfe1e4a65a64650ec357db
Author: David CARLIER <devnexen at gmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
A compiler-rt/test/sanitizer_common/TestCases/Linux/preadv2.cpp
Log Message:
-----------
[compiler-rt] adding preadv2/pwritev2 interceptions. (#97216)
Co-authored-by: Vitaly Buka <vitalybuka at gmail.com>
Commit: a7816c8e0086c1ae9b8ea15a6c252ca97f0405d1
https://github.com/llvm/llvm-project/commit/a7816c8e0086c1ae9b8ea15a6c252ca97f0405d1
Author: Jim Ingham <jingham at apple.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
A lldb/test/API/python_api/event/stop_hook.py
M lldb/unittests/Process/ProcessEventDataTest.cpp
Log Message:
-----------
git add a test file from a previous commit.
A new file was added to the python_api/events test, but I forgot to
git add it before making the PR. The commit was:
44d9692e6a657ec46e98e4912ac56417da67cfee
Commit: 1c854965fb20b3b8e0118318357516428ac244b2
https://github.com/llvm/llvm-project/commit/1c854965fb20b3b8e0118318357516428ac244b2
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
A lldb/include/lldb/Symbol/SymbolLocation.h
M lldb/source/Target/AssertFrameRecognizer.cpp
Log Message:
-----------
[lldb/Symbol] Hoist SymbolLocation from AssertFrameRecognizer to reuse it (#98975)
This patch hoists the `SymbolLocation` struct from the
`AssertFrameRecognizer` source file, since it's pretty generic and could
be reused for other purposes.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: f1ac7725e4fd5afa21fb244f9bcc33de654ed80c
https://github.com/llvm/llvm-project/commit/f1ac7725e4fd5afa21fb244f9bcc33de654ed80c
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M mlir/include/mlir/Bytecode/BytecodeOpInterface.h
M mlir/include/mlir/Bytecode/BytecodeReaderConfig.h
M mlir/lib/Bytecode/Writer/IRNumbering.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.h
Log Message:
-----------
[mlir] Remove bytecode reader & writer header from interface. (#98920)
Flagged some additional headers missing in process.
Inspired by #98676
Commit: ba66d60b1caa9cb6fd77d69cc36c530916e68936
https://github.com/llvm/llvm-project/commit/ba66d60b1caa9cb6fd77d69cc36c530916e68936
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M compiler-rt/lib/asan/asan_globals_win.cpp
M compiler-rt/lib/asan/asan_malloc_linux.cpp
M compiler-rt/lib/asan/asan_report.cpp
M compiler-rt/lib/asan/asan_suppressions.cpp
M compiler-rt/lib/asan/asan_thread.cpp
M compiler-rt/lib/dfsan/dfsan_allocator.h
M compiler-rt/lib/hwasan/hwasan_allocator.cpp
M compiler-rt/lib/hwasan/hwasan_thread_list.cpp
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/lsan/lsan_common_linux.cpp
M compiler-rt/lib/lsan/lsan_thread.cpp
M compiler-rt/lib/memprof/memprof_thread.cpp
M compiler-rt/lib/msan/msan.cpp
M compiler-rt/lib/msan/msan_allocator.h
M compiler-rt/lib/msan/msan_interceptors.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_allocator.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_primary32.h
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_primary64.h
M compiler-rt/lib/sanitizer_common/sanitizer_atomic.h
M compiler-rt/lib/ubsan/ubsan_diag.cpp
Log Message:
-----------
[sanitizer] Replace ALIGNED with alignas
C++11 `alignas` is already used extensively. `alignas` must precede
`static`, so adjust the ordering accordingly.
msan.cpp: Clang 15 doesn't allow `__attribute__((visibility("default"))) alignas(16)`.
Use the order `alignas(16) SANITIZER_INTERFACE_ATTRIBUTE`. Tested with Clang 7.
Pull Request: https://github.com/llvm/llvm-project/pull/98958
Commit: d286efeb1d0d3e135901dd07535cc68aed39a758
https://github.com/llvm/llvm-project/commit/d286efeb1d0d3e135901dd07535cc68aed39a758
Author: Ahmed Bougacha <ahmed at bougacha.org>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/test/CodeGen/AArch64/ptrauth-call.ll
M llvm/test/CodeGen/AArch64/ptrauth-invoke.ll
Log Message:
-----------
[AArch64][PAC] Lower direct authenticated calls to ptrauth constants. (#97664)
This tries to turn indirect ptrauth calls into direct calls, using
`ConstantPtrAuth::isKnownEquivalent` to compare the `ConstantPtrAuth`
target with the ptrauth call bundle.
This should be straightforward, other than the somewhat awkward GISel
handling, which has a handshake between CallLowering and IRTranslator to
elide the ptrauth when possible.
Commit: 34e06dc3716436603ad815f8d4c3f638ef679e38
https://github.com/llvm/llvm-project/commit/34e06dc3716436603ad815f8d4c3f638ef679e38
Author: aaryanshukla <53713108+aaryanshukla at users.noreply.github.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M libc/config/baremetal/api.td
M libc/config/gpu/api.td
M libc/config/linux/api.td
M libc/include/assert.h.def
A libc/newhdrgen/yaml/assert.yaml
Log Message:
-----------
[libc] newheadergen: added assert.yaml (#98826)
- removed assert macro definitions in api.td
- included macro definitions in assert.h.def
- added assert.yaml
Commit: 864478cc74f5e258f86014886df16aa8d393bcc6
https://github.com/llvm/llvm-project/commit/864478cc74f5e258f86014886df16aa8d393bcc6
Author: Sirraide <aeternalmail at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaType.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
Log Message:
-----------
[Clang] Disallow explicit object parameters in more contexts (#89078)
This diagnoses explicit object parameters in more contexts
where they aren’t supposed to appear in (e.g. function pointer
types, non-function member decls, etc.) [dcl.fct]
This fixes #85992.
Commit: db9ac92501509ce02ed188bb20a5211a9f29d5d3
https://github.com/llvm/llvm-project/commit/db9ac92501509ce02ed188bb20a5211a9f29d5d3
Author: jeffreytan81 <jeffreytan at meta.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
Add lldb version into initialize response lldb-dap (#98703)
Frequently, while troubleshooting user's debugging issues in VScode, we
would like to know lldb version so that we can confirm if certain
patch/feature is in or not.
This PR adds version string into `initialize` response so that telemetry
can track it.
---------
Co-authored-by: jeffreytan81 <jeffreytan at fb.com>
Commit: 00af49a27c0266b21718d4fa130a0a9df23a76f4
https://github.com/llvm/llvm-project/commit/00af49a27c0266b21718d4fa130a0a9df23a76f4
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M compiler-rt/CODE_OWNERS.TXT
Log Message:
-----------
[compiler-rt] Add code owner for nsan (#98967)
Add code owner for nsan.
Commit: 3614f65a7ba9d925010e3316a1d93bcebc632178
https://github.com/llvm/llvm-project/commit/3614f65a7ba9d925010e3316a1d93bcebc632178
Author: Kazu Hirata <kazu at google.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
M llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
M llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
M llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp
Log Message:
-----------
[Target] Use range-based for loops (NFC) (#98844)
Commit: 7863e4ed8866c67bc73133e419a9387ce6ad4cfb
https://github.com/llvm/llvm-project/commit/7863e4ed8866c67bc73133e419a9387ce6ad4cfb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmul.ll
Log Message:
-----------
[RISCV] Form VFWMUL.VF and VFWADD.VF/WF when fp_extend is scalar and then splatted. (#98590)
Previously we only supported the extend being in the vector domain after
the splat.
Commit: 9e52a9ee6370fbe7486c4bed5858b1a8ea8ec86f
https://github.com/llvm/llvm-project/commit/9e52a9ee6370fbe7486c4bed5858b1a8ea8ec86f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Simplify some checks of when we can't form a widening vector FP operation. NFCI
The _VL nodes are only used with scalable vectors so we don't need
to check that.
It doesn't matter if Zvfhmin is enabled. All that really matters is
whether Zvfh is.
Commit: 25752a40b8b224e3695edd506f304866f065ca9a
https://github.com/llvm/llvm-project/commit/25752a40b8b224e3695edd506f304866f065ca9a
Author: v01dXYZ <14996868+v01dXYZ at users.noreply.github.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
A llvm/test/MC/X86/intel-syntax-expr.s
Log Message:
-----------
[X86AsmParser] IntelExpression: End of Statement should check for valid end state (#95677)
The following commit bfb7099eeb9b6f62510b1db0cb93a8c3cfa68236 added a
special case for End of Statement that doesn't check if the state
machine is rightfully in a state where ending is valid.
This PR suggest to revert this change to make `EndOfStatement` processed
as any other tokens that are not consumable by the state machine.
Fixes https://github.com/llvm/llvm-project/issues/94446
---------
Co-authored-by: v01dxyz <v01dxyz at v01d.xyz>
Commit: bddab518db003f7c5ce9014e9ebd932fb7a85d2f
https://github.com/llvm/llvm-project/commit/bddab518db003f7c5ce9014e9ebd932fb7a85d2f
Author: JaydeepChauhan14 <167076022+JaydeepChauhan14 at users.noreply.github.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/msse2avx.c
M clang/tools/driver/cc1as_main.cpp
M llvm/include/llvm/MC/MCTargetOptions.h
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
A llvm/test/MC/AsmParser/sse2avx-att.s
M llvm/utils/TableGen/X86InstrMappingEmitter.cpp
M llvm/utils/TableGen/X86ManualInstrMapping.def
Log Message:
-----------
[X86][MC,Driver] Support -msse2avx to encode SSE instruction with VEX prefix (#96860)
For GCC compatibility
https://gcc.gnu.org/onlinedocs/gcc-14.1.0/gcc/x86-Options.html.
Commit: 578cf724de56e6c6768859bb1b6a597ee5d14ea0
https://github.com/llvm/llvm-project/commit/578cf724de56e6c6768859bb1b6a597ee5d14ea0
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M llvm/docs/ReleaseNotes.rst
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[RISCV] Add support for getHostCPUFeatures using hwprobe (#94352)
This patch adds support for `sys::getHostCPUFeatures` using the RISC-V
hardware probing interface.
References:
+ Loongarch patch:
https://github.com/llvm/llvm-project/commit/e53f41c39f3eb5052965c720d2cb517d2945fd12
+ asm/hwprobe.h:
https://github.com/torvalds/linux/blob/2ab79514109578fc4b6df90633d500cf281eb689/arch/riscv/include/uapi/asm/hwprobe.h
+ glibc support:
https://inbox.sourceware.org/glibc-cvs/20240301151728.AD5963858C53@sourceware.org/T/#Z2e.:..:20240301151728.AD5963858C53::40sourceware.org:1sysdeps:unix:sysv:linux:riscv:sys:hwprobe.h
+ __NR_riscv_hwprobe syscall tutorial:
https://github.com/cyyself/hwprobe
+ hwprobe docs: https://docs.kernel.org/arch/riscv/hwprobe.html
---------
Co-authored-by: Yangyu Chen <cyy at cyyself.name>
Commit: 5bb3492892f0e087249d6e7aa9c077b9aa0922eb
https://github.com/llvm/llvm-project/commit/5bb3492892f0e087249d6e7aa9c077b9aa0922eb
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a bug in SpaceBeforeParensOptions (#98849)
Handle constructors/destructors for AfterFunctionDeclarationName and
AfterFunctionDefinitionName.
Fixes #98812.
Fixes #98820.
Commit: 563ae620958a16423669f00a4219a96cf879b1f7
https://github.com/llvm/llvm-project/commit/563ae620958a16423669f00a4219a96cf879b1f7
Author: Luke Lau <luke at igalia.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
Log Message:
-----------
[RISCV] Don't expand zero stride vp.strided.load if SEW>XLEN (#98924)
A splat of a <n x i64> on RV32 will get lowered as a zero strided load
anyway (and won't match any .vx splat patterns), so don't expand it to a
scalar load + splat to avoid writing it to the stack.
Commit: f30c09e2d3107e117faf8311c6d8642fa95680af
https://github.com/llvm/llvm-project/commit/f30c09e2d3107e117faf8311c6d8642fa95680af
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/lib/AST/Interp/Boolean.h
M clang/lib/AST/Interp/Integral.h
Log Message:
-----------
[clang][Interp][NFC] Use a templated conversion operator
Commit: d82c75ebc0483971b768dd5ff077789262ffd9c0
https://github.com/llvm/llvm-project/commit/d82c75ebc0483971b768dd5ff077789262ffd9c0
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/test/Driver/msse2avx.c
Log Message:
-----------
[X86][Driver] Try to fix the test msse2avx.c on non-X86 target
The test was added in https://github.com/llvm/llvm-project/pull/96860
Commit: 27b2f4f861b8aeeabc4eb1a97649062de8fa3992
https://github.com/llvm/llvm-project/commit/27b2f4f861b8aeeabc4eb1a97649062de8fa3992
Author: walter erquinigo <walter at modular.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M lldb/include/lldb/Host/Config.h.cmake
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/source/API/SBDebugger.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolLocator/CMakeLists.txt
M lldb/source/Plugins/SymbolVendor/ELF/SymbolVendorELF.cpp
R lldb/test/API/debuginfod/Normal/Makefile
R lldb/test/API/debuginfod/Normal/TestDebuginfod.py
R lldb/test/API/debuginfod/Normal/main.c
R lldb/test/API/debuginfod/SplitDWARF/Makefile
R lldb/test/API/debuginfod/SplitDWARF/TestDebuginfodDWP.py
R lldb/test/API/debuginfod/SplitDWARF/main.c
Log Message:
-----------
[LLDB] Revert #98351 and #98344
This reverts commit 2fa1220a37a3f55b76a29803d8333b3a3937d53a.
This reverts commit b9496a74eb4029629ca2e440c5441614e766f773.
The patch #98344 causes a crash in LLDB when parsing some files like `numpy.libs/libgfortran-daac5196.so.5.0.0` on graviton (you can download it in https://drive.google.com/file/d/12ygLjJwWpzdYsrzBPp1JGiFHxcgM0-XY/view?usp=drive_link if you want to troubleshoot yourself).
The assert that is hit is the following:
```
llvm-project/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp:2452: std::pair<unsigned int, std::map<long unsigned int, lldb_private::AddressClass> > ObjectFileELF::ParseSymbolTable(lldb_private::Symtab*, lldb::user_id_t, lldb_private::Section*): Assertion `strtab->GetObjectFile() == this' failed.
[383588:383636:20240716,025305.572639:ERROR crashpad_client_linux.cc:780] Crashpad isn't enabled
```
This object file doesn't have apparently a strings table but LLDB still tries to process it due to the code that is being reverted.
Commit: 94ed08d6b2a80cd6838bd16f21e8437918fc4dc1
https://github.com/llvm/llvm-project/commit/94ed08d6b2a80cd6838bd16f21e8437918fc4dc1
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M libc/config/gpu/entrypoints.txt
M libc/config/gpu/headers.txt
M libc/include/uchar.h.def
M libc/include/wchar.h.def
Log Message:
-----------
[libc] Enable 'wchar.h' for the GPU (#98973)
Summary:
This file is not really well populated, but is required for some targets
to configure. Enable it on the GPU for now.
Commit: 8a27ef676e3c607daede048e5021db18a970aa71
https://github.com/llvm/llvm-project/commit/8a27ef676e3c607daede048e5021db18a970aa71
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
A lldb/include/lldb/Target/VerboseTrapFrameRecognizer.h
M lldb/source/Target/CMakeLists.txt
M lldb/source/Target/Process.cpp
A lldb/source/Target/VerboseTrapFrameRecognizer.cpp
A lldb/test/Shell/Recognizer/Inputs/verbose_trap.cpp
A lldb/test/Shell/Recognizer/verbose_trap.test
Log Message:
-----------
[lldb] Add frame recognizer for __builtin_verbose_trap (#80368)
This patch adds a frame recognizer for Clang's
`__builtin_verbose_trap`, which behaves like a
`__builtin_trap`, but emits a failure-reason string into debug-info in
order for debuggers to display
it to a user.
The frame recognizer triggers when we encounter
a frame with a function name that begins with
`__clang_trap_msg`, which is the magic prefix
Clang emits into debug-info for verbose traps.
Once such frame is encountered we display the
frame function name as the `Stop Reason` and display that frame to the
user.
Example output:
```
(lldb) run
warning: a.out was compiled with optimization - stepping may behave oddly; variables may not be available.
Process 35942 launched: 'a.out' (arm64)
Process 35942 stopped
* thread #1, queue = 'com.apple.main-thread', stop reason = Misc.: Function is not implemented
frame #1: 0x0000000100003fa4 a.out`main [inlined] Dummy::func(this=<unavailable>) at verbose_trap.cpp:3:5 [opt]
1 struct Dummy {
2 void func() {
-> 3 __builtin_verbose_trap("Misc.", "Function is not implemented");
4 }
5 };
6
7 int main() {
(lldb) bt
* thread #1, queue = 'com.apple.main-thread', stop reason = Misc.: Function is not implemented
frame #0: 0x0000000100003fa4 a.out`main [inlined] __clang_trap_msg$Misc.$Function is not implemented$ at verbose_trap.cpp:0 [opt]
* frame #1: 0x0000000100003fa4 a.out`main [inlined] Dummy::func(this=<unavailable>) at verbose_trap.cpp:3:5 [opt]
frame #2: 0x0000000100003fa4 a.out`main at verbose_trap.cpp:8:13 [opt]
frame #3: 0x0000000189d518b4 dyld`start + 1988
```
Commit: 515618e245d477dd734ca303f5066c7293b2ebbc
https://github.com/llvm/llvm-project/commit/515618e245d477dd734ca303f5066c7293b2ebbc
Author: Kazu Hirata <kazu at google.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
M llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
M llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
M llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp
Log Message:
-----------
Revert "[Target] Use range-based for loops (NFC) (#98844)"
This reverts commit 3614f65a7ba9d925010e3316a1d93bcebc632178.
fixupImmediateBr seems to resize ImmBranches.
Commit: 408a351d9187acd6b52cf14dac36378a10ff72a2
https://github.com/llvm/llvm-project/commit/408a351d9187acd6b52cf14dac36378a10ff72a2
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M libc/src/__support/threads/CMakeLists.txt
A libc/src/__support/threads/spin_lock.h
Log Message:
-----------
[libc] add a simple TTAS spin lock (#98846)
Commit: 4497ec293a6e745be817dc88027169bd5e4f7246
https://github.com/llvm/llvm-project/commit/4497ec293a6e745be817dc88027169bd5e4f7246
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/ABIInfoImpl.h
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGRecordLayoutBuilder.cpp
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/test/CodeGen/2009-06-14-anonymous-union-init.c
M clang/test/CodeGen/X86/x86_64-vaarg.c
M clang/test/CodeGen/paren-list-agg-init.cpp
M clang/test/CodeGen/voidptr-vaarg.c
M clang/test/CodeGenCXX/2011-12-19-init-list-ctor.cpp
M clang/test/CodeGenCXX/bitfield-access-empty.cpp
M clang/test/CodeGenCXX/class-layout.cpp
M clang/test/CodeGenCXX/compound-literals.cpp
M clang/test/CodeGenCXX/exceptions.cpp
M clang/test/CodeGenCXX/lambda-deterministic-captures.cpp
M clang/test/CodeGenCXX/partial-destruction.cpp
M clang/test/CodeGenCXX/pod-member-memcpys.cpp
M clang/test/CodeGenCXX/pr18962.cpp
M clang/test/CodeGenCXX/references.cpp
M clang/test/CodeGenCXX/temporaries.cpp
A clang/test/CodeGenCXX/zero-init-empty-virtual.cpp
M clang/test/CodeGenObjCXX/lambda-to-block.mm
M clang/test/OpenMP/irbuilder_for_iterator.cpp
M clang/test/OpenMP/irbuilder_for_rangefor.cpp
M clang/test/OpenMP/task_member_call_codegen.cpp
Log Message:
-----------
[clang][CGRecordLayout] Remove dependency on isZeroSize (#96422)
This is a follow-up from the conversation starting at
https://github.com/llvm/llvm-project/pull/93809#issuecomment-2173729801
The root problem that motivated the change are external AST sources that
compute `ASTRecordLayout`s themselves instead of letting Clang compute
them from the AST. One such example is LLDB using DWARF to get the
definitive offsets and sizes of C++ structures. Such layouts should be
considered correct (modulo buggy DWARF), but various assertions and
lowering logic around the `CGRecordLayoutBuilder` relies on the AST
having `[[no_unique_address]]` attached to them. This is a
layout-altering attribute which is not encoded in DWARF. This causes us
LLDB to trip over the various LLVM<->Clang layout consistency checks.
There has been precedent for avoiding such layout-altering attributes
from affecting lowering with externally-provided layouts (e.g., packed
structs).
This patch proposes to replace the `isZeroSize` checks in
`CGRecordLayoutBuilder` (which roughly means "empty field with
[[no_unique_address]]") with checks for
`CodeGen::isEmptyField`/`CodeGen::isEmptyRecord`.
**Details**
The main strategy here was to change the `isZeroSize` check in
`CGRecordLowering::accumulateFields` and
`CGRecordLowering::accumulateBases` to use the `isEmptyXXX` APIs
instead, preventing empty fields from being added to the `Members` and
`Bases` structures. The rest of the changes fall out from here, to
prevent lookups into these structures (for field numbers or base
indices) from failing.
Added `isEmptyRecordForLayout` and `isEmptyFieldForLayout` (open to
better naming suggestions). The main difference to the existing
`isEmptyRecord`/`isEmptyField` APIs, is that the `isEmptyXXXForLayout`
counterparts don't have special treatment for `unnamed bitfields`/arrays
and also treat fields of empty types as if they had
`[[no_unique_address]]` (i.e., just like the `AsIfNoUniqueAddr` in
`isEmptyField` does).
Commit: b3e1f1b13249868bef6a7c0895bcf2953eeabe44
https://github.com/llvm/llvm-project/commit/b3e1f1b13249868bef6a7c0895bcf2953eeabe44
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/test/Shell/SymbolFile/add-dsym.test
Log Message:
-----------
[lldb] Fix help syntax for add-dsym (target symbols add) (#98976)
The help output incorrectly states that this command takes a shared
library name (<shlib-name>) while really it takes a path to a symbol
file.
rdar://131777043
Commit: bed16824ba48862c540837ea5fbc472003904a76
https://github.com/llvm/llvm-project/commit/bed16824ba48862c540837ea5fbc472003904a76
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/test/CodeGenCXX/zero-init-empty-virtual.cpp
Log Message:
-----------
[clang][test] zero-init-empty-virtual.cpp: remove redundant alignment check
Fixes a `clang-armv8-quick` buildbot failure. Where the alignment
was `4` instead of `8`:
```
// CHECK: @{{.*}} = {{.*}}global %struct.Holder2 zeroinitializer, align 8
^
<stdin>:66:178: note: scanning from here
@g_holder1 = global %struct.Holder1 { %struct.polymorphic_base { ptr getelementptr inbounds inrange(-8, 12) ({ [5 x ptr] }, ptr @_ZTV16polymorphic_base, i32 0, i32 0, i32 2) } }, align 4
^
<stdin>:68:8: note: possible intended match here
@g_holder2 = global %struct.Holder2 zeroinitializer, align 4
^
```
This test isn't about checking alignment, so remove that from the
FileCheck entry.
Commit: 56c4ec92024ae9a425d29599d27885e4d45a309f
https://github.com/llvm/llvm-project/commit/56c4ec92024ae9a425d29599d27885e4d45a309f
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
A lldb/packages/Python/lldbsuite/test/make/libcxx-simulators-common/compressed_pair.h
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/unique_ptr/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/unique_ptr/TestDataFormatterLibcxxUniquePtrSimulator.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/unique_ptr/main.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string/simulator/main.cpp
Log Message:
-----------
[lldb][test] Add a layout simulator test for std::unique_ptr (#98330)
This is motivated by the upcoming refactor of libc++'s
`__compressed_pair` in https://github.com/llvm/llvm-project/pull/76756
As this will require changes to numerous LLDB libc++ data-formatters
(see early draft https://github.com/llvm/llvm-project/pull/96538), it
would be nice to have a test-suite that will actually exercise both the
old and new layout. We have a matrix bot that tests old versions of
Clang (but currently those only date back to Clang-15). Having them in
the test-suite will give us quicker signal on what broke.
We have an existing test that exercises various layouts of `std::string`
over time in `TestDataFormatterLibcxxStringSimulator.py`, but that's the
only STL type we have it for. This patch proposes a new
`libcxx-simulators` directory which will take the same approach for all
the STL types that we can feasibly support in this way (as @labath
points out, for some types this might just not be possible due to their
implementation complexity). Nonetheless, it'd be great to have a record
of how the layout of libc++ types changed over time.
Some related discussion:
*
https://github.com/llvm/llvm-project/pull/97568#issuecomment-2213426804
Commit: 27d961dab3caa89a78e68af094ddc8365d97dc91
https://github.com/llvm/llvm-project/commit/27d961dab3caa89a78e68af094ddc8365d97dc91
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/string/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/string/TestDataFormatterLibcxxStringSimulator.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/string/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string/simulator/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string/simulator/TestDataFormatterLibcxxStringSimulator.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string/simulator/main.cpp
Log Message:
-----------
[lldb][DataFormatter][test] Move std::string simulator to common libc++ simulators directory
Commit: 655c2233b6f81cd981d87e461ea202c563e90490
https://github.com/llvm/llvm-project/commit/655c2233b6f81cd981d87e461ea202c563e90490
Author: martinboehme <mboehme at google.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/ASTOps.h
M clang/unittests/Analysis/FlowSensitive/TestingSupport.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] reland #96766 with fix (#98896)
- **Reapply "[clang][dataflow] Teach `AnalysisASTVisitor` that
`typeid()` can be evaluated." (#96766)**
- **Turn on RTTI explicitly in `checkDataflowWithNoopAnalysis()`.**
Commit: ff96ad84f52022af295d11749f106480e7292a89
https://github.com/llvm/llvm-project/commit/ff96ad84f52022af295d11749f106480e7292a89
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/lib/AST/Interp/Pointer.h
Log Message:
-----------
[clang][Interp][NFC] Add Pointer::isDereferencable()
We currently have a few places where we check whether a pointer can
be read from at all. Add a function to do that.
Commit: fb2b5cd1ad35e0766e602a52df1fe03af9e2a6d9
https://github.com/llvm/llvm-project/commit/fb2b5cd1ad35e0766e602a52df1fe03af9e2a6d9
Author: Akshat Oke <76596238+Akshat-Oke at users.noreply.github.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
Log Message:
-----------
[NFC] Fix typos (#98454)
Co-authored-by: Akshat Oke <Akshat.Oke at amd.com>
Commit: 8618c86ee2cc518ccc6b753179c40f68ba5218a8
https://github.com/llvm/llvm-project/commit/8618c86ee2cc518ccc6b753179c40f68ba5218a8
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/lib/AST/Interp/EvalEmitter.cpp
M clang/test/AST/Interp/c23.c
Log Message:
-----------
[clang][Interp] Check for dereferencability before doing ltor cast
Commit: e140a8a3c83017c998a0dacbf9d128918852b429
https://github.com/llvm/llvm-project/commit/e140a8a3c83017c998a0dacbf9d128918852b429
Author: Sayhaan Siddiqui <49014204+sayhaan at users.noreply.github.com>
Date: 2024-07-15 (Mon, 15 Jul 2024)
Changed paths:
M bolt/include/bolt/Core/DebugData.h
M bolt/include/bolt/Rewrite/DWARFRewriter.h
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/test/X86/dwarf5-addr-section-reuse.s
Log Message:
-----------
[BOLT][DWARF][NFC] Refactor address writers (#98094)
Refactors address writers to create an instance for each CU and its DWO
CU.
Commit: d8f0611acc2658ccc54d985044aa115716c6ad34
https://github.com/llvm/llvm-project/commit/d8f0611acc2658ccc54d985044aa115716c6ad34
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/lib/AST/Interp/EvalEmitter.cpp
M clang/test/CodeGenCXX/nullptr.cpp
Log Message:
-----------
[clang][Interp] Allow ltor casts for null pointers
We can't read from them but we special-case them later.
Commit: 0b3943f3bba71e0cf9ea9984dae472cf503bca21
https://github.com/llvm/llvm-project/commit/0b3943f3bba71e0cf9ea9984dae472cf503bca21
Author: Keyi Zhang <Kuree at users.noreply.github.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/test/Dialect/SCF/canonicalize.mlir
Log Message:
-----------
[MLIR][SCF] fix scf.index_switch fold convergence (#98535) (#98680)
If the `scf.index_switch` op has no result, the current fold logic
results in an infinite loop (see #98535). The is because `fold`
mechanism does not support *erasing* zero-result ops. This PR moves the
fold logic to a canonicalizer and fix the issue.
Commit: 58c7df90f838251c3682abfe91abadaa68ff6a01
https://github.com/llvm/llvm-project/commit/58c7df90f838251c3682abfe91abadaa68ff6a01
Author: Yeting Kuo <46629943+yetingk at users.noreply.github.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Bump the version of Zicfilp/Zicfiss to 1.0 (#98891)
Both of them are ratified now.
https://wiki.riscv.org/display/HOME/Ratified+Extensions
This patch does not set them to non-experimental, since Zicfilp lacks
lld support and Zicfiss also lacks compiler-rt/libunwind support.
Commit: 331ba4369ac3cdf2ac2c6f724f9beaf43fb3fea7
https://github.com/llvm/llvm-project/commit/331ba4369ac3cdf2ac2c6f724f9beaf43fb3fea7
Author: AtariDreams <gfunni234 at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/cmp-to-cmn.ll
M llvm/test/CodeGen/AArch64/typepromotion-overflow.ll
Log Message:
-----------
[AArch64] Take cmn into account when adjusting compare constants (#98634)
Turning a cmp into cmn saves an extra mov and negate instruction, so
take that into account when choosing when to flip the compare operands.
This will allow further optimizations down the line when we fold more
variations of negative compares to cmn.
As part of this, do not consider right-hand operands whose absolute
value can be encoded into a cmn if it is the 2nd operand.
Commit: 3a0e01543212c1e1c80f5665aee0e12289e06a29
https://github.com/llvm/llvm-project/commit/3a0e01543212c1e1c80f5665aee0e12289e06a29
Author: Rajat Bajpai <rbajpai at nvidia.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
A llvm/test/CodeGen/NVPTX/rcp-opt.ll
Log Message:
-----------
[NVPTX] Lower -1/x to neg.f64(rcp.rn.f64) instead of fdiv (#98343)
The NVPTX backend lowers 1/x to rcp.rn.f64 instruction instead of slower
fdiv instruction. However, in the case of -1/x, it uses the slower fdiv
instruction. After this change, -1/x will be lowered into neg.f64
(rcp.rn.f64).
Commit: b132dd41eb1a8f6c1b19cedbd95fa3fde9e3ad8b
https://github.com/llvm/llvm-project/commit/b132dd41eb1a8f6c1b19cedbd95fa3fde9e3ad8b
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/test/CodeGen/AMDGPU/check-subtarget-features.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wavefrontsize.ll
M llvm/test/CodeGen/AMDGPU/unknown-processor.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s
M llvm/test/MC/AMDGPU/wave32.s
M llvm/test/MC/Disassembler/AMDGPU/gfx10-wave32.txt
Log Message:
-----------
[AMDGPU] Remove wavefrontsize feature from GFX10+ (#98400)
Processor definition shall not include a default feature which may be
switched off by a different wave size. This allows not to write
-mattr=-wavefrontsize32,+wavefrontsize64 in tests.
Commit: 5d12fa7d72a43eb54a3d8f953766323b97da5ca8
https://github.com/llvm/llvm-project/commit/5d12fa7d72a43eb54a3d8f953766323b97da5ca8
Author: David Stuttard <david.stuttard at amd.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
Log Message:
-----------
[AMDGPU] Fix indirect dst bug for non-sgpr index (#98907)
When emitting indirect dst, if the idx is not SGPR there was a bug that
didn't
take into account that the subregister might be different from
computeIndirectRegAndOffset.
Commit: 4eb30cfb3474e3770b465cdb39db3b7f6404c3ef
https://github.com/llvm/llvm-project/commit/4eb30cfb3474e3770b465cdb39db3b7f6404c3ef
Author: Mel Chen <mel.chen at sifive.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/include/llvm/IR/VectorBuilder.h
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/IR/VectorBuilder.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-ordered-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[LV][EVL] Support in-loop reduction using tail folding with EVL. (#90184)
Following from #87816, add VPReductionEVLRecipe to describe vector
predication reduction.
Address one of TODOs from #76172.
Commit: f091848504f838a7cb1868bf321fb622b7e2c127
https://github.com/llvm/llvm-project/commit/f091848504f838a7cb1868bf321fb622b7e2c127
Author: Tom Natan <130450079+tomnatan30 at users.noreply.github.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M mlir/test/mlir-tblgen/gen-dialect-doc.td
M mlir/tools/mlir-tblgen/OpDocGen.cpp
Log Message:
-----------
Add support for enum doc gen (#98885)
Commit: dcf30d33662552f80e7b9f159d1a671442de694e
https://github.com/llvm/llvm-project/commit/dcf30d33662552f80e7b9f159d1a671442de694e
Author: Krasimir Georgiev <krasimir at google.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/string/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
Log Message:
-----------
bazel build: pass __support_macros_config dep explicitly (NFCI) (#98999)
Passing it explicitly makes it that it's not made available to targets
that don't need it (also we've got some internal integration that trips
on it being passed implicitly in the rule definition).
Commit: 244892735941a455506ae38ae0fb40cf80cdb351
https://github.com/llvm/llvm-project/commit/244892735941a455506ae38ae0fb40cf80cdb351
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaConcept.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
A clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/www/cxx_status.html
Log Message:
-----------
[Clang][C++26] Implement "Ordering of constraints involving fold expressions (#98160)
Implement https://isocpp.org/files/papers/P2963R3.pdf
Commit: b3a446650c2c48743e148daeb9ddec8e74bb83a2
https://github.com/llvm/llvm-project/commit/b3a446650c2c48743e148daeb9ddec8e74bb83a2
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-global.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-local.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
Log Message:
-----------
[AMDGPU] Implement GFX12 Memory Model (#98591)
- Emit GLOBAL_WB instructions
- Reflect synscope on instructions's `scope:` operand
Fixes SWDEV-468508
Fixes SWDEV-470735
Fixes SWDEV-468392
Fixes SWDEV-469622
Commit: 762a47828ef6c19426e37e1ecae6768035a4ccac
https://github.com/llvm/llvm-project/commit/762a47828ef6c19426e37e1ecae6768035a4ccac
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaConcept.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
R clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/www/cxx_status.html
Log Message:
-----------
Revert "[Clang][C++26] Implement "Ordering of constraints involving fold expressions" (#99007)
Reverts llvm/llvm-project#98160
Breaks CI on some architectures
Commit: a1ffabc403d4ce55ab2e665511b0b68a16d4850b
https://github.com/llvm/llvm-project/commit/a1ffabc403d4ce55ab2e665511b0b68a16d4850b
Author: ita-sc <109672931+ita-sc at users.noreply.github.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M lldb/include/lldb/Core/EmulateInstruction.h
M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.h
M lldb/source/Plugins/Process/Utility/NativeProcessSoftwareSingleStep.cpp
A lldb/test/API/riscv/break-undecoded/Makefile
A lldb/test/API/riscv/break-undecoded/TestBreakpointIllegal.py
A lldb/test/API/riscv/break-undecoded/compressed.c
A lldb/test/API/riscv/break-undecoded/main.c
Log Message:
-----------
[lldb][riscv] Fix setting breakpoint for undecoded instruction (#90075)
This patch adds an interface GetLastInstrSize to get information about
the size of last tried to be decoded instruction and uses it to set
software breakpoint if the memory can be decoded as instruction.
RISC-V architecture instruction format specifies the length of
instruction in first bits, so we can set a breakpoint for these cases.
This is needed as RISCV have a lot of extensions, that are not supported
by `EmulateInstructionRISCV`.
Commit: c30ce8b9d33d1050ead549705702c1472b7a7d3f
https://github.com/llvm/llvm-project/commit/c30ce8b9d33d1050ead549705702c1472b7a7d3f
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
Log Message:
-----------
[clang] Refactor: Introduce a new LifetimeKind for the assignment case, NFC (#99005)
The current implementation for the assignment case uses a combination of
the `LK_Extended` lifetime kind and the validity of `AEntity`, which is
somewhat messy and doesn't align well with the intended mental model.
This patch introduces a dedicated lifetime kind to handle the assignment
case, simplifying the implementation and improving clarity.
Commit: de29b850f03092195bf21f3a39402adb4ed3c216
https://github.com/llvm/llvm-project/commit/de29b850f03092195bf21f3a39402adb4ed3c216
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstSimplify/and-or-implied-cond.ll
Log Message:
-----------
[InstSimplify] Fix simplifyAndOrWithICmpEq with undef refinement (#98898)
The final case in Simplify (where Res == Absorber and the predicate is
inverted) is not generally safe when the simplification is a refinement.
In particular, we may simplify assuming a specific value for undef, but
then chose a different one later.
However, it *is* safe to refine poison in this context, unlike in the
equivalent select folds. This is the reason why this fold did not use
AllowRefinement=false in the first place, and using that option would
introduce a lot of test regressions.
This patch takes the middle path of disabling undef refinements in
particular using the getWithoutUndef() SimplifyQuery option. However,
this option doesn't actually work in this case, because the problematic
fold is inside constant folding, and we currently don't propagate this
option all the way from InstSimplify over ConstantFolding to
ConstantFold. Work around this by explicitly checking for undef operands
in simplifyWithOpReplaced().
Finally, make sure that places where AllowRefinement=false also use
Q.getWithoutUndef(). I don't have a specific test case for this (the
original one does not work because we don't simplify selects with
constant condition in this mode in the first place) but this seems like
the correct thing to do to be conservative.
Fixes https://github.com/llvm/llvm-project/issues/98753.
Commit: 4469a1e587d5872bc3e10346d55afcb0dda44459
https://github.com/llvm/llvm-project/commit/4469a1e587d5872bc3e10346d55afcb0dda44459
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
Log Message:
-----------
[LV] Add missing check lines in vector.ph in tests.
Match all instructions in vector.ph in sve-inductions-unusual-types.ll.
This should help to better show the impact of
https://github.com/llvm/llvm-project/pull/95305.
Commit: 078cb7a4a07582a39ecd2f2fba9e9b1add9ebff3
https://github.com/llvm/llvm-project/commit/078cb7a4a07582a39ecd2f2fba9e9b1add9ebff3
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
Log Message:
-----------
[lldb][RISC-V] Remove unused variable
Added in a1ffabc403d4ce55ab2e665511b0b68a16d4850b.
Commit: 2c13194eab28474089841903acd5790b8b1a559a
https://github.com/llvm/llvm-project/commit/2c13194eab28474089841903acd5790b8b1a559a
Author: Daniel Grumberg <dgrumberg at apple.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
M clang/lib/ExtractAPI/DeclarationFragments.cpp
Log Message:
-----------
[clang][ExtractAPI][NFC] Remove some nullptr dereference problems (#98914)
A places try to get a NamedDecl's name using getName when it isn't a
simple identifier, migrate these areas to getNameAsString.
rdar://125315602
Commit: fb2ab1c5f6ef6c003969f6b14d69b4295a1c710b
https://github.com/llvm/llvm-project/commit/fb2ab1c5f6ef6c003969f6b14d69b4295a1c710b
Author: Rodolfo Wottrich <rodolfo.wottrich at arm.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/test/tools/llvm-readobj/ELF/ARM/attribute-big-endian.test
Log Message:
-----------
[llvm-readobj][ARM] Fix build attributes test's vendor name
`armabi` is not one of the recognized vendor names in the public Arm
ABI. Use `aeabi` instead.
https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst#registered-vendor-names
Commit: 60ec6868ea02454480598832606019c8a3bf4316
https://github.com/llvm/llvm-project/commit/60ec6868ea02454480598832606019c8a3bf4316
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M flang/docs/Intrinsics.md
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Lower/Intrinsics/second.f90
Log Message:
-----------
[flang] Implement SECOND intrinsic (#98881)
The SECOND intrinsic is a gnu extension providing an alias for CPU_TIME:
https://gcc.gnu.org/onlinedocs/gfortran/SECOND.html
This cannot be implemented as a straightforward alias because there is
both a function and a subroutine form.
Commit: 977cb5d1cb69dd83d762eeda156d238ea60a2aed
https://github.com/llvm/llvm-project/commit/977cb5d1cb69dd83d762eeda156d238ea60a2aed
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/do09.f90
Log Message:
-----------
[Flang][OpenMP] Restrict certain loops not allowed in associated loops (#91818)
Extends the OmpCycleAndExitChecker to check that associated loops of a
loop construct are not DO WHILE or DO without control.
OpenMP 5.0 standard clearly mentions this restriction. Later standards
enforce this through the definition of associated loops and canonical
loop forms.
https://www.openmp.org/spec-html/5.0/openmpsu41.html
Fixes #81949
Commit: d94ed83a9e7c0f20623899ad19f90d383760cb68
https://github.com/llvm/llvm-project/commit/d94ed83a9e7c0f20623899ad19f90d383760cb68
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/no-sve-no-neon.ll
Log Message:
-----------
[AArch64] Fix assertion failure in getCastInstrCost
We should not call `getVectorElementType` on the result MVT from
`getTypeLegalizationCost` when we don't if the legal type is a
vector. This is the case when the type needs to be legalized
using scalarization.
Commit: 862715ea813d8ffa73050ada17567b45c41a1023
https://github.com/llvm/llvm-project/commit/862715ea813d8ffa73050ada17567b45c41a1023
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaTemplate/instantiate-local-class.cpp
Log Message:
-----------
Revert "[Clang] Instantiate local constexpr functions eagerly (#95660)" (#98991)
Unfortunately, #95660 has caused a regression in DeduceReturnType(),
where some of the local recursive lambdas are getting incorrectly rejected.
This reverts commit 5548ea34341e9d0ae645719c34b466ca3b9eaa5a. Also, this
adds an offending case to the test.
Closes #98526
Commit: d0d61a7e4c944defad2292ced385baab734356a8
https://github.com/llvm/llvm-project/commit/d0d61a7e4c944defad2292ced385baab734356a8
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFFormValue.h
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/DebugInfo/DWARF/DWARFFormValue.cpp
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFDebugInfoTest.cpp
Log Message:
-----------
Split DWARFFormValue::getReference into four functions (#98905)
The result of the function cannot be correctly interpreted without
knowing the precise form type (a type signature needs to be looked up
very differently from a supplementary debug info reference). The
function sort of worked because the two reference types (unit-relative
and section-relative) that can be handled uniformly are also the most
common types of references, but this setup made it easy to write code
which does not support other kinds of reference (and if one tried to
support them, the result didn't look pretty --
https://github.com/llvm/llvm-project/pull/97423/files#r1676217081).
The split is based on the reference type classification from DWARFv5
(Section 7.5.5 Classes and Forms), and it should enable uniform (if
slightly more verbose) hadling. Note that this only affects users which
want more control of how (or if) the references are resolved. Users
which just want to access the referenced DIE can use the higher level
API (DWARFDie::GetAttributeValueAsReferencedDie) which returns (or will
return after #97423 is merged) the correct die for all reference types
(except for supplementary references, which we don't support right now).
Commit: 2ea4a03c0f1be6dd11428e4c6eb840b745116ca2
https://github.com/llvm/llvm-project/commit/2ea4a03c0f1be6dd11428e4c6eb840b745116ca2
Author: Kendal Harland <3987220+kendalharland at users.noreply.github.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M lldb/test/API/tools/lldb-dap/stepInTargets/TestDAP_stepInTargets.py
M lldb/test/API/tools/lldb-dap/stepInTargets/main.cpp
Log Message:
-----------
Fix test assertions in TestDAP_stepInTargets.py (#96687)
The strings this test is using seem to consistently fail to match
against the expected values when built & run targeting Windows amd64.
This PR updates them to the expected values.
To fix the test and avoid over-specifying for a specific platform, use
`assertIn(<target-substring>,...)` to see if we've got the correct
target label instead of comparing the demangler output for an exact
string match.
---------
Co-authored-by: kendal <kendal at thebrowser.company>
Commit: cc97a0d34787e4c9151fa894531ad9d07486a6ae
https://github.com/llvm/llvm-project/commit/cc97a0d34787e4c9151fa894531ad9d07486a6ae
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Use getBestPlan when interleaving only. (NFCI)
Use the getBestPlan() utility added in b841e2eca3 to also get the
scalar plan when interleaving only.
Commit: 8afb6432c239a3f5502c5014ebab6b372d7b3d50
https://github.com/llvm/llvm-project/commit/8afb6432c239a3f5502c5014ebab6b372d7b3d50
Author: DianQK <dianqk at dianqk.net>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/PhaseOrdering/pr98799-inline-simplifycfg-ub.ll
M llvm/test/Transforms/SimplifyCFG/UnreachableEliminate.ll
Log Message:
-----------
[SimplifyCFG] Select the first instruction that we can handle in `passingValueIsAlwaysUndefined` (#98802)
Fixes #98799.
Commit: bf5d5fed8d4cd7c36100af02664c2bdab912db9b
https://github.com/llvm/llvm-project/commit/bf5d5fed8d4cd7c36100af02664c2bdab912db9b
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[lldb][Bazel] Add missing dependency.
Commit: c8783991c7f6446b9c530e1396728e71b6acd998
https://github.com/llvm/llvm-project/commit/c8783991c7f6446b9c530e1396728e71b6acd998
Author: Benji Smith <6193112+Benjins at users.noreply.github.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm-c/Core.h
M llvm/lib/IR/Core.cpp
M llvm/test/Bindings/llvm-c/echo.ll
M llvm/tools/llvm-c-test/echo.cpp
Log Message:
-----------
[C API] Add accessors for new no-wrap flags on GEP instructions (#97970)
Previously, only the inbounds flag was accessible via the C API. This
adds support for any no-wrap related flags (currently nuw and nusw).
Commit: c05126bdfc3b02daa37d11056fa43db1a6cdef69
https://github.com/llvm/llvm-project/commit/c05126bdfc3b02daa37d11056fa43db1a6cdef69
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M lld/COFF/Driver.cpp
M lld/ELF/Driver.cpp
M lld/wasm/Driver.cpp
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
A llvm/include/llvm/CodeGen/RuntimeLibcallUtil.h
R llvm/include/llvm/CodeGen/RuntimeLibcalls.h
M llvm/include/llvm/CodeGen/TargetLowering.h
A llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/LTO/LTO.h
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/DwarfEHPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/IR/CMakeLists.txt
A llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/Object/IRSymtab.cpp
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMLegalizerInfo.h
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.h
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.h
M llvm/tools/lto/lto.cpp
Log Message:
-----------
[LLVM][LTO] Factor out RTLib calls and allow them to be dropped (#98512)
Summary:
The LTO pass and LLD linker have logic in them that forces extraction
and prevent internalization of needed runtime calls. However, these
currently take all RTLibcalls into account, even if the target does not
support them. The target opts-out of a libcall if it sets its name to
nullptr. This patch pulls this logic out into a class in the header so
that LTO / lld can use it to determine if a symbol actually needs to be
kept.
This is important for targets like AMDGPU that want to be able to use
`lld` to perform the final link step, but does not want the overhead of
uncalled functions. (This adds like a second to the link time trivially)
Commit: 4abdb85ef2b659a0ee919a4509dd6a82901351b5
https://github.com/llvm/llvm-project/commit/4abdb85ef2b659a0ee919a4509dd6a82901351b5
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/include/llvm/Support/GenericIteratedDominanceFrontier.h
Log Message:
-----------
[SSAUpdater] Avoid un-necessary SmallVector stores (#97820)
The default template for the generic IDF calculator fetching
block-children will, by default:
* Fetch the children range from the relevant `GraphTraits`,
* Store all child nodes in a `SmallVector`,
* Return that `SmallVector` into the IDF calculator.
The only place this `SmallVector` is used is in a for-range loop... thus
there's no reason why we can't just iterate over the child range from
`GraphTraits`, instead of storing all the nodes locally then iterating
over the local copy. (If the children of a node change during IDF
calculation, everything is broken anyway).
This yields a 0.14% debug-info build performance improvement on the
compile time tracker, as InstrRefBasedLDV uses the SSA updater
intensively on all functions.
Commit: 9dab91247d5c40607617f13b8fe5056111dd3045
https://github.com/llvm/llvm-project/commit/9dab91247d5c40607617f13b8fe5056111dd3045
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M bolt/lib/Core/DIEBuilder.cpp
Log Message:
-----------
Fix bolt for #98905
Commit: 4348f32ec609540e642be1be263d6ad2b60a90fd
https://github.com/llvm/llvm-project/commit/4348f32ec609540e642be1be263d6ad2b60a90fd
Author: Egor Zhdan <e_zhdan at apple.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/include/clang/APINotes/Types.h
Log Message:
-----------
[APINotes] Remove unused API
This method is not actually used anywhere.
Commit: aa94a43178e1e1fa4dbe7ee802d46623667067ae
https://github.com/llvm/llvm-project/commit/aa94a43178e1e1fa4dbe7ee802d46623667067ae
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[llvm][Bazel] Adapt to 4eb30cfb3474e3770b465cdb39db3b7f6404c3ef
Commit: 46505b3cbfc5f48f28431b9141085c5d71ddf1c4
https://github.com/llvm/llvm-project/commit/46505b3cbfc5f48f28431b9141085c5d71ddf1c4
Author: RicoAfoat <51285519+RicoAfoat at users.noreply.github.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/test/CodeGen/X86/inline-asm-memop.ll
Log Message:
-----------
[SelectionDAG] use HandleSDNode instead of SDValue during SelectInlineAsmMemoryOperands (#85081)
SelectInlineAsmMemoryOperands - change the vector of SDValue into a list of SDNodeHandle. Fixes issues where x86 might call replaceAllUses when matching address.
Fixes https://github.com/llvm/llvm-project/issues/82431 - see https://github.com/llvm/llvm-project/issues/82431 for more information.
Commit: 49d53a206faf5fb398aba5c8c1d21b3ec111fe39
https://github.com/llvm/llvm-project/commit/49d53a206faf5fb398aba5c8c1d21b3ec111fe39
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/docs/MyFirstTypoFix.rst
Log Message:
-----------
[llvm][Docs] Add explanatory note to MyFirstTypoFix intro
To make it 100% clear that the changes are an example and the guide
should later be used with the reader's own changes to submit an
actual PR.
Commit: 5b310a1c3c5aabae325934a6475e93ea8b71cdc2
https://github.com/llvm/llvm-project/commit/5b310a1c3c5aabae325934a6475e93ea8b71cdc2
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/lib/AST/Interp/InterpFrame.cpp
Log Message:
-----------
[clang][Interp] Ignore lambda static invoker frames in backtraces
See comment. No test but this is neccessary for a later commit.
Commit: 55483379e286a95c88a6a973a8e0f02dc5f1fb05
https://github.com/llvm/llvm-project/commit/55483379e286a95c88a6a973a8e0f02dc5f1fb05
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/PowerPC/vplan-force-tail-with-evl.ll
Log Message:
-----------
[VPlan] Update test to use CHECK variables.
Update test to avoid using hard-coded VPValue IDs.
Commit: d4a89af5a8c52191797bed5ff7ff40a85435d3a0
https://github.com/llvm/llvm-project/commit/d4a89af5a8c52191797bed5ff7ff40a85435d3a0
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M lldb/docs/index.rst
A lldb/docs/resources/qemu-testing.rst
R lldb/docs/use/qemu-testing.rst
Log Message:
-----------
[lldb][Docs] Move QEMU testing page into the developing lldb section
Commit: a6d2da8b9d7be19816dd4c76b02016c19618c1be
https://github.com/llvm/llvm-project/commit/a6d2da8b9d7be19816dd4c76b02016c19618c1be
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/config/baremetal/config.json
M libc/config/config.json
M libc/docs/configure.rst
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/heap_sort.h
M libc/src/stdlib/qsort.cpp
A libc/src/stdlib/qsort_data.h
M libc/src/stdlib/qsort_r.cpp
M libc/src/stdlib/qsort_util.h
A libc/src/stdlib/quick_sort.h
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/SortingTest.h
A libc/test/src/stdlib/heap_sort_test.cpp
M libc/test/src/stdlib/qsort_test.cpp
A libc/test/src/stdlib/quick_sort_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
Log Message:
-----------
[libc][stdlib] Implement heap sort. (#98582)
Commit: c7aac38c29f564bc48f7cfb71d3b3b8b482c873b
https://github.com/llvm/llvm-project/commit/c7aac38c29f564bc48f7cfb71d3b3b8b482c873b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/extractelements-to-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks_cmp_sel_min_max.ll
M llvm/test/Transforms/SLPVectorizer/X86/partail.ll
Log Message:
-----------
[SLP]Correctly detect minnum/maxnum patterns for select/cmp operations on floats.
The patch enables detection of minnum/maxnum patterns for float point
instruction, represented as select/cmp. Also, enables better cost
estimation for integer min/max patterns since the compiler starts
to estimate the scalars separately.
Reviewers: nikic, RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/98570
Commit: dba2e66e18cc82863542d2ba2fde52b9024df307
https://github.com/llvm/llvm-project/commit/dba2e66e18cc82863542d2ba2fde52b9024df307
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Basic/TokenKinds.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseTemplate.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/test/Preprocessor/embed_codegen.cpp
M clang/test/Preprocessor/embed_constexpr.cpp
M clang/test/Preprocessor/embed_weird.cpp
Log Message:
-----------
[clang] Inject tokens containing #embed back into token stream (#97274)
Instead of playing "whack a mole" with places where #embed should be
expanded as comma-separated list, just inject each byte as a token back
into the stream, separated by commas.
Commit: 0eebb48fcfbcb93da123e39ef61b22dc80c9ec0d
https://github.com/llvm/llvm-project/commit/0eebb48fcfbcb93da123e39ef61b22dc80c9ec0d
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__type_traits/invoke.h
R libcxx/include/__type_traits/is_member_function_pointer.h
R libcxx/include/__type_traits/is_member_object_pointer.h
M libcxx/include/__type_traits/is_member_pointer.h
M libcxx/include/module.modulemap
M libcxx/include/type_traits
Log Message:
-----------
[libc++] Merge is_member{,_object,_function}_pointer.h (#98727)
The implementations for these traits have been simplified quite a bit,
since we have builtins available for them now.
Commit: 30cc12cd818d4b52914d1033d1ed79af4a0f78fa
https://github.com/llvm/llvm-project/commit/30cc12cd818d4b52914d1033d1ed79af4a0f78fa
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M libcxx/include/__type_traits/is_fundamental.h
M libcxx/include/__type_traits/is_null_pointer.h
M libcxx/include/__type_traits/is_scalar.h
Log Message:
-----------
[libc++] Simplify the implementation of is_null_pointer a bit (#98728)
Commit: 7e2b5e233a49f1c99cf9a3696ca4322ff989a386
https://github.com/llvm/llvm-project/commit/7e2b5e233a49f1c99cf9a3696ca4322ff989a386
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Move reportVectorizationInfo to LoopVectorize.cpp (NFC)
The function is only used in LoopVectorize.cpp, no need to define it in
header.
Commit: 3bf83e3866237cd35c9828880241f5863d625ed9
https://github.com/llvm/llvm-project/commit/3bf83e3866237cd35c9828880241f5863d625ed9
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
A llvm/test/Transforms/LoopIdiom/AArch64/ctlz.ll
Log Message:
-----------
[LoopIdiom] Reland: Support 'shift until less-than' idiom #95002 (#98298)
The original patch failed to handle the case where the loopback
condition compared against a constant exceeding 64 bit unsigned range -
which caused a buildbot failure.
This PR fixes this and relands the original PR #95002.
The current loop idiom code for recognising and inserting a CTLZ
intrinsic does not support loops where the loopback control is based on
an unsigned less-than condition. This patch adds support for recognising
these loops and inserting a CTLZ intrinsic.
Fixes the missed optimization cases in #51064.
---------
Co-authored-by: David Sherwood <david.sherwood at arm.com>
Commit: d1bbae97f5d09e1de2e1e07b855e33cce533d7fa
https://github.com/llvm/llvm-project/commit/d1bbae97f5d09e1de2e1e07b855e33cce533d7fa
Author: Nico Weber <thakis at chromium.org>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/include/lldb/Host/BUILD.gn
Log Message:
-----------
Revert "[gn] port b9496a74eb40"
This reverts commit 14fb6162a97e60a8aefcb0702a713f7a50205fce.
b9496a74eb40 got reverted in 27b2f4f861b8.
Commit: c3540d0b6bbde69e7e9de00c3c289d5fd6d02a49
https://github.com/llvm/llvm-project/commit/c3540d0b6bbde69e7e9de00c3c289d5fd6d02a49
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/extractelements-to-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks_cmp_sel_min_max.ll
M llvm/test/Transforms/SLPVectorizer/X86/partail.ll
Log Message:
-----------
Revert "[SLP]Correctly detect minnum/maxnum patterns for select/cmp operations on floats."
This reverts commit c7aac38c29f564bc48f7cfb71d3b3b8b482c873b to fix
crashes reavealed by the buildbot in https://lab.llvm.org/buildbot/#/builders/168/builds/1104.
Commit: e869549e01b6e5ad87075e127fb07bf568635b1b
https://github.com/llvm/llvm-project/commit/e869549e01b6e5ad87075e127fb07bf568635b1b
Author: Nico Weber <thakis at chromium.org>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/X86/AsmParser/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
Log Message:
-----------
[gn] port bddab518db003f (X86AsmParser.cpp uses X86GenInstrMapping.inc)
Commit: 85cedd8e59be5eebad6292aee3b053f31afc8977
https://github.com/llvm/llvm-project/commit/85cedd8e59be5eebad6292aee3b053f31afc8977
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeEmitter.cpp
M clang/lib/AST/Interp/Context.cpp
M clang/test/AST/Interp/lambda.cpp
Log Message:
-----------
[clang][Interp] Ignore incomplete records when visiting lambdas
We need them to be complete so we have knowledge about all the
lambda captures.
Commit: 00f83a85c754e8b465e94470e733292cdbfbfe71
https://github.com/llvm/llvm-project/commit/00f83a85c754e8b465e94470e733292cdbfbfe71
Author: Nico Weber <thakis at chromium.org>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Symbol/BUILD.gn
Log Message:
-----------
[gn] port 8a27ef676e3c6 (lldbSymbol now includes clang headers)
Commit: 522fd53838d577add8c19b5eccccae756fd27899
https://github.com/llvm/llvm-project/commit/522fd53838d577add8c19b5eccccae756fd27899
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
A llvm/test/Transforms/PreISelIntrinsicLowering/X86/memcpy-inline-non-constant-len.ll
M llvm/test/Verifier/intrinsic-immarg.ll
Log Message:
-----------
[Intrinsics][PreISelInstrinsicLowering] llvm.memcpy.inline length no longer needs to be constant (#98281)
Following on from the discussion in
https://discourse.llvm.org/t/rfc-introducing-an-llvm-memset-pattern-inline-intrinsic/79496
and the equivalent change for llvm.memset.inline (#95397), this removes
the requirement that the length of llvm.memcpy.inline is constant.
PreISelInstrinsicLowering will expand llvm.memcpy.inline with
non-constant lengths, while the codegen path for constant lengths is
left unaltered.
Commit: 139df36d89bd731b5180be3cac2b58d4b2082368
https://github.com/llvm/llvm-project/commit/139df36d89bd731b5180be3cac2b58d4b2082368
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/test/API/functionalities/load_unload/TestLoadUnload.py
Log Message:
-----------
[LLDB] Make 'process load' take remote os path delimiter into account (#98690)
Currently, if we execute 'process load' with remote debugging, it uses
the host's path delimiter to look up files on a target machine. If we
run remote debugging of Linux target on Windows and execute "process
load C:\foo\a.so", lldb-server tries to load \foo\a.so instead of
/foo/a.so on the remote.
It affects several API tests.
This commit fixes that error. Also, it contains minor fixes for
TestLoadUnload.py for testing on Windows host and Linux target.
Commit: 473ed8e722df3b22f39db52df059f9d00ac63e1f
https://github.com/llvm/llvm-project/commit/473ed8e722df3b22f39db52df059f9d00ac63e1f
Author: Nico Weber <thakis at chromium.org>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Symbol/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Target/BUILD.gn
Log Message:
-----------
[gn] port 8a27ef676e3c6 better
I added this to the wrong target.
Reverts 00f83a85c754e and adds it to the right target instead.
Commit: ac4b6b662630cd4d3bf6929f2b39ea203c0054a1
https://github.com/llvm/llvm-project/commit/ac4b6b662630cd4d3bf6929f2b39ea203c0054a1
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
R llvm/test/Transforms/PreISelIntrinsicLowering/X86/memcpy-inline-non-constant-len.ll
M llvm/test/Verifier/intrinsic-immarg.ll
Log Message:
-----------
Revert "[Intrinsics][PreISelInstrinsicLowering] llvm.memcpy.inline length no longer needs to be constant (#98281)"
This reverts commit 522fd53838d577add8c19b5eccccae756fd27899 while
unexpected mlir failures are investigated and resolved.
Commit: 6dc8c2dada4b17f3a70ca9693411d4a6dc940c5b
https://github.com/llvm/llvm-project/commit/6dc8c2dada4b17f3a70ca9693411d4a6dc940c5b
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
A llvm/test/CodeGen/AMDGPU/global-alias.ll
Log Message:
-----------
[AMDGPU] Fix resource analysis crash on alias-to-alias function (#99034)
Summary:
Previously this code only looked through a single level of aliases to
find the underlying function. This patch changes it to continue until it
finds the end. Aliases that form a cycle are illegal IR, so we shouldn't
need to worry about infinite loops.
Fixes https://github.com/llvm/llvm-project/issues/96812
Commit: 55c8fd9e0b3ab1d2bb7ca4a7db7d6cf2aa83e5db
https://github.com/llvm/llvm-project/commit/55c8fd9e0b3ab1d2bb7ca4a7db7d6cf2aa83e5db
Author: Youngsuk Kim <joseph942010 at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Serialization/ASTReaderStmt.cpp
Log Message:
-----------
[clang] Prevent dangling StringRefs (#98699)
Fix locations where dangling StringRefs are created.
* `ConstraintSatisfaction::SubstitutionDiagnostic`: typedef of
`std::pair<SourceLocation, StringRef>`
* `concepts::Requirement::SubstitutionDiagnostic`: struct whose 1st and
3rd data members are `StringRef`s
Fixes #98667
Commit: fdf94e16323e46d31a951a0910103b8c0db74942
https://github.com/llvm/llvm-project/commit/fdf94e16323e46d31a951a0910103b8c0db74942
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
A llvm/test/Transforms/PreISelIntrinsicLowering/X86/memcpy-inline-non-constant-len.ll
M llvm/test/Verifier/intrinsic-immarg.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
Reapply "[Intrinsics][PreISelInstrinsicLowering] llvm.memcpy.inline length no longer needs to be constant (#98281)"
This reverts commit ac4b6b662630cd4d3bf6929f2b39ea203c0054a1.
A test change was missing for
mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir in the initial commit.
Commit: 009e176b880f660e7b01dda1f665a1b221375fd8
https://github.com/llvm/llvm-project/commit/009e176b880f660e7b01dda1f665a1b221375fd8
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
Log Message:
-----------
[sanitizer_common] Fix TgKill on Solaris (#98000)
While working on safestack on Solaris, I noticed that the `TgKill`
implementation is wrong here: `TgKill` is supposed to return `-1` on
error, while `thr_kill` returns `errno` instead. This patch compensates
for that.
This went unnoticed so far since `TgKill` has been unused.
Tested on `amd64-pc-solaris2.11` and `sparcv9-sun-solaris2.11` together
with a subsequent patch to make safestack actually work on Solaris.
Commit: ddc7999d896efcabac7a9be45f832721e9636802
https://github.com/llvm/llvm-project/commit/ddc7999d896efcabac7a9be45f832721e9636802
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 0eebb48fcfbc
Commit: ab91e4097d49a4e22eb1fbcd3289e546a2c2c3db
https://github.com/llvm/llvm-project/commit/ab91e4097d49a4e22eb1fbcd3289e546a2c2c3db
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Target/BUILD.gn
Log Message:
-----------
[gn build] Port 8a27ef676e3c
Commit: c7961538ff5c73ad03cbf2470e56cdc10cedc83b
https://github.com/llvm/llvm-project/commit/c7961538ff5c73ad03cbf2470e56cdc10cedc83b
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
Log Message:
-----------
[gn build] Port c05126bdfc3b
Commit: d05949796531c9a0a6639438159638a5825ad059
https://github.com/llvm/llvm-project/commit/d05949796531c9a0a6639438159638a5825ad059
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
Log Message:
-----------
[AMDGPU] clang-tidy: use lambda instead of std::bind. NFC.
Commit: 91722a4a13d808772edcdd5caad66a598a659655
https://github.com/llvm/llvm-project/commit/91722a4a13d808772edcdd5caad66a598a659655
Author: Ayke <aykevanlaethem at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopRotation.cpp
A llvm/test/Transforms/LoopRotate/minsize-disable.ll
Log Message:
-----------
[LoopRotate] Don't rotate loops when the minsize attribute is present
The main use for this patch is LTO. It is not (yet?) possible to set the
size level (-Os, -Oz) in the linker, which means loops are still rotated
even if -Oz is specified on the command line. Therefore, look at the
function attribute instead of only at the size level to determine
whether to rotate loops for a given function.
For discussion, see: https://reviews.llvm.org/D119342
An older version of this patch was already approved at
https://reviews.llvm.org/D119342 but I never got around to committing
it. The code changed so I had to make some minor updates to this patch
and in the meantime I also lost commit access because I wasn't really
using it. So here is an updated patch.
Commit: b115edc86c3d6d4e1ebc6546000117a77cf80eab
https://github.com/llvm/llvm-project/commit/b115edc86c3d6d4e1ebc6546000117a77cf80eab
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
Log Message:
-----------
[AMDGPU] Use std::is_same_v. NFC.
Commit: 16dd75b41c511d92f3f1947ccbb61b8ad66bbcd0
https://github.com/llvm/llvm-project/commit/16dd75b41c511d92f3f1947ccbb61b8ad66bbcd0
Author: Fabian Mora <fmora.dev at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M mlir/lib/Target/LLVM/ROCDL/Target.cpp
Log Message:
-----------
[mlir][ROCDL] Construct AMDGCN ISA control variable explicitly (#98912)
This patch constructs the AMDGCN ISA control variable explicitly instead
of linking against the library shipped with ROCm. This change prevents
issues arising from the order in which the AMDGCN libraries are linked.
Commit: 11a9ab125737e4b43a98073ccf238cef9c8501b9
https://github.com/llvm/llvm-project/commit/11a9ab125737e4b43a98073ccf238cef9c8501b9
Author: Eisuke Kawashima <e.kawaschima+github at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M openmp/libompd/gdb-plugin/ompd/ompd.py
M openmp/tools/archer/tests/lit.cfg
Log Message:
-----------
[OpenMP] Fix comparison to True/False in openmp/**.py (#94041)
from PEP8
(https://peps.python.org/pep-0008/#programming-recommendations):
> Comparisons to singletons like None should always be done with is or
is not, never the equality operators.
Co-authored-by: Eisuke Kawashima <e-kwsm at users.noreply.github.com>
Commit: cf00bb007428124a0d5af596300407ec11580fb2
https://github.com/llvm/llvm-project/commit/cf00bb007428124a0d5af596300407ec11580fb2
Author: Eisuke Kawashima <e.kawaschima+github at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M openmp/libompd/gdb-plugin/ompd/ompd_callbacks.py
Log Message:
-----------
[OpenMP] Fix comparison to None in openmp/**.py (#94020)
from PEP8
(https://peps.python.org/pep-0008/#programming-recommendations):
> Comparisons to singletons like None should always be done with is or
is not, never the equality operators.
Co-authored-by: Eisuke Kawashima <e-kwsm at users.noreply.github.com>
Commit: c1fa62ba74ad8ad52bdcba2ec23ba12ac1e45242
https://github.com/llvm/llvm-project/commit/c1fa62ba74ad8ad52bdcba2ec23ba12ac1e45242
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
Log Message:
-----------
[AMDGPU] Sort #includes. NFC.
Commit: 38a1dec30bb94c68b3010da3bbf7ab986dd5d69b
https://github.com/llvm/llvm-project/commit/38a1dec30bb94c68b3010da3bbf7ab986dd5d69b
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
Log Message:
-----------
[AMDGPU] Use std::min with initializer list. NFC.
Commit: 6bba44e8dcf5bb73e6e82068b194b14aa7d1880e
https://github.com/llvm/llvm-project/commit/6bba44e8dcf5bb73e6e82068b194b14aa7d1880e
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
Log Message:
-----------
[AMDGPU] Use member initializers. NFC.
Commit: ff81bbede4f3a28d285106a5a3f5d0980608dd47
https://github.com/llvm/llvm-project/commit/ff81bbede4f3a28d285106a5a3f5d0980608dd47
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
M llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUMemoryUtils.cpp
Log Message:
-----------
[AMDGPU] Concatenate nested namespaces. NFC.
Commit: 63a1242ae3f1ebc13831ac71cd19aa0cf98278dc
https://github.com/llvm/llvm-project/commit/63a1242ae3f1ebc13831ac71cd19aa0cf98278dc
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
M llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] clang-tidy: define trivial constructors with = default. NFC.
Commit: 78dea4c1ea77ba683c720d2a2c0f32d03989f8cc
https://github.com/llvm/llvm-project/commit/78dea4c1ea77ba683c720d2a2c0f32d03989f8cc
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
Log Message:
-----------
[AMDGPU] Use bool literals for bools. NFC.
Commit: b22fa9093bb1a7be2de4e9d7073c94d3ecb69987
https://github.com/llvm/llvm-project/commit/b22fa9093bb1a7be2de4e9d7073c94d3ecb69987
Author: mskamp <msk at posteo.org>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/Analysis/ValueTracking/knownbits-x86-hadd-hsub.ll
A llvm/test/CodeGen/X86/knownbits-hadd-hsub.ll
M llvm/test/CodeGen/X86/pr53247.ll
M llvm/unittests/Analysis/VectorUtilsTest.cpp
Log Message:
-----------
[ValueTracking][X86] Compute KnownBits for phadd/phsub (#92429)
Add KnownBits computations to ValueTracking and X86 DAG lowering.
These instructions add/subtract adjacent vector elements in their operands. Example: phadd [X1, X2] [Y1, Y2] = [X1 + X2, Y1 + Y2]. This means that, in this example, we can compute the KnownBits of the operation by computing the KnownBits of [X1, X2] + [X1, X2] and [Y1, Y2] + [Y1, Y2] and intersecting the results. This approach also generalizes to all x86 vector types.
There are also the operations phadd.sw and phsub.sw, which perform saturating addition/subtraction. Use sadd_sat and ssub_sat to compute the KnownBits of these operations.
Also adjust the existing test case pr53247.ll because it can be transformed to a constant using the new KnownBits computation.
Fixes #82516.
Commit: 7a72856af8b30f50e546b8368596fdc5f44cbca9
https://github.com/llvm/llvm-project/commit/7a72856af8b30f50e546b8368596fdc5f44cbca9
Author: Hansang Bae <hansang.bae at intel.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M openmp/runtime/src/include/omp-tools.h.var
M openmp/runtime/src/kmp_barrier.cpp
M openmp/runtime/src/kmp_runtime.cpp
M openmp/runtime/src/kmp_wait_release.h
M openmp/runtime/src/ompt-specific.cpp
M openmp/runtime/test/ompt/callback.h
M openmp/runtime/test/ompt/parallel/nested.c
M openmp/runtime/test/ompt/parallel/nested_lwt.c
M openmp/runtime/test/ompt/parallel/nested_serialized.c
M openmp/runtime/test/ompt/parallel/nested_thread_num.c
M openmp/runtime/test/ompt/parallel/no_thread_num_clause.c
M openmp/runtime/test/ompt/parallel/normal.c
M openmp/runtime/test/ompt/parallel/not_enough_threads.c
M openmp/runtime/test/ompt/synchronization/barrier/explicit.c
M openmp/runtime/test/ompt/synchronization/barrier/for_loop.c
M openmp/runtime/test/ompt/synchronization/barrier/for_simd.c
M openmp/runtime/test/ompt/synchronization/barrier/implicit_task_data.c
M openmp/runtime/test/ompt/synchronization/barrier/parallel_region.c
M openmp/runtime/test/ompt/synchronization/barrier/sections.c
M openmp/runtime/test/ompt/synchronization/barrier/single.c
M openmp/runtime/test/ompt/tasks/explicit_task.c
M openmp/runtime/test/ompt/tasks/serialized.c
M openmp/runtime/test/ompt/tasks/task_in_joinbarrier.c
M openmp/runtime/test/ompt/tasks/untied_task.c
M openmp/tools/multiplex/tests/custom_data_storage/custom_data_storage.c
M openmp/tools/multiplex/tests/print/print.c
Log Message:
-----------
[OpenMP] Use new OMPT state and sync kinds for barrier events (#95602)
This change makes the runtime use new OMPT state and sync kinds
introduced in OpenMP 5.1 in place of the deprecated implicit state and
sync kinds. Events from implicit barriers use different enumerators for
workshare, parallel, and teams.
Commit: fdb669b0dc30f179b886ee9da5d727d474a5bebb
https://github.com/llvm/llvm-project/commit/fdb669b0dc30f179b886ee9da5d727d474a5bebb
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
Log Message:
-----------
[AMDGPU] clang-format: pass Triple by value and std::move it. NFC.
Commit: 80d261493e9bd3046fd56c77e276a105cc20c185
https://github.com/llvm/llvm-project/commit/80d261493e9bd3046fd56c77e276a105cc20c185
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] clang-tidy: use override consistently. NFC.
Commit: 945440033f50aeaf85fca709d8c2644456b2a034
https://github.com/llvm/llvm-project/commit/945440033f50aeaf85fca709d8c2644456b2a034
Author: Mike Rice <michael.p.rice at intel.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
Log Message:
-----------
[NFC][clang] Replace unchecked dyn_cast with cast (#98948)
BI__builtin_hlsl_elementwise_rcp is only invoked with a FixedVectorType
so use cast to make this clear and satisfy the static verifier.
Commit: 1cd6359f39ab7fa55f00086c322bc183adb583bc
https://github.com/llvm/llvm-project/commit/1cd6359f39ab7fa55f00086c322bc183adb583bc
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/lib/Serialization/ASTReaderStmt.cpp
Log Message:
-----------
[clang][ASTReaderStmt] Use helper function 'saveStrToCtx' (NFC)
Commit: 8ba9ed682552261d089ceb4bc9895d5f9fd0c888
https://github.com/llvm/llvm-project/commit/8ba9ed682552261d089ceb4bc9895d5f9fd0c888
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/__ranges/single_view.h
A libcxx/test/std/ranges/range.factories/range.single.view/empty.pass.cpp
Log Message:
-----------
[libc++][ranges] LWG4035: `single_view` should provide `empty` (#98371)
Implements: https://wg21.link/LWG4035
- https://eel.is/c++draft/range.single.view
Commit: 0b43d573f54c16f8ccd231ae40a4704a93ab4aa1
https://github.com/llvm/llvm-project/commit/0b43d573f54c16f8ccd231ae40a4704a93ab4aa1
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
M llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
Log Message:
-----------
[AMDGPU] clang-tidy: replace macro with enum. NFC.
Commit: 4ecb5383e12f1be91d6de06bb377d35964c01a7a
https://github.com/llvm/llvm-project/commit/4ecb5383e12f1be91d6de06bb377d35964c01a7a
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M mlir/test/Dialect/Vector/vector-transfer-collapse-inner-most-dims.mlir
Log Message:
-----------
[mlir][vector] Update tests for collapse 6/n (nfc) (#98902)
The main goal of this PR (and subsequent PRs), is to add more tests with
scalable vectors to:
* vector-transfer-collapse-inner-most-dims.mlir
There's quite a few cases to consider, hence this is split into multiple
PRs.
In this PR, I am making the following changes:
* All input memrefs for `xfer_read` are are renamed as `%src`.
* All input memrefs for `xfer_write` are are renamed as `%dest`.
* All variables representing pad values for `xfer_read` are renamed as
`%pad`.
* All vector variables (for `xfer_read` and `xfer_write`) are renamed as
`%v`.
* Add `@contiguous_inner_most_non_zero_idx_in_bounds_scalable` for
`xfer_read` (similar test already exists for `xfer_write`)
* All index variables are renamed as `%i` (1st index) and `%ii` (2nd
index).
The above were marked as TODOs in the test file - these are not
resolved. In addition (to avoid sending another PR):
* `@drop_inner_most_dim` is deleted - it duplicates
`@contiguous_inner_most` for xfer_write
* For consistency with other negative tests, renamed `@non_unit_strides`
as `@negative_non_unit_strides` and added a similar test for
`xfer_read`
* `@non_unit_strides` is renamed as `@negative_non_unit_strides` and
a similar test is added for `xfer_read`.
This is a follow-up for: #94490, #94604, #94906, #96214, #96227
Commit: aeafdc21d29793fdb6bfb19b919ea3ad56226cf4
https://github.com/llvm/llvm-project/commit/aeafdc21d29793fdb6bfb19b919ea3ad56226cf4
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNILPSched.cpp
M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
M llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.cpp
M llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp
Log Message:
-----------
[AMDGPU] Use using instead of typedef. NFC.
Commit: 26098fe4b892cab75c56f7779dfe4dfe40615784
https://github.com/llvm/llvm-project/commit/26098fe4b892cab75c56f7779dfe4dfe40615784
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[codeowners][nfc] Add myself and @dcaballe (#97853)
Commit: 266a784cce959d475d3d79a877f0c5f39194a4c4
https://github.com/llvm/llvm-project/commit/266a784cce959d475d3d79a877f0c5f39194a4c4
Author: Lei Huang <lei at ca.ibm.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
A llvm/test/CodeGen/PowerPC/peephole-combineRLWINM-liveness.mir
Log Message:
-----------
[PowerPC] Ensure MI peephole knows about instr modified by combineRLWINM() (#97134)
Ensure registers used in instructions modified by `combineRLWINM()` are
added to list of `RegsToUpdate`.
Commit: f1d3fe7aae7867b5de96b84d6d26b5c9f02f209a
https://github.com/llvm/llvm-project/commit/f1d3fe7aae7867b5de96b84d6d26b5c9f02f209a
Author: Alexis Perry-Holby <AlexisPerry at users.noreply.github.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/TargetOptions.h
M flang/include/flang/Lower/Bridge.h
M flang/include/flang/Optimizer/CodeGen/CGPasses.td
M flang/include/flang/Optimizer/CodeGen/Target.h
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/CodeGen/TypeConverter.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
A flang/test/Driver/tune-cpu-fir.f90
A flang/test/Lower/tune-cpu-llvm.f90
M flang/tools/bbc/bbc.cpp
M flang/tools/tco/tco.cpp
M flang/unittests/Optimizer/FIRContextTest.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Target/LLVMIR/Import/tune-cpu.ll
A mlir/test/Target/LLVMIR/tune-cpu.mlir
Log Message:
-----------
Add basic -mtune support (#98517)
Initial implementation for the -mtune flag in Flang.
This PR is a clean version of PR #96688, which is a re-land of PR #95043
Commit: 2ee5586ac7d8424b51790b143dbc6e2105bf99bc
https://github.com/llvm/llvm-project/commit/2ee5586ac7d8424b51790b143dbc6e2105bf99bc
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/IR/AffineMap.h
M mlir/include/mlir/Interfaces/VectorInterfaces.td
M mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMask.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
M mlir/lib/IR/AffineMap.cpp
M mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_1d.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_2d.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_affine_apply.mlir
M mlir/test/Dialect/Linalg/hoisting.mlir
M mlir/test/Dialect/Linalg/vectorization.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Dialect/Vector/vector-transfer-collapse-inner-most-dims.mlir
M mlir/test/Dialect/Vector/vector-transfer-permutation-lowering.mlir
M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
M mlir/test/Dialect/Vector/vector-transfer-unroll.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-2d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-3d.mlir
M mlir/test/python/dialects/vector.py
Log Message:
-----------
[mlir][vector] Make the in_bounds attribute mandatory (#97049)
At the moment, the in_bounds attribute has two confusing/contradicting
properties:
1. It is both optional _and_ has an effective default-value.
2. The default value is "out-of-bounds" for non-broadcast dims, and
"in-bounds" for broadcast dims.
(see the `isDimInBounds` vector interface method for an example of this
"default" behaviour [1]).
This PR aims to clarify the logic surrounding the `in_bounds` attribute
by:
* making the attribute mandatory (i.e. it is always present),
* always setting the default value to "out of bounds" (that's
consistent with the current behaviour for the most common cases).
#### Broadcast dimensions in tests
As per [2], the broadcast dimensions requires the corresponding
`in_bounds` attribute to be `true`:
```
vector.transfer_read op requires broadcast dimensions to be in-bounds
```
The changes in this PR mean that we can no longer rely on the
default value in cases like the following (dim 0 is a broadcast dim):
```mlir
%read = vector.transfer_read %A[%base1, %base2], %f, %mask
{permutation_map = affine_map<(d0, d1) -> (0, d1)>} :
memref<?x?xf32>, vector<4x9xf32>
```
Instead, the broadcast dimension has to explicitly be marked as "in
bounds:
```mlir
%read = vector.transfer_read %A[%base1, %base2], %f, %mask
{in_bounds = [true, false], permutation_map = affine_map<(d0, d1) -> (0, d1)>} :
memref<?x?xf32>, vector<4x9xf32>
```
All tests with broadcast dims are updated accordingly.
#### Changes in "SuperVectorize.cpp" and "Vectorization.cpp"
The following patterns in "Vectorization.cpp" are updated to explicitly
set the `in_bounds` attribute to `false`:
* `LinalgCopyVTRForwardingPattern` and `LinalgCopyVTWForwardingPattern`
Also, `vectorizeAffineLoad` (from "SuperVectorize.cpp") and
`vectorizeAsLinalgGeneric` (from "Vectorization.cpp") are updated to
make sure that xfer Ops created by these hooks set the dimension
corresponding to broadcast dims as "in bounds". Otherwise, the Op
verifier would complain
Note that there is no mechanism to verify whether the corresponding
memory access are indeed in bounds. Still, this is consistent with the
current behaviour where the broadcast dim would be implicitly assumed
to be "in bounds".
[1]
https://github.com/llvm/llvm-project/blob/4145ad2bac4bb99d5034d60c74bb2789f6c6e802/mlir/include/mlir/Interfaces/VectorInterfaces.td#L243-L246
[2]
https://mlir.llvm.org/docs/Dialects/Vector/#vectortransfer_read-vectortransferreadop
Commit: 74b87b02d21583c66c4cf6659703e4bd5c4f537d
https://github.com/llvm/llvm-project/commit/74b87b02d21583c66c4cf6659703e4bd5c4f537d
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNILPSched.cpp
M llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFStreamer.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
Log Message:
-----------
[AMDGPU] Fix and add namespace closing comments. NFC.
Commit: 5b54f36fb607d21c18f9eb56dcf481a9841dee8e
https://github.com/llvm/llvm-project/commit/5b54f36fb607d21c18f9eb56dcf481a9841dee8e
Author: Chenguang Wang <w3cing at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Fix llvm:Core build (#99054)
According to @akuegel, this breakage was introduced in c05126bd.
Commit: 3706c12c8e2df3bae7ba27ba4645f6eef000bab4
https://github.com/llvm/llvm-project/commit/3706c12c8e2df3bae7ba27ba4645f6eef000bab4
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M llvm/include/llvm/Demangle/MicrosoftDemangle.h
Log Message:
-----------
Prevent copying of ArenaAllocator (#97935)
This patch removes copy constructor and assignment operator from
ArenaAllocator class to prevent resource duplication and ensure it
remains non-copyable as per design intent.
Commit: f0eb5587ceeb641445b64cb264c822b4751de04a
https://github.com/llvm/llvm-project/commit/f0eb5587ceeb641445b64cb264c822b4751de04a
Author: James Y Knight <jyknight at google.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsX86.def
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Driver/ToolChains/Arch/X86.cpp
M clang/lib/Headers/mm3dnow.h
M clang/lib/Headers/x86intrin.h
R clang/test/CodeGen/X86/3dnow-builtins.c
M clang/test/CodeGen/builtins-x86.c
M clang/test/Driver/x86-target-features.c
M clang/test/Headers/mm3dnow.c
M clang/test/Preprocessor/predefined-arch-macros.c
M clang/test/Preprocessor/x86_target_features.c
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86Instr3DNow.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86Subtarget.cpp
M llvm/lib/Target/X86/X86Subtarget.h
R llvm/test/CodeGen/X86/3dnow-intrinsics.ll
R llvm/test/CodeGen/X86/commute-3dnow.ll
M llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir
M llvm/test/CodeGen/X86/pr35982.ll
M llvm/test/CodeGen/X86/prefetch.ll
R llvm/test/CodeGen/X86/stack-folding-3dnow.ll
Log Message:
-----------
Remove support for 3DNow!, both intrinsics and builtins. (#96246)
This set of instructions was only supported by AMD chips starting in
the K6-2 (introduced 1998), and before the "Bulldozer" family
(2011). They were never much used, as they were effectively superseded
by the more-widely-implemented SSE (first implemented on the AMD side
in Athlon XP in 2001).
This is being done as a predecessor towards general removal of MMX
register usage. Since there is almost no usage of the 3DNow!
intrinsics, and no modern hardware even implements them, simple
removal seems like the best option.
(Clang half originally uploaded in https://reviews.llvm.org/D94213)
Works towards issue #41665 and issue #98272.
Commit: 47f3d55ecebe5d4f0376bce673be75a98b5763a7
https://github.com/llvm/llvm-project/commit/47f3d55ecebe5d4f0376bce673be75a98b5763a7
Author: Kamau Bridgeman <kamau.bridgeman.ibm at gmail.com>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M compiler-rt/test/profile/instrprof-gc-sections.c
Log Message:
-----------
XFAIL: lld-available lit.cfg tag does not work as intended. (#99056)
This change XFAILs instrprof-gc-sections.c compiler-rt test case
because it uses the `lld-available` lit.config tag which erroneously
uses the `CMAKE_LINKER` if it is lld instead of checking for the
latest and greatest lld available. A patch is in the works to fix
this.
This change is to bring the `clang-ppc64le-linux-test-suite` and
`clang-ppc64le-linux-multistage` back to green as they were broken
as of PR #98382
Commit: f58cfacfafda0961396f92816692e9a316dec0c2
https://github.com/llvm/llvm-project/commit/f58cfacfafda0961396f92816692e9a316dec0c2
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-07-17 (Wed, 17 Jul 2024)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
A llvm/test/Transforms/AggressiveInstCombine/memchr.ll
Log Message:
-----------
[AggressiveInstCombine] Expand memchr with small constant strings (#98501)
This patch converts memchr with a small constant string into a switch.
It will reduce overhead of libcall and enable more folds (e.g.,
comparing the result with null).
References: https://en.cppreference.com/w/c/string/byte/memchr
Commit: eece1a60b1971dcf86a1ff99992e7eeca1fb29d8
https://github.com/llvm/llvm-project/commit/eece1a60b1971dcf86a1ff99992e7eeca1fb29d8
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-16 (Tue, 16 Jul 2024)
Changed paths:
M .github/CODEOWNERS
M bolt/docs/CommandLineArgumentReference.md
A bolt/docs/HeatmapHeader.png
M bolt/docs/Heatmaps.md
M bolt/include/bolt/Core/DebugData.h
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/include/bolt/Rewrite/DWARFRewriter.h
M bolt/include/bolt/Utils/CommandLineOpts.h
M bolt/lib/Core/DIEBuilder.cpp
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Profile/Heatmap.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
A bolt/test/AArch64/dummy-return.s
M bolt/test/X86/dwarf5-addr-section-reuse.s
M bolt/test/X86/match-functions-with-calls-as-anchors.test
M clang-tools-extra/clang-tidy/boost/UseRangesCheck.cpp
M clang-tools-extra/clang-tidy/boost/UseRangesCheck.h
M clang-tools-extra/clang-tidy/bugprone/ForwardDeclarationNamespaceCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/ImplicitWideningOfMultiplicationResultCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/ImplicitWideningOfMultiplicationResultCheck.h
M clang-tools-extra/clang-tidy/modernize/UseRangesCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseRangesCheck.h
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/clang-tidy/utils/UseRangesCheck.cpp
M clang-tools-extra/clang-tidy/utils/UseRangesCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/boost/use-ranges.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/implicit-widening-of-multiplication-result.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-ranges.rst
M clang-tools-extra/test/clang-doc/basic-project.test
A clang-tools-extra/test/clang-tidy/checkers/boost/Inputs/use-ranges/fake_boost.h
A clang-tools-extra/test/clang-tidy/checkers/boost/Inputs/use-ranges/fake_std.h
A clang-tools-extra/test/clang-tidy/checkers/boost/use-ranges-pipe.cpp
M clang-tools-extra/test/clang-tidy/checkers/boost/use-ranges.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/implicit-widening-of-multiplication-result-constants.cpp
A clang-tools-extra/test/clang-tidy/checkers/modernize/Inputs/use-ranges/fake_std.h
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-ranges-pipe.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-ranges.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param-delayed.cpp
A clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param-templates.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param.cpp
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_cursor.py
M clang/bindings/python/tests/cindex/test_enums.py
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/docs/CommandGuide/clang.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang-c/Index.h
M clang/include/clang/APINotes/Types.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/Stmt.h
M clang/include/clang/AST/UnresolvedSet.h
M clang/include/clang/Analysis/FlowSensitive/ASTOps.h
M clang/include/clang/Basic/BuiltinsX86.def
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Basic/TokenKinds.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/DeclSpec.h
M clang/include/clang/Sema/Lookup.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/Interp/Boolean.h
M clang/lib/AST/Interp/ByteCodeEmitter.cpp
M clang/lib/AST/Interp/Context.cpp
M clang/lib/AST/Interp/EvalEmitter.cpp
M clang/lib/AST/Interp/Integral.h
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/InterpFrame.cpp
M clang/lib/AST/Interp/Pointer.h
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/ABIInfoImpl.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGRecordLayoutBuilder.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/CodeGenTypes.h
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/lib/Driver/ToolChains/Arch/X86.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/PS4CPU.h
M clang/lib/ExtractAPI/DeclarationFragments.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Headers/mm3dnow.h
M clang/lib/Headers/x86intrin.h
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseTemplate.cpp
M clang/lib/Sema/CMakeLists.txt
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmtAsm.cpp
M clang/lib/Sema/SemaTemplate.cpp
A clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/test/AST/Interp/c23.c
M clang/test/AST/Interp/lambda.cpp
M clang/test/AST/Interp/literals.cpp
M clang/test/C/C2y/n3244.c
M clang/test/CXX/basic/basic.lookup/basic.lookup.classref/p1-cxx11.cpp
M clang/test/CXX/basic/basic.lookup/basic.lookup.classref/p1.cpp
R clang/test/CXX/basic/basic.lookup/basic.lookup.qual/basic.lookup.qual.general/p3-example3.cpp
R clang/test/CXX/basic/basic.lookup/basic.lookup.qual/basic.lookup.qual.general/p3.cpp
M clang/test/CXX/class.derived/class.member.lookup/p8.cpp
M clang/test/CXX/class/class.compare/class.compare.default/p1.cpp
M clang/test/CXX/drs/cwg1xx.cpp
R clang/test/CXX/temp/temp.names/p3-23.cpp
M clang/test/CXX/temp/temp.res/p3.cpp
M clang/test/CodeGen/2009-06-14-anonymous-union-init.c
R clang/test/CodeGen/X86/3dnow-builtins.c
M clang/test/CodeGen/X86/math-builtins.c
M clang/test/CodeGen/X86/x86_64-vaarg.c
M clang/test/CodeGen/aarch64-byval-temp.c
M clang/test/CodeGen/attr-noundef.cpp
M clang/test/CodeGen/builtins-bitint.c
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/CodeGen/builtins-overflow.c
M clang/test/CodeGen/builtins-x86.c
M clang/test/CodeGen/constrained-math-builtins.c
M clang/test/CodeGen/ext-int-cc.c
M clang/test/CodeGen/ext-int-sanitizer.cpp
M clang/test/CodeGen/ext-int.c
M clang/test/CodeGen/extend-arg-64.c
M clang/test/CodeGen/ifunc.c
M clang/test/CodeGen/kcfi.c
M clang/test/CodeGen/paren-list-agg-init.cpp
M clang/test/CodeGen/ubsan-shift-bitint.c
M clang/test/CodeGen/voidptr-vaarg.c
M clang/test/CodeGenCXX/2011-12-19-init-list-ctor.cpp
M clang/test/CodeGenCXX/bitfield-access-empty.cpp
M clang/test/CodeGenCXX/class-layout.cpp
M clang/test/CodeGenCXX/compound-literals.cpp
M clang/test/CodeGenCXX/exceptions.cpp
M clang/test/CodeGenCXX/ext-int.cpp
M clang/test/CodeGenCXX/lambda-deterministic-captures.cpp
M clang/test/CodeGenCXX/nullptr.cpp
M clang/test/CodeGenCXX/partial-destruction.cpp
M clang/test/CodeGenCXX/pod-member-memcpys.cpp
M clang/test/CodeGenCXX/pr18962.cpp
M clang/test/CodeGenCXX/references.cpp
M clang/test/CodeGenCXX/temporaries.cpp
A clang/test/CodeGenCXX/zero-init-empty-virtual.cpp
M clang/test/CodeGenHIP/default-attributes.hip
M clang/test/CodeGenHIP/printf_nonhostcall.cpp
M clang/test/CodeGenHLSL/builtins/dot-builtin.hlsl
M clang/test/CodeGenObjCXX/lambda-to-block.mm
A clang/test/Driver/msse2avx.c
M clang/test/Driver/print-supported-extensions-riscv.c
A clang/test/Driver/ps4-linker.c
R clang/test/Driver/ps4-ps5-linker.c
A clang/test/Driver/ps5-linker.c
M clang/test/Driver/riscv-features.c
M clang/test/Driver/x86-target-features.c
M clang/test/FixIt/fixit.cpp
M clang/test/Frontend/fixed_point_comparisons.c
M clang/test/Headers/mm3dnow.c
A clang/test/Index/binop.cpp
M clang/test/Index/blocks.c
M clang/test/Index/c-index-api-loadTU-test.m
M clang/test/Index/index-concepts.cpp
M clang/test/Index/load-staticassert.cpp
M clang/test/Index/nested-binaryoperators.cpp
M clang/test/Index/preamble.c
M clang/test/Index/print-type.c
M clang/test/Index/print-type.cpp
M clang/test/Index/recursive-cxx-member-calls.cpp
M clang/test/Index/remap-load.c
M clang/test/Index/usrs.m
M clang/test/Misc/warning-flags.c
M clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/irbuilder_for_iterator.cpp
M clang/test/OpenMP/irbuilder_for_rangefor.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
M clang/test/OpenMP/task_member_call_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_codegen.cpp
M clang/test/Parser/cxx2a-concepts-requires-expr.cpp
M clang/test/Preprocessor/embed_codegen.cpp
M clang/test/Preprocessor/embed_constexpr.cpp
M clang/test/Preprocessor/embed_weird.cpp
M clang/test/Preprocessor/predefined-arch-macros.c
M clang/test/Preprocessor/ptrauth_feature.c
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/Preprocessor/x86_target_features.c
M clang/test/SemaCXX/cxx0x-noexcept-expression.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/pseudo-destructors.cpp
M clang/test/SemaCXX/static-assert-cxx17.cpp
M clang/test/SemaTemplate/dependent-base-classes.cpp
M clang/test/SemaTemplate/dependent-template-recover.cpp
M clang/test/SemaTemplate/instantiate-local-class.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
M clang/test/SemaTemplate/template-id-expr.cpp
M clang/test/SemaTemplate/typename-specifier-3.cpp
M clang/tools/c-index-test/c-index-test.c
M clang/tools/driver/cc1as_main.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXIndexDataConsumer.cpp
M clang/tools/libclang/libclang.map
M clang/unittests/Analysis/FlowSensitive/TestingSupport.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
M clang/unittests/Format/FormatTest.cpp
M compiler-rt/CODE_OWNERS.TXT
M compiler-rt/lib/asan/asan_globals_win.cpp
M compiler-rt/lib/asan/asan_malloc_linux.cpp
M compiler-rt/lib/asan/asan_report.cpp
M compiler-rt/lib/asan/asan_suppressions.cpp
M compiler-rt/lib/asan/asan_thread.cpp
M compiler-rt/lib/dfsan/dfsan_allocator.h
M compiler-rt/lib/hwasan/hwasan_allocator.cpp
M compiler-rt/lib/hwasan/hwasan_thread_list.cpp
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/lsan/lsan_common_linux.cpp
M compiler-rt/lib/lsan/lsan_thread.cpp
M compiler-rt/lib/memprof/memprof_thread.cpp
M compiler-rt/lib/msan/msan.cpp
M compiler-rt/lib/msan/msan_allocator.h
M compiler-rt/lib/msan/msan_interceptors.cpp
M compiler-rt/lib/nsan/nsan.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_allocator.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_primary32.h
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_primary64.h
M compiler-rt/lib/sanitizer_common/sanitizer_atomic.h
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
M compiler-rt/lib/ubsan/ubsan_diag.cpp
M compiler-rt/test/profile/instrprof-gc-sections.c
A compiler-rt/test/sanitizer_common/TestCases/Linux/preadv2.cpp
M flang/docs/Intrinsics.md
M flang/include/flang/Frontend/TargetOptions.h
M flang/include/flang/Lower/Bridge.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Intrinsics.h
M flang/include/flang/Optimizer/CodeGen/CGPasses.td
M flang/include/flang/Optimizer/CodeGen/Target.h
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Runtime/misc-intrinsic.h
M flang/include/flang/Tools/CLOptions.inc
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/CodeGen/TypeConverter.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/runtime/misc-intrinsic.cpp
A flang/test/Driver/tune-cpu-fir.f90
M flang/test/Fir/basic-program.fir
A flang/test/Lower/Intrinsics/rename.f90
A flang/test/Lower/Intrinsics/second.f90
M flang/test/Lower/namelist.f90
A flang/test/Lower/tune-cpu-llvm.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/do09.f90
M flang/tools/bbc/bbc.cpp
M flang/tools/tco/tco.cpp
M flang/unittests/Optimizer/FIRContextTest.cpp
M libc/benchmarks/gpu/CMakeLists.txt
M libc/benchmarks/gpu/LibcGpuBenchmark.cpp
M libc/benchmarks/gpu/LibcGpuBenchmark.h
M libc/cmake/modules/CheckCompilerFeatures.cmake
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/cmake/modules/LLVMLibCFlagRules.cmake
A libc/cmake/modules/compiler_features/check_builtin_ceil_floor_rint_trunc.cpp
A libc/cmake/modules/compiler_features/check_builtin_round.cpp
A libc/cmake/modules/compiler_features/check_builtin_roundeven.cpp
M libc/config/baremetal/api.td
M libc/config/baremetal/config.json
M libc/config/config.json
M libc/config/gpu/api.td
M libc/config/gpu/entrypoints.txt
M libc/config/gpu/headers.txt
M libc/config/linux/api.td
M libc/docs/configure.rst
M libc/include/assert.h.def
M libc/include/uchar.h.def
M libc/include/wchar.h.def
A libc/newhdrgen/yaml/assert.yaml
M libc/src/__support/OSUtil/baremetal/io.cpp
M libc/src/__support/threads/CMakeLists.txt
A libc/src/__support/threads/spin_lock.h
R libc/src/math/aarch64/CMakeLists.txt
R libc/src/math/aarch64/ceil.cpp
R libc/src/math/aarch64/ceilf.cpp
R libc/src/math/aarch64/floor.cpp
R libc/src/math/aarch64/floorf.cpp
R libc/src/math/aarch64/round.cpp
R libc/src/math/aarch64/roundf.cpp
R libc/src/math/aarch64/trunc.cpp
R libc/src/math/aarch64/truncf.cpp
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/ceil.cpp
M libc/src/math/generic/ceilf.cpp
M libc/src/math/generic/ceilf16.cpp
M libc/src/math/generic/floor.cpp
M libc/src/math/generic/floorf.cpp
M libc/src/math/generic/floorf16.cpp
M libc/src/math/generic/rint.cpp
M libc/src/math/generic/rintf.cpp
M libc/src/math/generic/rintf16.cpp
M libc/src/math/generic/round.cpp
M libc/src/math/generic/roundeven.cpp
M libc/src/math/generic/roundevenf.cpp
M libc/src/math/generic/roundevenf16.cpp
M libc/src/math/generic/roundf.cpp
M libc/src/math/generic/roundf16.cpp
M libc/src/math/generic/trunc.cpp
M libc/src/math/generic/truncf.cpp
M libc/src/math/generic/truncf16.cpp
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/heap_sort.h
M libc/src/stdlib/qsort.cpp
A libc/src/stdlib/qsort_data.h
M libc/src/stdlib/qsort_r.cpp
M libc/src/stdlib/qsort_util.h
A libc/src/stdlib/quick_sort.h
M libc/test/UnitTest/LibcTest.cpp
M libc/test/src/__support/CPP/type_traits_test.cpp
M libc/test/src/__support/FPUtil/fpbits_test.cpp
M libc/test/src/__support/big_int_test.cpp
M libc/test/src/math/RoundToIntegerTest.h
M libc/test/src/math/performance_testing/CMakeLists.txt
M libc/test/src/math/performance_testing/nearest_integer_funcs_perf.cpp
M libc/test/src/math/smoke/FMaxTest.h
M libc/test/src/math/smoke/FMaximumMagNumTest.h
M libc/test/src/math/smoke/FMaximumMagTest.h
M libc/test/src/math/smoke/FMaximumNumTest.h
M libc/test/src/math/smoke/FMaximumTest.h
M libc/test/src/math/smoke/FMinTest.h
M libc/test/src/math/smoke/FMinimumMagNumTest.h
M libc/test/src/math/smoke/FMinimumMagTest.h
M libc/test/src/math/smoke/FMinimumNumTest.h
M libc/test/src/math/smoke/FMinimumTest.h
M libc/test/src/math/smoke/FModTest.h
M libc/test/src/math/smoke/FrexpTest.h
M libc/test/src/math/smoke/ILogbTest.h
M libc/test/src/math/smoke/LogbTest.h
M libc/test/src/stdio/sprintf_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/SortingTest.h
A libc/test/src/stdlib/heap_sort_test.cpp
M libc/test/src/stdlib/qsort_test.cpp
A libc/test/src/stdlib/quick_sort_test.cpp
M libc/test/src/string/memory_utils/op_tests.cpp
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/19.rst
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__mdspan/extents.h
M libcxx/include/__ranges/single_view.h
M libcxx/include/__type_traits/invoke.h
M libcxx/include/__type_traits/is_fundamental.h
R libcxx/include/__type_traits/is_member_function_pointer.h
R libcxx/include/__type_traits/is_member_object_pointer.h
M libcxx/include/__type_traits/is_member_pointer.h
M libcxx/include/__type_traits/is_null_pointer.h
M libcxx/include/__type_traits/is_scalar.h
M libcxx/include/barrier
M libcxx/include/future
M libcxx/include/ios
M libcxx/include/latch
M libcxx/include/locale
M libcxx/include/locale.h
M libcxx/include/mdspan
M libcxx/include/module.modulemap
M libcxx/include/regex
M libcxx/include/semaphore
M libcxx/include/shared_mutex
M libcxx/include/stop_token
M libcxx/include/thread
M libcxx/include/type_traits
M libcxx/include/version
A libcxx/test/std/containers/views/mdspan/extents/dims.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/mdspan.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/ranges/range.factories/range.single.view/empty.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
M lld/COFF/Driver.cpp
M lld/ELF/Driver.cpp
M lld/docs/ReleaseNotes.rst
M lld/test/ELF/systemz-gotent-relax-und-dso.s
M lld/test/ELF/systemz-gotent-relax.s
M lld/test/ELF/systemz-init-padding.s
M lld/test/ELF/systemz-plt.s
M lld/wasm/Driver.cpp
M lldb/docs/index.rst
A lldb/docs/resources/qemu-testing.rst
R lldb/docs/use/qemu-testing.rst
M lldb/include/lldb/API/SBValue.h
M lldb/include/lldb/Core/EmulateInstruction.h
M lldb/include/lldb/Host/Config.h.cmake
A lldb/include/lldb/Symbol/SymbolLocation.h
M lldb/include/lldb/Target/Process.h
A lldb/include/lldb/Target/VerboseTrapFrameRecognizer.h
M lldb/include/lldb/Utility/Event.h
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
A lldb/packages/Python/lldbsuite/test/make/libcxx-simulators-common/compressed_pair.h
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.h
M lldb/source/Plugins/Process/Utility/NativeProcessSoftwareSingleStep.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolLocator/CMakeLists.txt
M lldb/source/Plugins/SymbolVendor/ELF/SymbolVendorELF.cpp
M lldb/source/Target/AssertFrameRecognizer.cpp
M lldb/source/Target/CMakeLists.txt
M lldb/source/Target/Process.cpp
A lldb/source/Target/VerboseTrapFrameRecognizer.cpp
M lldb/source/Utility/Event.cpp
R lldb/test/API/debuginfod/Normal/Makefile
R lldb/test/API/debuginfod/Normal/TestDebuginfod.py
R lldb/test/API/debuginfod/Normal/main.c
R lldb/test/API/debuginfod/SplitDWARF/Makefile
R lldb/test/API/debuginfod/SplitDWARF/TestDebuginfodDWP.py
R lldb/test/API/debuginfod/SplitDWARF/main.c
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/string/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/string/TestDataFormatterLibcxxStringSimulator.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/string/main.cpp
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/unique_ptr/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/unique_ptr/TestDataFormatterLibcxxUniquePtrSimulator.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/unique_ptr/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string/simulator/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string/simulator/TestDataFormatterLibcxxStringSimulator.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string/simulator/main.cpp
M lldb/test/API/functionalities/load_unload/TestLoadUnload.py
M lldb/test/API/python_api/event/TestEvents.py
A lldb/test/API/python_api/event/stop_hook.py
M lldb/test/API/python_api/formatters/TestFormattersSBAPI.py
M lldb/test/API/python_api/formatters/main.cpp
M lldb/test/API/python_api/formatters/synth.py
A lldb/test/API/riscv/break-undecoded/Makefile
A lldb/test/API/riscv/break-undecoded/TestBreakpointIllegal.py
A lldb/test/API/riscv/break-undecoded/compressed.c
A lldb/test/API/riscv/break-undecoded/main.c
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/test/API/tools/lldb-dap/stepInTargets/TestDAP_stepInTargets.py
M lldb/test/API/tools/lldb-dap/stepInTargets/main.cpp
A lldb/test/Shell/Recognizer/Inputs/verbose_trap.cpp
A lldb/test/Shell/Recognizer/verbose_trap.test
M lldb/test/Shell/SymbolFile/add-dsym.test
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/unittests/Process/ProcessEventDataTest.cpp
M llvm/docs/Frontend/PerformanceTips.rst
M llvm/docs/LangRef.rst
M llvm/docs/MyFirstTypoFix.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
A llvm/docs/SandboxIR.md
M llvm/docs/UserGuides.rst
M llvm/include/llvm-c/Core.h
M llvm/include/llvm/ADT/ArrayRef.h
M llvm/include/llvm/ADT/PackedVector.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
A llvm/include/llvm/CodeGen/MachineVerifier.h
A llvm/include/llvm/CodeGen/RuntimeLibcallUtil.h
R llvm/include/llvm/CodeGen/RuntimeLibcalls.h
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/include/llvm/CodeGen/TargetLowering.h
A llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFFormValue.h
M llvm/include/llvm/Demangle/MicrosoftDemangle.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsRISCVXCV.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/IR/PatternMatch.h
A llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/VectorBuilder.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/MC/MCTargetOptions.h
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/include/llvm/Support/GenericIteratedDominanceFrontier.h
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/DwarfEHPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/DebugInfo/DWARF/DWARFFormValue.cpp
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/lib/IR/CMakeLists.txt
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/Metadata.cpp
A llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/VectorBuilder.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/lib/Object/IRSymtab.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64PBQPRegAlloc.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
M llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNILPSched.cpp
M llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
M llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.cpp
M llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFStreamer.cpp
M llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMLegalizerInfo.h
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.h
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZInstrFormats.td
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ13.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ15.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ16.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ196.td
M llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.h
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86Instr3DNow.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86Subtarget.cpp
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopRotation.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/CostModel/AArch64/no-sve-no-neon.ll
A llvm/test/Analysis/ValueTracking/knownbits-x86-hadd-hsub.ll
M llvm/test/Bindings/llvm-c/echo.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-concat-vectors.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-fp-casts.mir
M llvm/test/CodeGen/AArch64/cmp-to-cmn.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/ptrauth-call.ll
M llvm/test/CodeGen/AArch64/ptrauth-invoke.ll
M llvm/test/CodeGen/AArch64/statepoint-twoaddr.mir
M llvm/test/CodeGen/AArch64/typepromotion-overflow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/twoaddr-extract-dyn-v7f64.mir
M llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/check-subtarget-features.ll
M llvm/test/CodeGen/AMDGPU/early-lis-two-address-partial-def.mir
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/gfx10-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
A llvm/test/CodeGen/AMDGPU/global-alias.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/global_atomic_optimizer_fp_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_optimizer_fp_no_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wavefrontsize.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-global.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-local.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-fma-f64.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-wmma.mir
M llvm/test/CodeGen/AMDGPU/unknown-processor.ll
M llvm/test/CodeGen/AMDGPU/verifier-sdwa-cvt.mir
M llvm/test/CodeGen/AMDGPU/verify-constant-bus-violations.mir
M llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
M llvm/test/CodeGen/AMDGPU/verify-duplicate-literal.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
M llvm/test/CodeGen/AMDGPU/verify-image-vaddr-align.mir
M llvm/test/CodeGen/AMDGPU/verify-image.mir
M llvm/test/CodeGen/AMDGPU/verify-scalar-store.mir
M llvm/test/CodeGen/AMDGPU/verify-sop.mir
M llvm/test/CodeGen/AMDGPU/verify-vimage-vsample.mir
M llvm/test/CodeGen/AMDGPU/verify-vopd-gfx12.mir
M llvm/test/CodeGen/AMDGPU/verify-vopd.mir
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/Hexagon/two-addr-tied-subregs.mir
A llvm/test/CodeGen/LoongArch/typepromotion-overflow.ll
M llvm/test/CodeGen/MIR/Generic/dbg-value-missing-loc.mir
M llvm/test/CodeGen/MIR/X86/dbg-value-list.mir
A llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
M llvm/test/CodeGen/NVPTX/load-store.ll
A llvm/test/CodeGen/NVPTX/rcp-opt.ll
A llvm/test/CodeGen/PowerPC/peephole-combineRLWINM-liveness.mir
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmul.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
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M llvm/test/CodeGen/RISCV/verify-instr.mir
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A llvm/test/CodeGen/SystemZ/vec-cmp-08.ll
R llvm/test/CodeGen/X86/3dnow-intrinsics.ll
M llvm/test/CodeGen/X86/combine-shl.ll
M llvm/test/CodeGen/X86/combine-srl.ll
R llvm/test/CodeGen/X86/commute-3dnow.ll
M llvm/test/CodeGen/X86/distancemap.mir
M llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir
A llvm/test/CodeGen/X86/huge-stack.ll
M llvm/test/CodeGen/X86/inline-asm-memop.ll
A llvm/test/CodeGen/X86/knownbits-hadd-hsub.ll
M llvm/test/CodeGen/X86/pr35982.ll
M llvm/test/CodeGen/X86/pr53247.ll
M llvm/test/CodeGen/X86/prefetch.ll
R llvm/test/CodeGen/X86/stack-folding-3dnow.ll
M llvm/test/CodeGen/X86/statepoint-vreg-twoaddr.mir
M llvm/test/CodeGen/X86/twoaddr-mul2.mir
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M llvm/test/MC/AMDGPU/wave32.s
A llvm/test/MC/AsmParser/sse2avx-att.s
M llvm/test/MC/Disassembler/AMDGPU/gfx10-wave32.txt
M llvm/test/MC/Disassembler/SystemZ/insns.txt
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/SystemZ/insn-good-z15.s
M llvm/test/MC/SystemZ/insn-good-z196.s
M llvm/test/MC/SystemZ/insn-good-zEC12.s
M llvm/test/MC/SystemZ/insn-good.s
A llvm/test/MC/X86/intel-syntax-expr.s
M llvm/test/TableGen/riscv-target-def.td
A llvm/test/Transforms/AggressiveInstCombine/memchr.ll
M llvm/test/Transforms/EarlyCSE/math-2.ll
M llvm/test/Transforms/InstSimplify/and-or-implied-cond.ll
M llvm/test/Transforms/InstSimplify/ptrtoint.ll
A llvm/test/Transforms/LoopIdiom/AArch64/ctlz.ll
A llvm/test/Transforms/LoopRotate/minsize-disable.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-drop-solution.ll
A llvm/test/Transforms/LoopStrengthReduce/X86/preserving-debugloc-phi-binop.ll
M llvm/test/Transforms/LoopVectorize/AArch64/select-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vplan-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-ordered-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
A llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/pointer-runtime-checks-unprofitable.ll
A llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/MemCpyOpt/memcpy-zero-size.ll
M llvm/test/Transforms/MemCpyOpt/memset-memcpy-dbgloc.ll
M llvm/test/Transforms/MemCpyOpt/memset-memcpy-redundant-memset.ll
M llvm/test/Transforms/MemCpyOpt/opaque-ptr.ll
M llvm/test/Transforms/PhaseOrdering/X86/blendv-select.ll
A llvm/test/Transforms/PhaseOrdering/pr98799-inline-simplifycfg-ub.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/X86/memcpy-inline-non-constant-len.ll
A llvm/test/Transforms/SLPVectorizer/X86/select-reduction-op.ll
A llvm/test/Transforms/SimpleLoopUnswitch/preserving-dropping-debugloc-nontrivial.ll
M llvm/test/Transforms/SimplifyCFG/UnreachableEliminate.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
M llvm/test/Verifier/intrinsic-immarg.ll
M llvm/test/tools/llvm-readobj/ELF/ARM/attribute-big-endian.test
A llvm/test/tools/llvm-split/AMDGPU/declarations.ll
M llvm/tools/llc/NewPMDriver.cpp
M llvm/tools/llvm-c-test/echo.cpp
M llvm/tools/lto/lto.cpp
M llvm/unittests/Analysis/VectorUtilsTest.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFDebugInfoTest.cpp
M llvm/unittests/IR/PatternMatch.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
M llvm/utils/TableGen/X86InstrMappingEmitter.cpp
M llvm/utils/TableGen/X86ManualInstrMapping.def
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lldb/include/lldb/Host/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Target/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/AsmParser/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
M mlir/docs/DialectConversion.md
M mlir/include/mlir/Analysis/Presburger/QuasiPolynomial.h
M mlir/include/mlir/Bytecode/BytecodeOpInterface.h
M mlir/include/mlir/Bytecode/BytecodeReaderConfig.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
M mlir/include/mlir/Dialect/SCF/TransformOps/SCFTransformOps.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/IR/AffineMap.h
M mlir/include/mlir/Interfaces/VectorInterfaces.td
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Analysis/Presburger/Barvinok.cpp
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/lib/Analysis/Presburger/LinearTransform.cpp
M mlir/lib/Analysis/Presburger/PWMAFunction.cpp
M mlir/lib/Analysis/Presburger/PresburgerRelation.cpp
M mlir/lib/Analysis/Presburger/QuasiPolynomial.cpp
M mlir/lib/Analysis/Presburger/Simplex.cpp
M mlir/lib/Analysis/Presburger/Utils.cpp
M mlir/lib/Bytecode/Writer/IRNumbering.cpp
M mlir/lib/Conversion/BufferizationToMemRef/BufferizationToMemRef.cpp
M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
M mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/LowerDeallocations.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/TransformOps/CMakeLists.txt
M mlir/lib/Dialect/SCF/TransformOps/SCFTransformOps.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMask.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
M mlir/lib/IR/AffineExpr.cpp
M mlir/lib/IR/AffineMap.cpp
M mlir/lib/Target/LLVM/ROCDL/Target.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.h
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/python/mlir/dialects/linalg/opdsl/lang/comprehension.py
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/Conversion/FuncToLLVM/func-memref-return.mlir
M mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_1d.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_2d.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_affine_apply.mlir
M mlir/test/Dialect/Bufferization/Transforms/lower-deallocations.mlir
M mlir/test/Dialect/Linalg/hoisting.mlir
M mlir/test/Dialect/Linalg/vectorization.mlir
M mlir/test/Dialect/SCF/canonicalize.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Dialect/Vector/vector-transfer-collapse-inner-most-dims.mlir
M mlir/test/Dialect/Vector/vector-transfer-permutation-lowering.mlir
M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
M mlir/test/Dialect/Vector/vector-transfer-unroll.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-2d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-3d.mlir
M mlir/test/Integration/GPU/CUDA/async.mlir
M mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir
M mlir/test/Integration/GPU/ROCM/printf.mlir
M mlir/test/Integration/GPU/ROCM/two-modules.mlir
M mlir/test/Integration/GPU/ROCM/vecadd.mlir
M mlir/test/Integration/GPU/ROCM/vector-transferops.mlir
A mlir/test/Target/LLVMIR/Import/tune-cpu.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
A mlir/test/Target/LLVMIR/tune-cpu.mlir
A mlir/test/Transforms/test-block-legalization.mlir
M mlir/test/mlir-tblgen/gen-dialect-doc.td
M mlir/test/python/dialects/vector.py
M mlir/tools/mlir-tblgen/OpDocGen.cpp
M mlir/unittests/IR/AffineExprTest.cpp
M offload/test/api/omp_dynamic_shared_memory_amdgpu.c
M offload/test/api/omp_dynamic_shared_memory_mixed_amdgpu.c
M offload/test/offloading/bug51781.c
M offload/test/offloading/bug51982.c
M openmp/libompd/gdb-plugin/ompd/ompd.py
M openmp/libompd/gdb-plugin/ompd/ompd_callbacks.py
M openmp/runtime/src/include/omp-tools.h.var
M openmp/runtime/src/kmp_barrier.cpp
M openmp/runtime/src/kmp_runtime.cpp
M openmp/runtime/src/kmp_wait_release.h
M openmp/runtime/src/ompt-specific.cpp
M openmp/runtime/test/ompt/callback.h
M openmp/runtime/test/ompt/parallel/nested.c
M openmp/runtime/test/ompt/parallel/nested_lwt.c
M openmp/runtime/test/ompt/parallel/nested_serialized.c
M openmp/runtime/test/ompt/parallel/nested_thread_num.c
M openmp/runtime/test/ompt/parallel/no_thread_num_clause.c
M openmp/runtime/test/ompt/parallel/normal.c
M openmp/runtime/test/ompt/parallel/not_enough_threads.c
M openmp/runtime/test/ompt/synchronization/barrier/explicit.c
M openmp/runtime/test/ompt/synchronization/barrier/for_loop.c
M openmp/runtime/test/ompt/synchronization/barrier/for_simd.c
M openmp/runtime/test/ompt/synchronization/barrier/implicit_task_data.c
M openmp/runtime/test/ompt/synchronization/barrier/parallel_region.c
M openmp/runtime/test/ompt/synchronization/barrier/sections.c
M openmp/runtime/test/ompt/synchronization/barrier/single.c
M openmp/runtime/test/ompt/tasks/explicit_task.c
M openmp/runtime/test/ompt/tasks/serialized.c
M openmp/runtime/test/ompt/tasks/task_in_joinbarrier.c
M openmp/runtime/test/ompt/tasks/untied_task.c
M openmp/tools/archer/tests/lit.cfg
M openmp/tools/multiplex/tests/custom_data_storage/custom_data_storage.c
M openmp/tools/multiplex/tests/print/print.c
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/string/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
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