[all-commits] [llvm/llvm-project] a1ffab: [lldb][riscv] Fix setting breakpoint for undecoded...

ita-sc via All-commits all-commits at lists.llvm.org
Tue Jul 16 02:04:04 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a1ffabc403d4ce55ab2e665511b0b68a16d4850b
      https://github.com/llvm/llvm-project/commit/a1ffabc403d4ce55ab2e665511b0b68a16d4850b
  Author: ita-sc <109672931+ita-sc at users.noreply.github.com>
  Date:   2024-07-16 (Tue, 16 Jul 2024)

  Changed paths:
    M lldb/include/lldb/Core/EmulateInstruction.h
    M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
    M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.h
    M lldb/source/Plugins/Process/Utility/NativeProcessSoftwareSingleStep.cpp
    A lldb/test/API/riscv/break-undecoded/Makefile
    A lldb/test/API/riscv/break-undecoded/TestBreakpointIllegal.py
    A lldb/test/API/riscv/break-undecoded/compressed.c
    A lldb/test/API/riscv/break-undecoded/main.c

  Log Message:
  -----------
  [lldb][riscv] Fix setting breakpoint for undecoded instruction  (#90075)

This patch adds an interface GetLastInstrSize to get information about
the size of last tried to be decoded instruction and uses it to set
software breakpoint if the memory can be decoded as instruction.

RISC-V architecture instruction format specifies the length of
instruction in first bits, so we can set a breakpoint for these cases.
This is needed as RISCV have a lot of extensions, that are not supported
by `EmulateInstructionRISCV`.



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