[all-commits] [llvm/llvm-project] 99d6c6: [VPlan] Model branch cond to enter scalar epilogue...

Florian Hahn via All-commits all-commits at lists.llvm.org
Fri Jul 5 02:09:05 PDT 2024 

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 99d6c6d936573d209f29c3cc6749eaf59912bd2a
      https://github.com/llvm/llvm-project/commit/99d6c6d936573d209f29c3cc6749eaf59912bd2a
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-07-05 (Fri, 05 Jul 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence-fold-tail.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/fixed-order-recurrence.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/streaming-compatible-sve-no-maximize-bandwidth.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
    M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
    M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
    M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
    M llvm/test/Transforms/LoopVectorize/ARM/sphinx.ll
    M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
    M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
    M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/defaults.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/ordered-reduction.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/scalable-basics.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
    M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
    M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
    M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
    M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
    M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
    M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
    M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
    M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
    M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
    M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
    M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
    M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
    M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
    M llvm/test/Transforms/LoopVectorize/branch-weights.ll
    M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
    M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
    M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
    M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
    M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
    M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
    M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
    M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
    M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
    M llvm/test/Transforms/LoopVectorize/fix-reduction-dbg.ll
    M llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll
    M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
    M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
    M llvm/test/Transforms/LoopVectorize/induction.ll
    M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
    M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
    M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
    M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
    M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
    M llvm/test/Transforms/LoopVectorize/loop-form.ll
    M llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
    M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
    M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
    M llvm/test/Transforms/LoopVectorize/reduction-align.ll
    M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
    M llvm/test/Transforms/LoopVectorize/reduction-odd-interleave-counts.ll
    M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
    M llvm/test/Transforms/LoopVectorize/reduction.ll
    M llvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
    M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
    M llvm/test/Transforms/LoopVectorize/select-cmp.ll
    M llvm/test/Transforms/LoopVectorize/select-reduction-start-value-may-be-undef-or-poison.ll
    M llvm/test/Transforms/LoopVectorize/select-reduction.ll
    M llvm/test/Transforms/LoopVectorize/store-reduction-results-in-tail-folded-loop.ll
    M llvm/test/Transforms/LoopVectorize/strict-fadd-interleave-only.ll
    M llvm/test/Transforms/LoopVectorize/trunc-reductions.ll
    M llvm/test/Transforms/LoopVectorize/vplan-iv-transforms.ll
    M llvm/test/Transforms/LoopVectorize/vplan-printing-before-execute.ll
    M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
    M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
    M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge-vf1.ll
    M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
    M llvm/test/Transforms/PhaseOrdering/AArch64/hoist-runtime-checks.ll
    M llvm/test/Transforms/PhaseOrdering/X86/hoist-load-of-baseptr.ll
    M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
    M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h

  Log Message:
  -----------
  [VPlan] Model branch cond to enter scalar epilogue in VPlan. (#92651)

This patch moves branch condition creation to enter the scalar epilogue
loop to VPlan. Modeling the branch in the middle block also requires
modeling the successor blocks. This is done using the recently
introduced VPIRBasicBlock.

Note that the middle.block is still created as part of the skeleton and
then patched in during VPlan execution. Unfortunately the skeleton needs
to create the middle.block early on, as it is also used for induction
resume value creation and is also needed to properly update the
dominator tree during skeleton creation.

After this patch lands, I plan to move induction resume value and phi
node creation in the scalar preheader to VPlan. Once that is done, we
should be able to create the middle.block in VPlan directly.

This is a re-worked version based on the earlier
https://reviews.llvm.org/D150398 and the main change is the use of
VPIRBasicBlock.

Depends on https://github.com/llvm/llvm-project/pull/92525

PR: https://github.com/llvm/llvm-project/pull/92651



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