[all-commits] [llvm/llvm-project] f4d058: [SelectionDAG] Ignore LegalTypes parameter in Targ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f4d058fdb1f456fdab9593eab4955a62b6bb8e70
      https://github.com/llvm/llvm-project/commit/f4d058fdb1f456fdab9593eab4955a62b6bb8e70
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-07-04 (Thu, 04 Jul 2024)

  Changed paths:
    M llvm/lib/CodeGen/TargetLoweringBase.cpp
    M llvm/test/CodeGen/X86/shift-combine.ll

  Log Message:
  -----------
  [SelectionDAG] Ignore LegalTypes parameter in TargetLoweringBase::getShiftAmountTy. (#97645)

When this flag was false, `getShiftAmountTy` would return `PointerTy`
instead of the target's preferred shift amount type for scalar shifts.

This used to be needed when the target's preferred type wasn't large
enough to support the shift amount needed for an illegal type. For
example, any scalar type larger than i256 on X86 since X86's preferred
shift amount type is i8.

For a while now, we've had code that uses `MVT::i32` if `LegalTypes` is
true, but the target's preferred type is too small. This fixed a
repeated cause of crashes where the `LegalTypes` flag wasn't set to
false when illegal types could be present.

This has made it unnecessary to set the `LegalTypes` flag correctly, and
as a result more and more places don't. So I think its time for this
flag to go away.

This first patch just disconnects the flag. The interface and all
callers will be cleaned up in follow up patches.

The X86 test change is because we now have the same shift type for both
shifts in a (srl (sub C, (shl X, 32), 32) sequence. This makes the shift
amounts appear equal in value and type which is needed to enable a
combine.



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