[all-commits] [llvm/llvm-project] a70da4: [clang][dataflow] Teach `AnalysisASTVisitor` that ...
Matt Arsenault via All-commits
all-commits at lists.llvm.org
Thu Jul 4 02:33:35 PDT 2024
Branch: refs/heads/users/arsenm/amdgpu-add-subtarget-feature-fine-grained-remote-memory-atomics
Home: https://github.com/llvm/llvm-project
Commit: a70da4e0b569d3e83d405a0248e9c71635f29f96
https://github.com/llvm/llvm-project/commit/a70da4e0b569d3e83d405a0248e9c71635f29f96
Author: martinboehme <mboehme at google.com>
Date: 2024-07-04 (Thu, 04 Jul 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/ASTOps.h
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] Teach `AnalysisASTVisitor` that `typeid()` can be evaluated. (#96731)
We were previously treating the operand of `typeid()` as being
definitely
unevaluated, but it can be evaluated if it is a glvalue of polymorphic
type.
This patch includes a test that fails without the fix.
Commit: 6456b3fc06e6013be6f197912caf91ca77cc2a18
https://github.com/llvm/llvm-project/commit/6456b3fc06e6013be6f197912caf91ca77cc2a18
Author: martinboehme <mboehme at google.com>
Date: 2024-07-04 (Thu, 04 Jul 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/ASTOps.h
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
Revert "[clang][dataflow] Teach `AnalysisASTVisitor` that `typeid()` can be evaluated." (#96766)
Reverts llvm/llvm-project#96731
It causes CI failures.
Commit: c9f09615185358c9627f6e57c5d031b9085fbc03
https://github.com/llvm/llvm-project/commit/c9f09615185358c9627f6e57c5d031b9085fbc03
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-04 (Thu, 04 Jul 2024)
Changed paths:
M libc/src/stdlib/rand.cpp
M libc/src/stdlib/srand.cpp
Log Message:
-----------
[libc] Fix Fuscia builder failing on atomic warnings (#96791)
Summary:
This function uses atomics now, which emit warnings on some platforms
that don't support full lock-free atomics. These aren't specifically
wrong, and in the future we could investigate a libc configuration
specialized for single-threaded microprocessors, but for now we should
get the bot running again.
Commit: 7c6947a422840dd18fbe82ecbe78ad73a434145c
https://github.com/llvm/llvm-project/commit/7c6947a422840dd18fbe82ecbe78ad73a434145c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-04 (Thu, 04 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
Log Message:
-----------
[RISCV][GISel] Support fcmp and fclass for Zfh. (#96696)
Commit: 9a076666b567e4f7259ab36d08ae64c013fe4e3b
https://github.com/llvm/llvm-project/commit/9a076666b567e4f7259ab36d08ae64c013fe4e3b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-04 (Thu, 04 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
Log Message:
-----------
[RISCV][GISel] Support fptoi and itofp for Zfh. (#96707)
Commit: 276f1f8eeee8a64445ef2ad982c0285df58a0d46
https://github.com/llvm/llvm-project/commit/276f1f8eeee8a64445ef2ad982c0285df58a0d46
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-04 (Thu, 04 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
Log Message:
-----------
[RISCV] Add Zfh to typeIsScalarFPArith and simplify code. NFC
Now that we have Zfh supported and tested for every opcode that uses
typeIsScalarFPArith, we can fold Zfh into it.
Commit: 8204551210baba617d272b8e7d8667de892ffcc5
https://github.com/llvm/llvm-project/commit/8204551210baba617d272b8e7d8667de892ffcc5
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-04 (Thu, 04 Jul 2024)
Changed paths:
M llvm/include/llvm/ADT/SmallVector.h
M llvm/lib/Support/SmallVector.cpp
Log Message:
-----------
[ADT] Always use 32-bit size type for SmallVector with 16-bit elements (#95536)
`SmallVector` has a special case to allow vector of char to exceed 4 GB
in
size on 64-bit hosts. Apply this special case only for 8-bit element
types, instead of all element types < 32 bits.
This makes `SmallVector<MCPhysReg>` more compact because `MCPhysReg` is
`uint16_t`.
---------
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: 729f08ea56928a7a2a42f265bce10bbbdddc2a15
https://github.com/llvm/llvm-project/commit/729f08ea56928a7a2a42f265bce10bbbdddc2a15
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-07-04 (Thu, 04 Jul 2024)
Changed paths:
M llvm/include/llvm/ADT/SmallVector.h
M llvm/lib/Support/SmallVector.cpp
Log Message:
-----------
Revert "[ADT] Always use 32-bit size type for SmallVector with 16-bit elements" (#96826)
Reverts llvm/llvm-project#95536, this is breaking macOS GreenDragon
buildbots on arm64 and x86_64
https://green.lab.llvm.org/job/llvm.org/view/LLDB/job/as-lldb-cmake/6522/console,
also breaks the Darwin LLVM buildbots:
https://lab.llvm.org/buildbot/#/builders/23/builds/398
Commit: ed39a85f8618b63023545bb687684a0f11d5272f
https://github.com/llvm/llvm-project/commit/ed39a85f8618b63023545bb687684a0f11d5272f
Author: DianQK <dianqk at dianqk.net>
Date: 2024-07-04 (Thu, 04 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/CodeGen/AArch64/arm64-jumptable.ll
M llvm/test/Transforms/SimplifyCFG/ForwardSwitchConditionToPHI.ll
M llvm/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll
Log Message:
-----------
Revert "[SimplifyCFG] Forward indirect switch condition value if it can help fold the PHI (#95932)"
This reverts commit 0c56fd0a29ffb0425ca2ee2a4ff8f380880fdbfa.
This is breaking https://lab.llvm.org/buildbot/#/builders/72/builds/483.
Commit: d08af8b45cfb6864573f251c7b08dd8411347884
https://github.com/llvm/llvm-project/commit/d08af8b45cfb6864573f251c7b08dd8411347884
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-04 (Thu, 04 Jul 2024)
Changed paths:
M libc/src/stdlib/rand.cpp
M libc/src/stdlib/srand.cpp
Log Message:
-----------
[libc] Remove atomic alignment diagnostics globally (#96803)
Summary:
These warnings mean that it will lower to a libcall. Previously we just
disabled it locally, which didn't work with GCC. This patch does it
globally in the compiler options if the compiler is clang.
Commit: 983c0aa94f660b805244f6c07cb540070b4ae018
https://github.com/llvm/llvm-project/commit/983c0aa94f660b805244f6c07cb540070b4ae018
Author: DianQK <dianqk at dianqk.net>
Date: 2024-07-04 (Thu, 04 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/CodeGen/AArch64/arm64-jumptable.ll
M llvm/test/Transforms/SimplifyCFG/ForwardSwitchConditionToPHI.ll
M llvm/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll
Log Message:
-----------
Reapply "[SimplifyCFG] Forward indirect switch condition value if it can help fold the PHI (#95932)"
This reverts commit c7adfb5e715334c9de176f434088bd9f89aa9eb3.
Commit: 6ae8639c336263669f7d91c962640fb6483cb4d0
https://github.com/llvm/llvm-project/commit/6ae8639c336263669f7d91c962640fb6483cb4d0
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-07-04 (Thu, 04 Jul 2024)
Changed paths:
M llvm/test/CodeGen/Generic/MachineBranchProb.ll
Log Message:
-----------
[CodeGen][NewPM] Port machine-branch-prob to new pass manager (#96389)
Like IR version `print<branch-prob>`, there is also a
`print<machine-branch-prob>`.
Commit: bdd99ceb1b92829b4ad56e1c809f95d996e066be
https://github.com/llvm/llvm-project/commit/bdd99ceb1b92829b4ad56e1c809f95d996e066be
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-07-04 (Thu, 04 Jul 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBranchProbabilityInfo.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
M llvm/lib/CodeGen/IfConversion.cpp
M llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
M llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineTraceMetrics.cpp
M llvm/lib/CodeGen/TailDuplication.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
M llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
M llvm/lib/Target/Hexagon/HexagonLoopAlign.cpp
M llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp
M llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
M llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
M llvm/test/CodeGen/Generic/MachineBranchProb.ll
Log Message:
-----------
Revert "[CodeGen][NewPM] Port machine-branch-prob to new pass manager" (#96858)
Reverts llvm/llvm-project#96389
Some ppc bots failed.
Commit: a060a2a8062d5acd7922be7b869b34e4b0671e9d
https://github.com/llvm/llvm-project/commit/a060a2a8062d5acd7922be7b869b34e4b0671e9d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-07-04 (Thu, 04 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
Log Message:
-----------
AMDGPU: Add a subtarget feature for fine-grained remote memory support
Atomic access to fine-grained remote memory does not work on all
subtargets. Add a feature for targets where this is expected to work.
Compare: https://github.com/llvm/llvm-project/compare/1a6ff86e1ef0...a060a2a8062d
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