[all-commits] [llvm/llvm-project] cbd3f2: [NVPTX] Support inline asm with 128-bit operand in...

[Chengjunp via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cbd3f252e3ff2115497c771590f69f1c989b402e
      https://github.com/llvm/llvm-project/commit/cbd3f252e3ff2115497c771590f69f1c989b402e
  Author: Chengjunp <chengjunp at Nvidia.com>
  Date:   2024-07-01 (Mon, 01 Jul 2024)

  Changed paths:
    M clang/lib/Basic/Targets/NVPTX.h
    M llvm/docs/LangRef.rst
    M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
    M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
    M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.td
    A llvm/test/CodeGen/NVPTX/inline-asm-b128-test1.ll
    A llvm/test/CodeGen/NVPTX/inline-asm-b128-test2.ll
    A llvm/test/CodeGen/NVPTX/inline-asm-b128-test3.ll

  Log Message:
  -----------
  [NVPTX] Support inline asm with 128-bit operand in NVPTX backend (#97113)

This change supports the 128-bit operands for inline ptx asm, both input
and output.\
\
The major changes are:

- Tablegen:\
    Define Int128Regs in NVPTXRegisterInfo.td. But this register does
not set as general register type in NVPTX backend so that this change
will not influence the codegen without inline asm.\
    Define three NVPTX intrinsics, IMOV128rr, V2I64toI128 and
I128toV2I64. The first one moves a register, the second one moves two
64-bit registers into one 128-bit register, and the third one just does
the opposite.
- NVPTXISelLowering & NVPTXISelDAGToDAG:\
    Custom lowering CopyToReg and CopyFromReg with 128-bit operands.
CopyToReg deals with the inputs of the inline asm and the CopyFromReg
deals with the outputs.\
    CopyToReg is custom lowered into a V2I64toI128, which takes in the
expanded values(Lo and Hi) of the input, and moves into a 128-bit reg.\
    CopyFromReg is custom lowered by adding a I128toV2I64, which breaks
down the 128-bit outputs of inline asm into the expanded values.



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